41a166d11195e4d616a10be35a300c181c7b4cd0
[litex.git] / .gitmodules
1 [submodule "verilog/lm32/submodule"]
2 path = verilog/lm32/submodule
3 url = https://github.com/m-labs/lm32.git
4 [submodule "verilog/mor1kx/submodule"]
5 path = verilog/mor1kx/submodule
6 url = https://github.com/openrisc/mor1kx.git