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  17 From: Staf Verhaegen <staf@fibraservi.eu>
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  34 Subject: Re: [libre-riscv-dev] cache SRAM organisation
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  63 Luke Kenneth Casson Leighton schreef op do 26-03-2020 om 21:28 [+0000]:
  64 > On Thu, Mar 26, 2020 at 8:08 PM Staf Verhaegen <staf@fibraservi.eu> wrote=
  65 :
  66 > > Luke Kenneth Casson Leighton schreef op do 26-03-2020 om 15:15 [+0000]:
  67 > > > On Thursday, March 26, 2020, Staf Verhaegen <staf@fibraservi.eu> wrot=
  68 e:
  69 > > > > I can understand you do this to implement functional units withconf=
  70 igurable pipeline length but I would strongly discourage to pipelineregiste=
  71 r files after each other .
  72 > > >=20
  73 > > >=20
  74 > > > "pipeline register files after each other"? apologies i am not clear =
  75 whatyou mean, here.  do you mean "don't do write-thru on the Regfile"?
  76 > >=20
  77 > > No I meant for example connecting the output of one port of an asynchro=
  78 nous RAM to for example the address input of another port of an asynchronou=
  79 s RAM.
  80 >=20
  81 > ah right, no definitely not.  the connections are:
  82 > RegisterFile readport[0..R] =3D=3D> FunctionUnit[0..M] operand latches   =
  83                                          pipeline stage 0                  =
  84                           pipeline stage 1                                 =
  85            ...                                            pipeline stage NR=
  86 egisterFile writeport[0..W] <=3D=3D FunctionUnit[0..M] result latches
  87 > (and also: )register file bypass forwardingbus <=3D=3D FunctionUnit resul=
  88 t latchesregister file bypass forwardingbus =3D=3D> FunctionUnit operand la=
  89 tches
  90 > so the asynchronous SRAMs will definitely *only* be connected to SFFlatch=
  91 es.  *not* to other asynchronous SRAMs.
  92
  93 I still feel you intermix synchronous and write-through in this statement, =
  94 the above seems to be possible with synchronous SRAMs.
  95
  96 greets,
  97 Staf.
  98
  99
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 112 Cmh0dHA6Ly9saXN0cy5saWJyZS1yaXNjdi5vcmcvbWFpbG1hbi9saXN0aW5mby9saWJyZS1yaXNj
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