180nm_Oct2020/interfaces.mdwn

   1 # Interfaces for the 180nm Oct2020 ASIC
   2
   3 [List Link](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-May/006355.html)
   4
   5 Bugreport and discussion at <https://bugs.libre-soc.org/show_bug.cgi?id=304>
   6
   7 These are bare minimum viability:
   8 These should be easily doable with LiteX.
   9
  10 * [[shakti/m_class/UART]]
  11 * [[shakti/m_class/I2C]]
  12 * [[shakti/m_class/GPIO]]
  13 * [[shakti/m_class/SPI]]
  14 * [[shakti/m_class/QSPI]]
  15 * [[shakti/m_class/LPC]]
  16 * [[shakti/m_class/EINT]]
  17 * [[shakti/m_class/JTAG]]
  18
  19 Under consideration:
  20
  21 * [[shakti/m_class/sdram]] see <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-May/006374.html>
  22
  23 # Secondary priorities
  24
  25 * a pinmux
  26 * USB - again doable with LiteX. I'm talking to Enjoy Digital about what USB PHYs LiteX supports. - Yehowshua
  27
  28 TODO