180nm_Oct2020/ls180.mdwn

   1 # Pinouts (PinMux)
   2 auto-generated by [[pinouts.py]]
   3
   4 [[!toc  ]]
   5
   6
   7 ## Bank N (32 pins, width 2)
   8
   9 | Pin | Mux0        | Mux1        | Mux2        | Mux3        |
  10 | --- | ----------- | ----------- | ----------- | ----------- |
  11 |   0 | N VSSE_2    |             |
  12 |   1 | N VDDE_2    |             |
  13 |   2 | N VDDI_12   |             |
  14 |   3 | N VSSI_12   |             |
  15 |  21 | N SYS_CLK   |             |
  16 |  22 | N SYS_RST   |             |
  17 |  23 | N SYS_PLLCLK |             |
  18 |  24 | N SYS_PLLSELA0 |             |
  19 |  25 | N SYS_PLLSELA1 |             |
  20 |  26 | N SYS_PLLTESTOUT |             |
  21 |  27 | N SYS_PLLVCOUT |             |
  22 |  28 | N VSSI_11   |             |
  23 |  29 | N VDDI_11   |             |
  24 |  30 | N VSSI_4    |             |
  25 |  31 | N VDDI_4    |             |
  26
  27 ## Bank E (32 pins, width 2)
  28
  29 | Pin | Mux0        | Mux1        | Mux2        | Mux3        |
  30 | --- | ----------- | ----------- | ----------- | ----------- |
  31 |  32 | E VDDE_1    |             |
  32 |  33 | E VSSE_1    |             |
  33 |  34 | E VDDI_7    |             |
  34 |  35 | E VSSI_7    |             |
  35 |  36 | E SDR_AD10  |             |
  36 |  37 | E SDR_AD11  |             |
  37 |  38 | E SDR_AD12  |             |
  38 |  39 | E SDR_DQM1  |             |
  39 |  40 | E SDR_D8    |             |
  40 |  41 | E SDR_D9    |             |
  41 |  42 | E SDR_D10   |             |
  42 |  43 | E SDR_D11   |             |
  43 |  44 | E SDR_D12   |             |
  44 |  45 | E SDR_D13   |             |
  45 |  46 | E SDR_D14   |             |
  46 |  47 | E SDR_D15   |             |
  47 |  48 | E SDR_CLK   |             |
  48 |  49 | E SDR_CKE   |             |
  49 |  50 | E SDR_RASn  |             |
  50 |  51 | E SDR_CASn  |             |
  51 |  52 | E SDR_WEn   |             |
  52 |  53 | E SDR_CSn0  |             |
  53 |  54 | E UART0_TX  |             |
  54 |  55 | E UART0_RX  |             |
  55 |  56 | E JTAG_TMS  |             |
  56 |  57 | E JTAG_TDI  |             |
  57 |  58 | E JTAG_TDO  |             |
  58 |  59 | E JTAG_TCK  |             |
  59 |  60 | E VSSI_14   |             |
  60 |  61 | E VDDI_14   |             |
  61 |  62 | E VSSE_8    |             |
  62 |  63 | E VDDE_8    |             |
  63
  64 ## Bank S (32 pins, width 2)
  65
  66 | Pin | Mux0        | Mux1        | Mux2        | Mux3        |
  67 | --- | ----------- | ----------- | ----------- | ----------- |
  68 |  64 | S VDDE_0    |             |
  69 |  65 | S VSSE_0    |             |
  70 |  66 | S VDDI_5    |             |
  71 |  67 | S VSSI_5    |             |
  72 |  68 | S SDR_DQM0  |             |
  73 |  69 | S SDR_D0    |             |
  74 |  70 | S SDR_D1    |             |
  75 |  71 | S SDR_D2    |             |
  76 |  72 | S SDR_D3    |             |
  77 |  73 | S SDR_D4    |             |
  78 |  74 | S SDR_D5    |             |
  79 |  75 | S SDR_D6    |             |
  80 |  76 | S SDR_D7    |             |
  81 |  77 | S SDR_AD0   |             |
  82 |  78 | S SDR_AD1   |             |
  83 |  79 | S SDR_AD2   |             |
  84 |  80 | S SDR_AD3   |             |
  85 |  81 | S SDR_AD4   |             |
  86 |  82 | S SDR_AD5   |             |
  87 |  83 | S SDR_AD6   |             |
  88 |  84 | S SDR_AD7   |             |
  89 |  85 | S SDR_AD8   |             |
  90 |  86 | S SDR_AD9   |             |
  91 |  87 | S SDR_BA0   |             |
  92 |  88 | S SDR_BA1   |             |
  93 |  90 | S MTWI_SDA  |             |
  94 |  91 | S MTWI_SCL  |             |
  95 |  92 | S VSSI_6    |             |
  96 |  93 | S VDDI_6    |             |
  97 |  94 | S VSSE_13   |             |
  98 |  95 | S VDDE_13   |             |
  99
 100 ## Bank W (32 pins, width 2)
 101
 102 | Pin | Mux0        | Mux1        | Mux2        | Mux3        |
 103 | --- | ----------- | ----------- | ----------- | ----------- |
 104 |  96 | W VSSI_2    |             |
 105 |  97 | W VDDI_2    |             |
 106 |  98 | W VDDI_10   |             |
 107 |  99 | W VSSI_10   |             |
 108 | 100 | W MSPI0_CK  |             |
 109 | 101 | W MSPI0_NSS |             |
 110 | 102 | W MSPI0_MOSI |             |
 111 | 103 | W MSPI0_MISO |             |
 112 | 105 | W GPIOW_W0  |             |
 113 | 106 | W GPIOW_W1  |             |
 114 | 107 | W GPIOW_W2  |             |
 115 | 108 | W GPIOW_W3  |             |
 116 | 109 | W GPIOW_W4  |             |
 117 | 110 | W GPIOW_W5  |             |
 118 | 111 | W GPIOW_W6  |             |
 119 | 112 | W GPIOW_W7  |             |
 120 | 113 | W GPIOW_W8  |             |
 121 | 114 | W GPIOW_W9  |             |
 122 | 115 | W GPIOW_W10 |             |
 123 | 116 | W GPIOW_W11 |             |
 124 | 117 | W GPIOW_W12 |             |
 125 | 118 | W GPIOW_W13 |             |
 126 | 119 | W GPIOW_W14 |             |
 127 | 120 | W GPIOW_W15 |             |
 128 | 121 | W EINT_0    |             |
 129 | 122 | W EINT_1    |             |
 130 | 123 | W EINT_2    |             |
 131 | 124 | W VSSI_9    |             |
 132 | 125 | W VDDI_9    |             |
 133 | 126 | W VSSI_3    |             |
 134 | 127 | W VDDI_3    |             |
 135
 136 # Pinouts (Fixed function)
 137
 138 # Functions (PinMux)
 139
 140 auto-generated by [[pinouts.py]]
 141
 142 ## EINT
 143
 144 External Interrupt
 145
 146 * EINT_0    : W25/0
 147 * EINT_1    : W26/0
 148 * EINT_2    : W27/0
 149
 150 ## GPIO
 151
 152 GPIO
 153
 154 * GPIOW_W0  : W9/0
 155 * GPIOW_W1  : W10/0
 156 * GPIOW_W10 : W19/0
 157 * GPIOW_W11 : W20/0
 158 * GPIOW_W12 : W21/0
 159 * GPIOW_W13 : W22/0
 160 * GPIOW_W14 : W23/0
 161 * GPIOW_W15 : W24/0
 162 * GPIOW_W2  : W11/0
 163 * GPIOW_W3  : W12/0
 164 * GPIOW_W4  : W13/0
 165 * GPIOW_W5  : W14/0
 166 * GPIOW_W6  : W15/0
 167 * GPIOW_W7  : W16/0
 168 * GPIOW_W8  : W17/0
 169 * GPIOW_W9  : W18/0
 170
 171 ## JTAG
 172
 173 JTAG
 174
 175 * JTAG_TCK  : E27/0
 176 * JTAG_TDI  : E25/0
 177 * JTAG_TDO  : E26/0
 178 * JTAG_TMS  : E24/0
 179
 180 ## MSPI0
 181
 182 SPI Master 1 (general)
 183
 184 * MSPI0_CK  : W4/0
 185 * MSPI0_MISO : W7/0
 186 * MSPI0_MOSI : W6/0
 187 * MSPI0_NSS : W5/0
 188
 189 ## MTWI
 190
 191 I2C Master 1
 192
 193 * MTWI_SCL  : S27/0
 194 * MTWI_SDA  : S26/0
 195
 196 ## SDR
 197
 198 SDRAM
 199
 200 * SDR_AD0   : S13/0
 201 * SDR_AD1   : S14/0
 202 * SDR_AD10  : E4/0
 203 * SDR_AD11  : E5/0
 204 * SDR_AD12  : E6/0
 205 * SDR_AD2   : S15/0
 206 * SDR_AD3   : S16/0
 207 * SDR_AD4   : S17/0
 208 * SDR_AD5   : S18/0
 209 * SDR_AD6   : S19/0
 210 * SDR_AD7   : S20/0
 211 * SDR_AD8   : S21/0
 212 * SDR_AD9   : S22/0
 213 * SDR_BA0   : S23/0
 214 * SDR_BA1   : S24/0
 215 * SDR_CASn  : E19/0
 216 * SDR_CKE   : E17/0
 217 * SDR_CLK   : E16/0
 218 * SDR_CSn0  : E21/0
 219 * SDR_D0    : S5/0
 220 * SDR_D1    : S6/0
 221 * SDR_D10   : E10/0
 222 * SDR_D11   : E11/0
 223 * SDR_D12   : E12/0
 224 * SDR_D13   : E13/0
 225 * SDR_D14   : E14/0
 226 * SDR_D15   : E15/0
 227 * SDR_D2    : S7/0
 228 * SDR_D3    : S8/0
 229 * SDR_D4    : S9/0
 230 * SDR_D5    : S10/0
 231 * SDR_D6    : S11/0
 232 * SDR_D7    : S12/0
 233 * SDR_D8    : E8/0
 234 * SDR_D9    : E9/0
 235 * SDR_DQM0  : S4/0
 236 * SDR_DQM1  : E7/0
 237 * SDR_RASn  : E18/0
 238 * SDR_WEn   : E20/0
 239
 240 ## SYS
 241
 242 System Control
 243
 244 * SYS_CLK   : N21/0
 245 * SYS_PLLCLK : N23/0
 246 * SYS_PLLSELA0 : N24/0
 247 * SYS_PLLSELA1 : N25/0
 248 * SYS_PLLTESTOUT : N26/0
 249 * SYS_PLLVCOUT : N27/0
 250 * SYS_RST   : N22/0
 251
 252 ## UART0
 253
 254 UART (TX/RX) 1
 255
 256 * UART0_RX  : E23/0
 257 * UART0_TX  : E22/0
 258
 259 ## VDD
 260
 261 Power
 262
 263 * VDDE_0    : S0/0
 264 * VDDE_1    : E0/0
 265 * VDDE_2    : N1/0
 266 * VDDE_8    : E31/0
 267 * VDDE_13   : S31/0
 268 * VDDI_2    : W1/0
 269 * VDDI_3    : W31/0
 270 * VDDI_4    : N31/0
 271 * VDDI_5    : S2/0
 272 * VDDI_6    : S29/0
 273 * VDDI_7    : E2/0
 274 * VDDI_9    : W29/0
 275 * VDDI_10   : W2/0
 276 * VDDI_11   : N29/0
 277 * VDDI_12   : N2/0
 278 * VDDI_14   : E29/0
 279
 280 ## VSS
 281
 282 GND
 283
 284 * VSSE_0    : S1/0
 285 * VSSE_1    : E1/0
 286 * VSSE_2    : N0/0
 287 * VSSE_8    : E30/0
 288 * VSSE_13   : S30/0
 289 * VSSI_2    : W0/0
 290 * VSSI_3    : W30/0
 291 * VSSI_4    : N30/0
 292 * VSSI_5    : S3/0
 293 * VSSI_6    : S28/0
 294 * VSSI_7    : E3/0
 295 * VSSI_9    : W28/0
 296 * VSSI_10   : W3/0
 297 * VSSI_11   : N28/0
 298 * VSSI_12   : N3/0
 299 * VSSI_14   : E28/0
 300
 301 # Pinmap for Libre-SOC 180nm
 302
 303 ## UART0
 304
 305
 306
 307 * UART0_TX 54 E22/0
 308 * UART0_RX 55 E23/0
 309
 310 ## GPIOS
 311
 312
 313 ## GPIOE
 314
 315
 316 ## JTAG
 317
 318 * JTAG_TMS 56 E24/0
 319 * JTAG_TDI 57 E25/0
 320 * JTAG_TDO 58 E26/0
 321 * JTAG_TCK 59 E27/0
 322
 323 ## PWM
 324
 325
 326 ## EINT
 327
 328 * EINT_0 121 W25/0
 329 * EINT_1 122 W26/0
 330 * EINT_2 123 W27/0
 331
 332 ## VDD
 333
 334 * VDDE_2 1 N1/0
 335 * VDDI_12 2 N2/0
 336 * VDDI_11 29 N29/0
 337 * VDDI_4 31 N31/0
 338 * VDDE_1 32 E0/0
 339
 340 ## VSS
 341
 342 * VSSE_2 0 N0/0
 343 * VSSI_12 3 N3/0
 344 * VSSI_11 28 N28/0
 345 * VSSI_4 30 N30/0
 346 * VSSE_1 33 E1/0
 347
 348 ## SYS
 349
 350
 351
 352 * SYS_CLK 21 N21/0
 353 * SYS_RST 22 N22/0
 354 * SYS_PLLCLK 23 N23/0
 355 * SYS_PLLSELA0 24 N24/0
 356 * SYS_PLLSELA1 25 N25/0
 357 * SYS_PLLTESTOUT 26 N26/0
 358 * SYS_PLLVCOUT 27 N27/0
 359
 360 ## MTWI
 361
 362 I2C.
 363
 364
 365 * MTWI_SDA 90 S26/0
 366 * MTWI_SCL 91 S27/0
 367
 368 ## MSPI0
 369
 370 * MSPI0_CK 100 W4/0
 371 * MSPI0_NSS 101 W5/0
 372 * MSPI0_MOSI 102 W6/0
 373 * MSPI0_MISO 103 W7/0
 374
 375 ## SDR
 376
 377
 378
 379 * SDR_AD10 36 E4/0
 380 * SDR_AD11 37 E5/0
 381 * SDR_AD12 38 E6/0
 382 * SDR_DQM1 39 E7/0
 383 * SDR_D8 40 E8/0
 384 * SDR_D9 41 E9/0
 385 * SDR_D10 42 E10/0
 386 * SDR_D11 43 E11/0
 387 * SDR_D12 44 E12/0
 388 * SDR_D13 45 E13/0
 389 * SDR_D14 46 E14/0
 390 * SDR_D15 47 E15/0
 391 * SDR_CLK 48 E16/0
 392 * SDR_CKE 49 E17/0
 393 * SDR_RASn 50 E18/0
 394 * SDR_CASn 51 E19/0
 395 * SDR_WEn 52 E20/0
 396 * SDR_CSn0 53 E21/0
 397 * SDR_DQM0 68 S4/0
 398 * SDR_D0 69 S5/0
 399 * SDR_D1 70 S6/0
 400 * SDR_D2 71 S7/0
 401 * SDR_D3 72 S8/0
 402 * SDR_D4 73 S9/0
 403 * SDR_D5 74 S10/0
 404 * SDR_D6 75 S11/0
 405 * SDR_D7 76 S12/0
 406 * SDR_AD0 77 S13/0
 407 * SDR_AD1 78 S14/0
 408 * SDR_AD2 79 S15/0
 409 * SDR_AD3 80 S16/0
 410 * SDR_AD4 81 S17/0
 411 * SDR_AD5 82 S18/0
 412 * SDR_AD6 83 S19/0
 413 * SDR_AD7 84 S20/0
 414 * SDR_AD8 85 S21/0
 415 * SDR_AD9 86 S22/0
 416 * SDR_BA0 87 S23/0
 417 * SDR_BA1 88 S24/0
 418
 419 ## Unused Pinouts (spare as GPIO) for 'Libre-SOC 180nm'
 420
 421 | Pin | Mux0        | Mux1        | Mux2        | Mux3        |
 422 | --- | ----------- | ----------- | ----------- | ----------- |
 423 |  34 | E VDDI_7    |             |             |             |
 424 |  35 | E VSSI_7    |             |             |             |
 425 |  60 | E VSSI_14   |             |             |             |
 426 |  61 | E VDDI_14   |             |             |             |
 427 |  62 | E VSSE_8    |             |             |             |
 428 |  63 | E VDDE_8    |             |             |             |
 429 |  64 | S VDDE_0    |             |             |             |
 430 |  65 | S VSSE_0    |             |             |             |
 431 |  66 | S VDDI_5    |             |             |             |
 432 |  67 | S VSSI_5    |             |             |             |
 433 |  92 | S VSSI_6    |             |             |             |
 434 |  93 | S VDDI_6    |             |             |             |
 435 |  94 | S VSSE_13   |             |             |             |
 436 |  95 | S VDDE_13   |             |             |             |
 437 |  96 | W VSSI_2    |             |             |             |
 438 |  97 | W VDDI_2    |             |             |             |
 439 |  98 | W VDDI_10   |             |             |             |
 440 |  99 | W VSSI_10   |             |             |             |
 441 | 105 | W GPIOW_W0  |             |             |             |
 442 | 106 | W GPIOW_W1  |             |             |             |
 443 | 107 | W GPIOW_W2  |             |             |             |
 444 | 108 | W GPIOW_W3  |             |             |             |
 445 | 109 | W GPIOW_W4  |             |             |             |
 446 | 110 | W GPIOW_W5  |             |             |             |
 447 | 111 | W GPIOW_W6  |             |             |             |
 448 | 112 | W GPIOW_W7  |             |             |             |
 449 | 113 | W GPIOW_W8  |             |             |             |
 450 | 114 | W GPIOW_W9  |             |             |             |
 451 | 115 | W GPIOW_W10 |             |             |             |
 452 | 116 | W GPIOW_W11 |             |             |             |
 453 | 117 | W GPIOW_W12 |             |             |             |
 454 | 118 | W GPIOW_W13 |             |             |             |
 455 | 119 | W GPIOW_W14 |             |             |             |
 456 | 120 | W GPIOW_W15 |             |             |             |
 457 | 124 | W VSSI_9    |             |             |             |
 458 | 125 | W VDDI_9    |             |             |             |
 459 | 126 | W VSSI_3    |             |             |             |
 460 | 127 | W VDDI_3    |             |             |             |
 461
 462 # Reference Datasheets
 463
 464 datasheets and pinout links
 465
 466 * <http://datasheets.chipdb.org/AMD/8018x/80186/amd-80186.pdf>
 467 * <http://hands.com/~lkcl/eoma/shenzen/frida/FRD144A2701.pdf>
 468 * <http://pinouts.ru/Memory/sdcard_pinout.shtml>
 469 * p8 <http://www.onfi.org/~/media/onfi/specs/onfi_2_0_gold.pdf?la=en>
 470 * <https://www.heyrick.co.uk/blog/files/datasheets/dm9000aep.pdf>
 471 * <http://cache.freescale.com/files/microcontrollers/doc/app_note/AN4393.pdf>
 472 * <https://www.nxp.com/docs/en/data-sheet/MCF54418.pdf>
 473 * ULPI OTG PHY, ST <http://www.st.com/en/interfaces-and-transceivers/stulpi01a.html>
 474 * ULPI OTG PHY, TI TUSB1210 <http://ti.com/product/TUSB1210/>
 475
 476 # Pin Bank starting points and lengths
 477
 478 * E 32 32 2
 479 * N 0 32 2
 480 * S 64 32 2
 481 * W 96 32 2