180nm_Oct2020/ls180.mdwn

   1 # Pinouts (PinMux)
   2 auto-generated by [[pinouts.py]]
   3
   4 [[!toc  ]]
   5
   6
   7 ## Bank N (32 pins, width 2)
   8
   9 | Pin | Mux0        | Mux1        | Mux2        | Mux3        |
  10 | --- | ----------- | ----------- | ----------- | ----------- |
  11 |   0 | N VSSE_0    |             |
  12 |   1 | N VDDE_0    |             |
  13 |   2 | N SDR_DQM0  |             |
  14 |   3 | N SDR_D0    |             |
  15 |   4 | N SDR_D1    |             |
  16 |   5 | N SDR_D2    |             |
  17 |   6 | N SDR_D3    |             |
  18 |   7 | N SDR_D4    |             |
  19 |   8 | N SDR_D5    |             |
  20 |   9 | N SDR_D6    |             |
  21 |  10 | N SDR_D7    |             |
  22 |  11 | N SDR_AD0   |             |
  23 |  12 | N SDR_AD1   |             |
  24 |  13 | N SDR_AD2   |             |
  25 |  14 | N SDR_AD3   |             |
  26 |  15 | N SDR_AD4   |             |
  27 |  16 | N SDR_AD5   |             |
  28 |  17 | N SDR_AD6   |             |
  29 |  18 | N SDR_AD7   |             |
  30 |  19 | N SDR_AD8   |             |
  31 |  20 | N SDR_AD9   |             |
  32 |  21 | N SDR_BA0   |             |
  33 |  22 | N SDR_BA1   |             |
  34 |  23 | N SDR_CLK   |             |
  35 |  24 | N SDR_CKE   |             |
  36 |  25 | N SDR_RASn  |             |
  37 |  26 | N SDR_CASn  |             |
  38 |  27 | N SDR_WEn   |             |
  39 |  28 | N SDR_CSn0  |             |
  40 |  30 | N VSSI_0    |             |
  41 |  31 | N VDDI_0    |             |
  42
  43 ## Bank E (32 pins, width 2)
  44
  45 | Pin | Mux0        | Mux1        | Mux2        | Mux3        |
  46 | --- | ----------- | ----------- | ----------- | ----------- |
  47 |  32 | E VSSE_1    |             |
  48 |  33 | E VDDE_1    |             |
  49 |  34 | E SDR_AD10  |             |
  50 |  35 | E SDR_AD11  |             |
  51 |  36 | E SDR_AD12  |             |
  52 |  37 | E SDR_DQM1  |             |
  53 |  38 | E SDR_D8    |             |
  54 |  39 | E SDR_D9    |             |
  55 |  40 | E SDR_D10   |             |
  56 |  41 | E SDR_D11   |             |
  57 |  42 | E SDR_D12   |             |
  58 |  43 | E SDR_D13   |             |
  59 |  44 | E SDR_D14   |             |
  60 |  45 | E SDR_D15   |             |
  61 |  46 | E GPIOE_E8  |             |
  62 |  47 | E GPIOE_E9  |             |
  63 |  48 | E GPIOE_E10 |             |
  64 |  49 | E GPIOE_E11 |             |
  65 |  50 | E GPIOE_E12 |             |
  66 |  51 | E GPIOE_E13 |             |
  67 |  52 | E GPIOE_E14 |             |
  68 |  53 | E GPIOE_E15 |             |
  69 |  55 | E JTAG_TMS  |             |
  70 |  56 | E JTAG_TDI  |             |
  71 |  57 | E JTAG_TDO  |             |
  72 |  58 | E JTAG_TCK  |             |
  73 |  62 | E VSSI_1    |             |
  74 |  63 | E VDDI_1    |             |
  75
  76 ## Bank S (32 pins, width 2)
  77
  78 | Pin | Mux0        | Mux1        | Mux2        | Mux3        |
  79 | --- | ----------- | ----------- | ----------- | ----------- |
  80 |  64 | S SYS_CLK   |             |
  81 |  65 | S SYS_RST   |             |
  82 |  66 | S SYS_PLLCLK |             |
  83 |  67 | S SYS_PLLOUT |             |
  84 |  68 | S SYS_CSEL0 |             |
  85 |  69 | S SYS_CSEL1 |             |
  86 |  70 | S SYS_CSEL2 |             |
  87 |  71 | S VSSI_2    |             |
  88 |  72 | S VDDI_2    |             |
  89 |  73 | S MTWI_SDA  |             |
  90 |  74 | S MTWI_SCL  |             |
  91 |  79 | S MSPI0_CK  |             |
  92 |  80 | S MSPI0_NSS |             |
  93 |  81 | S MSPI0_MOSI |             |
  94 |  82 | S MSPI0_MISO |             |
  95 |  84 | S UART0_TX  |             |
  96 |  85 | S UART0_RX  |             |
  97 |  86 | S GPIOS_S0  |             |
  98 |  87 | S GPIOS_S1  |             |
  99 |  88 | S GPIOS_S2  |             |
 100 |  89 | S GPIOS_S3  |             |
 101 |  90 | S GPIOS_S4  |             |
 102 |  91 | S GPIOS_S5  |             |
 103 |  92 | S GPIOS_S6  |             |
 104 |  93 | S GPIOS_S7  |             |
 105 |  94 | S VSSI_3    |             |
 106 |  95 | S VDDI_3    |             |
 107
 108 ## Bank W (32 pins, width 2)
 109
 110 | Pin | Mux0        | Mux1        | Mux2        | Mux3        |
 111 | --- | ----------- | ----------- | ----------- | ----------- |
 112 |  96 | W VSSE_4    |             |
 113 |  97 | W VDDE_2    |             |
 114 |  98 | W PWM_0     |             |
 115 |  99 | W PWM_1     |             |
 116 | 100 | W EINT_0    |             |
 117 | 101 | W EINT_1    |             |
 118 | 102 | W EINT_2    |             |
 119 | 103 | W MSPI1_CK  |             |
 120 | 104 | W MSPI1_NSS |             |
 121 | 105 | W MSPI1_MOSI |             |
 122 | 106 | W MSPI1_MISO |             |
 123 | 107 | W SD0_CMD   |             |
 124 | 108 | W SD0_CLK   |             |
 125 | 109 | W SD0_D0    |             |
 126 | 110 | W SD0_D1    |             |
 127 | 111 | W SD0_D2    |             |
 128 | 112 | W SD0_D3    |             |
 129 | 126 | W VSSI_2    |             |
 130 | 127 | W VDDI_4    |             |
 131
 132 # Pinouts (Fixed function)
 133
 134 # Functions (PinMux)
 135
 136 auto-generated by [[pinouts.py]]
 137
 138 ## EINT
 139
 140 External Interrupt
 141
 142 * EINT_0    : W4/0
 143 * EINT_1    : W5/0
 144 * EINT_2    : W6/0
 145
 146 ## GPIO
 147
 148 GPIO
 149
 150 * GPIOE_E10 : E16/0
 151 * GPIOE_E11 : E17/0
 152 * GPIOE_E12 : E18/0
 153 * GPIOE_E13 : E19/0
 154 * GPIOE_E14 : E20/0
 155 * GPIOE_E15 : E21/0
 156 * GPIOE_E8  : E14/0
 157 * GPIOE_E9  : E15/0
 158 * GPIOS_S0  : S22/0
 159 * GPIOS_S1  : S23/0
 160 * GPIOS_S2  : S24/0
 161 * GPIOS_S3  : S25/0
 162 * GPIOS_S4  : S26/0
 163 * GPIOS_S5  : S27/0
 164 * GPIOS_S6  : S28/0
 165 * GPIOS_S7  : S29/0
 166
 167 ## JTAG
 168
 169 JTAG
 170
 171 * JTAG_TCK  : E26/0
 172 * JTAG_TDI  : E24/0
 173 * JTAG_TDO  : E25/0
 174 * JTAG_TMS  : E23/0
 175
 176 ## MSPI0
 177
 178 SPI Master 1 (general)
 179
 180 * MSPI0_CK  : S15/0
 181 * MSPI0_MISO : S18/0
 182 * MSPI0_MOSI : S17/0
 183 * MSPI0_NSS : S16/0
 184
 185 ## MSPI1
 186
 187 SPI Master 2 (SDCard)
 188
 189 * MSPI1_CK  : W7/0
 190 * MSPI1_MISO : W10/0
 191 * MSPI1_MOSI : W9/0
 192 * MSPI1_NSS : W8/0
 193
 194 ## MTWI
 195
 196 I2C Master 1
 197
 198 * MTWI_SCL  : S10/0
 199 * MTWI_SDA  : S9/0
 200
 201 ## PWM
 202
 203 PWM
 204
 205 * PWM_0     : W2/0
 206 * PWM_1     : W3/0
 207
 208 ## SD0
 209
 210 SD/MMC 1
 211
 212 * SD0_CLK   : W12/0
 213 * SD0_CMD   : W11/0
 214 * SD0_D0    : W13/0
 215 * SD0_D1    : W14/0
 216 * SD0_D2    : W15/0
 217 * SD0_D3    : W16/0
 218
 219 ## SDR
 220
 221 SDRAM
 222
 223 * SDR_AD0   : N11/0
 224 * SDR_AD1   : N12/0
 225 * SDR_AD10  : E2/0
 226 * SDR_AD11  : E3/0
 227 * SDR_AD12  : E4/0
 228 * SDR_AD2   : N13/0
 229 * SDR_AD3   : N14/0
 230 * SDR_AD4   : N15/0
 231 * SDR_AD5   : N16/0
 232 * SDR_AD6   : N17/0
 233 * SDR_AD7   : N18/0
 234 * SDR_AD8   : N19/0
 235 * SDR_AD9   : N20/0
 236 * SDR_BA0   : N21/0
 237 * SDR_BA1   : N22/0
 238 * SDR_CASn  : N26/0
 239 * SDR_CKE   : N24/0
 240 * SDR_CLK   : N23/0
 241 * SDR_CSn0  : N28/0
 242 * SDR_D0    : N3/0
 243 * SDR_D1    : N4/0
 244 * SDR_D10   : E8/0
 245 * SDR_D11   : E9/0
 246 * SDR_D12   : E10/0
 247 * SDR_D13   : E11/0
 248 * SDR_D14   : E12/0
 249 * SDR_D15   : E13/0
 250 * SDR_D2    : N5/0
 251 * SDR_D3    : N6/0
 252 * SDR_D4    : N7/0
 253 * SDR_D5    : N8/0
 254 * SDR_D6    : N9/0
 255 * SDR_D7    : N10/0
 256 * SDR_D8    : E6/0
 257 * SDR_D9    : E7/0
 258 * SDR_DQM0  : N2/0
 259 * SDR_DQM1  : E5/0
 260 * SDR_RASn  : N25/0
 261 * SDR_WEn   : N27/0
 262
 263 ## SYS
 264
 265 System Control
 266
 267 * SYS_CLK   : S0/0
 268 * SYS_CSEL0 : S4/0
 269 * SYS_CSEL1 : S5/0
 270 * SYS_CSEL2 : S6/0
 271 * SYS_PLLCLK : S2/0
 272 * SYS_PLLOUT : S3/0
 273 * SYS_RST   : S1/0
 274
 275 ## UART0
 276
 277 UART (TX/RX) 1
 278
 279 * UART0_RX  : S21/0
 280 * UART0_TX  : S20/0
 281
 282 ## VDD
 283
 284 Power
 285
 286 * VDDE_0    : N1/0
 287 * VDDE_1    : E1/0
 288 * VDDE_2    : W1/0
 289 * VDDI_0    : N31/0
 290 * VDDI_1    : E31/0
 291 * VDDI_2    : S8/0
 292 * VDDI_3    : S31/0
 293 * VDDI_4    : W31/0
 294
 295 ## VSS
 296
 297 GND
 298
 299 * VSSE_0    : N0/0
 300 * VSSE_1    : E0/0
 301 * VSSE_4    : W0/0
 302 * VSSI_0    : N30/0
 303 * VSSI_1    : E30/0
 304 * VSSI_2    : S7/0 W30/0
 305 * VSSI_3    : S30/0
 306
 307 # Pinmap for Libre-SOC 180nm
 308
 309 ## SD0
 310
 311 user-facing: internal (on Card), multiplexed with JTAG
 312 and UART2, for debug purposes
 313
 314 * SD0_CMD 107 W11/0
 315 * SD0_CLK 108 W12/0
 316 * SD0_D0 109 W13/0
 317 * SD0_D1 110 W14/0
 318 * SD0_D2 111 W15/0
 319 * SD0_D3 112 W16/0
 320
 321 ## UART0
 322
 323
 324
 325 * UART0_TX 84 S20/0
 326 * UART0_RX 85 S21/0
 327
 328 ## GPIOS
 329
 330 * GPIOS_S0 86 S22/0
 331 * GPIOS_S1 87 S23/0
 332 * GPIOS_S2 88 S24/0
 333 * GPIOS_S3 89 S25/0
 334 * GPIOS_S4 90 S26/0
 335 * GPIOS_S5 91 S27/0
 336 * GPIOS_S6 92 S28/0
 337 * GPIOS_S7 93 S29/0
 338
 339 ## GPIOE
 340
 341 * GPIOE_E8 46 E14/0
 342 * GPIOE_E9 47 E15/0
 343 * GPIOE_E10 48 E16/0
 344 * GPIOE_E11 49 E17/0
 345 * GPIOE_E12 50 E18/0
 346 * GPIOE_E13 51 E19/0
 347 * GPIOE_E14 52 E20/0
 348 * GPIOE_E15 53 E21/0
 349
 350 ## JTAG
 351
 352 * JTAG_TMS 55 E23/0
 353 * JTAG_TDI 56 E24/0
 354 * JTAG_TDO 57 E25/0
 355 * JTAG_TCK 58 E26/0
 356
 357 ## PWM
 358
 359 * PWM_0 98 W2/0
 360 * PWM_1 99 W3/0
 361
 362 ## EINT
 363
 364 * EINT_0 100 W4/0
 365 * EINT_1 101 W5/0
 366 * EINT_2 102 W6/0
 367
 368 ## VDD
 369
 370 * VDDE_0 1 N1/0
 371 * VDDI_0 31 N31/0
 372 * VDDE_1 33 E1/0
 373
 374 ## VSS
 375
 376 * VSSE_0 0 N0/0
 377 * VSSI_0 30 N30/0
 378 * VSSE_1 32 E0/0
 379
 380 ## SYS
 381
 382
 383
 384 * SYS_CLK 64 S0/0
 385 * SYS_RST 65 S1/0
 386 * SYS_PLLCLK 66 S2/0
 387 * SYS_PLLOUT 67 S3/0
 388 * SYS_CSEL0 68 S4/0
 389 * SYS_CSEL1 69 S5/0
 390 * SYS_CSEL2 70 S6/0
 391
 392 ## MTWI
 393
 394 I2C.
 395
 396
 397 * MTWI_SDA 73 S9/0
 398 * MTWI_SCL 74 S10/0
 399
 400 ## MSPI0
 401
 402 * MSPI0_CK 79 S15/0
 403 * MSPI0_NSS 80 S16/0
 404 * MSPI0_MOSI 81 S17/0
 405 * MSPI0_MISO 82 S18/0
 406
 407 ## MSPI1
 408
 409
 410
 411 * MSPI1_CK 103 W7/0
 412 * MSPI1_NSS 104 W8/0
 413 * MSPI1_MOSI 105 W9/0
 414 * MSPI1_MISO 106 W10/0
 415
 416 ## SDR
 417
 418
 419
 420 * SDR_DQM0 2 N2/0
 421 * SDR_D0 3 N3/0
 422 * SDR_D1 4 N4/0
 423 * SDR_D2 5 N5/0
 424 * SDR_D3 6 N6/0
 425 * SDR_D4 7 N7/0
 426 * SDR_D5 8 N8/0
 427 * SDR_D6 9 N9/0
 428 * SDR_D7 10 N10/0
 429 * SDR_AD0 11 N11/0
 430 * SDR_AD1 12 N12/0
 431 * SDR_AD2 13 N13/0
 432 * SDR_AD3 14 N14/0
 433 * SDR_AD4 15 N15/0
 434 * SDR_AD5 16 N16/0
 435 * SDR_AD6 17 N17/0
 436 * SDR_AD7 18 N18/0
 437 * SDR_AD8 19 N19/0
 438 * SDR_AD9 20 N20/0
 439 * SDR_BA0 21 N21/0
 440 * SDR_BA1 22 N22/0
 441 * SDR_CLK 23 N23/0
 442 * SDR_CKE 24 N24/0
 443 * SDR_RASn 25 N25/0
 444 * SDR_CASn 26 N26/0
 445 * SDR_WEn 27 N27/0
 446 * SDR_CSn0 28 N28/0
 447 * SDR_AD10 34 E2/0
 448 * SDR_AD11 35 E3/0
 449 * SDR_AD12 36 E4/0
 450 * SDR_DQM1 37 E5/0
 451 * SDR_D8 38 E6/0
 452 * SDR_D9 39 E7/0
 453 * SDR_D10 40 E8/0
 454 * SDR_D11 41 E9/0
 455 * SDR_D12 42 E10/0
 456 * SDR_D13 43 E11/0
 457 * SDR_D14 44 E12/0
 458 * SDR_D15 45 E13/0
 459
 460 ## Unused Pinouts (spare as GPIO) for 'Libre-SOC 180nm'
 461
 462 | Pin | Mux0        | Mux1        | Mux2        | Mux3        |
 463 | --- | ----------- | ----------- | ----------- | ----------- |
 464 |  62 | E VSSI_1    |             |             |             |
 465 |  63 | E VDDI_1    |             |             |             |
 466 |  71 | S VSSI_2    |             |             |             |
 467 |  72 | S VDDI_2    |             |             |             |
 468 |  94 | S VSSI_3    |             |             |             |
 469 |  95 | S VDDI_3    |             |             |             |
 470 |  96 | W VSSE_4    |             |             |             |
 471 |  97 | W VDDE_2    |             |             |             |
 472 | 126 | W VSSI_2    |             |             |             |
 473 | 127 | W VDDI_4    |             |             |             |
 474
 475 # Reference Datasheets
 476
 477 datasheets and pinout links
 478
 479 * <http://datasheets.chipdb.org/AMD/8018x/80186/amd-80186.pdf>
 480 * <http://hands.com/~lkcl/eoma/shenzen/frida/FRD144A2701.pdf>
 481 * <http://pinouts.ru/Memory/sdcard_pinout.shtml>
 482 * p8 <http://www.onfi.org/~/media/onfi/specs/onfi_2_0_gold.pdf?la=en>
 483 * <https://www.heyrick.co.uk/blog/files/datasheets/dm9000aep.pdf>
 484 * <http://cache.freescale.com/files/microcontrollers/doc/app_note/AN4393.pdf>
 485 * <https://www.nxp.com/docs/en/data-sheet/MCF54418.pdf>
 486 * ULPI OTG PHY, ST <http://www.st.com/en/interfaces-and-transceivers/stulpi01a.html>
 487 * ULPI OTG PHY, TI TUSB1210 <http://ti.com/product/TUSB1210/>
 488
 489 # Pin Bank starting points and lengths
 490
 491 * E 32 32 2
 492 * N 0 32 2
 493 * S 64 32 2
 494 * W 96 32 2