3d_gpu/roadmap.mdwn

   1 * check with the RISC-V LLVM backend maintainer and
   2   * if they aren't going to complete the RV64GC codegen support soon,
   3   * start working on adding support for RV64GC codegen based on
   4     https://github.com/lowRISC/riscv-llvm using
   5     https://github.com/andestech/riscv-llvm/tree/riscv-release_50/lib/Target/RISCV
   6     for reference.
   7 * Add support for RV64GC on Linux to Rust in order to write the user-space
   8   graphics driver in Rust, I can start by using andestech/riscv-llvm if
   9   not implementing RV64GC for LLVM
  10 * Implement Simple-V support in Spike
  11 * Add Linux support for Simple-V & Asymmetric Multi Processing
  12 * Implement Simple-V support in LLVM & wire up Rust's SIMD to support it
  13 * Start working on the HW design & figure out the remainder of the plan