45nm_Fall2022.mdwn

   1 # Specs for 2022 SOC
   2
   3 ## Applications
   4
   5  - We are providing open source drivers for the GPU,
   6 hopefully completed by Fall 2022.
   7  - Given that POWER CPUs do not have GPUs, RaptorCS
   8 would like the LibreSOC to be able function as a
   9 discrete GPU in PCIE slave mode for POWER9 CPUs.
  10  - Lastly, RaptorCS would like to manufacture single
  11 board computers.
  12
  13 ## Devices
  14  - 4 Core POWER CPU
  15  - SimpleV Capability and GPU Instructions
  16  - IOMMU
  17  - Coherent Accelerator Processor Proxy (CAPP) functional unit
  18  - PCIe host Controller
  19  - PCIe Slave controller(RaptorCS wants to use LibreSOC as a GPU on their POWER mobos)
  20  - BMC - enables LibreSOC to become a discrete GPU with video output and ethernet.
  21  - RGB/TTL framebuffer VGA/LCD PHY from Richard Herveille, RoaLogic.
  22
  23 ## Interfaces
  24
  25 ### Advanced
  26
  27  - SERDES - 10rx, 14tx
  28    - 4tx, 4rx for [OMI(DDR4](https://openpowerfoundation.org/wp-content/uploads/2018/10/Jeff-Steuchli.OpenCAPI-OPS-OMI.pdf) on top of SERDES with OpenCAPI protocol) @5GHz
  29    - 2tx, 2rx for ethernet
  30    - 4tx, 4rx for PCIe and other CAPI devices
  31    - 3tx for HDMI (note: requires HDMI Trademark Licensing and Compliance Testing)
  32  - [OpenFSI](https://openpowerfoundation.org/?resource_lib=field-replaceable-unit-fru-service-interface-fsi-openfsi-specification) instead of JTAG
  33    - [Raptor HDL](https://gitlab.raptorengineering.com/raptor-engineering-public/lpc-spi-bridge-fpga)
  34    - [Raptor Libsigrok](https://gitlab.raptorengineering.com/raptor-engineering-public/dsview/-/tree/master/libsigrokdecode4DSL/decoders/fsi)
  35  - USB 2.0 - [Luna USB](https://github.com/greatscottgadgets/luna)
  36 with [USB3300 PHY](https://www.microchip.com/wwwproducts/en/USB3300#datasheet-toggle) (Tested max at 333MB/s with Luna on ECP5)
  37
  38 ### Basic
  39
  40 These should be easily doable with LiteX.
  41
  42 * [[shakti/m_class/UART]]
  43 * [[shakti/m_class/I2C]]
  44 * [[shakti/m_class/GPIO]]
  45 * [[shakti/m_class/SPI]]
  46 * [[shakti/m_class/QSPI]]
  47 * [[shakti/m_class/LPC]]
  48 * [[shakti/m_class/EINT]]
  49 * [[shakti/m_class/RGBTTL]] in conjunction with TI TFP410a or Chrontel converter
  50
  51 ## Protocols
  52  - IPMT over i2c to talk to the BMC
  53    - [Intel Spec Sheet](https://www.intel.com/content/dam/www/public/us/en/documents/product-briefs/second-gen-interface-spec-v2.pdf)
  54    - [RaptorCS HDL](https://gitlab.raptorengineering.com/raptor-engineering-public/lpc-spi-bridge-fpga/blob/master/ipmi_bt_slave.v)
  55  - Reset Vector is set Flexver address over LPC
  56    - [Whitepaper](https://www.raptorengineering.com/TALOS/documentation/flexver_intro.pdf)