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  22 Message-ID: <c460ee198d5dbee2b4969b040bca63ef5a8ad6f4.camel@lip6.fr>
  23 From: Jean-Paul Chaput <Jean-Paul.Chaput@lip6.fr>
  24 To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
  25 Date: Tue, 24 Mar 2020 14:08:33 +0100
  26 In-Reply-To: <48389673-AD71-4168-8116-135C1D419634@gatech.edu>
  27 References: <0F80A1BC-0241-49FE-B374-B4F1D8F3F5BD@gatech.edu>
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  37 Subject: Re: [libre-riscv-dev] Advanced Topics on RISCV
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  66 On Tue, 2020-03-24 at 13:00 +0000, Immanuel, Yehowshua U wrote:
  67 > > You can see details here:
  68 > > https://www-soc.lip6.fr/trac/tsar
  69 >=20
  70 > Thanks, I see that it scales up to 1024 - that's fantastic.
  71
  72   Yes. Even above that. We did use free tools for the HDL,
  73   but unusual ones. So maybe you should concentrate on the
  74   theoretical mechanisms and avoid banging your head on the
  75   tools themselves. The prototype, If I remember correctly
  76   is made in 28nm with on MIPS32 processors.
  77     The chip was implemented with Cadence however. But the
  78   HDL models are free.
  79     We have run NetBSD and Linux on it.
  80
  81 --=20
  82
  83       .-.     J e a n - P a u l   C h a p u t  /  Administrateur Systeme
  84       /v\     Jean-Paul.Chaput@lip6.fr
  85     /(___)\   work: (33) 01.44.27.53.99             =20
  86      ^^ ^^    cell:      06.66.25.35.55   home: 09.65.29.83.38
  87
  88     U P M C   Universite Pierre & Marie Curie
  89     L I P 6   Laboratoire d'Informatique de Paris VI
  90     S o C     System On Chip
  91
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