HDL_workflow/microwatt_tutorial.mdwn

   1 # New tutorial for setting up Microwatt chroot and running simulations
   2
   3 useful links:
   4
   5 * Original Microwatt Libre-SOC page: [[microwatt]]
   6 * [Libre-SOC Microwatt repo branch](https://git.libre-soc.org/?p=microwatt.git;a=tree;hb=refs/heads/verilator_trace)
   7 * [Libre-SOC devscripts repo](https://git.libre-soc.org/?p=dev-env-setup.git;a=tree)
   8
   9 ## Setting up chroot
  10
  11     # ./mk-deb-chroot microwatt
  12     # ./cp-scripts-to-chroot microwatt
  13     $ schroot -c
  14     (microwatt):$ cd dev-env-scripts
  15     (microwatt):$ sudo bash
  16     (microwatt):# ./install-hdl-apt-reqs
  17     (microwatt):# ./verilator-install
  18     (microwatt):# ./hdl-tools-yosys
  19     (microwatt):$ cd ~/src/
  20     (microwatt):$ git clone https://git.libre-soc.org/git/microwatt.git
  21     (microwatt):$ git checkout verilator_trace
  22
  23 Make sure verilator binaries in $PATH:
  24
  25     (microwatt):$ export PATH=/usr/local/verilator/bin:$PATH
  26     (microwatt):$ export GHDLSYNTH=ghdl
  27
  28 (GHDLSYNTH needs to be redefined because the Makefile has default `ghdl.so`,
  29 but somewhere else '.so' gets appended. You may see the following error if you
  30 don't redefine:
  31 `ERROR: Can't load module
  32 ./ghdl.so':/usr/local/bin/../share/yosys/plugins/**ghdl.so.so**`)
  33 [IRC](https://libre-soc.org/irclog/%23libre-soc.2023-01-25.log.html#t2023-01-25T11:10:47)
  34
  35 To run the Verilator simulation, set verilator as the target:
  36
  37     (microwatt):$ export FPGA_TARGET=verilator
  38
  39 Compile the verilator simulation binary
  40
  41     (microwatt):$ make microwatt-verilator
  42
  43 The Libre-SOC microwatt tutorial then shows the following command to time how
  44 long the sim takes to run:
  45
  46     (microwatt):$ time ./microwatt-verilator
  47
  48 No additional arguments to the binary are specified.
  49
  50 * [Libre-SOC Microwatt repo branch, Makefile](https://git.libre-soc.org/?p=microwatt.git;a=blob;f=Makefile;h=610f48d8c89be6d5b9902d7f1bf61f8b6d98ffc0;hb=refs/heads/verilator_trace)
  51
  52 In the Makefile, I can see that `RAM_INIT_FILE` (line #144) is specified as
  53 `helloworld.hex` (the Microwatt 'lightbulb' example code).
  54 The Makefile uses this `RAM_INIT_FILE` argument for generating the
  55 `microwatt.v` verilog file (line #249).
  56 Finally, to generate the `microwatt-verilator` binary, `microwatt.v` is pulled
  57 in as a dependency (line #254).
  58
  59 That's good, means that the verilator sim binary *should already have the
  60 compiled binary in RAM*.
  61