cpu: Mark ExecContext::tcBase() as const
[gem5.git] / MAINTAINERS
1 See CONTRIBUTING.md for details of gem5's contribution process.
2
3 This file contains the keywords used in commit messages. Each keyword has one
4 or more maintainers. At least one (not all) of these maintainers must review
5 the patch before it can be pushed. These people will automatically be emailed
6 when you upload the patch to Gerrit (https://gem5-review.googlesource.com).
7 These keywords mostly follow the directory structure.
8
9 Individuals on the project management committee are maintainers for all of the
10 gem5 components (i.e., they can review any patch as the maintainer). These
11 individuals are required to review any patches to components without explicit
12 maintainers.
13
14 PMC Members (general maintainers):
15 Ali Saidi <asaidi@gmail.com>
16 Andreas Sandberg <andreas.sandberg@arm.com>
17 Brad Beckmann <brad.beckmann@amd.com>
18 David Wood <david@cs.wisc.edu>
19 Gabe Black <gabeblack@google.com>
20 Giacomo Travaglini <giacomo.travaglini@arm.com>
21 Jason Lowe-Power <jason@lowepower.com> (chair)
22 Matt Sinclair <sinclair@cs.wisc.edu>
23 Tony Gutierrez <anthony.gutierrez@amd.com>
24 Steve Reinhardt <stever@gmail.com>
25
26 arch: General architecture-specific components
27 Gabe Black <gabeblack@google.com>
28 arch-alpha:
29 arch-arm:
30 Andreas Sandberg <andreas.sandberg@arm.com>
31 Giacomo Travaglini <giacomo.travaglini@arm.com>
32 arch-hsail:
33 Tony Gutierrez <anthony.gutierrez@amd.com>
34 arch-mips:
35 arch-power:
36 arch-riscv:
37 Alec Roelke <ar4jc@virginia.edu>
38 arch-sparc:
39 Gabe Black <gabeblack@google.com>
40 arch-x86:
41 Gabe Black <gabeblack@google.com>
42
43 base:
44
45 configs:
46 Jason Lowe-Power <jason@lowepower.com>
47
48 cpu: General changes to all CPU models (e.g., BaseCPU)
49 cpu-kvm:
50 Andreas Sandberg <andreas.sandberg@arm.com>
51 cpu-minor:
52 cpu-o3:
53 cpu-simple:
54
55 dev:
56 dev-virtio:
57 Andreas Sandberg <andreas.sandberg@arm.com>
58
59 dev-arm:
60 Andreas Sandberg <andreas.sandberg@arm.com>
61 Giacomo Travaglini <giacomo.travaglini@arm.com>
62
63 ext: Components external to gem5
64
65 fastmodel: Changes relating to ARM Fast Models
66 Gabe Black <gabeblack@google.com>
67
68 gpu-compute:
69 Tony Gutierrez <anthony.gutierrez@amd.com>
70
71 learning-gem5: The code and configs for the Learning gem5 book (see
72 learning.gem5.com)
73 Jason Lowe-Power <jason@lowepower.com>
74
75 mem: General memory system (e.g., XBar, Packet)
76 Nikos Nikoleris <nikos.nikoleris@arm.com>
77 mem-cache: Classic caches and coherence
78 Nikos Nikoleris <nikos.nikoleris@arm.com>
79 mem-garnet: Garnet subcomponent of Ruby
80 Tushar Krishna <tushar@ece.gatech.edu>
81 mem-ruby: Ruby structures and protocols
82 Brad Beckmann <brad.beckmann@amd.com>
83 Jason Lowe-Power <jason@lowepower.com>
84
85 misc: Anything outside of the other categories
86
87 python: Python SimObject wrapping and infrastructure
88 Andreas Sandberg <andreas.sandberg@arm.com>
89
90 scons: Build system
91
92 sim: General simulation components
93 Jason Lowe-Power <jason@lowepower.com>
94 sim-se: Syscall emulation
95 Brandon Potter <brandon.potter@amd.com>
96 sim-power: Power modeling
97 Andreas Sandberg <andreas.sandberg@arm.com>
98
99 stats: Updates to statistics for regressions
100
101 system: System boot code and related components
102 system-alpha:
103 system-arm:
104 Andreas Sandberg <andreas.sandberg@arm.com>
105 Giacomo Travaglini <giacomo.travaglini@arm.com>
106
107 systemc: Code for the gem5 SystemC implementation and interface
108 Gabe Black <gabeblack@google.com>
109
110 tests: testing changes (not stats updates for tests. See stats:)
111 Bobby Bruce <bbruce@ucdavis.edu>
112
113 util: