misc: merge branch 'release-staging-v19.0.0.0' into develop
[gem5.git] / MAINTAINERS
1 See CONTRIBUTING.md for details of gem5's contribution process.
2
3 This file contains the keywords used in commit messages. Each keyword has one
4 or more maintainers. At least one (not all) of these maintainers must review
5 the patch before it can be pushed. These people will automatically be emailed
6 when you upload the patch to Gerrit (https://gem5-review.googlesource.com).
7 These keywords mostly follow the directory structure.
8
9 Individuals on the project management committee are maintainers for all of the
10 gem5 components (i.e., they can review any patch as the maintainer). These
11 individuals are required to review any patches to components without explicit
12 maintainers.
13
14 PMC Members (general maintainers):
15 Ali Saidi <asaidi@gmail.com>
16 Andreas Sandberg <andreas.sandberg@arm.com>
17 Brad Beckmann <brad.beckmann@amd.com>
18 David Wood <david@cs.wisc.edu>
19 Gabe Black <gabeblack@google.com>
20 Giacomo Travaglini <giacomo.travaglini@arm.com>
21 Jason Lowe-Power <jason@lowepower.com> (chair)
22 Matt Sinclair <sinclair@cs.wisc.edu>
23 Tony Gutierrez <anthony.gutierrez@amd.com>
24 Steve Reinhardt <stever@gmail.com>
25
26 arch: General architecture-specific components
27 Gabe Black <gabeblack@google.com>
28 arch-arm:
29 Andreas Sandberg <andreas.sandberg@arm.com>
30 Giacomo Travaglini <giacomo.travaglini@arm.com>
31 arch-hsail:
32 Tony Gutierrez <anthony.gutierrez@amd.com>
33 arch-mips:
34 arch-power:
35 arch-riscv:
36 Alec Roelke <ar4jc@virginia.edu>
37 arch-sparc:
38 Gabe Black <gabeblack@google.com>
39 arch-x86:
40 Gabe Black <gabeblack@google.com>
41
42 base:
43
44 configs:
45 Jason Lowe-Power <jason@lowepower.com>
46
47 cpu: General changes to all CPU models (e.g., BaseCPU)
48 cpu-kvm:
49 Andreas Sandberg <andreas.sandberg@arm.com>
50 cpu-minor:
51 cpu-o3:
52 cpu-simple:
53
54 dev:
55 dev-virtio:
56 Andreas Sandberg <andreas.sandberg@arm.com>
57
58 dev-arm:
59 Andreas Sandberg <andreas.sandberg@arm.com>
60 Giacomo Travaglini <giacomo.travaglini@arm.com>
61
62 ext: Components external to gem5
63
64 fastmodel: Changes relating to ARM Fast Models
65 Gabe Black <gabeblack@google.com>
66
67 gpu-compute:
68 Tony Gutierrez <anthony.gutierrez@amd.com>
69
70 learning-gem5: The code and configs for the Learning gem5 book (see
71 learning.gem5.com)
72 Jason Lowe-Power <jason@lowepower.com>
73
74 mem: General memory system (e.g., XBar, Packet)
75 Nikos Nikoleris <nikos.nikoleris@arm.com>
76 mem-cache: Classic caches and coherence
77 Nikos Nikoleris <nikos.nikoleris@arm.com>
78 mem-garnet: Garnet subcomponent of Ruby
79 Tushar Krishna <tushar@ece.gatech.edu>
80 mem-ruby: Ruby structures and protocols
81 Brad Beckmann <brad.beckmann@amd.com>
82 Jason Lowe-Power <jason@lowepower.com>
83
84 misc: Anything outside of the other categories
85
86 python: Python SimObject wrapping and infrastructure
87 Andreas Sandberg <andreas.sandberg@arm.com>
88
89 scons: Build system
90
91 sim: General simulation components
92 Jason Lowe-Power <jason@lowepower.com>
93 sim-se: Syscall emulation
94 Brandon Potter <brandon.potter@amd.com>
95 sim-power: Power modeling
96 Andreas Sandberg <andreas.sandberg@arm.com>
97
98 stats: Updates to statistics for regressions
99
100 system: System boot code and related components
101 system-alpha:
102 system-arm:
103 Andreas Sandberg <andreas.sandberg@arm.com>
104 Giacomo Travaglini <giacomo.travaglini@arm.com>
105
106 systemc: Code for the gem5 SystemC implementation and interface
107 Gabe Black <gabeblack@google.com>
108
109 tests: testing changes (not stats updates for tests. See stats:)
110 Bobby Bruce <bbruce@ucdavis.edu>
111
112 util: