misc: Update MAINTAINERS
[gem5.git] / MAINTAINERS
1 See CONTRIBUTING.md for details of gem5's contribution process.
2
3 This file contains the keywords used in commit messages. Each keyword has one
4 or more maintainers. At least one (not all) of these maintainers must review
5 the patch before it can be pushed. These people will automatically be emailed
6 when you upload the patch to Gerrit (https://gem5-review.googlesource.com).
7 These keywords mostly follow the directory structure.
8
9 Individuals on the project management committee are maintainers for all of the
10 gem5 components (i.e., they can review any patch as the maintainer). These
11 individuals are required to review any patches to components without explicit
12 maintainers.
13
14 PMC Members (general maintainers):
15 Ali Saidi <asaidi@gmail.com>
16 Andreas Sandberg <andreas.sandberg@arm.com>
17 Brad Beckmann <brad.beckmann@amd.com>
18 David Wood <david@cs.wisc.edu>
19 Gabe Black <gabeblack@google.com>
20 Jason Lowe-Power <jason@lowepower.com> (chair)
21 Matt Sinclair <sinclair@cs.wisc.edu>
22 Tony Gutierrez <anthony.gutierrez@amd.com>
23 Steve Reinhardt <stever@gmail.com>
24
25 arch: General architecture-specific components
26 Gabe Black <gabeblack@google.com>
27 arch-alpha:
28 arch-arm:
29 Andreas Sandberg <andreas.sandberg@arm.com>
30 arch-hsail:
31 Tony Gutierrez <anthony.gutierrez@amd.com>
32 arch-mips:
33 arch-power:
34 arch-riscv:
35 Alec Roelke <ar4jc@virginia.edu>
36 arch-sparc:
37 Gabe Black <gabeblack@google.com>
38 arch-x86:
39 Gabe Black <gabeblack@google.com>
40
41 base:
42
43 configs:
44 Jason Lowe-Power <jason@lowepower.com>
45
46 cpu: General changes to all CPU models (e.g., BaseCPU)
47 cpu-kvm:
48 Andreas Sandberg <andreas.sandberg@arm.com>
49 cpu-minor:
50 cpu-o3:
51 cpu-simple:
52
53 dev:
54 dev-virtio:
55 Andreas Sandberg <andreas.sandberg@arm.com>
56
57 ext: Components external to gem5
58
59 gpu-compute:
60 Tony Gutierrez <anthony.gutierrez@amd.com>
61
62 learning-gem5: The code and configs for the Learning gem5 book (see
63 learning.gem5.com)
64 Jason Lowe-Power <jason@lowepower.com>
65
66 mem: General memory system (e.g., XBar, Packet)
67 Nikos Nikoleris <nikos.nikoleris@arm.com>
68 mem-cache: Classic caches and coherence
69 Nikos Nikoleris <nikos.nikoleris@arm.com>
70 mem-garnet: Garnet subcomponent of Ruby
71 Tushar Krishna <tushar@ece.gatech.edu>
72 mem-ruby: Ruby structures and protocols
73 Brad Beckmann <brad.beckmann@amd.com>
74 Jason Lowe-Power <jason@lowepower.com>
75
76 misc: Anything outside of the other categories
77
78 python: Python SimObject wrapping and infrastructure
79 Andreas Sandberg <andreas.sandberg@arm.com>
80
81 scons: Build system
82
83 sim: General simulation components
84 Jason Lowe-Power <jason@lowepower.com>
85 sim-se: Syscall emulation
86 Brandon Potter <brandon.potter@amd.com>
87 sim-power: Power modeling
88 Andreas Sandberg <andreas.sandberg@arm.com>
89
90 stats: Updates to statistics for regressions
91
92 system: System boot code and related components
93 system-alpha:
94 system-arm:
95 Andreas Sandberg <andreas.sandberg@arm.com>
96
97 tests: testing changes (not stats updates for tests. See stats:)
98 Andreas Sandberg <andreas.sandberg@arm.com>
99
100 util: