Makefile

   1 GHDL=ghdl
   2 GHDLFLAGS=--std=08 -Psim-unisim
   3 CFLAGS=-O2 -Wall
   4
   5 all = core_tb simple_ram_behavioural_tb soc_reset_tb icache_tb multiply_tb dmi_dtm_tb divider_tb \
   6         rotator_tb
   7
   8 # XXX
   9 # loadstore_tb fetch_tb
  10
  11 all: $(all)
  12
  13 %.o : %.vhdl
  14         $(GHDL) -a $(GHDLFLAGS) $<
  15
  16 common.o: decode_types.o
  17 sim_jtag.o: sim_jtag_socket.o
  18 core_tb.o: common.o wishbone_types.o core.o soc.o sim_jtag.o
  19 core.o: common.o wishbone_types.o fetch1.o fetch2.o icache.o decode1.o decode2.o register_file.o cr_file.o execute1.o execute2.o loadstore1.o loadstore2.o multiply.o writeback.o core_debug.o divider.o
  20 core_debug.o: common.o
  21 countzero.o:
  22 cr_file.o: common.o
  23 crhelpers.o: common.o
  24 decode1.o: common.o decode_types.o
  25 decode2.o: decode_types.o common.o helpers.o insn_helpers.o
  26 decode_types.o:
  27 execute1.o: decode_types.o common.o helpers.o crhelpers.o insn_helpers.o ppc_fx_insns.o rotator.o logical.o countzero.o
  28 execute2.o: common.o crhelpers.o ppc_fx_insns.o
  29 fetch1.o: common.o
  30 fetch2.o: common.o wishbone_types.o
  31 glibc_random_helpers.o:
  32 glibc_random.o: glibc_random_helpers.o
  33 helpers.o:
  34 icache.o: common.o wishbone_types.o
  35 icache_tb.o: common.o wishbone_types.o icache.o simple_ram_behavioural.o
  36 insn_helpers.o:
  37 loadstore1.o: common.o helpers.o
  38 loadstore2.o: common.o helpers.o wishbone_types.o
  39 logical.o: decode_types.o
  40 multiply_tb.o: decode_types.o common.o glibc_random.o ppc_fx_insns.o multiply.o
  41 multiply.o: common.o decode_types.o ppc_fx_insns.o crhelpers.o
  42 divider_tb.o: decode_types.o common.o glibc_random.o ppc_fx_insns.o divider.o
  43 divider.o: common.o decode_types.o crhelpers.o
  44 ppc_fx_insns.o: helpers.o
  45 register_file.o: common.o
  46 rotator.o: common.o
  47 rotator_tb.o: common.o glibc_random.o ppc_fx_insns.o insn_helpers.o rotator.o
  48 sim_console.o:
  49 simple_ram_behavioural_helpers.o:
  50 simple_ram_behavioural_tb.o: wishbone_types.o simple_ram_behavioural.o
  51 simple_ram_behavioural.o: wishbone_types.o simple_ram_behavioural_helpers.o
  52 sim_uart.o: wishbone_types.o sim_console.o
  53 soc.o: common.o wishbone_types.o core.o wishbone_arbiter.o sim_uart.o simple_ram_behavioural.o dmi_dtm_xilinx.o wishbone_debug_master.o
  54 wishbone_arbiter.o: wishbone_types.o
  55 wishbone_types.o:
  56 writeback.o: common.o
  57 dmi_dtm_tb.o: dmi_dtm_xilinx.o wishbone_debug_master.o
  58 dmi_dtm_xilinx.o: wishbone_types.o sim-unisim/unisim_vcomponents.o
  59 wishbone_debug_master.o: wishbone_types.o
  60
  61 UNISIM_BITS = sim-unisim/unisim_vcomponents.vhdl sim-unisim/BSCANE2.vhdl sim-unisim/BUFG.vhdl
  62 sim-unisim/unisim_vcomponents.o: $(UNISIM_BITS)
  63         $(GHDL) -a $(GHDLFLAGS) --work=unisim --workdir=sim-unisim $^
  64
  65
  66 fpga/soc_reset_tb.o: fpga/soc_reset.o
  67
  68 soc_reset_tb: fpga/soc_reset_tb.o fpga/soc_reset.o
  69         $(GHDL) -e $(GHDLFLAGS) soc_reset_tb
  70
  71 core_tb: core_tb.o simple_ram_behavioural_helpers_c.o sim_console_c.o sim_jtag_socket_c.o
  72         $(GHDL) -e $(GHDLFLAGS) -Wl,simple_ram_behavioural_helpers_c.o -Wl,sim_console_c.o -Wl,sim_jtag_socket_c.o $@
  73
  74 fetch_tb: fetch_tb.o
  75         $(GHDL) -e $(GHDLFLAGS) $@
  76
  77 icache_tb: icache_tb.o
  78         $(GHDL) -e $(GHDLFLAGS) -Wl,simple_ram_behavioural_helpers_c.o $@
  79
  80 loadstore_tb: loadstore_tb.o
  81         $(GHDL) -e $(GHDLFLAGS) $@
  82
  83 multiply_tb: multiply_tb.o
  84         $(GHDL) -e $(GHDLFLAGS) $@
  85
  86 divider_tb: divider_tb.o
  87         $(GHDL) -e $(GHDLFLAGS) $@
  88
  89 rotator_tb: rotator_tb.o
  90         $(GHDL) -e $(GHDLFLAGS) $@
  91
  92 simple_ram_tb: simple_ram_tb.o
  93         $(GHDL) -e $(GHDLFLAGS) $@
  94
  95 simple_ram_behavioural_tb: simple_ram_behavioural_helpers_c.o simple_ram_behavioural_tb.o
  96         $(GHDL) -e $(GHDLFLAGS) -Wl,simple_ram_behavioural_helpers_c.o $@
  97
  98 dmi_dtm_tb: dmi_dtm_tb.o simple_ram_behavioural_helpers_c.o
  99         $(GHDL) -e $(GHDLFLAGS) -Wl,simple_ram_behavioural_helpers_c.o $@
 100
 101 tests = $(sort $(patsubst tests/%.out,%,$(wildcard tests/*.out)))
 102
 103 check: $(tests) test_micropython test_micropython_long
 104
 105 check_light: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 test_micropython test_micropython_long
 106
 107 $(tests): core_tb
 108         @./scripts/run_test.sh $@
 109
 110 test_micropython: core_tb
 111         @./scripts/test_micropython.py
 112
 113 test_micropython_long: core_tb
 114         @./scripts/test_micropython_long.py
 115
 116 clean:
 117         rm -f *.o work-*cf unisim-*cf $(all)
 118         rm -f sim-unisim/*.o sim-unisim/unisim-*cf
 119
 120 distclean: clean
 121         rm -f *~ fpga/~