Makefile

   1 GHDL ?= ghdl
   2 GHDLFLAGS=--std=08 --work=unisim
   3 CFLAGS=-O2 -Wall
   4
   5 # We need a version of GHDL built with either the LLVM or gcc backend.
   6 # Fedora provides this, but other distros may not. Another option is to use
   7 # the Docker image.
   8 DOCKER ?= 0
   9 PODMAN ?= 0
  10
  11 ifeq ($(DOCKER), 1)
  12 DOCKERBIN=docker
  13 USE_DOCKER=1
  14 endif
  15
  16 ifeq ($(PODMAN), 1)
  17 DOCKERBIN=podman
  18 USE_DOCKER=1
  19 endif
  20
  21 ifeq ($(USE_DOCKER), 1)
  22 PWD = $(shell pwd)
  23 DOCKERARGS = run --rm -v $(PWD):/src:z -w /src
  24 GHDL = $(DOCKERBIN) $(DOCKERARGS) ghdl/ghdl:buster-llvm-7 ghdl
  25 CC = $(DOCKERBIN) $(DOCKERARGS) ghdl/ghdl:buster-llvm-7 gcc
  26 endif
  27
  28 all = core_tb icache_tb dcache_tb multiply_tb dmi_dtm_tb divider_tb \
  29         rotator_tb countzero_tb wishbone_bram_tb soc_reset_tb
  30
  31 all: $(all)
  32
  33 CORE_FILES=decode_types.vhdl common.vhdl wishbone_types.vhdl fetch1.vhdl
  34 CORE_FILES+=fetch2.vhdl utils.vhdl plru.vhdl cache_ram.vhdl icache.vhdl
  35 CORE_FILES+=decode1.vhdl helpers.vhdl insn_helpers.vhdl gpr_hazard.vhdl
  36 CORE_FILES+=cr_hazard.vhdl control.vhdl decode2.vhdl register_file.vhdl
  37 CORE_FILES+=cr_file.vhdl crhelpers.vhdl ppc_fx_insns.vhdl rotator.vhdl
  38 CORE_FILES+=logical.vhdl countzero.vhdl multiply.vhdl divider.vhdl
  39 CORE_FILES+=execute1.vhdl loadstore1.vhdl mmu.vhdl dcache.vhdl
  40 CORE_FILES+=writeback.vhdl core_debug.vhdl core.vhdl
  41
  42 SOC_FILES=wishbone_arbiter.vhdl wishbone_bram_wrapper.vhdl
  43 SOC_FILES+=wishbone_debug_master.vhdl xics.vhdl syscon.vhdl soc.vhdl
  44
  45 SOC_SIM_FILES=sim_console.vhdl sim_uart.vhdl sim_bram_helpers.vhdl
  46 SOC_SIM_FILES+=sim_bram.vhdl sim_jtag_socket.vhdl sim_jtag.vhdl
  47 SOC_SIM_FILES+=sim-unisim/BUFG.vhdl sim-unisim/unisim_vcomponents.vhdl
  48 SOC_SIM_FILES+=dmi_dtm_xilinx.vhdl
  49
  50 SOC_SIM_C_FILES=sim_vhpi_c.o sim_bram_helpers_c.o sim_console_c.o
  51 SOC_SIM_C_FILES+=sim_jtag_socket_c.o
  52 SOC_SIM_OBJ_FILES=$(SOC_SIM_C_FILES:.c=.o)
  53 comma := ,
  54 SOC_SIM_LINK=$(patsubst %,-Wl$(comma)%,$(SOC_SIM_OBJ_FILES))
  55
  56 CORE_TBS=multiply_tb divider_tb rotator_tb countzero_tb
  57 SOC_TBS=core_tb icache_tb dcache_tb dmi_dtm_tb wishbone_bram_tb
  58
  59 $(processes): %_processes: tests/%.o main.c
  60
  61 $(SOC_TBS): %: $(CORE_FILES) $(SOC_FILES) $(SOC_SIM_FILES) $(SOC_SIM_OBJ_FILES) %.vhdl
  62         $(GHDL) -c $(GHDLFLAGS) $(SOC_SIM_LINK) $(CORE_FILES) $(SOC_FILES) $(SOC_SIM_FILES) $@.vhdl -e $@
  63
  64 $(CORE_TBS): %: $(CORE_FILES) glibc_random.vhdl glibc_random_helpers.vhdl %.vhdl
  65         $(GHDL) -c $(GHDLFLAGS) $(CORE_FILES) glibc_random.vhdl glibc_random_helpers.vhdl $@.vhdl -e $@
  66
  67 soc_reset_tb: fpga/soc_reset_tb.vhdl fpga/soc_reset.vhdl
  68         $(GHDL) -c $(GHDLFLAGS) fpga/soc_reset_tb.vhdl fpga/soc_reset.vhdl -e $@
  69
  70 tests = $(sort $(patsubst tests/%.out,%,$(wildcard tests/*.out)))
  71 tests_console = $(sort $(patsubst tests/%.console_out,%,$(wildcard tests/*.console_out)))
  72
  73 check: $(tests) $(tests_console) test_micropython test_micropython_long
  74
  75 check_light: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 test_micropython test_micropython_long $(tests_console)
  76
  77 $(tests): core_tb
  78         @./scripts/run_test.sh $@
  79
  80 $(tests_console): core_tb
  81         @./scripts/run_test_console.sh $@
  82
  83 test_micropython: core_tb
  84         @./scripts/test_micropython.py
  85
  86 test_micropython_long: core_tb
  87         @./scripts/test_micropython_long.py
  88
  89 TAGS:
  90         find . -name '*.vhdl' | xargs ./scripts/vhdltags
  91
  92 .PHONY: TAGS
  93
  94 _clean:
  95         rm -f *.o work-*cf unisim-*cf $(all)
  96         rm -f fpga/*.o fpga/work-*cf
  97         rm -f sim-unisim/*.o sim-unisim/unisim-*cf
  98         rm -f TAGS
  99         rm -f scripts/mw_debug/*.o
 100         rm -f scripts/mw_debug/mw_debug
 101
 102 clean: _clean
 103         make -f scripts/mw_debug/Makefile clean
 104         make -f hello_world/Makefile clean
 105
 106 distclean: _clean
 107         rm -f *~ fpga/*~ lib/*~ console/*~ include/*~
 108         rm -rf litedram/build
 109         rm -f litedram/extras/*~
 110         rm -f litedram/gen-src/*~
 111         rm -f litedram/gen-src/sdram_init/*~
 112         make -f scripts/mw_debug/Makefile distclean
 113         make -f hello_world/Makefile distclean