Merge pull request #169 from paulusmack/mmu
[microwatt.git] / Makefile
1 GHDL=ghdl
2 GHDLFLAGS=--std=08 -Psim-unisim
3 CFLAGS=-O2 -Wall
4
5 # We need a version of GHDL built with either the LLVM or gcc backend.
6 # Fedora provides this, but other distros may not. Another option, although
7 # rather slow, is to use the Docker image.
8 #
9 # Uncomment one of these to build with Docker or podman
10 #DOCKER=docker
11 #DOCKER=podman
12 #
13 # Uncomment these lines to build with Docker/podman
14 #PWD = $(shell pwd)
15 #DOCKERARGS = run --rm -v $(PWD):/src:z -w /src
16 #GHDL = $(DOCKER) $(DOCKERARGS) ghdl/ghdl:buster-llvm-7 ghdl
17 #CC = $(DOCKER) $(DOCKERARGS) ghdl/ghdl:buster-llvm-7 gcc
18
19 all = core_tb soc_reset_tb icache_tb dcache_tb multiply_tb dmi_dtm_tb divider_tb \
20 rotator_tb countzero_tb wishbone_bram_tb
21
22 # XXX
23 # loadstore_tb fetch_tb
24
25 all: $(all)
26
27 %.o : %.vhdl
28 $(GHDL) -a $(GHDLFLAGS) --workdir=$(shell dirname $@) $<
29
30 common.o: decode_types.o
31 control.o: gpr_hazard.o cr_hazard.o common.o
32 sim_jtag.o: sim_jtag_socket.o
33 core_tb.o: common.o wishbone_types.o core.o soc.o sim_jtag.o
34 core.o: common.o wishbone_types.o fetch1.o fetch2.o icache.o decode1.o decode2.o register_file.o cr_file.o execute1.o loadstore1.o mmu.o dcache.o writeback.o core_debug.o
35 core_debug.o: common.o
36 countzero.o:
37 countzero_tb.o: common.o glibc_random.o countzero.o
38 cr_file.o: common.o
39 crhelpers.o: common.o
40 decode1.o: common.o decode_types.o
41 decode2.o: decode_types.o common.o helpers.o insn_helpers.o control.o
42 decode_types.o:
43 execute1.o: decode_types.o common.o helpers.o crhelpers.o insn_helpers.o ppc_fx_insns.o rotator.o logical.o countzero.o multiply.o divider.o
44 fetch1.o: common.o
45 fetch2.o: common.o wishbone_types.o
46 glibc_random_helpers.o:
47 glibc_random.o: glibc_random_helpers.o
48 helpers.o:
49 cache_ram.o:
50 plru.o:
51 plru_tb.o: plru.o
52 utils.o:
53 sim_bram.o: sim_bram_helpers.o utils.o
54 wishbone_bram_wrapper.o: wishbone_types.o sim_bram.o utils.o
55 wishbone_bram_tb.o: wishbone_bram_wrapper.o
56 icache.o: utils.o common.o wishbone_types.o plru.o cache_ram.o utils.o
57 icache_tb.o: common.o wishbone_types.o icache.o wishbone_bram_wrapper.o
58 dcache.o: utils.o common.o wishbone_types.o plru.o cache_ram.o utils.o
59 dcache_tb.o: common.o wishbone_types.o dcache.o wishbone_bram_wrapper.o
60 insn_helpers.o:
61 loadstore1.o: common.o decode_types.o
62 logical.o: decode_types.o
63 multiply_tb.o: decode_types.o common.o glibc_random.o ppc_fx_insns.o multiply.o
64 multiply.o: common.o decode_types.o
65 mmu.o: common.o
66 divider_tb.o: decode_types.o common.o glibc_random.o ppc_fx_insns.o divider.o
67 divider.o: common.o decode_types.o
68 ppc_fx_insns.o: helpers.o
69 register_file.o: common.o
70 rotator.o: common.o
71 rotator_tb.o: common.o glibc_random.o ppc_fx_insns.o insn_helpers.o rotator.o
72 sim_console.o:
73 sim_uart.o: wishbone_types.o sim_console.o
74 xics.o: wishbone_types.o common.o
75 soc.o: common.o wishbone_types.o core.o wishbone_arbiter.o sim_uart.o wishbone_bram_wrapper.o dmi_dtm_xilinx.o wishbone_debug_master.o xics.o syscon.o
76 syscon.o: wishbone_types.o
77 wishbone_arbiter.o: wishbone_types.o
78 wishbone_types.o:
79 writeback.o: common.o crhelpers.o
80 dmi_dtm_tb.o: dmi_dtm_xilinx.o wishbone_debug_master.o
81 dmi_dtm_xilinx.o: wishbone_types.o sim-unisim/unisim_vcomponents.o
82 wishbone_debug_master.o: wishbone_types.o
83
84 UNISIM_BITS = sim-unisim/unisim_vcomponents.vhdl sim-unisim/BSCANE2.vhdl sim-unisim/BUFG.vhdl
85 sim-unisim/unisim_vcomponents.o: $(UNISIM_BITS)
86 $(GHDL) -a $(GHDLFLAGS) --work=unisim --workdir=sim-unisim $^
87
88
89 fpga/soc_reset_tb.o: fpga/soc_reset.o
90
91 soc_reset_tb: fpga/soc_reset_tb.o fpga/soc_reset.o
92 $(GHDL) -e $(GHDLFLAGS) --workdir=fpga soc_reset_tb
93
94 core_tb: core_tb.o sim_vhpi_c.o sim_bram_helpers_c.o sim_console_c.o sim_jtag_socket_c.o
95 $(GHDL) -e $(GHDLFLAGS) -Wl,sim_vhpi_c.o -Wl,sim_bram_helpers_c.o -Wl,sim_console_c.o -Wl,sim_jtag_socket_c.o $@
96
97 fetch_tb: fetch_tb.o
98 $(GHDL) -e $(GHDLFLAGS) $@
99
100 icache_tb: icache_tb.o sim_vhpi_c.o sim_bram_helpers_c.o
101 $(GHDL) -e $(GHDLFLAGS) -Wl,sim_vhpi_c.o -Wl,sim_bram_helpers_c.o $@
102
103 dcache_tb: dcache_tb.o sim_vhpi_c.o sim_bram_helpers_c.o
104 $(GHDL) -e $(GHDLFLAGS) -Wl,sim_vhpi_c.o -Wl,sim_bram_helpers_c.o $@
105
106 plru_tb: plru_tb.o
107 $(GHDL) -e $(GHDLFLAGS) $@
108
109 loadstore_tb: loadstore_tb.o
110 $(GHDL) -e $(GHDLFLAGS) $@
111
112 multiply_tb: multiply_tb.o
113 $(GHDL) -e $(GHDLFLAGS) $@
114
115 divider_tb: divider_tb.o
116 $(GHDL) -e $(GHDLFLAGS) $@
117
118 rotator_tb: rotator_tb.o
119 $(GHDL) -e $(GHDLFLAGS) $@
120
121 countzero_tb: countzero_tb.o
122 $(GHDL) -e $(GHDLFLAGS) $@
123
124 simple_ram_tb: simple_ram_tb.o
125 $(GHDL) -e $(GHDLFLAGS) $@
126
127 wishbone_bram_tb: sim_vhpi_c.o sim_bram_helpers_c.o wishbone_bram_tb.o
128 $(GHDL) -e $(GHDLFLAGS) -Wl,sim_vhpi_c.o -Wl,sim_bram_helpers_c.o $@
129
130 dmi_dtm_tb: dmi_dtm_tb.o sim_vhpi_c.o sim_bram_helpers_c.o
131 $(GHDL) -e $(GHDLFLAGS) -Wl,sim_vhpi_c.o -Wl,sim_bram_helpers_c.o $@
132
133 tests = $(sort $(patsubst tests/%.out,%,$(wildcard tests/*.out)))
134 tests_console = $(sort $(patsubst tests/%.console_out,%,$(wildcard tests/*.console_out)))
135
136 check: $(tests) $(tests_console) test_micropython test_micropython_long
137
138 check_light: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 test_micropython test_micropython_long $(tests_console)
139
140 $(tests): core_tb
141 @./scripts/run_test.sh $@
142
143 $(tests_console): core_tb
144 @./scripts/run_test_console.sh $@
145
146 test_micropython: core_tb
147 @./scripts/test_micropython.py
148
149 test_micropython_long: core_tb
150 @./scripts/test_micropython_long.py
151
152 TAGS:
153 find . -name '*.vhdl' | xargs ./scripts/vhdltags
154
155 .PHONY: TAGS
156
157 _clean:
158 rm -f *.o work-*cf unisim-*cf $(all)
159 rm -f fpga/*.o fpga/work-*cf
160 rm -f sim-unisim/*.o sim-unisim/unisim-*cf
161 rm -f TAGS
162 rm -f scripts/mw_debug/*.o
163 rm -f scripts/mw_debug/mw_debug
164
165 clean: _clean
166 make -f scripts/mw_debug/Makefile clean
167
168 distclean: _clean
169 rm -f *~ fpga/~
170 rm -rf litedram/build
171 rm -f litedram/extras/*~
172 rm -f litedram/gen-src/*~
173 rm -f litedram/gen-src/sdram_init/*~
174 make -f scripts/mw_debug/Makefile distclean