Improve architectural compliance of mfspr and mtspr
[microwatt.git] / Makefile.synth
1 # Use local tools
2 #GHDLSYNTH = ghdl.so
3 #YOSYS = yosys
4 #NEXTPNR = nextpnr-ecp5
5 #ECPPACK = ecppack
6 #OPENOCD = openocd
7
8 # Use Docker images
9 DOCKER=docker
10 #DOCKER=podman
11 #
12 PWD = $(shell pwd)
13 DOCKERARGS = run --rm -v $(PWD):/src:z -w /src
14 #
15 GHDLSYNTH = ghdl
16 YOSYS = $(DOCKER) $(DOCKERARGS) ghdl/synth:beta yosys
17 NEXTPNR = $(DOCKER) $(DOCKERARGS) ghdl/synth:nextpnr-ecp5 nextpnr-ecp5
18 ECPPACK = $(DOCKER) $(DOCKERARGS) ghdl/synth:trellis ecppack
19 OPENOCD = $(DOCKER) $(DOCKERARGS) --device /dev/bus/usb ghdl/synth:prog openocd
20
21
22 # Hello world
23 GHDL_IMAGE_GENERICS=-gMEMORY_SIZE=8192 -gRAM_INIT_FILE=hello_world/hello_world.hex
24
25 # Micropython
26 #GHDL_IMAGE_GENERICS=-gMEMORY_SIZE=393216 -gRAM_INIT_FILE=micropython/firmware.hex
27
28
29 # OrangeCrab with ECP85
30 #GHDL_TARGET_GENERICS=-gRESET_LOW=true -gCLK_INPUT=50000000 -gCLK_FREQUENCY=50000000
31 #LPF=constraints/orange-crab.lpf
32 #PACKAGE=CSFBGA285
33 #NEXTPNR_FLAGS=--um5g-85k --freq 50
34 #OPENOCD_JTAG_CONFIG=openocd/olimex-arm-usb-tiny-h.cfg
35 #OPENOCD_DEVICE_CONFIG=openocd/LFE5UM5G-85F.cfg
36
37 # ECP5-EVN
38 GHDL_TARGET_GENERICS=-gRESET_LOW=true -gCLK_INPUT=12000000 -gCLK_FREQUENCY=12000000
39 LPF=constraints/ecp5-evn.lpf
40 PACKAGE=CABGA381
41 NEXTPNR_FLAGS=--um5g-85k --freq 12
42 OPENOCD_JTAG_CONFIG=openocd/ecp5-evn.cfg
43 OPENOCD_DEVICE_CONFIG=openocd/LFE5UM5G-85F.cfg
44
45 VHDL_FILES = fpga/soc_reset.vhdl fpga/clk_gen_bypass.vhd decode_types.vhdl
46 VHDL_FILES += common.vhdl wishbone_types.vhdl wishbone_debug_master.vhdl
47 VHDL_FILES += wishbone_arbiter.vhdl cache_ram.vhdl utils.vhdl plru.vhdl
48 VHDL_FILES += helpers.vhdl dcache.vhdl core_debug.vhdl fetch1.vhdl fetch2.vhdl
49 VHDL_FILES += register_file.vhdl insn_helpers.vhdl multiply.vhdl divider.vhdl
50 VHDL_FILES += logical.vhdl crhelpers.vhdl countzero.vhdl rotator.vhdl
51 VHDL_FILES += ppc_fx_insns.vhdl execute1.vhdl decode1.vhdl cr_file.vhdl
52 VHDL_FILES += writeback.vhdl loadstore1.vhdl icache.vhdl cr_hazard.vhdl
53 VHDL_FILES += gpr_hazard.vhdl control.vhdl decode2.vhdl core.vhdl
54 VHDL_FILES += fpga/pp_fifo.vhd fpga/pp_soc_uart.vhd dmi_dtm_dummy.vhdl
55 VHDL_FILES += fpga/main_bram.vhdl wishbone_bram_wrapper.vhdl soc.vhdl
56 VHDL_FILES += fpga/toplevel.vhdl
57
58 all: microwatt.bit
59
60 microwatt.json: $(VHDL_FILES)
61 $(YOSYS) -m $(GHDLSYNTH) -p "ghdl --std=08 $(GHDL_IMAGE_GENERICS) $(GHDL_TARGET_GENERICS) $(VHDL_FILES) -e toplevel; synth_ecp5 -json $@"
62
63 microwatt_out.config: microwatt.json $(LPF)
64 $(NEXTPNR) --json $< --lpf $(LPF) --textcfg $@ $(NEXTPNR_FLAGS) --package $(PACKAGE)
65
66 microwatt.bit: microwatt_out.config
67 $(ECPPACK) --svf microwatt.svf $< $@
68
69 microwatt.svf: microwatt.bit
70
71 prog: microwatt.svf
72 $(OPENOCD) -f $(OPENOCD_JTAG_CONFIG) -f $(OPENOCD_DEVICE_CONFIG) -c "transport select jtag; init; svf $<; exit"
73
74 clean:
75 @rm -f work-obj08.cf *.bit *.json *.svf *.config
76
77 .PHONY: clean prog
78 .PRECIOUS: microwatt.json microwatt_out.config microwatt.bit