2 / |/ / (_) / __/__ / ___/
3 / /|_/ / / / _\ \/ _ \/ /__
4 /_/ /_/ /_/ /___/\___/\___/
6 a high performance and small footprint SoC based on Migen
11 * LatticeMico32 CPU, modified to include an optional MMU (experimental).
12 * mor1kx (a better OpenRISC implementation) as alternative CPU option.
13 * High performance memory controller capable of issuing several SDRAM commands
15 * Supports SDR, DDR, LPDDR, DDR2 and DDR3.
16 * Provided peripherals: UART, GPIO, timer, GPIO, NOR flash controller, SPI
17 flash controller, Ethernet MAC, and more.
19 - on Spartan-6, 83MHz system clock frequencies, 10+Gbps DDR
20 SDRAM bandwidth, 1080p 32bpp framebuffer, etc.
21 - on Kintex-7, 125MHz system clock frequencies (up to 200MHz without DDR3),
22 64Gbps DDR3 SDRAM bandwidth.
23 * Low resource usage: basic implementation fits easily in Spartan-6 LX9.
24 * Portable and easy to customize thanks to Python- and Migen-based
26 * Design new peripherals using Migen and benefit from automatic CSR maps
28 * Possibility to encapsulate legacy Verilog/VHDL code.
30 MiSoC comes with built-in support for the following boards:
31 * Mixxeo, the digital video mixer from M-Labs [XC6SLX45]
32 * Milkymist One, the original M-Labs video synthesizer [XC6SLX45]
33 * Papilio Pro, a simple and low-cost development board [XC6SLX9]
34 * KC705, a Kintex-7 devboard from Xilinx [XC7K325T]
35 MiSoC is portable and support for other boards can easily be added as external
40 1. Install Python 3.3+, Migen and FPGA vendor's development tools.
41 Get Migen from: https://github.com/m-labs/migen
43 2. Install JTAG tools.
44 For Mixxeo and M1: http://urjtag.org
45 For Papilio Pro and KC705: http://xc3sprog.sourceforge.net
47 3. Obtain and build any required flash proxy bitstreams. Flash proxy bitstreams
48 give JTAG access to a flash chip through the FPGA.
49 For Mixxeo and M1: https://github.com/m-labs/fjmem-m1
50 For Papilio Pro: https://github.com/GadgetFactory/Papilio-Loader
51 (xc3sprog/trunk/bscan_spi/bscan_spi_lx9_papilio.bit)
52 For KC705: https://github.com/m-labs/bscan_spi_kc705
54 4. Compile and install binutils. Take the latest version from GNU.
55 mkdir build && cd build
56 ../configure --target=lm32-elf
60 5. Compile and install GCC. Take gcc-core and gcc-g++ from GNU (version 4.5 or >=4.9).
62 mkdir build && cd build
63 ../configure --target=lm32-elf --enable-languages="c,c++" --disable-libgcc --disable-libssp
67 6. Build and flash the BIOS and bitstream. Run from MiSoC:
68 For Mixxeo: ./make.py all
69 For M1: ./make.py -p m1 all
70 For Papilio Pro: ./make.py -t ppro all
71 For KC705: ./make.py -t kc705 all
73 7. Run a terminal program on the board's serial port at 115200 8-N-1.
74 You should get the BIOS prompt.
76 8. Read and experiment with the source!
77 Come to our IRC channel and mailing list!
81 MiSoC is released under the very permissive two-clause BSD license. Under
82 the terms of this license, you are authorized to use MiSoC for
83 closed-source proprietary designs.
84 Even though we do not require you to do so, those things are awesome, so please
86 * tell us that you are using MiSoC
87 * cite MiSoC in publications related to research it has helped
88 * send us feedback and suggestions for improvements
89 * send us bug reports when something goes wrong
90 * send us the modifications and improvements you have done to MiSoC.
91 The use of "git format-patch" is recommended. If your submission is large and
92 complex and/or you are not sure how to proceed, feel free to discuss it on
93 the mailing list or IRC (#m-labs on Freenode) beforehand.
95 See LICENSE file for full copyright and license info.
103 https://github.com/m-labs/misoc
105 You can contact us on the public mailing list devel [AT] lists.m-labs.hk.