README

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   6            Copyright 2012-2015 / EnjoyDigital
   7                 florent@enjoy-digital.fr
   8
   9        A small footprint and configurable embedded FPGA
  10          logic analyzer core developed by EnjoyDigital
  11
  12 [> Doc
  13 ---------
  14 HTML : www.enjoy-digital.fr/litex/litescope/
  15 PDF  : www.enjoy-digital.fr/litex/litescope.pdf
  16
  17 [> Intro
  18 ---------
  19 LiteScope is small footprint and configurable embedded logic analyzer that you
  20 can use in your FPGA and aims to provide a a free, portable and flexible
  21 alternatve to vendor's solutions!
  22
  23 LiteScope is part of LiteX libraries whose aims are to lower entry level of complex
  24 FPGA IP cores by providing simple, elegant and efficient implementations of
  25 components used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller...
  26
  27 The core uses simple and specific streaming buses and will provides in the future
  28 adapters to use standardized AXI or Avalon-ST streaming buses.
  29
  30 Since Python is used to describe the HDL, the core is highly and easily
  31 configurable.
  32
  33 LiteScope uses technologies developed in partnership with M-Labs Ltd:
  34  - Migen enables generating HDL with Python in an efficient way.
  35  - MiSoC provides the basic blocks to build a powerful and small footprint SoC.
  36
  37 LiteScope can be used as a Migen/MiSoC library (by simply installing  it
  38 with the provided setup.py) or can be integrated with your standard design flow
  39 by generating the verilog rtl that you will use as a standard core.
  40
  41 LiteScope produces "vcd" files that can be read in your regular waveforms viewer.
  42
  43 Since LiteScope also provides a UART <--> Wishbone brige so you only need 2
  44 external Rx/Tx pins to be ready to debug or control all your Wishbone peripherals!
  45
  46 [> Features
  47 -----------
  48 - IO peek and poke with LiteScopeIO
  49 - Logic analyser with LiteScopeLA:
  50   - Various triggering modules: Term, Range, Edge (add yours! :)
  51   - Run Length Encoder to "compress" data and increase recording depth
  52   - Subsampling
  53   - Storage qualifier
  54   - Data storage in block rams
  55 - Bridges:
  56   - UART2Wishbone
  57   - Ethernet2Wishbone ("Etherbone")
  58
  59 [> Possible improvements
  60 -------------------------
  61 - add standardized interfaces (AXI, Avalon-ST)
  62 - add protocols analyzers
  63 - add signals injection/generation
  64 - add storage in DRAM
  65 - add storage in HDD with LiteSATA core (to be released soon!)
  66 - add PCIe Wishbone bridge with LitePCIe (to be released soon!)
  67 - ... See below Support and consulting :)
  68
  69 If you want to support these features, please contact us at florent [AT]
  70 enjoy-digital.fr. You can also contact our partner on the public mailing list
  71 devel [AT] lists.m-labs.hk.
  72
  73
  74 [> Getting started
  75 ------------------
  76 1. Install Python3 and your vendor's software
  77
  78 2. Obtain Migen and install it:
  79   git clone https://github.com/m-labs/migen
  80   cd migen
  81   python3 setup.py install
  82   cd ..
  83
  84 3. Obtain MiSoC and install it:
  85   git clone https://github.com/m-labs/misoc --recursive
  86   cd misoc
  87   python3 setup.py install
  88   cd ..
  89
  90 Note: in case you have issues with Migen/MiSoC, please retry
  91 with our forks at:
  92   https://github.com/enjoy-digital/misoc
  93   https://github.com/enjoy-digital/migen
  94 until new features are merged.
  95
  96 4. Obtain LiteScope and install it:
  97   git clone https://github.com/enjoy-digital/litescope
  98
  99 5. Build and load test design:
 100   python3 make.py -s [platform] all
 101   Supported platforms are the one altready supported by Mibuild:
 102   de0nano, m1, mixxeo, kc705, zedboard...
 103
 104 6. Test design:
 105   go to ./test directory and run:
 106   python3 test_io.py
 107   python3 test_la.py
 108
 109 [> Simulations:
 110   XXX convert simulations
 111
 112 [> Tests :
 113   XXX convert tests
 114
 115 [> License
 116 -----------
 117 LiteScope is released under the very permissive two-clause BSD license. Under the
 118 terms of this license, you are authorized to use LiteScope for closed-source
 119 proprietary designs.
 120 Even though we do not require you to do so, those things are awesome, so please
 121 do them if possible:
 122  - tell us that you are using LiteScope
 123  - cite LiteScope in publications related to research it has helped
 124  - send us feedback and suggestions for improvements
 125  - send us bug reports when something goes wrong
 126  - send us the modifications and improvements you have done to LiteScope.
 127
 128 [> Support and consulting
 129 --------------------------
 130 We love open-source hardware and like sharing our designs with others.
 131
 132 LiteScope is developed and maintained by EnjoyDigital.
 133
 134 If you would like to know more about LiteScope or if you are already a happy user
 135 and would like to extend it for your needs, EnjoyDigital can provide standard
 136 commercial support as well as consulting services.
 137
 138 So feel free to contact us, we'd love to work with you! (and eventually shorten
 139 the list of the possible improvements :)
 140
 141 [> Contact
 142 E-mail: florent [AT] enjoy-digital.fr