RELEASE_NOTES

   1 Outstanding issues for 2.0 release:
   2 --------------------
   3 1. Fix O3 CPU bug in SE 40.perlbmk fails
   4 2. Fix O3 processing nacks/coherence messages
   5 3. Better statistics for the caches.
   6 4. FS mode doesn't work under Cygwin
   7 5. memtest regression crashes under Cygwin
   8 6. Make repository public
   9 7. Testing
  10 8. Validation
  11
  12 Nov 4, 2007: m5_2.0_beta4
  13 --------------------
  14 New Features
  15 1. New cache model
  16 2. Use of a I/O cache between devices and memory
  17 3. Ability to include compiled code with EXTRAS=
  18 4. Python creation of params structures for initialization
  19 5. Ability to remotely debug in SE
  20
  21 Bug fixes:
  22 1. Fix SE serialization
  23 2. SPARC_FS booting with TimingSimpleCPU
  24 3. Rename cycles() to ticks()
  25 4. Various SPARC ISA fixes
  26 5. Draining code for checkpointing
  27 6. Various performance improvements
  28
  29 Possible Incompatibilities:
  30 1. Real TLBs are now used in SE mode. This is more accurate however it could
  31    cause some problems if you've modified the way page handling is done in
  32    SE mode.
  33 2. There have been many changes to the way the SCons files work. SimObjects,
  34    sources files, and trace flags are all specified in the SConscript files.
  35    To see how to add your sources take a look at one of them.
  36 3. Python is now used to created the parameter structs that were created
  37    manually before. The parameters listed in a py file are turned into
  38    a header file with the same name (e.g. BadDevice.py -> BadDevice.hh).
  39    With this change the structs can be populated automatically and the
  40    ugly macros to define and create SimObjects at the bottem of source
  41    files are gone. The parameter structs also automatically inherit
  42    parameters from their parents.
  43
  44 May 16, 2007: m5_2.0_beta3
  45 --------------------
  46 New Features
  47 1. Some support for SPARC full-system simulation
  48 2. Reworking of trace facitities (parameter names changed, variadic macros
  49    removed)
  50 3. Scons script cleanups
  51 4. Some support for compiling with Intel CC
  52
  53 Bug fixes since beta 2:
  54 1. Many SPARC linux syscall emulation support fixes
  55 2. Multiprocessor linux boot using the detailed O3 CPU module
  56 3. Workaround for DMA bug (final solution to be released with 2.0f)
  57 4. Simulator performance and memory leak fixes
  58 5. Fixed issue where console could stop printing in ALPHA_FS
  59 6. Fix issues with remote debugging
  60 7. Several compile fixes, including gcc 4.1
  61 8. Many other minor fixes and enhancements
  62
  63 Nov. 28, 2006: m5_2.0_beta2
  64 --------------------
  65 Bug fixes since beta 1:
  66 1. Many cache issues resolved
  67 2. Uni-coherence fixes in full-system
  68 3. LL/SC Support
  69 4. Draining/Switchover
  70 5. Functional Accesses
  71 6. Bus now has real timing
  72 7. Single config file for all SpecCPU2000 benchmarks
  73 8. Several other minor bug fixes and enhancements
  74
  75 Aug. 25, 2006: m5_2.0_beta patch 1
  76 --------------------
  77 Handful of minor bug fixes for m5_2.0_beta,
  78 along with a few new regression tests.
  79
  80 Aug. 15, 2006: m5_2.0_beta
  81 --------------------
  82 Major update to M5 including:
  83 - New CPU model
  84 - New memory system
  85 - More extensive python integration
  86 - Preliminary syscall emulation support for MIPS and SPARC
  87 This is a *beta* release, meaning that some features are not complete,
  88 and some features from M5 1.X aren't currently supported (e.g., MP
  89 coherence).  We are working to address these limitations and hope to
  90 have a complete 2.0 release soon.
  91
  92 Oct. 8, 2005: m5_1.1
  93 --------------------
  94 Update release for IOSCA workshop mini-tutorial.  New features include:
  95 - Preliminary FreeBSD support
  96 - Integration of regression tests into scons build framework
  97 - Several bug fixes and better compatibility for Cygwin hosts
  98 - Major cleanup of Alpha system code (console, PAL, etc.) to make
  99   it easier for others to build/modify
 100 - Fixes to enable compilation under g++ 4.0
 101 - Numerous minor bug fixes
 102
 103 June 10, 2005: m5_1.0_web
 104 -------------------------
 105 The 1.0 release posted on Sourceforge after the ISCA tutorial contains
 106 just a few very minor fixes relative to the CD.
 107
 108 June 5, 2005: m5_1.0_tutorial
 109 -----------------------------
 110 First non-beta release.  This release was on the CD distributed at the
 111 ISCA tutorial.  Major enhancements relative to beta releases include
 112 Linux support and Python-based configuration language.
 113
 114 June 17, 2004: m5_1.0_beta2
 115 ---------------------------
 116 Stealth-mode beta bug-fix update, not widely advertised.
 117
 118 Oct. 17, 2003: m5_1.0_beta1
 119 ---------------------------
 120 Early beta release.