2 sys
.path
.append("../src")
3 sys
.path
.append("../../TestUtil")
5 from nmigen
.compat
.sim
import run_simulation
7 from test_helper
import assert_eq
, assert_ne
, assert_op
8 from VectorAssembler
import VectorAssembler
10 # Constant that defines size of output
11 # Dont change this unless you change the input vectors to match!
14 # This function allows for the easy setting of values to the VectorAssembler
16 # dut: The CamEntry being tested
17 # input: The array of single bits to be written
18 def set_assembler(dut
, input):
19 assert len(input) == assembler_size
20 for index
in range(assembler_size
):
21 # Make sure we start from the beginning of the array
22 # at least the side that makes sense from a human standpoint
24 input_index
= assembler_size
- index
- 1
25 yield dut
.input[index
].eq(input[input_index
])
28 # Checks the output of the VectorAssembler
30 # dut: The VectorAssembler
31 # o (Output): The expected output
32 # op (Operation): (0 => ==), (1 => !=)
33 def check_output(dut
, o
, op
):
35 assert_op("Output", out_o
, o
, op
)
38 # Input should but bit readable from left to right
39 # with Little Endian notation
42 yield from set_assembler(dut
, input)
43 yield from check_output(dut
, output
, 0)
47 yield from set_assembler(dut
, input)
48 yield from check_output(dut
, output
, 0)
50 if __name__
== "__main__":
51 dut
= VectorAssembler(assembler_size
)
52 run_simulation(dut
, testbench(dut
), vcd_name
="Waveforms/test_vector_assembler.vcd")
53 print("VectorAssembler Unit Test Success")