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[libreriscv.git] / about_us.mdwn
1 # Meet the Team
2
3 These are our current members
4
5 Also, check out [[The_Mission]].
6
7 ## [[Luke Kenneth Casson Leighton|lkcl]]
8
9 * Hardware Experience: assembly-level programming, gate-level
10 circuit design, PCB design, reverse-engineering, embedded systems
11 design and programming, software engineering, standards development,
12 libre project management and more.
13 * Ethical Technology Specialist. Identifies socio-economic imbalances and
14 works out if there's an ethical way in which technology can help. If that
15 technology doesn't exist, creates it.
16 * Interests: varied and including particle physics, Medieval and Folk music, and writing poems.
17 * website: [[http://lkcl.net]]
18 * github: doesn't have one (because github is a proprietary non-free service),
19 runs his own git servers, manages projects (several), entirely in a libre
20 fashion, including managing the server(s).
21 * Availability: full-time
22
23 ## [[Jacob Lifshay|programmerjake]]
24
25 * FOSS Software Developer, Hardware Designer, Original Author of Kazan (one of our GPU drivers, also a software-rendered Vulkan implementation that works on most CPUs)
26 * Built a working RV32I CPU and VGA core that runs a 3D game in 3 weeks: [[https://github.com/programmerjake/rv32]]
27 * Built an algebraic numbers library: https://crates.io/crates/algebraics
28 * Built a (non-official) reference implementation of IEEE 754-2019 (binary floating-point): [[https://crates.io/crates/simple-soft-float]]
29 * Interests: Computer Graphics, Compilers, Simulation, Rust-lang, Anime, Astrophysics, Electronics, Computer Design, Chemistry, Nuclear Physics, Cellular Automatons, Video Game Software Engineering, High-performance Computing
30 * GitHub: [[https://github.com/programmerjake]]
31 * Availability: full-time
32
33 ## [[Tobias Platen|tplaten]]
34
35 * Copyleft Software Developer, Hardware Designer and Reverse Engineer
36 * Interests: varied and including speech synthesis and cosplay.
37 * website: [[https://www.platen-software.de/tobias/]]
38 * github: doesn't have one using notabug instead
39 [[https://notabug.org/isengaara]]
40 * Availability: Outside normal working hours.
41
42 ## Yann Guidon (whygee)
43
44 * Experience: Processor architecture : designer of
45 F-CPU project since 1999 [[http://f-cpu.org]]
46 YASEP (16- & 32-bits real-time controller) [[http://yasep.org]]
47 YGREC8 (8-bits microcontroller) [[http://ygrec8.com]]
48 * Interests: Designer of electronic circuits circuits for industrial
49 and artistic applications with dedicated workshop for PCB prototyping
50 with wide range of technologies Algorithmics, including data
51 compression, signal processing (sound & picture), optimisations,
52 design for test...
53
54 ## [[Lauri Kasanen|lauri]]
55
56 * Embedded software engineer
57 * Interests: niche platforms, embedded, servers, graphics
58 * github: [[https://github.com/clbr]]
59 * Availability: part-time
60
61 ## [[Veera Kumar|veera]]
62
63 * Software developer, programmer and small system administrator
64 * Knowledge in using Redhat, Fedora, Debian and few others
65 * Have experience building a custom Linux distribution based on LFS/CLFS
66 * Experience in Shell, C, Awk, Perl, Python, Lua, HTML, CSS, PHP
67 * Develop websites, run VPS on Linux
68 * Build open source softwares from source and test and use it
69 * Website [[http://www.vkten.in]]
70 * Availability: part-time
71
72 ## [[Jock Tanner|jock_tanner]]
73
74 * Expertise: Python developer, full-stack web developer (6+ years)
75 * My code: [[https://github.com/dmelnichuk/]], [[https://github.com/jock-tanner/]]
76 * GNU/Linux user/administrator
77 * Hobbies: electronics, real-time systems, digital music & sound processing, embedded systems, FPGA, retro computing
78 * Availability: ~20hrs/week
79 * Time zone: UTC+10:00
80
81 ## [[Alain Williams|addw]]
82
83 Alain's website: <http://phcomp.co.uk>
84
85 ## [[Cesar Strauss|Cesar_Strauss]]
86
87 * Experience: Data acquisition and control for scientific instruments
88 * Programming of microcontrolers and FPGAs
89 * Digital circuit design
90 * Availability: Outside normal working hours.
91
92 ## [[Sanjay A Menon|Sanjay]]
93
94 * Skills: Verilog, C/C++, Python, TCL & PERL
95 * Github Profile: [[https://github.com/Sanjay-A-Menon]]
96 * LinkedIn Profile: [[https://www.linkedin.com/in/sanjay-menon-91791815a]]
97 * Availability: ~6hrs/week
98
99 ## [[Samuel A Falvo II]]
100
101 * Experience in amateur HDL projects (Kestrel-3 homebrew computer
102 concept; VDC-II core), Verilog (but not System Verilog), newbie at PCB
103 design. Extensive experience with test-driven development, Python,
104 assembly language for a wide variety of CPUs including RISC-V, and Forth.
105 Very comfortable with nMigen, but still learning things.
106 * Interests: Forth, Common Lisp, Scheme, assembly language,
107 {Astro|Semiconductor-}physics, astronomy, martial arts, furry (character: black dragon; name: "Vertigo").
108 * Websites:
109 - https://hackaday.io/project/170581-vdc-ii ,
110 - https://kestrelcomputer.github.io/kestrel/ ,
111 - http://chiselapp.com/user/kc5tja/repository/kestrel-3/index
112 * Public Repositories:
113 - https://github.com/sam-falvo ,
114 - https://github.com/kestrelcomputer
115 * Availability: approximately 20 hrs/wk, circumstances permitting.
116
117 ## [[Alex Oliva|lxo]]
118
119 * Experience: GCC, binutils, glibc, GNU autotools, Free Software activism.
120 * website: [[https://www.fsfla.org/~lxoliva/]]
121 * Availability: 10+hrs/week
122
123 ## [[Richard Wilbur|rwilbur]]
124
125 * Interests: Libre in hardware and software, low-power, efficiency
126 * Hardware Experience: High-speed digital(comb. & FSM), PLD(PALASM), FPGA(VHDL), low-power, analog video, I2C, DDC, PCI, RS-232/422/485, SOC board bring-up, PCB layout, VLSI gate design
127 * Software Experience: optimization, 3D geometry transformations, simulation, atomic & multi-threaded, PCI auto-configuration, drivers (serial HW, MPEG encoder/decoder(TS generation/consumption), GPS), OpenGL vertex shader, SQL db, network protocol design, test-driven dev, PCI BIOS, fixed-point division
128 * Languages: C, C++, Python, asm, bash, PERL, BASIC, Forth, ruby
129 * Architectures: 6502/10, 68k, x86_64, PPC, i960, SPARC
130 * Website: [[https://launchpad.net/~richard-wilbur]]
131 * Availability: 10+hrs/week, more is negotiable
132 * Timezone: UTC-07:00 (DST UTC-06:00, 2nd Sun of Mar-1st Sun of Nov)
133
134 ## [[Dmitry Selyutin|ghostmansd]]
135
136 * Interests: OS development, fishing, classical antiquity
137 * Languages: C, C++, Python
138 * FW experience: system programming
139 * Availability: depends on a week (0..10+hrs/week)
140
141 ## Object Automation
142
143 ### [[oa/madan]]
144
145 * Interests: Programming in Python and Knowledge of ML algorithms and NLP
146 * Availability: 5 hours per week
147 * Statistician
148
149
150 ### [[oa/gautham]]
151
152 * Interests: Digital System Design, PCB Layout, Programming, Machine Learning
153 * Programming Languages: Verilog, C, C++, Python
154 * Availability: ~8-10 hours/week
155
156 ### [[oa/adithya]]
157
158 * Interests:Digital System Design,PCB layout, Programming, Machine Learning, IoT
159 * Programming Languages: Verilog, C, C++, Java, Python3, Julia
160 * Availability: ~10hrs per week
161
162 ### [[oa/Niranjan]]
163
164 * Interests: Digital System Design, PCB Layout, Programming
165 * Programming Languages: Verilog, C, C++, Python
166 * Availability: ~8-10 hours/week
167
168 ### [[oa/Abhishek]]
169
170 * Interests: HPC, embedded systems, Digital system design
171 * Programming Languages: C, Python, Java, VHDL
172 * Availability: ~8-10 hours/week
173
174 ### [[oa/Sukhanshu D]]
175
176 * Experience: SOC Verification Intern, Digital Design
177 * Programming Languages: Python, Verilog, Ng-spice
178 * Availability: 4-6 hours per week
179
180 ### [[oa/Mehul N]]
181
182 * Interests: Digital Design, Verification, IC Fabrication
183 * Programming Languages: Verilog, System Verilog, UVM
184 * Availability: ~ 6-8 hours/week
185 * Experience: SoC Verification Intern, Research Intern at KIS
186
187 ## 3mdeb
188
189 ## [[Kyle Lehman|klehman]]
190
191 * Languages: C/C++, Java, Python, SQL, assembly
192 * Interests: Language design, microacrhitecture, OS design, emulation, 3D computation
193 * Other interests: Nearly anything that floats, flies, or has an engine with wheels
194
195 ## [[Andrey Miroshnikov|andreym]]
196 * Languages: C, Python, Verilog
197 * Interests: Analogue/digital electronics, RF, mobile comms, compilers, FPGAs, discrete mathematics, microarchitecture, Unix OSs, PCB design
198 * Experience: FPGA/ASIC system validation, instrument automation using VISA, PCB design (KiCAD, Altium)
199 * Other interests: Lingua Latina, Philosophy, History
200 * Availability: Full-time
201 * IRC: octavius
202
203 ## [[Manikandan Nagarajan|Manik]]
204
205 * Languages: Verilog HDL, VHDL, C, Python & TCL
206 * Experience : Domain Specific Architecture Design and Implementation, IP Core Development, System on Chip, FPGA System Design, Chip Tapeout, Crypto Chip Design, Authentication Protocol Design.
207 * LinkedIn Profile: [[https://www.linkedin.com/in/manikandan-nagarajan-2156171a0/]]
208 * Availability: 8~10hrs/week
209
210 ## [[Toshaan Bharvani|toshywoshy]]
211 * Languages: C, C++, Golang, Python, Ruby, Assembly, Java, Javascript, bash, ksh, ...
212 * Interests: Software on optimized hardware, compilers, FPGAs, microarchitecture, Unix OSs, Linux, Enterprise Software
213 * Experience: Software, Firmware, BIOS/UEFI, Microcode, Services
214 * Other interests: History, Mechanics, Tinkering
215 * Availability: Full-time
216 * IRC: toshywoshy
217
218 ## Former Members
219
220 ### [[Cole Poirier|cole]]