1 <title>Andrey Miroshnikov</title>
6 ## Currently working on
7 * <https://bugs.libre-soc.org/show_bug.cgi?id=858> SVP64 Primer Documentation
8 * Learning the project repo structure, learning from existing code.
9 * <https://bugs.libre-soc.org/show_bug.cgi?id=739> Creating NGI router pinout based on requirements and chip constraints.
10 - (Pinout) - NGI POINTER Gigabit Router Pinout Considerations
11 * <https://bugs.libre-soc.org/show_bug.cgi?id=50> Working on pinmux with Luke
13 * <https://bugs.libre-soc.org/show_bug.cgi?id=846> Pinmux Pinspec Interconnect Auto-Generation
16 * Looking at Wishbone B4 and AXI specifications for streaming extension.
17 * <https://bugs.libre-soc.org/show_bug.cgi?id=244> Wishbone B4 Streaming Specification enhancement
20 ## Submitted to NLNet but not yet paid
22 ### NLNet.2019.10.046.Standards
24 * [Bug #858](https://bugs.libre-soc.org/show_bug.cgi?id=858):
25 SVP64 Primer Documentation
26 * submitted on 2022-06-27
27 * €1500 out of total of €3000
29 ### NLNet.2019.10.031.Video
31 * [Bug #865](https://bugs.libre-soc.org/show_bug.cgi?id=865):
32 implement vector bitmanip opcodes
33 * submitted on 2022-06-26
34 * €1000 out of total of €3500
40 * [Bug #762](https://bugs.libre-soc.org/show_bug.cgi?id=762):
41 Peripheral Pin Muxing Development
42 * submitted on 2022-06-10
44 * €1500 out of total of €1600
45 * [Bug #763](https://bugs.libre-soc.org/show_bug.cgi?id=763):
46 Work on I/O Core Pad JTAG Tests
47 * submitted on 2022-02-10
49 * €1500 which is the total amount
50 * [Bug #764](https://bugs.libre-soc.org/show_bug.cgi?id=764):
51 Documentation of I/O Core/Pad JTAG Tests
52 * submitted on 2022-06-10
54 * €1500 which is the total amount
56 ### NLNet.2019.10.Wishbone
58 * [Bug #714](https://bugs.libre-soc.org/show_bug.cgi?id=714):
59 Coriolis2 Installation as Normal User Script
60 * submitted on 2021-10-31
62 * €350 which is the total amount