2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 #include "arch/alpha/faults.hh"
30 #include "cpu/exec_context.hh"
31 #include "cpu/base.hh"
32 #include "base/trace.hh"
33 #include "kern/kernel_stats.hh"
38 FaultName
MachineCheckFault::_name
= "mchk";
39 FaultVect
MachineCheckFault::_vect
= 0x0401;
40 FaultStat
MachineCheckFault::_stat
;
42 FaultName
AlignmentFault::_name
= "unalign";
43 FaultVect
AlignmentFault::_vect
= 0x0301;
44 FaultStat
AlignmentFault::_stat
;
46 FaultName
ResetFault::_name
= "reset";
47 FaultVect
ResetFault::_vect
= 0x0001;
48 FaultStat
ResetFault::_stat
;
50 FaultName
ArithmeticFault::_name
= "arith";
51 FaultVect
ArithmeticFault::_vect
= 0x0501;
52 FaultStat
ArithmeticFault::_stat
;
54 FaultName
InterruptFault::_name
= "interrupt";
55 FaultVect
InterruptFault::_vect
= 0x0101;
56 FaultStat
InterruptFault::_stat
;
58 FaultName
NDtbMissFault::_name
= "dtb_miss_single";
59 FaultVect
NDtbMissFault::_vect
= 0x0201;
60 FaultStat
NDtbMissFault::_stat
;
62 FaultName
PDtbMissFault::_name
= "dtb_miss_double";
63 FaultVect
PDtbMissFault::_vect
= 0x0281;
64 FaultStat
PDtbMissFault::_stat
;
66 FaultName
DtbPageFault::_name
= "dfault";
67 FaultVect
DtbPageFault::_vect
= 0x0381;
68 FaultStat
DtbPageFault::_stat
;
70 FaultName
DtbAcvFault::_name
= "dfault";
71 FaultVect
DtbAcvFault::_vect
= 0x0381;
72 FaultStat
DtbAcvFault::_stat
;
74 FaultName
ItbMissFault::_name
= "itbmiss";
75 FaultVect
ItbMissFault::_vect
= 0x0181;
76 FaultStat
ItbMissFault::_stat
;
78 FaultName
ItbPageFault::_name
= "itbmiss";
79 FaultVect
ItbPageFault::_vect
= 0x0181;
80 FaultStat
ItbPageFault::_stat
;
82 FaultName
ItbAcvFault::_name
= "iaccvio";
83 FaultVect
ItbAcvFault::_vect
= 0x0081;
84 FaultStat
ItbAcvFault::_stat
;
86 FaultName
UnimplementedOpcodeFault::_name
= "opdec";
87 FaultVect
UnimplementedOpcodeFault::_vect
= 0x0481;
88 FaultStat
UnimplementedOpcodeFault::_stat
;
90 FaultName
FloatEnableFault::_name
= "fen";
91 FaultVect
FloatEnableFault::_vect
= 0x0581;
92 FaultStat
FloatEnableFault::_stat
;
94 FaultName
PalFault::_name
= "pal";
95 FaultVect
PalFault::_vect
= 0x2001;
96 FaultStat
PalFault::_stat
;
98 FaultName
IntegerOverflowFault::_name
= "intover";
99 FaultVect
IntegerOverflowFault::_vect
= 0x0501;
100 FaultStat
IntegerOverflowFault::_stat
;
104 void AlphaFault::invoke(ExecContext
* xc
)
106 DPRINTF(Fault
, "Fault %s at PC: %#x\n", name(), xc
->regs
.pc
);
107 xc
->cpu
->recordEvent(csprintf("Fault %s", name()));
109 assert(!xc
->misspeculating());
110 xc
->kernelStats
->fault(this);
112 // exception restart address
113 if (setRestartAddress() || !xc
->inPalMode())
114 xc
->setMiscReg(AlphaISA::IPR_EXC_ADDR
, xc
->regs
.pc
);
116 if (skipFaultingInstruction()) {
117 // traps... skip faulting instruction.
118 xc
->setMiscReg(AlphaISA::IPR_EXC_ADDR
,
119 xc
->readMiscReg(AlphaISA::IPR_EXC_ADDR
) + 4);
122 xc
->regs
.pc
= xc
->readMiscReg(AlphaISA::IPR_PAL_BASE
) + vect();
123 xc
->regs
.npc
= xc
->regs
.pc
+ sizeof(MachInst
);
126 void ArithmeticFault::invoke(ExecContext
* xc
)
128 DPRINTF(Fault
, "Fault %s at PC: %#x\n", name(), xc
->regs
.pc
);
129 xc
->cpu
->recordEvent(csprintf("Fault %s", name()));
131 assert(!xc
->misspeculating());
132 xc
->kernelStats
->fault(this);
134 panic("Arithmetic traps are unimplemented!");
138 /*void ArithmeticFault::invoke(ExecContext * xc)
140 panic("Arithmetic traps are unimplemented!");
145 } // namespace AlphaISA
147 /*Fault * ListOfFaults[] = {
149 (Fault *)&ResetFault,
150 (Fault *)&MachineCheckFault,
151 (Fault *)&ArithmeticFault,
152 (Fault *)&InterruptFault,
153 (Fault *)&NDtbMissFault,
154 (Fault *)&PDtbMissFault,
155 (Fault *)&AlignmentFault,
156 (Fault *)&DtbPageFault,
157 (Fault *)&DtbAcvFault,
158 (Fault *)&ItbMissFault,
159 (Fault *)&ItbPageFault,
160 (Fault *)&ItbAcvFault,
161 (Fault *)&UnimplementedOpcodeFault,
162 (Fault *)&FloatEnableFault,
164 (Fault *)&IntegerOverflowFault,
167 int NumFaults = sizeof(ListOfFaults) / sizeof(Fault *);*/