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30 /// Check "FP enabled" machine status bit. Called when executing any FP
31 /// instruction in full-system mode.
32 /// @retval Full-system mode: NoFault if FP is enabled, FenFault
33 /// if not. Non-full-system mode: always returns NoFault.
35 inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc)
37 Fault fault = NoFault; // dummy... this ipr access should not fault
38 if (!EV5::ICSR_FPE(xc->readMiscRegWithEffect(AlphaISA::IPR_ICSR, fault))) {
39 fault = new FloatEnableFault;
44 inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc)
53 * Base class for general floating-point instructions. Includes
54 * support for various Alpha rounding and trapping modes. Only FP
55 * instructions that require this support are derived from this
56 * class; the rest derive directly from AlphaStaticInst.
58 class AlphaFP : public AlphaStaticInst
61 /// Alpha FP rounding modes.
63 Chopped = 0, ///< round toward zero
64 Minus_Infinity = 1, ///< round toward minus infinity
65 Normal = 2, ///< round to nearest (default)
66 Dynamic = 3, ///< use FPCR setting (in instruction)
67 Plus_Infinity = 3 ///< round to plus inifinity (in FPCR)
70 /// Alpha FP trapping modes.
71 /// For instructions that produce integer results, the
72 /// "Underflow Enable" modes really mean "Overflow Enable", and
73 /// the assembly modifier is V rather than U.
75 /// default: nothing enabled
76 Imprecise = 0, ///< no modifier
77 /// underflow/overflow traps enabled, inexact disabled
78 Underflow_Imprecise = 1, ///< /U or /V
79 Underflow_Precise = 5, ///< /SU or /SV
80 /// underflow/overflow and inexact traps enabled
81 Underflow_Inexact_Precise = 7 ///< /SUI or /SVI
85 /// Map Alpha rounding mode to C99 constants from <fenv.h>.
86 static const int alphaToC99RoundingMode[];
88 /// Map enum RoundingMode values to disassembly suffixes.
89 static const char *roundingModeSuffix[];
90 /// Map enum TrappingMode values to FP disassembly suffixes.
91 static const char *fpTrappingModeSuffix[];
92 /// Map enum TrappingMode values to integer disassembly suffixes.
93 static const char *intTrappingModeSuffix[];
95 /// This instruction's rounding mode.
96 RoundingMode roundingMode;
97 /// This instruction's trapping mode.
98 TrappingMode trappingMode;
100 /// Have we warned about this instruction's unsupported
101 /// rounding mode (if applicable)?
102 mutable bool warnedOnRounding;
104 /// Have we warned about this instruction's unsupported
105 /// trapping mode (if applicable)?
106 mutable bool warnedOnTrapping;
109 AlphaFP(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
110 : AlphaStaticInst(mnem, _machInst, __opClass),
111 roundingMode((enum RoundingMode)FP_ROUNDMODE),
112 trappingMode((enum TrappingMode)FP_TRAPMODE),
113 warnedOnRounding(false),
114 warnedOnTrapping(false)
118 int getC99RoundingMode(uint64_t fpcr_val) const;
120 // This differs from the AlphaStaticInst version only in
121 // printing suffixes for non-default rounding & trapping modes.
123 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
131 AlphaFP::getC99RoundingMode(uint64_t fpcr_val) const
133 if (roundingMode == Dynamic) {
134 return alphaToC99RoundingMode[bits(fpcr_val, 59, 58)];
137 return alphaToC99RoundingMode[roundingMode];
142 AlphaFP::generateDisassembly(Addr pc, const SymbolTable *symtab) const
144 std::string mnem_str(mnemonic);
146 #ifndef SS_COMPATIBLE_DISASSEMBLY
147 std::string suffix("");
148 suffix += ((_destRegIdx[0] >= FP_Base_DepTag)
149 ? fpTrappingModeSuffix[trappingMode]
150 : intTrappingModeSuffix[trappingMode]);
151 suffix += roundingModeSuffix[roundingMode];
154 mnem_str = csprintf("%s/%s", mnemonic, suffix);
158 std::stringstream ss;
159 ccprintf(ss, "%-10s ", mnem_str.c_str());
161 // just print the first two source regs... if there's
162 // a third one, it's a read-modify-write dest (Rc),
164 if (_numSrcRegs > 0) {
165 printReg(ss, _srcRegIdx[0]);
167 if (_numSrcRegs > 1) {
169 printReg(ss, _srcRegIdx[1]);
172 // just print the first dest... if there's a second one,
173 // it's generally implicit
174 if (_numDestRegs > 0) {
177 printReg(ss, _destRegIdx[0]);
183 const int AlphaFP::alphaToC99RoundingMode[] = {
184 FE_TOWARDZERO, // Chopped
185 FE_DOWNWARD, // Minus_Infinity
186 FE_TONEAREST, // Normal
187 FE_UPWARD // Dynamic in inst, Plus_Infinity in FPCR
190 const char *AlphaFP::roundingModeSuffix[] = { "c", "m", "", "d" };
191 // mark invalid trapping modes, but don't fail on them, because
192 // you could decode anything on a misspeculated path
193 const char *AlphaFP::fpTrappingModeSuffix[] =
194 { "", "u", "INVTM2", "INVTM3", "INVTM4", "su", "INVTM6", "sui" };
195 const char *AlphaFP::intTrappingModeSuffix[] =
196 { "", "v", "INVTM2", "INVTM3", "INVTM4", "sv", "INVTM6", "svi" };
199 // FP instruction class execute method template. Handles non-standard
201 def template FloatingPointExecute {{
202 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
203 Trace::InstRecord *traceData) const
205 if (trappingMode != Imprecise && !warnedOnTrapping) {
206 warn("%s: non-standard trapping mode not supported",
207 generateDisassembly(0, NULL));
208 warnedOnTrapping = true;
211 Fault fault = NoFault;
217 if (roundingMode == Normal) {
220 fesetround(getC99RoundingMode(
221 xc->readMiscReg(AlphaISA::Fpcr_DepTag)));
223 fesetround(FE_TONEAREST);
226 if (roundingMode != Normal && !warnedOnRounding) {
227 warn("%s: non-standard rounding mode not supported",
228 generateDisassembly(0, NULL));
229 warnedOnRounding = true;
234 if (fault == NoFault) {
242 // FP instruction class execute method template where no dynamic
243 // rounding mode control is needed. Like BasicExecute, but includes
244 // check & warning for non-standard trapping mode.
245 def template FPFixedRoundingExecute {{
246 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
247 Trace::InstRecord *traceData) const
249 if (trappingMode != Imprecise && !warnedOnTrapping) {
250 warn("%s: non-standard trapping mode not supported",
251 generateDisassembly(0, NULL));
252 warnedOnTrapping = true;
255 Fault fault = NoFault;
262 if (fault == NoFault) {
270 def template FloatingPointDecode {{
272 AlphaStaticInst *i = new %(class_name)s(machInst);
280 // General format for floating-point operate instructions:
281 // - Checks trapping and rounding mode flags. Trapping modes
282 // currently unimplemented (will fail).
283 // - Generates NOP if FC == 31.
284 def format FloatingPointOperate(code, *opt_args) {{
285 iop = InstObjParams(name, Name, 'AlphaFP', CodeBlock(code), opt_args)
286 decode_block = FloatingPointDecode.subst(iop)
287 header_output = BasicDeclare.subst(iop)
288 decoder_output = BasicConstructor.subst(iop)
289 exec_output = FloatingPointExecute.subst(iop)
292 // Special format for cvttq where rounding mode is pre-decoded
293 def format FPFixedRounding(code, class_suffix, *opt_args) {{
295 iop = InstObjParams(name, Name, 'AlphaFP', CodeBlock(code), opt_args)
296 decode_block = FloatingPointDecode.subst(iop)
297 header_output = BasicDeclare.subst(iop)
298 decoder_output = BasicConstructor.subst(iop)
299 exec_output = FPFixedRoundingExecute.subst(iop)