arch/alpha/isa/int.isa

   1 // -*- mode:c++ -*-
   2
   3 // Copyright (c) 2003-2005 The Regents of The University of Michigan
   4 // All rights reserved.
   5 //
   6 // Redistribution and use in source and binary forms, with or without
   7 // modification, are permitted provided that the following conditions are
   8 // met: redistributions of source code must retain the above copyright
   9 // notice, this list of conditions and the following disclaimer;
  10 // redistributions in binary form must reproduce the above copyright
  11 // notice, this list of conditions and the following disclaimer in the
  12 // documentation and/or other materials provided with the distribution;
  13 // neither the name of the copyright holders nor the names of its
  14 // contributors may be used to endorse or promote products derived from
  15 // this software without specific prior written permission.
  16 //
  17 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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  20 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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  24 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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  27 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28
  29 output header {{
  30     /**
  31      * Base class for integer immediate instructions.
  32      */
  33     class IntegerImm : public AlphaStaticInst
  34     {
  35       protected:
  36         /// Immediate operand value (unsigned 8-bit int).
  37         uint8_t imm;
  38
  39         /// Constructor
  40         IntegerImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
  41             : AlphaStaticInst(mnem, _machInst, __opClass), imm(INTIMM)
  42         {
  43         }
  44
  45         std::string
  46         generateDisassembly(Addr pc, const SymbolTable *symtab) const;
  47     };
  48 }};
  49
  50 output decoder {{
  51     std::string
  52     IntegerImm::generateDisassembly(Addr pc, const SymbolTable *symtab) const
  53     {
  54         std::stringstream ss;
  55
  56         ccprintf(ss, "%-10s ", mnemonic);
  57
  58         // just print the first source reg... if there's
  59         // a second one, it's a read-modify-write dest (Rc),
  60         // e.g. for CMOVxx
  61         if (_numSrcRegs > 0) {
  62             printReg(ss, _srcRegIdx[0]);
  63             ss << ",";
  64         }
  65
  66         ss << (int)imm;
  67
  68         if (_numDestRegs > 0) {
  69             ss << ",";
  70             printReg(ss, _destRegIdx[0]);
  71         }
  72
  73         return ss.str();
  74     }
  75 }};
  76
  77
  78 def template RegOrImmDecode {{
  79  {
  80      AlphaStaticInst *i =
  81          (IMM) ? (AlphaStaticInst *)new %(class_name)sImm(machInst)
  82                : (AlphaStaticInst *)new %(class_name)s(machInst);
  83      if (RC == 31) {
  84          i = makeNop(i);
  85      }
  86      return i;
  87  }
  88 }};
  89
  90 // Primary format for integer operate instructions:
  91 // - Generates both reg-reg and reg-imm versions if Rb_or_imm is used.
  92 // - Generates NOP if RC == 31.
  93 def format IntegerOperate(code, *opt_flags) {{
  94     # If the code block contains 'Rb_or_imm', we define two instructions,
  95     # one using 'Rb' and one using 'imm', and have the decoder select
  96     # the right one.
  97     uses_imm = (code.find('Rb_or_imm') != -1)
  98     if uses_imm:
  99         orig_code = code
 100         # base code is reg version:
 101         # rewrite by substituting 'Rb' for 'Rb_or_imm'
 102         code = re.sub(r'Rb_or_imm', 'Rb', orig_code)
 103         # generate immediate version by substituting 'imm'
 104         # note that imm takes no extenstion, so we extend
 105         # the regexp to replace any extension as well
 106         imm_code = re.sub(r'Rb_or_imm(\.\w+)?', 'imm', orig_code)
 107
 108     # generate declaration for register version
 109     cblk = CodeBlock(code)
 110     iop = InstObjParams(name, Name, 'AlphaStaticInst', cblk, opt_flags)
 111     header_output = BasicDeclare.subst(iop)
 112     decoder_output = BasicConstructor.subst(iop)
 113     exec_output = BasicExecute.subst(iop)
 114
 115     if uses_imm:
 116         # append declaration for imm version
 117         imm_cblk = CodeBlock(imm_code)
 118         imm_iop = InstObjParams(name, Name + 'Imm', 'IntegerImm', imm_cblk,
 119                                 opt_flags)
 120         header_output += BasicDeclare.subst(imm_iop)
 121         decoder_output += BasicConstructor.subst(imm_iop)
 122         exec_output += BasicExecute.subst(imm_iop)
 123         # decode checks IMM bit to pick correct version
 124         decode_block = RegOrImmDecode.subst(iop)
 125     else:
 126         # no imm version: just check for nop
 127         decode_block = OperateNopCheckDecode.subst(iop)
 128 }};