2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
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9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 #include "arch/alpha/pseudo_inst.hh"
36 #include "arch/alpha/vtophys.hh"
37 #include "cpu/base_cpu.hh"
38 #include "cpu/sampling_cpu/sampling_cpu.hh"
39 #include "cpu/exec_context.hh"
40 #include "kern/kernel_stats.hh"
41 #include "sim/param.hh"
42 #include "sim/serialize.hh"
43 #include "sim/sim_exit.hh"
44 #include "sim/stat_control.hh"
45 #include "sim/stats.hh"
46 #include "sim/system.hh"
47 #include "sim/debug.hh"
51 extern SamplingCPU
*SampCPU
;
53 using namespace Stats
;
57 bool doStatisticsInsts
;
58 bool doCheckpointInsts
;
64 xc
->kernelStats
->arm();
68 quiesce(ExecContext
*xc
)
74 xc
->kernelStats
->quiesce();
80 xc
->kernelStats
->ivlb();
89 m5exit_old(ExecContext
*xc
)
91 SimExit(curTick
, "m5_exit_old instruction encountered");
95 m5exit(ExecContext
*xc
)
97 Tick delay
= xc
->regs
.intRegFile
[16];
98 Tick when
= curTick
+ NS2Ticks(delay
);
99 SimExit(when
, "m5_exit instruction encountered");
103 resetstats(ExecContext
*xc
)
105 if (!doStatisticsInsts
)
108 Tick delay
= xc
->regs
.intRegFile
[16];
109 Tick period
= xc
->regs
.intRegFile
[17];
111 Tick when
= curTick
+ NS2Ticks(delay
);
112 Tick repeat
= NS2Ticks(period
);
114 using namespace Stats
;
115 SetupEvent(Reset
, when
, repeat
);
119 dumpstats(ExecContext
*xc
)
121 if (!doStatisticsInsts
)
124 Tick delay
= xc
->regs
.intRegFile
[16];
125 Tick period
= xc
->regs
.intRegFile
[17];
127 Tick when
= curTick
+ NS2Ticks(delay
);
128 Tick repeat
= NS2Ticks(period
);
130 using namespace Stats
;
131 SetupEvent(Dump
, when
, repeat
);
135 dumpresetstats(ExecContext
*xc
)
137 if (!doStatisticsInsts
)
140 Tick delay
= xc
->regs
.intRegFile
[16];
141 Tick period
= xc
->regs
.intRegFile
[17];
143 Tick when
= curTick
+ NS2Ticks(delay
);
144 Tick repeat
= NS2Ticks(period
);
146 using namespace Stats
;
147 SetupEvent(Dump
|Reset
, when
, repeat
);
151 m5checkpoint(ExecContext
*xc
)
153 if (!doCheckpointInsts
)
156 Tick delay
= xc
->regs
.intRegFile
[16];
157 Tick period
= xc
->regs
.intRegFile
[17];
159 Tick when
= curTick
+ NS2Ticks(delay
);
160 Tick repeat
= NS2Ticks(period
);
162 Checkpoint::setup(when
, repeat
);
166 readfile(ExecContext
*xc
)
168 const string
&file
= xc
->cpu
->system
->params
->readfile
;
170 xc
->regs
.intRegFile
[0] = ULL(0);
174 Addr vaddr
= xc
->regs
.intRegFile
[16];
175 uint64_t len
= xc
->regs
.intRegFile
[17];
176 uint64_t offset
= xc
->regs
.intRegFile
[18];
179 int fd
= ::open(file
.c_str(), O_RDONLY
, 0);
181 panic("could not open file %s\n", file
);
183 char *buf
= new char[len
];
186 int bytes
= ::pread(fd
, p
, len
, offset
);
197 CopyIn(xc
, vaddr
, buf
, result
);
199 xc
->regs
.intRegFile
[0] = result
;
202 class Context
: public ParamContext
205 Context(const string
§ion
) : ParamContext(section
) {}
209 Context
context("pseudo_inst");
211 Param
<bool> __quiesce(&context
, "quiesce",
212 "enable quiesce instructions",
214 Param
<bool> __statistics(&context
, "statistics",
215 "enable statistics pseudo instructions",
217 Param
<bool> __checkpoint(&context
, "checkpoint",
218 "enable checkpoint pseudo instructions",
222 Context::checkParams()
224 doQuiesce
= __quiesce
;
225 doStatisticsInsts
= __statistics
;
226 doCheckpointInsts
= __checkpoint
;
229 void debugbreak(ExecContext
*xc
)
234 void switchcpu(ExecContext
*xc
)
237 SampCPU
->switchCPUs();