arch/alpha/pseudo_inst.cc

   1 /*
   2  * Copyright (c) 2003 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #include <string>
  30
  31 #include "arch/alpha/pseudo_inst.hh"
  32 #include "cpu/exec_context.hh"
  33 #include "sim/annotation.hh"
  34 #include "sim/param.hh"
  35 #include "sim/serialize.hh"
  36 #include "sim/sim_exit.hh"
  37 #include "sim/sim_stats.hh"
  38
  39 using namespace std;
  40 using namespace Statistics;
  41
  42 namespace AlphaPseudo
  43 {
  44     bool doStatisticsInsts;
  45     bool doCheckpointInsts;
  46     bool doQuiesce;
  47
  48     void
  49     quiesce(ExecContext *xc)
  50     {
  51         if (!doQuiesce)
  52             return;
  53
  54         Annotate::QUIESCE(xc);
  55         xc->suspend();
  56         xc->kernelStats.quiesce();
  57     }
  58
  59     void
  60     m5exit_old(ExecContext *xc)
  61     {
  62         SimExit(curTick, "m5_exit_old instruction encountered");
  63     }
  64
  65     void
  66     m5exit(ExecContext *xc)
  67     {
  68         Tick delay = xc->regs.intRegFile[16];
  69         Tick when = curTick + NS2Ticks(delay);
  70         SimExit(when, "m5_exit instruction encountered");
  71     }
  72
  73     void
  74     resetstats(ExecContext *xc)
  75     {
  76         if (!doStatisticsInsts)
  77             return;
  78
  79         Tick delay = xc->regs.intRegFile[16];
  80         Tick period = xc->regs.intRegFile[17];
  81
  82         Tick when = curTick + NS2Ticks(delay);
  83         Tick repeat = NS2Ticks(period);
  84
  85         SetupEvent(Reset, when, repeat);
  86     }
  87
  88     void
  89     dumpstats(ExecContext *xc)
  90     {
  91         if (!doStatisticsInsts)
  92             return;
  93
  94         Tick delay = xc->regs.intRegFile[16];
  95         Tick period = xc->regs.intRegFile[17];
  96
  97         Tick when = curTick + NS2Ticks(delay);
  98         Tick repeat = NS2Ticks(period);
  99
 100         SetupEvent(Dump, when, repeat);
 101     }
 102
 103     void
 104     dumpresetstats(ExecContext *xc)
 105     {
 106         if (!doStatisticsInsts)
 107             return;
 108
 109         Tick delay = xc->regs.intRegFile[16];
 110         Tick period = xc->regs.intRegFile[17];
 111
 112         Tick when = curTick + NS2Ticks(delay);
 113         Tick repeat = NS2Ticks(period);
 114
 115         SetupEvent(Dump|Reset, when, repeat);
 116     }
 117
 118     void
 119     m5checkpoint(ExecContext *xc)
 120     {
 121         if (!doCheckpointInsts)
 122             return;
 123
 124         Tick delay = xc->regs.intRegFile[16];
 125         Tick period = xc->regs.intRegFile[17];
 126
 127         Tick when = curTick + NS2Ticks(delay);
 128         Tick repeat = NS2Ticks(period);
 129
 130         Checkpoint::setup(when, repeat);
 131     }
 132
 133     class Context : public ParamContext
 134     {
 135       public:
 136         Context(const string &section) : ParamContext(section) {}
 137         void checkParams();
 138     };
 139
 140     Context context("PseudoInsts");
 141
 142     Param<bool> __quiesce(&context, "quiesce",
 143                           "enable quiesce instructions",
 144                           true);
 145     Param<bool> __statistics(&context, "statistics",
 146                              "enable statistics pseudo instructions",
 147                              true);
 148     Param<bool> __checkpoint(&context, "checkpoint",
 149                              "enable checkpoint pseudo instructions",
 150                              true);
 151
 152     void
 153     Context::checkParams()
 154     {
 155         doQuiesce = __quiesce;
 156         doStatisticsInsts = __statistics;
 157         doCheckpointInsts = __checkpoint;
 158     }
 159 }