Need to #include <unistd.h> to build with pread
[gem5.git] / arch / alpha / pseudo_inst.cc
1 /*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <fcntl.h>
30 #include <unistd.h>
31 #include <cstdio>
32
33 #include <string>
34
35 #include "arch/alpha/pseudo_inst.hh"
36 #include "arch/alpha/vtophys.hh"
37 #include "cpu/base_cpu.hh"
38 #include "cpu/exec_context.hh"
39 #include "sim/param.hh"
40 #include "sim/serialize.hh"
41 #include "sim/sim_exit.hh"
42 #include "sim/stat_control.hh"
43 #include "sim/stats.hh"
44 #include "sim/system.hh"
45
46 using namespace std;
47 using namespace Stats;
48
49 namespace AlphaPseudo
50 {
51 bool doStatisticsInsts;
52 bool doCheckpointInsts;
53 bool doQuiesce;
54
55 void
56 arm(ExecContext *xc)
57 {
58 xc->kernelStats.arm();
59 }
60
61 void
62 quiesce(ExecContext *xc)
63 {
64 if (!doQuiesce)
65 return;
66
67 xc->suspend();
68 xc->kernelStats.quiesce();
69 }
70
71 void
72 ivlb(ExecContext *xc)
73 {
74 xc->kernelStats.ivlb();
75 }
76
77 void
78 ivle(ExecContext *xc)
79 {
80 }
81
82 void
83 m5exit_old(ExecContext *xc)
84 {
85 SimExit(curTick, "m5_exit_old instruction encountered");
86 }
87
88 void
89 m5exit(ExecContext *xc)
90 {
91 Tick delay = xc->regs.intRegFile[16];
92 Tick when = curTick + NS2Ticks(delay);
93 SimExit(when, "m5_exit instruction encountered");
94 }
95
96 void
97 resetstats(ExecContext *xc)
98 {
99 if (!doStatisticsInsts)
100 return;
101
102 Tick delay = xc->regs.intRegFile[16];
103 Tick period = xc->regs.intRegFile[17];
104
105 Tick when = curTick + NS2Ticks(delay);
106 Tick repeat = NS2Ticks(period);
107
108 using namespace Stats;
109 SetupEvent(Reset, when, repeat);
110 }
111
112 void
113 dumpstats(ExecContext *xc)
114 {
115 if (!doStatisticsInsts)
116 return;
117
118 Tick delay = xc->regs.intRegFile[16];
119 Tick period = xc->regs.intRegFile[17];
120
121 Tick when = curTick + NS2Ticks(delay);
122 Tick repeat = NS2Ticks(period);
123
124 using namespace Stats;
125 SetupEvent(Dump, when, repeat);
126 }
127
128 void
129 dumpresetstats(ExecContext *xc)
130 {
131 if (!doStatisticsInsts)
132 return;
133
134 Tick delay = xc->regs.intRegFile[16];
135 Tick period = xc->regs.intRegFile[17];
136
137 Tick when = curTick + NS2Ticks(delay);
138 Tick repeat = NS2Ticks(period);
139
140 using namespace Stats;
141 SetupEvent(Dump|Reset, when, repeat);
142 }
143
144 void
145 m5checkpoint(ExecContext *xc)
146 {
147 if (!doCheckpointInsts)
148 return;
149
150 Tick delay = xc->regs.intRegFile[16];
151 Tick period = xc->regs.intRegFile[17];
152
153 Tick when = curTick + NS2Ticks(delay);
154 Tick repeat = NS2Ticks(period);
155
156 Checkpoint::setup(when, repeat);
157 }
158
159 void
160 readfile(ExecContext *xc)
161 {
162 const string &file = xc->cpu->system->readfile;
163 if (file.empty()) {
164 xc->regs.intRegFile[0] = ULL(0);
165 return;
166 }
167
168 Addr vaddr = xc->regs.intRegFile[16];
169 uint64_t len = xc->regs.intRegFile[17];
170 uint64_t offset = xc->regs.intRegFile[18];
171 uint64_t result = 0;
172
173 int fd = ::open(file.c_str(), O_RDONLY, 0);
174 if (fd < 0)
175 panic("could not open file %s\n", file);
176
177 char *buf = new char[len];
178 char *p = buf;
179 while (len > 0) {
180 int bytes = ::pread(fd, p, len, offset);
181 if (bytes <= 0)
182 break;
183
184 p += bytes;
185 offset += bytes;
186 result += bytes;
187 len -= bytes;
188 }
189
190 close(fd);
191 CopyIn(xc, vaddr, buf, result);
192 delete [] buf;
193 xc->regs.intRegFile[0] = result;
194 }
195
196 class Context : public ParamContext
197 {
198 public:
199 Context(const string &section) : ParamContext(section) {}
200 void checkParams();
201 };
202
203 Context context("PseudoInsts");
204
205 Param<bool> __quiesce(&context, "quiesce",
206 "enable quiesce instructions",
207 true);
208 Param<bool> __statistics(&context, "statistics",
209 "enable statistics pseudo instructions",
210 true);
211 Param<bool> __checkpoint(&context, "checkpoint",
212 "enable checkpoint pseudo instructions",
213 true);
214
215 void
216 Context::checkParams()
217 {
218 doQuiesce = __quiesce;
219 doStatisticsInsts = __statistics;
220 doCheckpointInsts = __checkpoint;
221 }
222 }