arch/sparc/isa/bitfields.isa

   1 ////////////////////////////////////////////////////////////////////
   2 //
   3 // Bitfield definitions.
   4 //
   5
   6 // Bitfields are shared liberally between instruction formats, so they are
   7 // simply defined alphabetically
   8
   9 def bitfield A          <29>;
  10 def bitfield CC02       <20>;
  11 def bitfield CC03       <25>;
  12 def bitfield CC04       <11>;
  13 def bitfield CC12       <21>;
  14 def bitfield CC13       <26>;
  15 def bitfield CC14       <12>;
  16 def bitfield CC2        <18>;
  17 def bitfield CMASK      <6:4>;
  18 def bitfield COND2      <28:25>;
  19 def bitfield COND4      <17:14>;
  20 def bitfield D16HI      <21:20>;
  21 def bitfield D16LO      <13:0>;
  22 def bitfield DISP19     <18:0>;
  23 def bitfield DISP22     <21:0>;
  24 def bitfield DISP30     <29:0>;
  25 def bitfield FCN        <29:26>;
  26 def bitfield I          <13>;
  27 def bitfield IMM_ASI    <12:5>;
  28 def bitfield IMM22      <21:0>;
  29 def bitfield MMASK      <3:0>;
  30 def bitfield OP         <31:30>;
  31 def bitfield OP2        <24:22>;
  32 def bitfield OP3        <24:19>;
  33 def bitfield OPF        <13:5>;
  34 def bitfield OPF_CC     <13:11>;
  35 def bitfield OPF_LOW5   <9:5>;
  36 def bitfield OPF_LOW6   <10:5>;
  37 def bitfield P          <19>;
  38 def bitfield RCOND2     <27:25>;
  39 def bitfield RCOND3     <12:10>;
  40 def bitfield RCOND4     <12:10>;
  41 def bitfield RD         <29:25>;
  42 def bitfield RS1        <18:14>;
  43 def bitfield RS2        <4:0>;
  44 def bitfield SHCNT32    <4:0>;
  45 def bitfield SHCNT64    <5:0>;
  46 def bitfield SIMM10     <9:0>;
  47 def bitfield SIMM11     <10:0>;
  48 def bitfield SIMM13     <12:0>;
  49 def bitfield SW_TRAP    <6:0>;
  50 def bitfield X          <12>;