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HEAD
More progress in FIRRTL back-end
[yosys.git]
/
backends
/
firrtl
/
test.sh
1
#!/bin/bash
2
set -ex
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4
..
/
..
/
yosys
-p
'prep -nordff; write_firrtl test.fir'
test
.v
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firrtl
-i test
.fir
-o
test_out.v
7
8
..
/
..
/
yosys
-p
'
9
read_verilog test.v
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rename test gold
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read_verilog test_out.v
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rename test gate
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prep
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memory_map
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miter -equiv -flatten gold gate miter
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hierarchy -top miter
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sat -verify -prove trigger 0 -set-init-zero -seq 10 miter
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'
22