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138309018750d07c5d58ed60daa6d2775f22d59d
[binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22 #include "sysdep.h"
23 #include <limits.h>
24
25 #include "bfd.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-vxworks.h"
30 #include "elf/arm.h"
31
32 /* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34 #define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37 /* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39 #define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44 /* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46 #define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51 /* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53 #define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
58 #define elf_info_to_howto 0
59 #define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61 #define ARM_ELF_ABI_VERSION 0
62 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
64 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
69 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
73 static reloc_howto_type elf32_arm_howto_table_1[] =
74 {
75 /* No relocation. */
76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
135 HOWTO (R_ARM_LDR_PC_G0, /* type */
136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
138 32, /* bitsize */
139 TRUE, /* pc_relative */
140 0, /* bitpos */
141 complain_overflow_dont,/* complain_on_overflow */
142 bfd_elf_generic_reloc, /* special_function */
143 "R_ARM_LDR_PC_G0", /* name */
144 FALSE, /* partial_inplace */
145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
222 HOWTO (R_ARM_THM_CALL, /* type */
223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
225 24, /* bitsize */
226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
230 "R_ARM_THM_CALL", /* name */
231 FALSE, /* partial_inplace */
232 0x07ff07ff, /* src_mask */
233 0x07ff07ff, /* dst_mask */
234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
250 HOWTO (R_ARM_BREL_ADJ, /* type */
251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
253 32, /* bitsize */
254 FALSE, /* pc_relative */
255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
258 "R_ARM_BREL_ADJ", /* name */
259 FALSE, /* partial_inplace */
260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
263
264 HOWTO (R_ARM_TLS_DESC, /* type */
265 0, /* rightshift */
266 2, /* size (0 = byte, 1 = short, 2 = long) */
267 32, /* bitsize */
268 FALSE, /* pc_relative */
269 0, /* bitpos */
270 complain_overflow_bitfield,/* complain_on_overflow */
271 bfd_elf_generic_reloc, /* special_function */
272 "R_ARM_TLS_DESC", /* name */
273 FALSE, /* partial_inplace */
274 0xffffffff, /* src_mask */
275 0xffffffff, /* dst_mask */
276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
296 25, /* bitsize */
297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
311 22, /* bitsize */
312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
318 0x07ff07ff, /* src_mask */
319 0x07ff07ff, /* dst_mask */
320 TRUE), /* pcrel_offset */
321
322 /* Dynamic TLS relocations. */
323
324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
337
338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
351
352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
424 HOWTO (R_ARM_GOTOFF32, /* type */
425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
432 "R_ARM_GOTOFF32", /* name */
433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
469 24, /* bitsize */
470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
475 FALSE, /* partial_inplace */
476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
513 0, /* bitpos */
514 complain_overflow_signed,/* complain_on_overflow */
515 bfd_elf_generic_reloc, /* special_function */
516 "R_ARM_THM_JUMP24", /* name */
517 FALSE, /* partial_inplace */
518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
521
522 HOWTO (R_ARM_BASE_ABS, /* type */
523 0, /* rightshift */
524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
530 "R_ARM_BASE_ABS", /* name */
531 FALSE, /* partial_inplace */
532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
839 complain_overflow_dont,/* complain_on_overflow */
840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
853 complain_overflow_dont,/* complain_on_overflow */
854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
888
889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
1270
1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
1355 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1356 0, /* rightshift */
1357 2, /* size (0 = byte, 1 = short, 2 = long) */
1358 32, /* bitsize */
1359 FALSE, /* pc_relative */
1360 0, /* bitpos */
1361 complain_overflow_bitfield,/* complain_on_overflow */
1362 NULL, /* special_function */
1363 "R_ARM_TLS_GOTDESC", /* name */
1364 TRUE, /* partial_inplace */
1365 0xffffffff, /* src_mask */
1366 0xffffffff, /* dst_mask */
1367 FALSE), /* pcrel_offset */
1368
1369 HOWTO (R_ARM_TLS_CALL, /* type */
1370 0, /* rightshift */
1371 2, /* size (0 = byte, 1 = short, 2 = long) */
1372 24, /* bitsize */
1373 FALSE, /* pc_relative */
1374 0, /* bitpos */
1375 complain_overflow_dont,/* complain_on_overflow */
1376 bfd_elf_generic_reloc, /* special_function */
1377 "R_ARM_TLS_CALL", /* name */
1378 FALSE, /* partial_inplace */
1379 0x00ffffff, /* src_mask */
1380 0x00ffffff, /* dst_mask */
1381 FALSE), /* pcrel_offset */
1382
1383 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1384 0, /* rightshift */
1385 2, /* size (0 = byte, 1 = short, 2 = long) */
1386 0, /* bitsize */
1387 FALSE, /* pc_relative */
1388 0, /* bitpos */
1389 complain_overflow_bitfield,/* complain_on_overflow */
1390 bfd_elf_generic_reloc, /* special_function */
1391 "R_ARM_TLS_DESCSEQ", /* name */
1392 FALSE, /* partial_inplace */
1393 0x00000000, /* src_mask */
1394 0x00000000, /* dst_mask */
1395 FALSE), /* pcrel_offset */
1396
1397 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1398 0, /* rightshift */
1399 2, /* size (0 = byte, 1 = short, 2 = long) */
1400 24, /* bitsize */
1401 FALSE, /* pc_relative */
1402 0, /* bitpos */
1403 complain_overflow_dont,/* complain_on_overflow */
1404 bfd_elf_generic_reloc, /* special_function */
1405 "R_ARM_THM_TLS_CALL", /* name */
1406 FALSE, /* partial_inplace */
1407 0x07ff07ff, /* src_mask */
1408 0x07ff07ff, /* dst_mask */
1409 FALSE), /* pcrel_offset */
1410
1411 HOWTO (R_ARM_PLT32_ABS, /* type */
1412 0, /* rightshift */
1413 2, /* size (0 = byte, 1 = short, 2 = long) */
1414 32, /* bitsize */
1415 FALSE, /* pc_relative */
1416 0, /* bitpos */
1417 complain_overflow_dont,/* complain_on_overflow */
1418 bfd_elf_generic_reloc, /* special_function */
1419 "R_ARM_PLT32_ABS", /* name */
1420 FALSE, /* partial_inplace */
1421 0xffffffff, /* src_mask */
1422 0xffffffff, /* dst_mask */
1423 FALSE), /* pcrel_offset */
1424
1425 HOWTO (R_ARM_GOT_ABS, /* type */
1426 0, /* rightshift */
1427 2, /* size (0 = byte, 1 = short, 2 = long) */
1428 32, /* bitsize */
1429 FALSE, /* pc_relative */
1430 0, /* bitpos */
1431 complain_overflow_dont,/* complain_on_overflow */
1432 bfd_elf_generic_reloc, /* special_function */
1433 "R_ARM_GOT_ABS", /* name */
1434 FALSE, /* partial_inplace */
1435 0xffffffff, /* src_mask */
1436 0xffffffff, /* dst_mask */
1437 FALSE), /* pcrel_offset */
1438
1439 HOWTO (R_ARM_GOT_PREL, /* type */
1440 0, /* rightshift */
1441 2, /* size (0 = byte, 1 = short, 2 = long) */
1442 32, /* bitsize */
1443 TRUE, /* pc_relative */
1444 0, /* bitpos */
1445 complain_overflow_dont, /* complain_on_overflow */
1446 bfd_elf_generic_reloc, /* special_function */
1447 "R_ARM_GOT_PREL", /* name */
1448 FALSE, /* partial_inplace */
1449 0xffffffff, /* src_mask */
1450 0xffffffff, /* dst_mask */
1451 TRUE), /* pcrel_offset */
1452
1453 HOWTO (R_ARM_GOT_BREL12, /* type */
1454 0, /* rightshift */
1455 2, /* size (0 = byte, 1 = short, 2 = long) */
1456 12, /* bitsize */
1457 FALSE, /* pc_relative */
1458 0, /* bitpos */
1459 complain_overflow_bitfield,/* complain_on_overflow */
1460 bfd_elf_generic_reloc, /* special_function */
1461 "R_ARM_GOT_BREL12", /* name */
1462 FALSE, /* partial_inplace */
1463 0x00000fff, /* src_mask */
1464 0x00000fff, /* dst_mask */
1465 FALSE), /* pcrel_offset */
1466
1467 HOWTO (R_ARM_GOTOFF12, /* type */
1468 0, /* rightshift */
1469 2, /* size (0 = byte, 1 = short, 2 = long) */
1470 12, /* bitsize */
1471 FALSE, /* pc_relative */
1472 0, /* bitpos */
1473 complain_overflow_bitfield,/* complain_on_overflow */
1474 bfd_elf_generic_reloc, /* special_function */
1475 "R_ARM_GOTOFF12", /* name */
1476 FALSE, /* partial_inplace */
1477 0x00000fff, /* src_mask */
1478 0x00000fff, /* dst_mask */
1479 FALSE), /* pcrel_offset */
1480
1481 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1482
1483 /* GNU extension to record C++ vtable member usage */
1484 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1485 0, /* rightshift */
1486 2, /* size (0 = byte, 1 = short, 2 = long) */
1487 0, /* bitsize */
1488 FALSE, /* pc_relative */
1489 0, /* bitpos */
1490 complain_overflow_dont, /* complain_on_overflow */
1491 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1492 "R_ARM_GNU_VTENTRY", /* name */
1493 FALSE, /* partial_inplace */
1494 0, /* src_mask */
1495 0, /* dst_mask */
1496 FALSE), /* pcrel_offset */
1497
1498 /* GNU extension to record C++ vtable hierarchy */
1499 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1500 0, /* rightshift */
1501 2, /* size (0 = byte, 1 = short, 2 = long) */
1502 0, /* bitsize */
1503 FALSE, /* pc_relative */
1504 0, /* bitpos */
1505 complain_overflow_dont, /* complain_on_overflow */
1506 NULL, /* special_function */
1507 "R_ARM_GNU_VTINHERIT", /* name */
1508 FALSE, /* partial_inplace */
1509 0, /* src_mask */
1510 0, /* dst_mask */
1511 FALSE), /* pcrel_offset */
1512
1513 HOWTO (R_ARM_THM_JUMP11, /* type */
1514 1, /* rightshift */
1515 1, /* size (0 = byte, 1 = short, 2 = long) */
1516 11, /* bitsize */
1517 TRUE, /* pc_relative */
1518 0, /* bitpos */
1519 complain_overflow_signed, /* complain_on_overflow */
1520 bfd_elf_generic_reloc, /* special_function */
1521 "R_ARM_THM_JUMP11", /* name */
1522 FALSE, /* partial_inplace */
1523 0x000007ff, /* src_mask */
1524 0x000007ff, /* dst_mask */
1525 TRUE), /* pcrel_offset */
1526
1527 HOWTO (R_ARM_THM_JUMP8, /* type */
1528 1, /* rightshift */
1529 1, /* size (0 = byte, 1 = short, 2 = long) */
1530 8, /* bitsize */
1531 TRUE, /* pc_relative */
1532 0, /* bitpos */
1533 complain_overflow_signed, /* complain_on_overflow */
1534 bfd_elf_generic_reloc, /* special_function */
1535 "R_ARM_THM_JUMP8", /* name */
1536 FALSE, /* partial_inplace */
1537 0x000000ff, /* src_mask */
1538 0x000000ff, /* dst_mask */
1539 TRUE), /* pcrel_offset */
1540
1541 /* TLS relocations */
1542 HOWTO (R_ARM_TLS_GD32, /* type */
1543 0, /* rightshift */
1544 2, /* size (0 = byte, 1 = short, 2 = long) */
1545 32, /* bitsize */
1546 FALSE, /* pc_relative */
1547 0, /* bitpos */
1548 complain_overflow_bitfield,/* complain_on_overflow */
1549 NULL, /* special_function */
1550 "R_ARM_TLS_GD32", /* name */
1551 TRUE, /* partial_inplace */
1552 0xffffffff, /* src_mask */
1553 0xffffffff, /* dst_mask */
1554 FALSE), /* pcrel_offset */
1555
1556 HOWTO (R_ARM_TLS_LDM32, /* type */
1557 0, /* rightshift */
1558 2, /* size (0 = byte, 1 = short, 2 = long) */
1559 32, /* bitsize */
1560 FALSE, /* pc_relative */
1561 0, /* bitpos */
1562 complain_overflow_bitfield,/* complain_on_overflow */
1563 bfd_elf_generic_reloc, /* special_function */
1564 "R_ARM_TLS_LDM32", /* name */
1565 TRUE, /* partial_inplace */
1566 0xffffffff, /* src_mask */
1567 0xffffffff, /* dst_mask */
1568 FALSE), /* pcrel_offset */
1569
1570 HOWTO (R_ARM_TLS_LDO32, /* type */
1571 0, /* rightshift */
1572 2, /* size (0 = byte, 1 = short, 2 = long) */
1573 32, /* bitsize */
1574 FALSE, /* pc_relative */
1575 0, /* bitpos */
1576 complain_overflow_bitfield,/* complain_on_overflow */
1577 bfd_elf_generic_reloc, /* special_function */
1578 "R_ARM_TLS_LDO32", /* name */
1579 TRUE, /* partial_inplace */
1580 0xffffffff, /* src_mask */
1581 0xffffffff, /* dst_mask */
1582 FALSE), /* pcrel_offset */
1583
1584 HOWTO (R_ARM_TLS_IE32, /* type */
1585 0, /* rightshift */
1586 2, /* size (0 = byte, 1 = short, 2 = long) */
1587 32, /* bitsize */
1588 FALSE, /* pc_relative */
1589 0, /* bitpos */
1590 complain_overflow_bitfield,/* complain_on_overflow */
1591 NULL, /* special_function */
1592 "R_ARM_TLS_IE32", /* name */
1593 TRUE, /* partial_inplace */
1594 0xffffffff, /* src_mask */
1595 0xffffffff, /* dst_mask */
1596 FALSE), /* pcrel_offset */
1597
1598 HOWTO (R_ARM_TLS_LE32, /* type */
1599 0, /* rightshift */
1600 2, /* size (0 = byte, 1 = short, 2 = long) */
1601 32, /* bitsize */
1602 FALSE, /* pc_relative */
1603 0, /* bitpos */
1604 complain_overflow_bitfield,/* complain_on_overflow */
1605 bfd_elf_generic_reloc, /* special_function */
1606 "R_ARM_TLS_LE32", /* name */
1607 TRUE, /* partial_inplace */
1608 0xffffffff, /* src_mask */
1609 0xffffffff, /* dst_mask */
1610 FALSE), /* pcrel_offset */
1611
1612 HOWTO (R_ARM_TLS_LDO12, /* type */
1613 0, /* rightshift */
1614 2, /* size (0 = byte, 1 = short, 2 = long) */
1615 12, /* bitsize */
1616 FALSE, /* pc_relative */
1617 0, /* bitpos */
1618 complain_overflow_bitfield,/* complain_on_overflow */
1619 bfd_elf_generic_reloc, /* special_function */
1620 "R_ARM_TLS_LDO12", /* name */
1621 FALSE, /* partial_inplace */
1622 0x00000fff, /* src_mask */
1623 0x00000fff, /* dst_mask */
1624 FALSE), /* pcrel_offset */
1625
1626 HOWTO (R_ARM_TLS_LE12, /* type */
1627 0, /* rightshift */
1628 2, /* size (0 = byte, 1 = short, 2 = long) */
1629 12, /* bitsize */
1630 FALSE, /* pc_relative */
1631 0, /* bitpos */
1632 complain_overflow_bitfield,/* complain_on_overflow */
1633 bfd_elf_generic_reloc, /* special_function */
1634 "R_ARM_TLS_LE12", /* name */
1635 FALSE, /* partial_inplace */
1636 0x00000fff, /* src_mask */
1637 0x00000fff, /* dst_mask */
1638 FALSE), /* pcrel_offset */
1639
1640 HOWTO (R_ARM_TLS_IE12GP, /* type */
1641 0, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
1643 12, /* bitsize */
1644 FALSE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_bitfield,/* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_ARM_TLS_IE12GP", /* name */
1649 FALSE, /* partial_inplace */
1650 0x00000fff, /* src_mask */
1651 0x00000fff, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
1654 EMPTY_HOWTO (112),
1655 EMPTY_HOWTO (113),
1656 EMPTY_HOWTO (114),
1657 EMPTY_HOWTO (115),
1658 EMPTY_HOWTO (116),
1659 EMPTY_HOWTO (117),
1660 EMPTY_HOWTO (118),
1661 EMPTY_HOWTO (119),
1662 EMPTY_HOWTO (120),
1663 EMPTY_HOWTO (121),
1664 EMPTY_HOWTO (122),
1665 EMPTY_HOWTO (123),
1666 EMPTY_HOWTO (124),
1667 EMPTY_HOWTO (125),
1668 EMPTY_HOWTO (126),
1669 EMPTY_HOWTO (127),
1670 EMPTY_HOWTO (128),
1671
1672 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1673 0, /* rightshift */
1674 1, /* size (0 = byte, 1 = short, 2 = long) */
1675 0, /* bitsize */
1676 FALSE, /* pc_relative */
1677 0, /* bitpos */
1678 complain_overflow_bitfield,/* complain_on_overflow */
1679 bfd_elf_generic_reloc, /* special_function */
1680 "R_ARM_THM_TLS_DESCSEQ",/* name */
1681 FALSE, /* partial_inplace */
1682 0x00000000, /* src_mask */
1683 0x00000000, /* dst_mask */
1684 FALSE), /* pcrel_offset */
1685 };
1686
1687 /* 112-127 private relocations
1688 128 R_ARM_ME_TOO, obsolete
1689 129-255 unallocated in AAELF.
1690
1691 249-255 extended, currently unused, relocations: */
1692
1693 static reloc_howto_type elf32_arm_howto_table_2[4] =
1694 {
1695 HOWTO (R_ARM_RREL32, /* type */
1696 0, /* rightshift */
1697 0, /* size (0 = byte, 1 = short, 2 = long) */
1698 0, /* bitsize */
1699 FALSE, /* pc_relative */
1700 0, /* bitpos */
1701 complain_overflow_dont,/* complain_on_overflow */
1702 bfd_elf_generic_reloc, /* special_function */
1703 "R_ARM_RREL32", /* name */
1704 FALSE, /* partial_inplace */
1705 0, /* src_mask */
1706 0, /* dst_mask */
1707 FALSE), /* pcrel_offset */
1708
1709 HOWTO (R_ARM_RABS32, /* type */
1710 0, /* rightshift */
1711 0, /* size (0 = byte, 1 = short, 2 = long) */
1712 0, /* bitsize */
1713 FALSE, /* pc_relative */
1714 0, /* bitpos */
1715 complain_overflow_dont,/* complain_on_overflow */
1716 bfd_elf_generic_reloc, /* special_function */
1717 "R_ARM_RABS32", /* name */
1718 FALSE, /* partial_inplace */
1719 0, /* src_mask */
1720 0, /* dst_mask */
1721 FALSE), /* pcrel_offset */
1722
1723 HOWTO (R_ARM_RPC24, /* type */
1724 0, /* rightshift */
1725 0, /* size (0 = byte, 1 = short, 2 = long) */
1726 0, /* bitsize */
1727 FALSE, /* pc_relative */
1728 0, /* bitpos */
1729 complain_overflow_dont,/* complain_on_overflow */
1730 bfd_elf_generic_reloc, /* special_function */
1731 "R_ARM_RPC24", /* name */
1732 FALSE, /* partial_inplace */
1733 0, /* src_mask */
1734 0, /* dst_mask */
1735 FALSE), /* pcrel_offset */
1736
1737 HOWTO (R_ARM_RBASE, /* type */
1738 0, /* rightshift */
1739 0, /* size (0 = byte, 1 = short, 2 = long) */
1740 0, /* bitsize */
1741 FALSE, /* pc_relative */
1742 0, /* bitpos */
1743 complain_overflow_dont,/* complain_on_overflow */
1744 bfd_elf_generic_reloc, /* special_function */
1745 "R_ARM_RBASE", /* name */
1746 FALSE, /* partial_inplace */
1747 0, /* src_mask */
1748 0, /* dst_mask */
1749 FALSE) /* pcrel_offset */
1750 };
1751
1752 static reloc_howto_type *
1753 elf32_arm_howto_from_type (unsigned int r_type)
1754 {
1755 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1756 return &elf32_arm_howto_table_1[r_type];
1757
1758 if (r_type >= R_ARM_RREL32
1759 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
1760 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
1761
1762 return NULL;
1763 }
1764
1765 static void
1766 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1767 Elf_Internal_Rela * elf_reloc)
1768 {
1769 unsigned int r_type;
1770
1771 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1772 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1773 }
1774
1775 struct elf32_arm_reloc_map
1776 {
1777 bfd_reloc_code_real_type bfd_reloc_val;
1778 unsigned char elf_reloc_val;
1779 };
1780
1781 /* All entries in this list must also be present in elf32_arm_howto_table. */
1782 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1783 {
1784 {BFD_RELOC_NONE, R_ARM_NONE},
1785 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1786 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1787 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1788 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1789 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1790 {BFD_RELOC_32, R_ARM_ABS32},
1791 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1792 {BFD_RELOC_8, R_ARM_ABS8},
1793 {BFD_RELOC_16, R_ARM_ABS16},
1794 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1795 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1796 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1797 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1798 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1799 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1800 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1801 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1802 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1803 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1804 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1805 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1806 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1807 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1808 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1809 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1810 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1811 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1812 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1813 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1814 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1815 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1816 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1817 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1818 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1819 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1820 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1821 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1822 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1823 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1824 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1825 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1826 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1827 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1828 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1829 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1830 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1831 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1832 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1833 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1834 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1835 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1836 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1837 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1838 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1839 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1840 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1841 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1842 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1843 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1844 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1845 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1846 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1847 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1848 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1849 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1850 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1851 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1852 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1853 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1854 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1855 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1856 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1857 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1858 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1859 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1860 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1861 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1862 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1863 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1864 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1865 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1866 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1867 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1868 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
1869 };
1870
1871 static reloc_howto_type *
1872 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1873 bfd_reloc_code_real_type code)
1874 {
1875 unsigned int i;
1876
1877 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1878 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1879 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1880
1881 return NULL;
1882 }
1883
1884 static reloc_howto_type *
1885 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1886 const char *r_name)
1887 {
1888 unsigned int i;
1889
1890 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1891 if (elf32_arm_howto_table_1[i].name != NULL
1892 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1893 return &elf32_arm_howto_table_1[i];
1894
1895 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1896 if (elf32_arm_howto_table_2[i].name != NULL
1897 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1898 return &elf32_arm_howto_table_2[i];
1899
1900 return NULL;
1901 }
1902
1903 /* Support for core dump NOTE sections. */
1904
1905 static bfd_boolean
1906 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1907 {
1908 int offset;
1909 size_t size;
1910
1911 switch (note->descsz)
1912 {
1913 default:
1914 return FALSE;
1915
1916 case 148: /* Linux/ARM 32-bit. */
1917 /* pr_cursig */
1918 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1919
1920 /* pr_pid */
1921 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
1922
1923 /* pr_reg */
1924 offset = 72;
1925 size = 72;
1926
1927 break;
1928 }
1929
1930 /* Make a ".reg/999" section. */
1931 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1932 size, note->descpos + offset);
1933 }
1934
1935 static bfd_boolean
1936 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
1937 {
1938 switch (note->descsz)
1939 {
1940 default:
1941 return FALSE;
1942
1943 case 124: /* Linux/ARM elf_prpsinfo. */
1944 elf_tdata (abfd)->core_program
1945 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1946 elf_tdata (abfd)->core_command
1947 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1948 }
1949
1950 /* Note that for some reason, a spurious space is tacked
1951 onto the end of the args in some (at least one anyway)
1952 implementations, so strip it off if it exists. */
1953 {
1954 char *command = elf_tdata (abfd)->core_command;
1955 int n = strlen (command);
1956
1957 if (0 < n && command[n - 1] == ' ')
1958 command[n - 1] = '\0';
1959 }
1960
1961 return TRUE;
1962 }
1963
1964 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1965 #define TARGET_LITTLE_NAME "elf32-littlearm"
1966 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1967 #define TARGET_BIG_NAME "elf32-bigarm"
1968
1969 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1970 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1971
1972 typedef unsigned long int insn32;
1973 typedef unsigned short int insn16;
1974
1975 /* In lieu of proper flags, assume all EABIv4 or later objects are
1976 interworkable. */
1977 #define INTERWORK_FLAG(abfd) \
1978 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
1979 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1980 || ((abfd)->flags & BFD_LINKER_CREATED))
1981
1982 /* The linker script knows the section names for placement.
1983 The entry_names are used to do simple name mangling on the stubs.
1984 Given a function name, and its type, the stub can be found. The
1985 name can be changed. The only requirement is the %s be present. */
1986 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1987 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1988
1989 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1990 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1991
1992 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1993 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1994
1995 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1996 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1997
1998 #define STUB_ENTRY_NAME "__%s_veneer"
1999
2000 /* The name of the dynamic interpreter. This is put in the .interp
2001 section. */
2002 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2003
2004 static const unsigned long tls_trampoline [] =
2005 {
2006 0xe08e0000, /* add r0, lr, r0 */
2007 0xe5901004, /* ldr r1, [r0,#4] */
2008 0xe12fff11, /* bx r1 */
2009 };
2010
2011 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2012 {
2013 0xe52d2004, /* push {r2} */
2014 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2015 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2016 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2017 0xe081100f, /* 2: add r1, pc */
2018 0xe12fff12, /* bx r2 */
2019 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2020 + dl_tlsdesc_lazy_resolver(GOT) */
2021 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2022 };
2023
2024 #ifdef FOUR_WORD_PLT
2025
2026 /* The first entry in a procedure linkage table looks like
2027 this. It is set up so that any shared library function that is
2028 called before the relocation has been set up calls the dynamic
2029 linker first. */
2030 static const bfd_vma elf32_arm_plt0_entry [] =
2031 {
2032 0xe52de004, /* str lr, [sp, #-4]! */
2033 0xe59fe010, /* ldr lr, [pc, #16] */
2034 0xe08fe00e, /* add lr, pc, lr */
2035 0xe5bef008, /* ldr pc, [lr, #8]! */
2036 };
2037
2038 /* Subsequent entries in a procedure linkage table look like
2039 this. */
2040 static const bfd_vma elf32_arm_plt_entry [] =
2041 {
2042 0xe28fc600, /* add ip, pc, #NN */
2043 0xe28cca00, /* add ip, ip, #NN */
2044 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2045 0x00000000, /* unused */
2046 };
2047
2048 #else
2049
2050 /* The first entry in a procedure linkage table looks like
2051 this. It is set up so that any shared library function that is
2052 called before the relocation has been set up calls the dynamic
2053 linker first. */
2054 static const bfd_vma elf32_arm_plt0_entry [] =
2055 {
2056 0xe52de004, /* str lr, [sp, #-4]! */
2057 0xe59fe004, /* ldr lr, [pc, #4] */
2058 0xe08fe00e, /* add lr, pc, lr */
2059 0xe5bef008, /* ldr pc, [lr, #8]! */
2060 0x00000000, /* &GOT[0] - . */
2061 };
2062
2063 /* Subsequent entries in a procedure linkage table look like
2064 this. */
2065 static const bfd_vma elf32_arm_plt_entry [] =
2066 {
2067 0xe28fc600, /* add ip, pc, #0xNN00000 */
2068 0xe28cca00, /* add ip, ip, #0xNN000 */
2069 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2070 };
2071
2072 #endif
2073
2074 /* The format of the first entry in the procedure linkage table
2075 for a VxWorks executable. */
2076 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2077 {
2078 0xe52dc008, /* str ip,[sp,#-8]! */
2079 0xe59fc000, /* ldr ip,[pc] */
2080 0xe59cf008, /* ldr pc,[ip,#8] */
2081 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2082 };
2083
2084 /* The format of subsequent entries in a VxWorks executable. */
2085 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2086 {
2087 0xe59fc000, /* ldr ip,[pc] */
2088 0xe59cf000, /* ldr pc,[ip] */
2089 0x00000000, /* .long @got */
2090 0xe59fc000, /* ldr ip,[pc] */
2091 0xea000000, /* b _PLT */
2092 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2093 };
2094
2095 /* The format of entries in a VxWorks shared library. */
2096 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2097 {
2098 0xe59fc000, /* ldr ip,[pc] */
2099 0xe79cf009, /* ldr pc,[ip,r9] */
2100 0x00000000, /* .long @got */
2101 0xe59fc000, /* ldr ip,[pc] */
2102 0xe599f008, /* ldr pc,[r9,#8] */
2103 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2104 };
2105
2106 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2107 #define PLT_THUMB_STUB_SIZE 4
2108 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2109 {
2110 0x4778, /* bx pc */
2111 0x46c0 /* nop */
2112 };
2113
2114 /* The entries in a PLT when using a DLL-based target with multiple
2115 address spaces. */
2116 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2117 {
2118 0xe51ff004, /* ldr pc, [pc, #-4] */
2119 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2120 };
2121
2122 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2123 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2124 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2125 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2126 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2127 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2128
2129 enum stub_insn_type
2130 {
2131 THUMB16_TYPE = 1,
2132 THUMB32_TYPE,
2133 ARM_TYPE,
2134 DATA_TYPE
2135 };
2136
2137 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2138 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2139 is inserted in arm_build_one_stub(). */
2140 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2141 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2142 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2143 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2144 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2145 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2146
2147 typedef struct
2148 {
2149 bfd_vma data;
2150 enum stub_insn_type type;
2151 unsigned int r_type;
2152 int reloc_addend;
2153 } insn_sequence;
2154
2155 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2156 to reach the stub if necessary. */
2157 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2158 {
2159 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2160 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2161 };
2162
2163 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2164 available. */
2165 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2166 {
2167 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2168 ARM_INSN(0xe12fff1c), /* bx ip */
2169 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2170 };
2171
2172 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2173 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2174 {
2175 THUMB16_INSN(0xb401), /* push {r0} */
2176 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2177 THUMB16_INSN(0x4684), /* mov ip, r0 */
2178 THUMB16_INSN(0xbc01), /* pop {r0} */
2179 THUMB16_INSN(0x4760), /* bx ip */
2180 THUMB16_INSN(0xbf00), /* nop */
2181 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2182 };
2183
2184 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2185 allowed. */
2186 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2187 {
2188 THUMB16_INSN(0x4778), /* bx pc */
2189 THUMB16_INSN(0x46c0), /* nop */
2190 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2191 ARM_INSN(0xe12fff1c), /* bx ip */
2192 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2193 };
2194
2195 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2196 available. */
2197 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2198 {
2199 THUMB16_INSN(0x4778), /* bx pc */
2200 THUMB16_INSN(0x46c0), /* nop */
2201 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2202 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2203 };
2204
2205 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2206 one, when the destination is close enough. */
2207 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2208 {
2209 THUMB16_INSN(0x4778), /* bx pc */
2210 THUMB16_INSN(0x46c0), /* nop */
2211 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
2212 };
2213
2214 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2215 blx to reach the stub if necessary. */
2216 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2217 {
2218 ARM_INSN(0xe59fc000), /* ldr ip, [pc] */
2219 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2220 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2221 };
2222
2223 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2224 blx to reach the stub if necessary. We can not add into pc;
2225 it is not guaranteed to mode switch (different in ARMv6 and
2226 ARMv7). */
2227 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2228 {
2229 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2230 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2231 ARM_INSN(0xe12fff1c), /* bx ip */
2232 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2233 };
2234
2235 /* V4T ARM -> ARM long branch stub, PIC. */
2236 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2237 {
2238 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2239 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2240 ARM_INSN(0xe12fff1c), /* bx ip */
2241 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2242 };
2243
2244 /* V4T Thumb -> ARM long branch stub, PIC. */
2245 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2246 {
2247 THUMB16_INSN(0x4778), /* bx pc */
2248 THUMB16_INSN(0x46c0), /* nop */
2249 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2250 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2251 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2252 };
2253
2254 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2255 architectures. */
2256 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2257 {
2258 THUMB16_INSN(0xb401), /* push {r0} */
2259 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2260 THUMB16_INSN(0x46fc), /* mov ip, pc */
2261 THUMB16_INSN(0x4484), /* add ip, r0 */
2262 THUMB16_INSN(0xbc01), /* pop {r0} */
2263 THUMB16_INSN(0x4760), /* bx ip */
2264 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2265 };
2266
2267 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2268 allowed. */
2269 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2270 {
2271 THUMB16_INSN(0x4778), /* bx pc */
2272 THUMB16_INSN(0x46c0), /* nop */
2273 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2274 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2275 ARM_INSN(0xe12fff1c), /* bx ip */
2276 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2277 };
2278
2279 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2280 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2281 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2282 {
2283 ARM_INSN(0xe59f1000), /* ldr r1, [pc] */
2284 ARM_INSN(0xe08ff001), /* add pc, pc, r1 */
2285 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2286 };
2287
2288 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2289 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2290 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2291 {
2292 THUMB16_INSN(0x4778), /* bx pc */
2293 THUMB16_INSN(0x46c0), /* nop */
2294 ARM_INSN(0xe59f1000), /* ldr r1, [pc, #0] */
2295 ARM_INSN(0xe081f00f), /* add pc, r1, pc */
2296 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2297 };
2298
2299 /* Cortex-A8 erratum-workaround stubs. */
2300
2301 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2302 can't use a conditional branch to reach this stub). */
2303
2304 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2305 {
2306 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2307 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2308 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2309 };
2310
2311 /* Stub used for b.w and bl.w instructions. */
2312
2313 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2314 {
2315 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2316 };
2317
2318 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2319 {
2320 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2321 };
2322
2323 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2324 instruction (which switches to ARM mode) to point to this stub. Jump to the
2325 real destination using an ARM-mode branch. */
2326
2327 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2328 {
2329 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2330 };
2331
2332 /* Section name for stubs is the associated section name plus this
2333 string. */
2334 #define STUB_SUFFIX ".stub"
2335
2336 /* One entry per long/short branch stub defined above. */
2337 #define DEF_STUBS \
2338 DEF_STUB(long_branch_any_any) \
2339 DEF_STUB(long_branch_v4t_arm_thumb) \
2340 DEF_STUB(long_branch_thumb_only) \
2341 DEF_STUB(long_branch_v4t_thumb_thumb) \
2342 DEF_STUB(long_branch_v4t_thumb_arm) \
2343 DEF_STUB(short_branch_v4t_thumb_arm) \
2344 DEF_STUB(long_branch_any_arm_pic) \
2345 DEF_STUB(long_branch_any_thumb_pic) \
2346 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2347 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2348 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2349 DEF_STUB(long_branch_thumb_only_pic) \
2350 DEF_STUB(long_branch_any_tls_pic) \
2351 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2352 DEF_STUB(a8_veneer_b_cond) \
2353 DEF_STUB(a8_veneer_b) \
2354 DEF_STUB(a8_veneer_bl) \
2355 DEF_STUB(a8_veneer_blx)
2356
2357 #define DEF_STUB(x) arm_stub_##x,
2358 enum elf32_arm_stub_type {
2359 arm_stub_none,
2360 DEF_STUBS
2361 /* Note the first a8_veneer type */
2362 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
2363 };
2364 #undef DEF_STUB
2365
2366 typedef struct
2367 {
2368 const insn_sequence* template_sequence;
2369 int template_size;
2370 } stub_def;
2371
2372 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2373 static const stub_def stub_definitions[] = {
2374 {NULL, 0},
2375 DEF_STUBS
2376 };
2377
2378 struct elf32_arm_stub_hash_entry
2379 {
2380 /* Base hash table entry structure. */
2381 struct bfd_hash_entry root;
2382
2383 /* The stub section. */
2384 asection *stub_sec;
2385
2386 /* Offset within stub_sec of the beginning of this stub. */
2387 bfd_vma stub_offset;
2388
2389 /* Given the symbol's value and its section we can determine its final
2390 value when building the stubs (so the stub knows where to jump). */
2391 bfd_vma target_value;
2392 asection *target_section;
2393
2394 /* Offset to apply to relocation referencing target_value. */
2395 bfd_vma target_addend;
2396
2397 /* The instruction which caused this stub to be generated (only valid for
2398 Cortex-A8 erratum workaround stubs at present). */
2399 unsigned long orig_insn;
2400
2401 /* The stub type. */
2402 enum elf32_arm_stub_type stub_type;
2403 /* Its encoding size in bytes. */
2404 int stub_size;
2405 /* Its template. */
2406 const insn_sequence *stub_template;
2407 /* The size of the template (number of entries). */
2408 int stub_template_size;
2409
2410 /* The symbol table entry, if any, that this was derived from. */
2411 struct elf32_arm_link_hash_entry *h;
2412
2413 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2414 unsigned char st_type;
2415
2416 /* Where this stub is being called from, or, in the case of combined
2417 stub sections, the first input section in the group. */
2418 asection *id_sec;
2419
2420 /* The name for the local symbol at the start of this stub. The
2421 stub name in the hash table has to be unique; this does not, so
2422 it can be friendlier. */
2423 char *output_name;
2424 };
2425
2426 /* Used to build a map of a section. This is required for mixed-endian
2427 code/data. */
2428
2429 typedef struct elf32_elf_section_map
2430 {
2431 bfd_vma vma;
2432 char type;
2433 }
2434 elf32_arm_section_map;
2435
2436 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2437
2438 typedef enum
2439 {
2440 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2441 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2442 VFP11_ERRATUM_ARM_VENEER,
2443 VFP11_ERRATUM_THUMB_VENEER
2444 }
2445 elf32_vfp11_erratum_type;
2446
2447 typedef struct elf32_vfp11_erratum_list
2448 {
2449 struct elf32_vfp11_erratum_list *next;
2450 bfd_vma vma;
2451 union
2452 {
2453 struct
2454 {
2455 struct elf32_vfp11_erratum_list *veneer;
2456 unsigned int vfp_insn;
2457 } b;
2458 struct
2459 {
2460 struct elf32_vfp11_erratum_list *branch;
2461 unsigned int id;
2462 } v;
2463 } u;
2464 elf32_vfp11_erratum_type type;
2465 }
2466 elf32_vfp11_erratum_list;
2467
2468 typedef enum
2469 {
2470 DELETE_EXIDX_ENTRY,
2471 INSERT_EXIDX_CANTUNWIND_AT_END
2472 }
2473 arm_unwind_edit_type;
2474
2475 /* A (sorted) list of edits to apply to an unwind table. */
2476 typedef struct arm_unwind_table_edit
2477 {
2478 arm_unwind_edit_type type;
2479 /* Note: we sometimes want to insert an unwind entry corresponding to a
2480 section different from the one we're currently writing out, so record the
2481 (text) section this edit relates to here. */
2482 asection *linked_section;
2483 unsigned int index;
2484 struct arm_unwind_table_edit *next;
2485 }
2486 arm_unwind_table_edit;
2487
2488 typedef struct _arm_elf_section_data
2489 {
2490 /* Information about mapping symbols. */
2491 struct bfd_elf_section_data elf;
2492 unsigned int mapcount;
2493 unsigned int mapsize;
2494 elf32_arm_section_map *map;
2495 /* Information about CPU errata. */
2496 unsigned int erratumcount;
2497 elf32_vfp11_erratum_list *erratumlist;
2498 /* Information about unwind tables. */
2499 union
2500 {
2501 /* Unwind info attached to a text section. */
2502 struct
2503 {
2504 asection *arm_exidx_sec;
2505 } text;
2506
2507 /* Unwind info attached to an .ARM.exidx section. */
2508 struct
2509 {
2510 arm_unwind_table_edit *unwind_edit_list;
2511 arm_unwind_table_edit *unwind_edit_tail;
2512 } exidx;
2513 } u;
2514 }
2515 _arm_elf_section_data;
2516
2517 #define elf32_arm_section_data(sec) \
2518 ((_arm_elf_section_data *) elf_section_data (sec))
2519
2520 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2521 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2522 so may be created multiple times: we use an array of these entries whilst
2523 relaxing which we can refresh easily, then create stubs for each potentially
2524 erratum-triggering instruction once we've settled on a solution. */
2525
2526 struct a8_erratum_fix {
2527 bfd *input_bfd;
2528 asection *section;
2529 bfd_vma offset;
2530 bfd_vma addend;
2531 unsigned long orig_insn;
2532 char *stub_name;
2533 enum elf32_arm_stub_type stub_type;
2534 int st_type;
2535 };
2536
2537 /* A table of relocs applied to branches which might trigger Cortex-A8
2538 erratum. */
2539
2540 struct a8_erratum_reloc {
2541 bfd_vma from;
2542 bfd_vma destination;
2543 struct elf32_arm_link_hash_entry *hash;
2544 const char *sym_name;
2545 unsigned int r_type;
2546 unsigned char st_type;
2547 bfd_boolean non_a8_stub;
2548 };
2549
2550 /* The size of the thread control block. */
2551 #define TCB_SIZE 8
2552
2553 struct elf_arm_obj_tdata
2554 {
2555 struct elf_obj_tdata root;
2556
2557 /* tls_type for each local got entry. */
2558 char *local_got_tls_type;
2559
2560 /* GOTPLT entries for TLS descriptors. */
2561 bfd_vma *local_tlsdesc_gotent;
2562
2563 /* Zero to warn when linking objects with incompatible enum sizes. */
2564 int no_enum_size_warning;
2565
2566 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2567 int no_wchar_size_warning;
2568 };
2569
2570 #define elf_arm_tdata(bfd) \
2571 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2572
2573 #define elf32_arm_local_got_tls_type(bfd) \
2574 (elf_arm_tdata (bfd)->local_got_tls_type)
2575
2576 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2577 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2578
2579 #define is_arm_elf(bfd) \
2580 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2581 && elf_tdata (bfd) != NULL \
2582 && elf_object_id (bfd) == ARM_ELF_DATA)
2583
2584 static bfd_boolean
2585 elf32_arm_mkobject (bfd *abfd)
2586 {
2587 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2588 ARM_ELF_DATA);
2589 }
2590
2591 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2592
2593 /* Arm ELF linker hash entry. */
2594 struct elf32_arm_link_hash_entry
2595 {
2596 struct elf_link_hash_entry root;
2597
2598 /* Track dynamic relocs copied for this symbol. */
2599 struct elf_dyn_relocs *dyn_relocs;
2600
2601 /* We reference count Thumb references to a PLT entry separately,
2602 so that we can emit the Thumb trampoline only if needed. */
2603 bfd_signed_vma plt_thumb_refcount;
2604
2605 /* Some references from Thumb code may be eliminated by BL->BLX
2606 conversion, so record them separately. */
2607 bfd_signed_vma plt_maybe_thumb_refcount;
2608
2609 /* Since PLT entries have variable size if the Thumb prologue is
2610 used, we need to record the index into .got.plt instead of
2611 recomputing it from the PLT offset. */
2612 bfd_signed_vma plt_got_offset;
2613
2614 #define GOT_UNKNOWN 0
2615 #define GOT_NORMAL 1
2616 #define GOT_TLS_GD 2
2617 #define GOT_TLS_IE 4
2618 #define GOT_TLS_GDESC 8
2619 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2620 unsigned char tls_type;
2621
2622 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2623 starting at the end of the jump table. */
2624 bfd_vma tlsdesc_got;
2625
2626 /* The symbol marking the real symbol location for exported thumb
2627 symbols with Arm stubs. */
2628 struct elf_link_hash_entry *export_glue;
2629
2630 /* A pointer to the most recently used stub hash entry against this
2631 symbol. */
2632 struct elf32_arm_stub_hash_entry *stub_cache;
2633 };
2634
2635 /* Traverse an arm ELF linker hash table. */
2636 #define elf32_arm_link_hash_traverse(table, func, info) \
2637 (elf_link_hash_traverse \
2638 (&(table)->root, \
2639 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2640 (info)))
2641
2642 /* Get the ARM elf linker hash table from a link_info structure. */
2643 #define elf32_arm_hash_table(info) \
2644 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2645 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2646
2647 #define arm_stub_hash_lookup(table, string, create, copy) \
2648 ((struct elf32_arm_stub_hash_entry *) \
2649 bfd_hash_lookup ((table), (string), (create), (copy)))
2650
2651 /* Array to keep track of which stub sections have been created, and
2652 information on stub grouping. */
2653 struct map_stub
2654 {
2655 /* This is the section to which stubs in the group will be
2656 attached. */
2657 asection *link_sec;
2658 /* The stub section. */
2659 asection *stub_sec;
2660 };
2661
2662 #define elf32_arm_compute_jump_table_size(htab) \
2663 ((htab)->next_tls_desc_index * 4)
2664
2665 /* ARM ELF linker hash table. */
2666 struct elf32_arm_link_hash_table
2667 {
2668 /* The main hash table. */
2669 struct elf_link_hash_table root;
2670
2671 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2672 bfd_size_type thumb_glue_size;
2673
2674 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2675 bfd_size_type arm_glue_size;
2676
2677 /* The size in bytes of section containing the ARMv4 BX veneers. */
2678 bfd_size_type bx_glue_size;
2679
2680 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2681 veneer has been populated. */
2682 bfd_vma bx_glue_offset[15];
2683
2684 /* The size in bytes of the section containing glue for VFP11 erratum
2685 veneers. */
2686 bfd_size_type vfp11_erratum_glue_size;
2687
2688 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2689 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2690 elf32_arm_write_section(). */
2691 struct a8_erratum_fix *a8_erratum_fixes;
2692 unsigned int num_a8_erratum_fixes;
2693
2694 /* An arbitrary input BFD chosen to hold the glue sections. */
2695 bfd * bfd_of_glue_owner;
2696
2697 /* Nonzero to output a BE8 image. */
2698 int byteswap_code;
2699
2700 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2701 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2702 int target1_is_rel;
2703
2704 /* The relocation to use for R_ARM_TARGET2 relocations. */
2705 int target2_reloc;
2706
2707 /* 0 = Ignore R_ARM_V4BX.
2708 1 = Convert BX to MOV PC.
2709 2 = Generate v4 interworing stubs. */
2710 int fix_v4bx;
2711
2712 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2713 int fix_cortex_a8;
2714
2715 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2716 int use_blx;
2717
2718 /* What sort of code sequences we should look for which may trigger the
2719 VFP11 denorm erratum. */
2720 bfd_arm_vfp11_fix vfp11_fix;
2721
2722 /* Global counter for the number of fixes we have emitted. */
2723 int num_vfp11_fixes;
2724
2725 /* Nonzero to force PIC branch veneers. */
2726 int pic_veneer;
2727
2728 /* The number of bytes in the initial entry in the PLT. */
2729 bfd_size_type plt_header_size;
2730
2731 /* The number of bytes in the subsequent PLT etries. */
2732 bfd_size_type plt_entry_size;
2733
2734 /* True if the target system is VxWorks. */
2735 int vxworks_p;
2736
2737 /* True if the target system is Symbian OS. */
2738 int symbian_p;
2739
2740 /* True if the target uses REL relocations. */
2741 int use_rel;
2742
2743 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2744 bfd_vma next_tls_desc_index;
2745
2746 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2747 bfd_vma num_tls_desc;
2748
2749 /* Short-cuts to get to dynamic linker sections. */
2750 asection *sdynbss;
2751 asection *srelbss;
2752
2753 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2754 asection *srelplt2;
2755
2756 /* The offset into splt of the PLT entry for the TLS descriptor
2757 resolver. Special values are 0, if not necessary (or not found
2758 to be necessary yet), and -1 if needed but not determined
2759 yet. */
2760 bfd_vma dt_tlsdesc_plt;
2761
2762 /* The offset into sgot of the GOT entry used by the PLT entry
2763 above. */
2764 bfd_vma dt_tlsdesc_got;
2765
2766 /* Offset in .plt section of tls_arm_trampoline. */
2767 bfd_vma tls_trampoline;
2768
2769 /* Data for R_ARM_TLS_LDM32 relocations. */
2770 union
2771 {
2772 bfd_signed_vma refcount;
2773 bfd_vma offset;
2774 } tls_ldm_got;
2775
2776 /* Small local sym cache. */
2777 struct sym_cache sym_cache;
2778
2779 /* For convenience in allocate_dynrelocs. */
2780 bfd * obfd;
2781
2782 /* The amount of space used by the reserved portion of the sgotplt
2783 section, plus whatever space is used by the jump slots. */
2784 bfd_vma sgotplt_jump_table_size;
2785
2786 /* The stub hash table. */
2787 struct bfd_hash_table stub_hash_table;
2788
2789 /* Linker stub bfd. */
2790 bfd *stub_bfd;
2791
2792 /* Linker call-backs. */
2793 asection * (*add_stub_section) (const char *, asection *);
2794 void (*layout_sections_again) (void);
2795
2796 /* Array to keep track of which stub sections have been created, and
2797 information on stub grouping. */
2798 struct map_stub *stub_group;
2799
2800 /* Number of elements in stub_group. */
2801 int top_id;
2802
2803 /* Assorted information used by elf32_arm_size_stubs. */
2804 unsigned int bfd_count;
2805 int top_index;
2806 asection **input_list;
2807 };
2808
2809 /* Create an entry in an ARM ELF linker hash table. */
2810
2811 static struct bfd_hash_entry *
2812 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2813 struct bfd_hash_table * table,
2814 const char * string)
2815 {
2816 struct elf32_arm_link_hash_entry * ret =
2817 (struct elf32_arm_link_hash_entry *) entry;
2818
2819 /* Allocate the structure if it has not already been allocated by a
2820 subclass. */
2821 if (ret == NULL)
2822 ret = (struct elf32_arm_link_hash_entry *)
2823 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2824 if (ret == NULL)
2825 return (struct bfd_hash_entry *) ret;
2826
2827 /* Call the allocation method of the superclass. */
2828 ret = ((struct elf32_arm_link_hash_entry *)
2829 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2830 table, string));
2831 if (ret != NULL)
2832 {
2833 ret->dyn_relocs = NULL;
2834 ret->tls_type = GOT_UNKNOWN;
2835 ret->tlsdesc_got = (bfd_vma) -1;
2836 ret->plt_thumb_refcount = 0;
2837 ret->plt_maybe_thumb_refcount = 0;
2838 ret->plt_got_offset = -1;
2839 ret->export_glue = NULL;
2840
2841 ret->stub_cache = NULL;
2842 }
2843
2844 return (struct bfd_hash_entry *) ret;
2845 }
2846
2847 /* Initialize an entry in the stub hash table. */
2848
2849 static struct bfd_hash_entry *
2850 stub_hash_newfunc (struct bfd_hash_entry *entry,
2851 struct bfd_hash_table *table,
2852 const char *string)
2853 {
2854 /* Allocate the structure if it has not already been allocated by a
2855 subclass. */
2856 if (entry == NULL)
2857 {
2858 entry = (struct bfd_hash_entry *)
2859 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
2860 if (entry == NULL)
2861 return entry;
2862 }
2863
2864 /* Call the allocation method of the superclass. */
2865 entry = bfd_hash_newfunc (entry, table, string);
2866 if (entry != NULL)
2867 {
2868 struct elf32_arm_stub_hash_entry *eh;
2869
2870 /* Initialize the local fields. */
2871 eh = (struct elf32_arm_stub_hash_entry *) entry;
2872 eh->stub_sec = NULL;
2873 eh->stub_offset = 0;
2874 eh->target_value = 0;
2875 eh->target_section = NULL;
2876 eh->target_addend = 0;
2877 eh->orig_insn = 0;
2878 eh->stub_type = arm_stub_none;
2879 eh->stub_size = 0;
2880 eh->stub_template = NULL;
2881 eh->stub_template_size = 0;
2882 eh->h = NULL;
2883 eh->id_sec = NULL;
2884 eh->output_name = NULL;
2885 }
2886
2887 return entry;
2888 }
2889
2890 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
2891 shortcuts to them in our hash table. */
2892
2893 static bfd_boolean
2894 create_got_section (bfd *dynobj, struct bfd_link_info *info)
2895 {
2896 struct elf32_arm_link_hash_table *htab;
2897
2898 htab = elf32_arm_hash_table (info);
2899 if (htab == NULL)
2900 return FALSE;
2901
2902 /* BPABI objects never have a GOT, or associated sections. */
2903 if (htab->symbian_p)
2904 return TRUE;
2905
2906 if (! _bfd_elf_create_got_section (dynobj, info))
2907 return FALSE;
2908
2909 return TRUE;
2910 }
2911
2912 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2913 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
2914 hash table. */
2915
2916 static bfd_boolean
2917 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
2918 {
2919 struct elf32_arm_link_hash_table *htab;
2920
2921 htab = elf32_arm_hash_table (info);
2922 if (htab == NULL)
2923 return FALSE;
2924
2925 if (!htab->root.sgot && !create_got_section (dynobj, info))
2926 return FALSE;
2927
2928 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2929 return FALSE;
2930
2931 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2932 if (!info->shared)
2933 htab->srelbss = bfd_get_section_by_name (dynobj,
2934 RELOC_SECTION (htab, ".bss"));
2935
2936 if (htab->vxworks_p)
2937 {
2938 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2939 return FALSE;
2940
2941 if (info->shared)
2942 {
2943 htab->plt_header_size = 0;
2944 htab->plt_entry_size
2945 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2946 }
2947 else
2948 {
2949 htab->plt_header_size
2950 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2951 htab->plt_entry_size
2952 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2953 }
2954 }
2955
2956 if (!htab->root.splt
2957 || !htab->root.srelplt
2958 || !htab->sdynbss
2959 || (!info->shared && !htab->srelbss))
2960 abort ();
2961
2962 return TRUE;
2963 }
2964
2965 /* Copy the extra info we tack onto an elf_link_hash_entry. */
2966
2967 static void
2968 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2969 struct elf_link_hash_entry *dir,
2970 struct elf_link_hash_entry *ind)
2971 {
2972 struct elf32_arm_link_hash_entry *edir, *eind;
2973
2974 edir = (struct elf32_arm_link_hash_entry *) dir;
2975 eind = (struct elf32_arm_link_hash_entry *) ind;
2976
2977 if (eind->dyn_relocs != NULL)
2978 {
2979 if (edir->dyn_relocs != NULL)
2980 {
2981 struct elf_dyn_relocs **pp;
2982 struct elf_dyn_relocs *p;
2983
2984 /* Add reloc counts against the indirect sym to the direct sym
2985 list. Merge any entries against the same section. */
2986 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
2987 {
2988 struct elf_dyn_relocs *q;
2989
2990 for (q = edir->dyn_relocs; q != NULL; q = q->next)
2991 if (q->sec == p->sec)
2992 {
2993 q->pc_count += p->pc_count;
2994 q->count += p->count;
2995 *pp = p->next;
2996 break;
2997 }
2998 if (q == NULL)
2999 pp = &p->next;
3000 }
3001 *pp = edir->dyn_relocs;
3002 }
3003
3004 edir->dyn_relocs = eind->dyn_relocs;
3005 eind->dyn_relocs = NULL;
3006 }
3007
3008 if (ind->root.type == bfd_link_hash_indirect)
3009 {
3010 /* Copy over PLT info. */
3011 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
3012 eind->plt_thumb_refcount = 0;
3013 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
3014 eind->plt_maybe_thumb_refcount = 0;
3015
3016 if (dir->got.refcount <= 0)
3017 {
3018 edir->tls_type = eind->tls_type;
3019 eind->tls_type = GOT_UNKNOWN;
3020 }
3021 }
3022
3023 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3024 }
3025
3026 /* Create an ARM elf linker hash table. */
3027
3028 static struct bfd_link_hash_table *
3029 elf32_arm_link_hash_table_create (bfd *abfd)
3030 {
3031 struct elf32_arm_link_hash_table *ret;
3032 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3033
3034 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
3035 if (ret == NULL)
3036 return NULL;
3037
3038 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3039 elf32_arm_link_hash_newfunc,
3040 sizeof (struct elf32_arm_link_hash_entry),
3041 ARM_ELF_DATA))
3042 {
3043 free (ret);
3044 return NULL;
3045 }
3046
3047 ret->sdynbss = NULL;
3048 ret->srelbss = NULL;
3049 ret->srelplt2 = NULL;
3050 ret->dt_tlsdesc_plt = 0;
3051 ret->dt_tlsdesc_got = 0;
3052 ret->tls_trampoline = 0;
3053 ret->next_tls_desc_index = 0;
3054 ret->num_tls_desc = 0;
3055 ret->thumb_glue_size = 0;
3056 ret->arm_glue_size = 0;
3057 ret->bx_glue_size = 0;
3058 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
3059 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3060 ret->vfp11_erratum_glue_size = 0;
3061 ret->num_vfp11_fixes = 0;
3062 ret->fix_cortex_a8 = 0;
3063 ret->bfd_of_glue_owner = NULL;
3064 ret->byteswap_code = 0;
3065 ret->target1_is_rel = 0;
3066 ret->target2_reloc = R_ARM_NONE;
3067 #ifdef FOUR_WORD_PLT
3068 ret->plt_header_size = 16;
3069 ret->plt_entry_size = 16;
3070 #else
3071 ret->plt_header_size = 20;
3072 ret->plt_entry_size = 12;
3073 #endif
3074 ret->fix_v4bx = 0;
3075 ret->use_blx = 0;
3076 ret->vxworks_p = 0;
3077 ret->symbian_p = 0;
3078 ret->use_rel = 1;
3079 ret->sym_cache.abfd = NULL;
3080 ret->obfd = abfd;
3081 ret->tls_ldm_got.refcount = 0;
3082 ret->stub_bfd = NULL;
3083 ret->add_stub_section = NULL;
3084 ret->layout_sections_again = NULL;
3085 ret->stub_group = NULL;
3086 ret->top_id = 0;
3087 ret->bfd_count = 0;
3088 ret->top_index = 0;
3089 ret->input_list = NULL;
3090
3091 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3092 sizeof (struct elf32_arm_stub_hash_entry)))
3093 {
3094 free (ret);
3095 return NULL;
3096 }
3097
3098 return &ret->root.root;
3099 }
3100
3101 /* Free the derived linker hash table. */
3102
3103 static void
3104 elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3105 {
3106 struct elf32_arm_link_hash_table *ret
3107 = (struct elf32_arm_link_hash_table *) hash;
3108
3109 bfd_hash_table_free (&ret->stub_hash_table);
3110 _bfd_generic_link_hash_table_free (hash);
3111 }
3112
3113 /* Determine if we're dealing with a Thumb only architecture. */
3114
3115 static bfd_boolean
3116 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3117 {
3118 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3119 Tag_CPU_arch);
3120 int profile;
3121
3122 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3123 return TRUE;
3124
3125 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3126 return FALSE;
3127
3128 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3129 Tag_CPU_arch_profile);
3130
3131 return profile == 'M';
3132 }
3133
3134 /* Determine if we're dealing with a Thumb-2 object. */
3135
3136 static bfd_boolean
3137 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3138 {
3139 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3140 Tag_CPU_arch);
3141 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3142 }
3143
3144 /* Determine what kind of NOPs are available. */
3145
3146 static bfd_boolean
3147 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3148 {
3149 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3150 Tag_CPU_arch);
3151 return arch == TAG_CPU_ARCH_V6T2
3152 || arch == TAG_CPU_ARCH_V6K
3153 || arch == TAG_CPU_ARCH_V7
3154 || arch == TAG_CPU_ARCH_V7E_M;
3155 }
3156
3157 static bfd_boolean
3158 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3159 {
3160 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3161 Tag_CPU_arch);
3162 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3163 || arch == TAG_CPU_ARCH_V7E_M);
3164 }
3165
3166 static bfd_boolean
3167 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3168 {
3169 switch (stub_type)
3170 {
3171 case arm_stub_long_branch_thumb_only:
3172 case arm_stub_long_branch_v4t_thumb_arm:
3173 case arm_stub_short_branch_v4t_thumb_arm:
3174 case arm_stub_long_branch_v4t_thumb_arm_pic:
3175 case arm_stub_long_branch_thumb_only_pic:
3176 return TRUE;
3177 case arm_stub_none:
3178 BFD_FAIL ();
3179 return FALSE;
3180 break;
3181 default:
3182 return FALSE;
3183 }
3184 }
3185
3186 /* Determine the type of stub needed, if any, for a call. */
3187
3188 static enum elf32_arm_stub_type
3189 arm_type_of_stub (struct bfd_link_info *info,
3190 asection *input_sec,
3191 const Elf_Internal_Rela *rel,
3192 int *actual_st_type,
3193 struct elf32_arm_link_hash_entry *hash,
3194 bfd_vma destination,
3195 asection *sym_sec,
3196 bfd *input_bfd,
3197 const char *name)
3198 {
3199 bfd_vma location;
3200 bfd_signed_vma branch_offset;
3201 unsigned int r_type;
3202 struct elf32_arm_link_hash_table * globals;
3203 int thumb2;
3204 int thumb_only;
3205 enum elf32_arm_stub_type stub_type = arm_stub_none;
3206 int use_plt = 0;
3207 int st_type = *actual_st_type;
3208
3209 /* We don't know the actual type of destination in case it is of
3210 type STT_SECTION: give up. */
3211 if (st_type == STT_SECTION)
3212 return stub_type;
3213
3214 globals = elf32_arm_hash_table (info);
3215 if (globals == NULL)
3216 return stub_type;
3217
3218 thumb_only = using_thumb_only (globals);
3219
3220 thumb2 = using_thumb2 (globals);
3221
3222 /* Determine where the call point is. */
3223 location = (input_sec->output_offset
3224 + input_sec->output_section->vma
3225 + rel->r_offset);
3226
3227 r_type = ELF32_R_TYPE (rel->r_info);
3228
3229 /* Keep a simpler condition, for the sake of clarity. */
3230 if (globals->root.splt != NULL
3231 && hash != NULL
3232 && hash->root.plt.offset != (bfd_vma) -1)
3233 {
3234 use_plt = 1;
3235
3236 /* Note when dealing with PLT entries: the main PLT stub is in
3237 ARM mode, so if the branch is in Thumb mode, another
3238 Thumb->ARM stub will be inserted later just before the ARM
3239 PLT stub. We don't take this extra distance into account
3240 here, because if a long branch stub is needed, we'll add a
3241 Thumb->Arm one and branch directly to the ARM PLT entry
3242 because it avoids spreading offset corrections in several
3243 places. */
3244
3245 destination = (globals->root.splt->output_section->vma
3246 + globals->root.splt->output_offset
3247 + hash->root.plt.offset);
3248 st_type = STT_FUNC;
3249 }
3250
3251 branch_offset = (bfd_signed_vma)(destination - location);
3252
3253 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3254 || r_type == R_ARM_THM_TLS_CALL)
3255 {
3256 /* Handle cases where:
3257 - this call goes too far (different Thumb/Thumb2 max
3258 distance)
3259 - it's a Thumb->Arm call and blx is not available, or it's a
3260 Thumb->Arm branch (not bl). A stub is needed in this case,
3261 but only if this call is not through a PLT entry. Indeed,
3262 PLT stubs handle mode switching already.
3263 */
3264 if ((!thumb2
3265 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3266 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3267 || (thumb2
3268 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3269 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3270 || ((st_type != STT_ARM_TFUNC)
3271 && (((r_type == R_ARM_THM_CALL
3272 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3273 || (r_type == R_ARM_THM_JUMP24))
3274 && !use_plt))
3275 {
3276 if (st_type == STT_ARM_TFUNC)
3277 {
3278 /* Thumb to thumb. */
3279 if (!thumb_only)
3280 {
3281 stub_type = (info->shared | globals->pic_veneer)
3282 /* PIC stubs. */
3283 ? ((globals->use_blx
3284 && (r_type ==R_ARM_THM_CALL))
3285 /* V5T and above. Stub starts with ARM code, so
3286 we must be able to switch mode before
3287 reaching it, which is only possible for 'bl'
3288 (ie R_ARM_THM_CALL relocation). */
3289 ? arm_stub_long_branch_any_thumb_pic
3290 /* On V4T, use Thumb code only. */
3291 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3292
3293 /* non-PIC stubs. */
3294 : ((globals->use_blx
3295 && (r_type ==R_ARM_THM_CALL))
3296 /* V5T and above. */
3297 ? arm_stub_long_branch_any_any
3298 /* V4T. */
3299 : arm_stub_long_branch_v4t_thumb_thumb);
3300 }
3301 else
3302 {
3303 stub_type = (info->shared | globals->pic_veneer)
3304 /* PIC stub. */
3305 ? arm_stub_long_branch_thumb_only_pic
3306 /* non-PIC stub. */
3307 : arm_stub_long_branch_thumb_only;
3308 }
3309 }
3310 else
3311 {
3312 /* Thumb to arm. */
3313 if (sym_sec != NULL
3314 && sym_sec->owner != NULL
3315 && !INTERWORK_FLAG (sym_sec->owner))
3316 {
3317 (*_bfd_error_handler)
3318 (_("%B(%s): warning: interworking not enabled.\n"
3319 " first occurrence: %B: Thumb call to ARM"),
3320 sym_sec->owner, input_bfd, name);
3321 }
3322
3323 stub_type =
3324 (info->shared | globals->pic_veneer)
3325 /* PIC stubs. */
3326 ? (r_type == R_ARM_THM_TLS_CALL
3327 /* TLS PIC stubs */
3328 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3329 : arm_stub_long_branch_v4t_thumb_tls_pic)
3330 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3331 /* V5T PIC and above. */
3332 ? arm_stub_long_branch_any_arm_pic
3333 /* V4T PIC stub. */
3334 : arm_stub_long_branch_v4t_thumb_arm_pic))
3335
3336 /* non-PIC stubs. */
3337 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3338 /* V5T and above. */
3339 ? arm_stub_long_branch_any_any
3340 /* V4T. */
3341 : arm_stub_long_branch_v4t_thumb_arm);
3342
3343 /* Handle v4t short branches. */
3344 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3345 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3346 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3347 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3348 }
3349 }
3350 }
3351 else if (r_type == R_ARM_CALL
3352 || r_type == R_ARM_JUMP24
3353 || r_type == R_ARM_PLT32
3354 || r_type == R_ARM_TLS_CALL)
3355 {
3356 if (st_type == STT_ARM_TFUNC)
3357 {
3358 /* Arm to thumb. */
3359
3360 if (sym_sec != NULL
3361 && sym_sec->owner != NULL
3362 && !INTERWORK_FLAG (sym_sec->owner))
3363 {
3364 (*_bfd_error_handler)
3365 (_("%B(%s): warning: interworking not enabled.\n"
3366 " first occurrence: %B: ARM call to Thumb"),
3367 sym_sec->owner, input_bfd, name);
3368 }
3369
3370 /* We have an extra 2-bytes reach because of
3371 the mode change (bit 24 (H) of BLX encoding). */
3372 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3373 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3374 || (r_type == R_ARM_CALL && !globals->use_blx)
3375 || (r_type == R_ARM_JUMP24)
3376 || (r_type == R_ARM_PLT32))
3377 {
3378 stub_type = (info->shared | globals->pic_veneer)
3379 /* PIC stubs. */
3380 ? ((globals->use_blx)
3381 /* V5T and above. */
3382 ? arm_stub_long_branch_any_thumb_pic
3383 /* V4T stub. */
3384 : arm_stub_long_branch_v4t_arm_thumb_pic)
3385
3386 /* non-PIC stubs. */
3387 : ((globals->use_blx)
3388 /* V5T and above. */
3389 ? arm_stub_long_branch_any_any
3390 /* V4T. */
3391 : arm_stub_long_branch_v4t_arm_thumb);
3392 }
3393 }
3394 else
3395 {
3396 /* Arm to arm. */
3397 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3398 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3399 {
3400 stub_type =
3401 (info->shared | globals->pic_veneer)
3402 /* PIC stubs. */
3403 ? (r_type == R_ARM_TLS_CALL
3404 /* TLS PIC Stub */
3405 ? arm_stub_long_branch_any_tls_pic
3406 : arm_stub_long_branch_any_arm_pic)
3407 /* non-PIC stubs. */
3408 : arm_stub_long_branch_any_any;
3409 }
3410 }
3411 }
3412
3413 /* If a stub is needed, record the actual destination type. */
3414 if (stub_type != arm_stub_none)
3415 *actual_st_type = st_type;
3416
3417 return stub_type;
3418 }
3419
3420 /* Build a name for an entry in the stub hash table. */
3421
3422 static char *
3423 elf32_arm_stub_name (const asection *input_section,
3424 const asection *sym_sec,
3425 const struct elf32_arm_link_hash_entry *hash,
3426 const Elf_Internal_Rela *rel,
3427 enum elf32_arm_stub_type stub_type)
3428 {
3429 char *stub_name;
3430 bfd_size_type len;
3431
3432 if (hash)
3433 {
3434 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
3435 stub_name = (char *) bfd_malloc (len);
3436 if (stub_name != NULL)
3437 sprintf (stub_name, "%08x_%s+%x_%d",
3438 input_section->id & 0xffffffff,
3439 hash->root.root.root.string,
3440 (int) rel->r_addend & 0xffffffff,
3441 (int) stub_type);
3442 }
3443 else
3444 {
3445 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
3446 stub_name = (char *) bfd_malloc (len);
3447 if (stub_name != NULL)
3448 sprintf (stub_name, "%08x_%x:%x+%x_%d",
3449 input_section->id & 0xffffffff,
3450 sym_sec->id & 0xffffffff,
3451 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3452 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3453 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3454 (int) rel->r_addend & 0xffffffff,
3455 (int) stub_type);
3456 }
3457
3458 return stub_name;
3459 }
3460
3461 /* Look up an entry in the stub hash. Stub entries are cached because
3462 creating the stub name takes a bit of time. */
3463
3464 static struct elf32_arm_stub_hash_entry *
3465 elf32_arm_get_stub_entry (const asection *input_section,
3466 const asection *sym_sec,
3467 struct elf_link_hash_entry *hash,
3468 const Elf_Internal_Rela *rel,
3469 struct elf32_arm_link_hash_table *htab,
3470 enum elf32_arm_stub_type stub_type)
3471 {
3472 struct elf32_arm_stub_hash_entry *stub_entry;
3473 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3474 const asection *id_sec;
3475
3476 if ((input_section->flags & SEC_CODE) == 0)
3477 return NULL;
3478
3479 /* If this input section is part of a group of sections sharing one
3480 stub section, then use the id of the first section in the group.
3481 Stub names need to include a section id, as there may well be
3482 more than one stub used to reach say, printf, and we need to
3483 distinguish between them. */
3484 id_sec = htab->stub_group[input_section->id].link_sec;
3485
3486 if (h != NULL && h->stub_cache != NULL
3487 && h->stub_cache->h == h
3488 && h->stub_cache->id_sec == id_sec
3489 && h->stub_cache->stub_type == stub_type)
3490 {
3491 stub_entry = h->stub_cache;
3492 }
3493 else
3494 {
3495 char *stub_name;
3496
3497 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
3498 if (stub_name == NULL)
3499 return NULL;
3500
3501 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3502 stub_name, FALSE, FALSE);
3503 if (h != NULL)
3504 h->stub_cache = stub_entry;
3505
3506 free (stub_name);
3507 }
3508
3509 return stub_entry;
3510 }
3511
3512 /* Find or create a stub section. Returns a pointer to the stub section, and
3513 the section to which the stub section will be attached (in *LINK_SEC_P).
3514 LINK_SEC_P may be NULL. */
3515
3516 static asection *
3517 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3518 struct elf32_arm_link_hash_table *htab)
3519 {
3520 asection *link_sec;
3521 asection *stub_sec;
3522
3523 link_sec = htab->stub_group[section->id].link_sec;
3524 stub_sec = htab->stub_group[section->id].stub_sec;
3525 if (stub_sec == NULL)
3526 {
3527 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3528 if (stub_sec == NULL)
3529 {
3530 size_t namelen;
3531 bfd_size_type len;
3532 char *s_name;
3533
3534 namelen = strlen (link_sec->name);
3535 len = namelen + sizeof (STUB_SUFFIX);
3536 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
3537 if (s_name == NULL)
3538 return NULL;
3539
3540 memcpy (s_name, link_sec->name, namelen);
3541 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3542 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3543 if (stub_sec == NULL)
3544 return NULL;
3545 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3546 }
3547 htab->stub_group[section->id].stub_sec = stub_sec;
3548 }
3549
3550 if (link_sec_p)
3551 *link_sec_p = link_sec;
3552
3553 return stub_sec;
3554 }
3555
3556 /* Add a new stub entry to the stub hash. Not all fields of the new
3557 stub entry are initialised. */
3558
3559 static struct elf32_arm_stub_hash_entry *
3560 elf32_arm_add_stub (const char *stub_name,
3561 asection *section,
3562 struct elf32_arm_link_hash_table *htab)
3563 {
3564 asection *link_sec;
3565 asection *stub_sec;
3566 struct elf32_arm_stub_hash_entry *stub_entry;
3567
3568 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3569 if (stub_sec == NULL)
3570 return NULL;
3571
3572 /* Enter this entry into the linker stub hash table. */
3573 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3574 TRUE, FALSE);
3575 if (stub_entry == NULL)
3576 {
3577 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3578 section->owner,
3579 stub_name);
3580 return NULL;
3581 }
3582
3583 stub_entry->stub_sec = stub_sec;
3584 stub_entry->stub_offset = 0;
3585 stub_entry->id_sec = link_sec;
3586
3587 return stub_entry;
3588 }
3589
3590 /* Store an Arm insn into an output section not processed by
3591 elf32_arm_write_section. */
3592
3593 static void
3594 put_arm_insn (struct elf32_arm_link_hash_table * htab,
3595 bfd * output_bfd, bfd_vma val, void * ptr)
3596 {
3597 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3598 bfd_putl32 (val, ptr);
3599 else
3600 bfd_putb32 (val, ptr);
3601 }
3602
3603 /* Store a 16-bit Thumb insn into an output section not processed by
3604 elf32_arm_write_section. */
3605
3606 static void
3607 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3608 bfd * output_bfd, bfd_vma val, void * ptr)
3609 {
3610 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3611 bfd_putl16 (val, ptr);
3612 else
3613 bfd_putb16 (val, ptr);
3614 }
3615
3616 /* If it's possible to change R_TYPE to a more efficient access
3617 model, return the new reloc type. */
3618
3619 static unsigned
3620 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
3621 struct elf_link_hash_entry *h)
3622 {
3623 int is_local = (h == NULL);
3624
3625 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
3626 return r_type;
3627
3628 /* We do not support relaxations for Old TLS models. */
3629 switch (r_type)
3630 {
3631 case R_ARM_TLS_GOTDESC:
3632 case R_ARM_TLS_CALL:
3633 case R_ARM_THM_TLS_CALL:
3634 case R_ARM_TLS_DESCSEQ:
3635 case R_ARM_THM_TLS_DESCSEQ:
3636 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
3637 }
3638
3639 return r_type;
3640 }
3641
3642 static bfd_reloc_status_type elf32_arm_final_link_relocate
3643 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3644 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3645 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3646
3647 static unsigned int
3648 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
3649 {
3650 switch (stub_type)
3651 {
3652 case arm_stub_a8_veneer_b_cond:
3653 case arm_stub_a8_veneer_b:
3654 case arm_stub_a8_veneer_bl:
3655 return 2;
3656
3657 case arm_stub_long_branch_any_any:
3658 case arm_stub_long_branch_v4t_arm_thumb:
3659 case arm_stub_long_branch_thumb_only:
3660 case arm_stub_long_branch_v4t_thumb_thumb:
3661 case arm_stub_long_branch_v4t_thumb_arm:
3662 case arm_stub_short_branch_v4t_thumb_arm:
3663 case arm_stub_long_branch_any_arm_pic:
3664 case arm_stub_long_branch_any_thumb_pic:
3665 case arm_stub_long_branch_v4t_thumb_thumb_pic:
3666 case arm_stub_long_branch_v4t_arm_thumb_pic:
3667 case arm_stub_long_branch_v4t_thumb_arm_pic:
3668 case arm_stub_long_branch_thumb_only_pic:
3669 case arm_stub_long_branch_any_tls_pic:
3670 case arm_stub_long_branch_v4t_thumb_tls_pic:
3671 case arm_stub_a8_veneer_blx:
3672 return 4;
3673
3674 default:
3675 abort (); /* Should be unreachable. */
3676 }
3677 }
3678
3679 static bfd_boolean
3680 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3681 void * in_arg)
3682 {
3683 #define MAXRELOCS 2
3684 struct elf32_arm_stub_hash_entry *stub_entry;
3685 struct elf32_arm_link_hash_table *globals;
3686 struct bfd_link_info *info;
3687 asection *stub_sec;
3688 bfd *stub_bfd;
3689 bfd_byte *loc;
3690 bfd_vma sym_value;
3691 int template_size;
3692 int size;
3693 const insn_sequence *template_sequence;
3694 int i;
3695 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3696 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3697 int nrelocs = 0;
3698
3699 /* Massage our args to the form they really have. */
3700 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3701 info = (struct bfd_link_info *) in_arg;
3702
3703 globals = elf32_arm_hash_table (info);
3704 if (globals == NULL)
3705 return FALSE;
3706
3707 stub_sec = stub_entry->stub_sec;
3708
3709 if ((globals->fix_cortex_a8 < 0)
3710 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
3711 /* We have to do less-strictly-aligned fixes last. */
3712 return TRUE;
3713
3714 /* Make a note of the offset within the stubs for this entry. */
3715 stub_entry->stub_offset = stub_sec->size;
3716 loc = stub_sec->contents + stub_entry->stub_offset;
3717
3718 stub_bfd = stub_sec->owner;
3719
3720 /* This is the address of the stub destination. */
3721 sym_value = (stub_entry->target_value
3722 + stub_entry->target_section->output_offset
3723 + stub_entry->target_section->output_section->vma);
3724
3725 template_sequence = stub_entry->stub_template;
3726 template_size = stub_entry->stub_template_size;
3727
3728 size = 0;
3729 for (i = 0; i < template_size; i++)
3730 {
3731 switch (template_sequence[i].type)
3732 {
3733 case THUMB16_TYPE:
3734 {
3735 bfd_vma data = (bfd_vma) template_sequence[i].data;
3736 if (template_sequence[i].reloc_addend != 0)
3737 {
3738 /* We've borrowed the reloc_addend field to mean we should
3739 insert a condition code into this (Thumb-1 branch)
3740 instruction. See THUMB16_BCOND_INSN. */
3741 BFD_ASSERT ((data & 0xff00) == 0xd000);
3742 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3743 }
3744 bfd_put_16 (stub_bfd, data, loc + size);
3745 size += 2;
3746 }
3747 break;
3748
3749 case THUMB32_TYPE:
3750 bfd_put_16 (stub_bfd,
3751 (template_sequence[i].data >> 16) & 0xffff,
3752 loc + size);
3753 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
3754 loc + size + 2);
3755 if (template_sequence[i].r_type != R_ARM_NONE)
3756 {
3757 stub_reloc_idx[nrelocs] = i;
3758 stub_reloc_offset[nrelocs++] = size;
3759 }
3760 size += 4;
3761 break;
3762
3763 case ARM_TYPE:
3764 bfd_put_32 (stub_bfd, template_sequence[i].data,
3765 loc + size);
3766 /* Handle cases where the target is encoded within the
3767 instruction. */
3768 if (template_sequence[i].r_type == R_ARM_JUMP24)
3769 {
3770 stub_reloc_idx[nrelocs] = i;
3771 stub_reloc_offset[nrelocs++] = size;
3772 }
3773 size += 4;
3774 break;
3775
3776 case DATA_TYPE:
3777 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
3778 stub_reloc_idx[nrelocs] = i;
3779 stub_reloc_offset[nrelocs++] = size;
3780 size += 4;
3781 break;
3782
3783 default:
3784 BFD_FAIL ();
3785 return FALSE;
3786 }
3787 }
3788
3789 stub_sec->size += size;
3790
3791 /* Stub size has already been computed in arm_size_one_stub. Check
3792 consistency. */
3793 BFD_ASSERT (size == stub_entry->stub_size);
3794
3795 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3796 if (stub_entry->st_type == STT_ARM_TFUNC)
3797 sym_value |= 1;
3798
3799 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3800 in each stub. */
3801 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
3802
3803 for (i = 0; i < nrelocs; i++)
3804 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3805 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3806 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3807 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
3808 {
3809 Elf_Internal_Rela rel;
3810 bfd_boolean unresolved_reloc;
3811 char *error_message;
3812 int sym_flags
3813 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
3814 ? STT_ARM_TFUNC : 0;
3815 bfd_vma points_to = sym_value + stub_entry->target_addend;
3816
3817 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3818 rel.r_info = ELF32_R_INFO (0,
3819 template_sequence[stub_reloc_idx[i]].r_type);
3820 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
3821
3822 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3823 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3824 template should refer back to the instruction after the original
3825 branch. */
3826 points_to = sym_value;
3827
3828 /* There may be unintended consequences if this is not true. */
3829 BFD_ASSERT (stub_entry->h == NULL);
3830
3831 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3832 properly. We should probably use this function unconditionally,
3833 rather than only for certain relocations listed in the enclosing
3834 conditional, for the sake of consistency. */
3835 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3836 (template_sequence[stub_reloc_idx[i]].r_type),
3837 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3838 points_to, info, stub_entry->target_section, "", sym_flags,
3839 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
3840 &error_message);
3841 }
3842 else
3843 {
3844 Elf_Internal_Rela rel;
3845 bfd_boolean unresolved_reloc;
3846 char *error_message;
3847 bfd_vma points_to = sym_value + stub_entry->target_addend
3848 + template_sequence[stub_reloc_idx[i]].reloc_addend;
3849
3850 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3851 rel.r_info = ELF32_R_INFO (0,
3852 template_sequence[stub_reloc_idx[i]].r_type);
3853 rel.r_addend = 0;
3854
3855 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3856 (template_sequence[stub_reloc_idx[i]].r_type),
3857 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3858 points_to, info, stub_entry->target_section, "", stub_entry->st_type,
3859 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
3860 &error_message);
3861 }
3862
3863 return TRUE;
3864 #undef MAXRELOCS
3865 }
3866
3867 /* Calculate the template, template size and instruction size for a stub.
3868 Return value is the instruction size. */
3869
3870 static unsigned int
3871 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3872 const insn_sequence **stub_template,
3873 int *stub_template_size)
3874 {
3875 const insn_sequence *template_sequence = NULL;
3876 int template_size = 0, i;
3877 unsigned int size;
3878
3879 template_sequence = stub_definitions[stub_type].template_sequence;
3880 if (stub_template)
3881 *stub_template = template_sequence;
3882
3883 template_size = stub_definitions[stub_type].template_size;
3884 if (stub_template_size)
3885 *stub_template_size = template_size;
3886
3887 size = 0;
3888 for (i = 0; i < template_size; i++)
3889 {
3890 switch (template_sequence[i].type)
3891 {
3892 case THUMB16_TYPE:
3893 size += 2;
3894 break;
3895
3896 case ARM_TYPE:
3897 case THUMB32_TYPE:
3898 case DATA_TYPE:
3899 size += 4;
3900 break;
3901
3902 default:
3903 BFD_FAIL ();
3904 return 0;
3905 }
3906 }
3907
3908 return size;
3909 }
3910
3911 /* As above, but don't actually build the stub. Just bump offset so
3912 we know stub section sizes. */
3913
3914 static bfd_boolean
3915 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
3916 void *in_arg ATTRIBUTE_UNUSED)
3917 {
3918 struct elf32_arm_stub_hash_entry *stub_entry;
3919 const insn_sequence *template_sequence;
3920 int template_size, size;
3921
3922 /* Massage our args to the form they really have. */
3923 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3924
3925 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3926 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3927
3928 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
3929 &template_size);
3930
3931 stub_entry->stub_size = size;
3932 stub_entry->stub_template = template_sequence;
3933 stub_entry->stub_template_size = template_size;
3934
3935 size = (size + 7) & ~7;
3936 stub_entry->stub_sec->size += size;
3937
3938 return TRUE;
3939 }
3940
3941 /* External entry points for sizing and building linker stubs. */
3942
3943 /* Set up various things so that we can make a list of input sections
3944 for each output section included in the link. Returns -1 on error,
3945 0 when no stubs will be needed, and 1 on success. */
3946
3947 int
3948 elf32_arm_setup_section_lists (bfd *output_bfd,
3949 struct bfd_link_info *info)
3950 {
3951 bfd *input_bfd;
3952 unsigned int bfd_count;
3953 int top_id, top_index;
3954 asection *section;
3955 asection **input_list, **list;
3956 bfd_size_type amt;
3957 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3958
3959 if (htab == NULL)
3960 return 0;
3961 if (! is_elf_hash_table (htab))
3962 return 0;
3963
3964 /* Count the number of input BFDs and find the top input section id. */
3965 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3966 input_bfd != NULL;
3967 input_bfd = input_bfd->link_next)
3968 {
3969 bfd_count += 1;
3970 for (section = input_bfd->sections;
3971 section != NULL;
3972 section = section->next)
3973 {
3974 if (top_id < section->id)
3975 top_id = section->id;
3976 }
3977 }
3978 htab->bfd_count = bfd_count;
3979
3980 amt = sizeof (struct map_stub) * (top_id + 1);
3981 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
3982 if (htab->stub_group == NULL)
3983 return -1;
3984 htab->top_id = top_id;
3985
3986 /* We can't use output_bfd->section_count here to find the top output
3987 section index as some sections may have been removed, and
3988 _bfd_strip_section_from_output doesn't renumber the indices. */
3989 for (section = output_bfd->sections, top_index = 0;
3990 section != NULL;
3991 section = section->next)
3992 {
3993 if (top_index < section->index)
3994 top_index = section->index;
3995 }
3996
3997 htab->top_index = top_index;
3998 amt = sizeof (asection *) * (top_index + 1);
3999 input_list = (asection **) bfd_malloc (amt);
4000 htab->input_list = input_list;
4001 if (input_list == NULL)
4002 return -1;
4003
4004 /* For sections we aren't interested in, mark their entries with a
4005 value we can check later. */
4006 list = input_list + top_index;
4007 do
4008 *list = bfd_abs_section_ptr;
4009 while (list-- != input_list);
4010
4011 for (section = output_bfd->sections;
4012 section != NULL;
4013 section = section->next)
4014 {
4015 if ((section->flags & SEC_CODE) != 0)
4016 input_list[section->index] = NULL;
4017 }
4018
4019 return 1;
4020 }
4021
4022 /* The linker repeatedly calls this function for each input section,
4023 in the order that input sections are linked into output sections.
4024 Build lists of input sections to determine groupings between which
4025 we may insert linker stubs. */
4026
4027 void
4028 elf32_arm_next_input_section (struct bfd_link_info *info,
4029 asection *isec)
4030 {
4031 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4032
4033 if (htab == NULL)
4034 return;
4035
4036 if (isec->output_section->index <= htab->top_index)
4037 {
4038 asection **list = htab->input_list + isec->output_section->index;
4039
4040 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4041 {
4042 /* Steal the link_sec pointer for our list. */
4043 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4044 /* This happens to make the list in reverse order,
4045 which we reverse later. */
4046 PREV_SEC (isec) = *list;
4047 *list = isec;
4048 }
4049 }
4050 }
4051
4052 /* See whether we can group stub sections together. Grouping stub
4053 sections may result in fewer stubs. More importantly, we need to
4054 put all .init* and .fini* stubs at the end of the .init or
4055 .fini output sections respectively, because glibc splits the
4056 _init and _fini functions into multiple parts. Putting a stub in
4057 the middle of a function is not a good idea. */
4058
4059 static void
4060 group_sections (struct elf32_arm_link_hash_table *htab,
4061 bfd_size_type stub_group_size,
4062 bfd_boolean stubs_always_after_branch)
4063 {
4064 asection **list = htab->input_list;
4065
4066 do
4067 {
4068 asection *tail = *list;
4069 asection *head;
4070
4071 if (tail == bfd_abs_section_ptr)
4072 continue;
4073
4074 /* Reverse the list: we must avoid placing stubs at the
4075 beginning of the section because the beginning of the text
4076 section may be required for an interrupt vector in bare metal
4077 code. */
4078 #define NEXT_SEC PREV_SEC
4079 head = NULL;
4080 while (tail != NULL)
4081 {
4082 /* Pop from tail. */
4083 asection *item = tail;
4084 tail = PREV_SEC (item);
4085
4086 /* Push on head. */
4087 NEXT_SEC (item) = head;
4088 head = item;
4089 }
4090
4091 while (head != NULL)
4092 {
4093 asection *curr;
4094 asection *next;
4095 bfd_vma stub_group_start = head->output_offset;
4096 bfd_vma end_of_next;
4097
4098 curr = head;
4099 while (NEXT_SEC (curr) != NULL)
4100 {
4101 next = NEXT_SEC (curr);
4102 end_of_next = next->output_offset + next->size;
4103 if (end_of_next - stub_group_start >= stub_group_size)
4104 /* End of NEXT is too far from start, so stop. */
4105 break;
4106 /* Add NEXT to the group. */
4107 curr = next;
4108 }
4109
4110 /* OK, the size from the start to the start of CURR is less
4111 than stub_group_size and thus can be handled by one stub
4112 section. (Or the head section is itself larger than
4113 stub_group_size, in which case we may be toast.)
4114 We should really be keeping track of the total size of
4115 stubs added here, as stubs contribute to the final output
4116 section size. */
4117 do
4118 {
4119 next = NEXT_SEC (head);
4120 /* Set up this stub group. */
4121 htab->stub_group[head->id].link_sec = curr;
4122 }
4123 while (head != curr && (head = next) != NULL);
4124
4125 /* But wait, there's more! Input sections up to stub_group_size
4126 bytes after the stub section can be handled by it too. */
4127 if (!stubs_always_after_branch)
4128 {
4129 stub_group_start = curr->output_offset + curr->size;
4130
4131 while (next != NULL)
4132 {
4133 end_of_next = next->output_offset + next->size;
4134 if (end_of_next - stub_group_start >= stub_group_size)
4135 /* End of NEXT is too far from stubs, so stop. */
4136 break;
4137 /* Add NEXT to the stub group. */
4138 head = next;
4139 next = NEXT_SEC (head);
4140 htab->stub_group[head->id].link_sec = curr;
4141 }
4142 }
4143 head = next;
4144 }
4145 }
4146 while (list++ != htab->input_list + htab->top_index);
4147
4148 free (htab->input_list);
4149 #undef PREV_SEC
4150 #undef NEXT_SEC
4151 }
4152
4153 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4154 erratum fix. */
4155
4156 static int
4157 a8_reloc_compare (const void *a, const void *b)
4158 {
4159 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4160 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4161
4162 if (ra->from < rb->from)
4163 return -1;
4164 else if (ra->from > rb->from)
4165 return 1;
4166 else
4167 return 0;
4168 }
4169
4170 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4171 const char *, char **);
4172
4173 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4174 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4175 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4176 otherwise. */
4177
4178 static bfd_boolean
4179 cortex_a8_erratum_scan (bfd *input_bfd,
4180 struct bfd_link_info *info,
4181 struct a8_erratum_fix **a8_fixes_p,
4182 unsigned int *num_a8_fixes_p,
4183 unsigned int *a8_fix_table_size_p,
4184 struct a8_erratum_reloc *a8_relocs,
4185 unsigned int num_a8_relocs,
4186 unsigned prev_num_a8_fixes,
4187 bfd_boolean *stub_changed_p)
4188 {
4189 asection *section;
4190 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4191 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4192 unsigned int num_a8_fixes = *num_a8_fixes_p;
4193 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4194
4195 if (htab == NULL)
4196 return FALSE;
4197
4198 for (section = input_bfd->sections;
4199 section != NULL;
4200 section = section->next)
4201 {
4202 bfd_byte *contents = NULL;
4203 struct _arm_elf_section_data *sec_data;
4204 unsigned int span;
4205 bfd_vma base_vma;
4206
4207 if (elf_section_type (section) != SHT_PROGBITS
4208 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4209 || (section->flags & SEC_EXCLUDE) != 0
4210 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
4211 || (section->output_section == bfd_abs_section_ptr))
4212 continue;
4213
4214 base_vma = section->output_section->vma + section->output_offset;
4215
4216 if (elf_section_data (section)->this_hdr.contents != NULL)
4217 contents = elf_section_data (section)->this_hdr.contents;
4218 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4219 return TRUE;
4220
4221 sec_data = elf32_arm_section_data (section);
4222
4223 for (span = 0; span < sec_data->mapcount; span++)
4224 {
4225 unsigned int span_start = sec_data->map[span].vma;
4226 unsigned int span_end = (span == sec_data->mapcount - 1)
4227 ? section->size : sec_data->map[span + 1].vma;
4228 unsigned int i;
4229 char span_type = sec_data->map[span].type;
4230 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4231
4232 if (span_type != 't')
4233 continue;
4234
4235 /* Span is entirely within a single 4KB region: skip scanning. */
4236 if (((base_vma + span_start) & ~0xfff)
4237 == ((base_vma + span_end) & ~0xfff))
4238 continue;
4239
4240 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4241
4242 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4243 * The branch target is in the same 4KB region as the
4244 first half of the branch.
4245 * The instruction before the branch is a 32-bit
4246 length non-branch instruction. */
4247 for (i = span_start; i < span_end;)
4248 {
4249 unsigned int insn = bfd_getl16 (&contents[i]);
4250 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4251 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4252
4253 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4254 insn_32bit = TRUE;
4255
4256 if (insn_32bit)
4257 {
4258 /* Load the rest of the insn (in manual-friendly order). */
4259 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4260
4261 /* Encoding T4: B<c>.W. */
4262 is_b = (insn & 0xf800d000) == 0xf0009000;
4263 /* Encoding T1: BL<c>.W. */
4264 is_bl = (insn & 0xf800d000) == 0xf000d000;
4265 /* Encoding T2: BLX<c>.W. */
4266 is_blx = (insn & 0xf800d000) == 0xf000c000;
4267 /* Encoding T3: B<c>.W (not permitted in IT block). */
4268 is_bcc = (insn & 0xf800d000) == 0xf0008000
4269 && (insn & 0x07f00000) != 0x03800000;
4270 }
4271
4272 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4273
4274 if (((base_vma + i) & 0xfff) == 0xffe
4275 && insn_32bit
4276 && is_32bit_branch
4277 && last_was_32bit
4278 && ! last_was_branch)
4279 {
4280 bfd_signed_vma offset = 0;
4281 bfd_boolean force_target_arm = FALSE;
4282 bfd_boolean force_target_thumb = FALSE;
4283 bfd_vma target;
4284 enum elf32_arm_stub_type stub_type = arm_stub_none;
4285 struct a8_erratum_reloc key, *found;
4286
4287 key.from = base_vma + i;
4288 found = (struct a8_erratum_reloc *)
4289 bsearch (&key, a8_relocs, num_a8_relocs,
4290 sizeof (struct a8_erratum_reloc),
4291 &a8_reloc_compare);
4292
4293 if (found)
4294 {
4295 char *error_message = NULL;
4296 struct elf_link_hash_entry *entry;
4297 bfd_boolean use_plt = FALSE;
4298
4299 /* We don't care about the error returned from this
4300 function, only if there is glue or not. */
4301 entry = find_thumb_glue (info, found->sym_name,
4302 &error_message);
4303
4304 if (entry)
4305 found->non_a8_stub = TRUE;
4306
4307 /* Keep a simpler condition, for the sake of clarity. */
4308 if (htab->root.splt != NULL && found->hash != NULL
4309 && found->hash->root.plt.offset != (bfd_vma) -1)
4310 use_plt = TRUE;
4311
4312 if (found->r_type == R_ARM_THM_CALL)
4313 {
4314 if (found->st_type != STT_ARM_TFUNC || use_plt)
4315 force_target_arm = TRUE;
4316 else
4317 force_target_thumb = TRUE;
4318 }
4319 }
4320
4321 /* Check if we have an offending branch instruction. */
4322
4323 if (found && found->non_a8_stub)
4324 /* We've already made a stub for this instruction, e.g.
4325 it's a long branch or a Thumb->ARM stub. Assume that
4326 stub will suffice to work around the A8 erratum (see
4327 setting of always_after_branch above). */
4328 ;
4329 else if (is_bcc)
4330 {
4331 offset = (insn & 0x7ff) << 1;
4332 offset |= (insn & 0x3f0000) >> 4;
4333 offset |= (insn & 0x2000) ? 0x40000 : 0;
4334 offset |= (insn & 0x800) ? 0x80000 : 0;
4335 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4336 if (offset & 0x100000)
4337 offset |= ~ ((bfd_signed_vma) 0xfffff);
4338 stub_type = arm_stub_a8_veneer_b_cond;
4339 }
4340 else if (is_b || is_bl || is_blx)
4341 {
4342 int s = (insn & 0x4000000) != 0;
4343 int j1 = (insn & 0x2000) != 0;
4344 int j2 = (insn & 0x800) != 0;
4345 int i1 = !(j1 ^ s);
4346 int i2 = !(j2 ^ s);
4347
4348 offset = (insn & 0x7ff) << 1;
4349 offset |= (insn & 0x3ff0000) >> 4;
4350 offset |= i2 << 22;
4351 offset |= i1 << 23;
4352 offset |= s << 24;
4353 if (offset & 0x1000000)
4354 offset |= ~ ((bfd_signed_vma) 0xffffff);
4355
4356 if (is_blx)
4357 offset &= ~ ((bfd_signed_vma) 3);
4358
4359 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4360 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4361 }
4362
4363 if (stub_type != arm_stub_none)
4364 {
4365 bfd_vma pc_for_insn = base_vma + i + 4;
4366
4367 /* The original instruction is a BL, but the target is
4368 an ARM instruction. If we were not making a stub,
4369 the BL would have been converted to a BLX. Use the
4370 BLX stub instead in that case. */
4371 if (htab->use_blx && force_target_arm
4372 && stub_type == arm_stub_a8_veneer_bl)
4373 {
4374 stub_type = arm_stub_a8_veneer_blx;
4375 is_blx = TRUE;
4376 is_bl = FALSE;
4377 }
4378 /* Conversely, if the original instruction was
4379 BLX but the target is Thumb mode, use the BL
4380 stub. */
4381 else if (force_target_thumb
4382 && stub_type == arm_stub_a8_veneer_blx)
4383 {
4384 stub_type = arm_stub_a8_veneer_bl;
4385 is_blx = FALSE;
4386 is_bl = TRUE;
4387 }
4388
4389 if (is_blx)
4390 pc_for_insn &= ~ ((bfd_vma) 3);
4391
4392 /* If we found a relocation, use the proper destination,
4393 not the offset in the (unrelocated) instruction.
4394 Note this is always done if we switched the stub type
4395 above. */
4396 if (found)
4397 offset =
4398 (bfd_signed_vma) (found->destination - pc_for_insn);
4399
4400 target = pc_for_insn + offset;
4401
4402 /* The BLX stub is ARM-mode code. Adjust the offset to
4403 take the different PC value (+8 instead of +4) into
4404 account. */
4405 if (stub_type == arm_stub_a8_veneer_blx)
4406 offset += 4;
4407
4408 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4409 {
4410 char *stub_name = NULL;
4411
4412 if (num_a8_fixes == a8_fix_table_size)
4413 {
4414 a8_fix_table_size *= 2;
4415 a8_fixes = (struct a8_erratum_fix *)
4416 bfd_realloc (a8_fixes,
4417 sizeof (struct a8_erratum_fix)
4418 * a8_fix_table_size);
4419 }
4420
4421 if (num_a8_fixes < prev_num_a8_fixes)
4422 {
4423 /* If we're doing a subsequent scan,
4424 check if we've found the same fix as
4425 before, and try and reuse the stub
4426 name. */
4427 stub_name = a8_fixes[num_a8_fixes].stub_name;
4428 if ((a8_fixes[num_a8_fixes].section != section)
4429 || (a8_fixes[num_a8_fixes].offset != i))
4430 {
4431 free (stub_name);
4432 stub_name = NULL;
4433 *stub_changed_p = TRUE;
4434 }
4435 }
4436
4437 if (!stub_name)
4438 {
4439 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
4440 if (stub_name != NULL)
4441 sprintf (stub_name, "%x:%x", section->id, i);
4442 }
4443
4444 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4445 a8_fixes[num_a8_fixes].section = section;
4446 a8_fixes[num_a8_fixes].offset = i;
4447 a8_fixes[num_a8_fixes].addend = offset;
4448 a8_fixes[num_a8_fixes].orig_insn = insn;
4449 a8_fixes[num_a8_fixes].stub_name = stub_name;
4450 a8_fixes[num_a8_fixes].stub_type = stub_type;
4451 a8_fixes[num_a8_fixes].st_type =
4452 is_blx ? STT_FUNC : STT_ARM_TFUNC;
4453
4454 num_a8_fixes++;
4455 }
4456 }
4457 }
4458
4459 i += insn_32bit ? 4 : 2;
4460 last_was_32bit = insn_32bit;
4461 last_was_branch = is_32bit_branch;
4462 }
4463 }
4464
4465 if (elf_section_data (section)->this_hdr.contents == NULL)
4466 free (contents);
4467 }
4468
4469 *a8_fixes_p = a8_fixes;
4470 *num_a8_fixes_p = num_a8_fixes;
4471 *a8_fix_table_size_p = a8_fix_table_size;
4472
4473 return FALSE;
4474 }
4475
4476 /* Determine and set the size of the stub section for a final link.
4477
4478 The basic idea here is to examine all the relocations looking for
4479 PC-relative calls to a target that is unreachable with a "bl"
4480 instruction. */
4481
4482 bfd_boolean
4483 elf32_arm_size_stubs (bfd *output_bfd,
4484 bfd *stub_bfd,
4485 struct bfd_link_info *info,
4486 bfd_signed_vma group_size,
4487 asection * (*add_stub_section) (const char *, asection *),
4488 void (*layout_sections_again) (void))
4489 {
4490 bfd_size_type stub_group_size;
4491 bfd_boolean stubs_always_after_branch;
4492 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4493 struct a8_erratum_fix *a8_fixes = NULL;
4494 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
4495 struct a8_erratum_reloc *a8_relocs = NULL;
4496 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4497
4498 if (htab == NULL)
4499 return FALSE;
4500
4501 if (htab->fix_cortex_a8)
4502 {
4503 a8_fixes = (struct a8_erratum_fix *)
4504 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4505 a8_relocs = (struct a8_erratum_reloc *)
4506 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
4507 }
4508
4509 /* Propagate mach to stub bfd, because it may not have been
4510 finalized when we created stub_bfd. */
4511 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4512 bfd_get_mach (output_bfd));
4513
4514 /* Stash our params away. */
4515 htab->stub_bfd = stub_bfd;
4516 htab->add_stub_section = add_stub_section;
4517 htab->layout_sections_again = layout_sections_again;
4518 stubs_always_after_branch = group_size < 0;
4519
4520 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4521 as the first half of a 32-bit branch straddling two 4K pages. This is a
4522 crude way of enforcing that. */
4523 if (htab->fix_cortex_a8)
4524 stubs_always_after_branch = 1;
4525
4526 if (group_size < 0)
4527 stub_group_size = -group_size;
4528 else
4529 stub_group_size = group_size;
4530
4531 if (stub_group_size == 1)
4532 {
4533 /* Default values. */
4534 /* Thumb branch range is +-4MB has to be used as the default
4535 maximum size (a given section can contain both ARM and Thumb
4536 code, so the worst case has to be taken into account).
4537
4538 This value is 24K less than that, which allows for 2025
4539 12-byte stubs. If we exceed that, then we will fail to link.
4540 The user will have to relink with an explicit group size
4541 option. */
4542 stub_group_size = 4170000;
4543 }
4544
4545 group_sections (htab, stub_group_size, stubs_always_after_branch);
4546
4547 /* If we're applying the cortex A8 fix, we need to determine the
4548 program header size now, because we cannot change it later --
4549 that could alter section placements. Notice the A8 erratum fix
4550 ends up requiring the section addresses to remain unchanged
4551 modulo the page size. That's something we cannot represent
4552 inside BFD, and we don't want to force the section alignment to
4553 be the page size. */
4554 if (htab->fix_cortex_a8)
4555 (*htab->layout_sections_again) ();
4556
4557 while (1)
4558 {
4559 bfd *input_bfd;
4560 unsigned int bfd_indx;
4561 asection *stub_sec;
4562 bfd_boolean stub_changed = FALSE;
4563 unsigned prev_num_a8_fixes = num_a8_fixes;
4564
4565 num_a8_fixes = 0;
4566 for (input_bfd = info->input_bfds, bfd_indx = 0;
4567 input_bfd != NULL;
4568 input_bfd = input_bfd->link_next, bfd_indx++)
4569 {
4570 Elf_Internal_Shdr *symtab_hdr;
4571 asection *section;
4572 Elf_Internal_Sym *local_syms = NULL;
4573
4574 num_a8_relocs = 0;
4575
4576 /* We'll need the symbol table in a second. */
4577 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4578 if (symtab_hdr->sh_info == 0)
4579 continue;
4580
4581 /* Walk over each section attached to the input bfd. */
4582 for (section = input_bfd->sections;
4583 section != NULL;
4584 section = section->next)
4585 {
4586 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4587
4588 /* If there aren't any relocs, then there's nothing more
4589 to do. */
4590 if ((section->flags & SEC_RELOC) == 0
4591 || section->reloc_count == 0
4592 || (section->flags & SEC_CODE) == 0)
4593 continue;
4594
4595 /* If this section is a link-once section that will be
4596 discarded, then don't create any stubs. */
4597 if (section->output_section == NULL
4598 || section->output_section->owner != output_bfd)
4599 continue;
4600
4601 /* Get the relocs. */
4602 internal_relocs
4603 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4604 NULL, info->keep_memory);
4605 if (internal_relocs == NULL)
4606 goto error_ret_free_local;
4607
4608 /* Now examine each relocation. */
4609 irela = internal_relocs;
4610 irelaend = irela + section->reloc_count;
4611 for (; irela < irelaend; irela++)
4612 {
4613 unsigned int r_type, r_indx;
4614 enum elf32_arm_stub_type stub_type;
4615 struct elf32_arm_stub_hash_entry *stub_entry;
4616 asection *sym_sec;
4617 bfd_vma sym_value;
4618 bfd_vma destination;
4619 struct elf32_arm_link_hash_entry *hash;
4620 const char *sym_name;
4621 char *stub_name;
4622 const asection *id_sec;
4623 int st_type;
4624 bfd_boolean created_stub = FALSE;
4625
4626 r_type = ELF32_R_TYPE (irela->r_info);
4627 r_indx = ELF32_R_SYM (irela->r_info);
4628
4629 if (r_type >= (unsigned int) R_ARM_max)
4630 {
4631 bfd_set_error (bfd_error_bad_value);
4632 error_ret_free_internal:
4633 if (elf_section_data (section)->relocs == NULL)
4634 free (internal_relocs);
4635 goto error_ret_free_local;
4636 }
4637
4638 hash = NULL;
4639 if (r_indx >= symtab_hdr->sh_info)
4640 hash = elf32_arm_hash_entry
4641 (elf_sym_hashes (input_bfd)
4642 [r_indx - symtab_hdr->sh_info]);
4643
4644 /* Only look for stubs on branch instructions, or
4645 non-relaxed TLSCALL */
4646 if ((r_type != (unsigned int) R_ARM_CALL)
4647 && (r_type != (unsigned int) R_ARM_THM_CALL)
4648 && (r_type != (unsigned int) R_ARM_JUMP24)
4649 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4650 && (r_type != (unsigned int) R_ARM_THM_XPC22)
4651 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4652 && (r_type != (unsigned int) R_ARM_PLT32)
4653 && !((r_type == (unsigned int) R_ARM_TLS_CALL
4654 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
4655 && r_type == elf32_arm_tls_transition
4656 (info, r_type, &hash->root)
4657 && ((hash ? hash->tls_type
4658 : (elf32_arm_local_got_tls_type
4659 (input_bfd)[r_indx]))
4660 & GOT_TLS_GDESC) != 0))
4661 continue;
4662
4663 /* Now determine the call target, its name, value,
4664 section. */
4665 sym_sec = NULL;
4666 sym_value = 0;
4667 destination = 0;
4668 sym_name = NULL;
4669
4670 if (r_type == (unsigned int) R_ARM_TLS_CALL
4671 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
4672 {
4673 /* A non-relaxed TLS call. The target is the
4674 plt-resident trampoline and nothing to do
4675 with the symbol. */
4676 BFD_ASSERT (htab->tls_trampoline > 0);
4677 sym_sec = htab->root.splt;
4678 sym_value = htab->tls_trampoline;
4679 hash = 0;
4680 st_type = STT_FUNC;
4681 }
4682 else if (!hash)
4683 {
4684 /* It's a local symbol. */
4685 Elf_Internal_Sym *sym;
4686
4687 if (local_syms == NULL)
4688 {
4689 local_syms
4690 = (Elf_Internal_Sym *) symtab_hdr->contents;
4691 if (local_syms == NULL)
4692 local_syms
4693 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4694 symtab_hdr->sh_info, 0,
4695 NULL, NULL, NULL);
4696 if (local_syms == NULL)
4697 goto error_ret_free_internal;
4698 }
4699
4700 sym = local_syms + r_indx;
4701 if (sym->st_shndx == SHN_UNDEF)
4702 sym_sec = bfd_und_section_ptr;
4703 else if (sym->st_shndx == SHN_ABS)
4704 sym_sec = bfd_abs_section_ptr;
4705 else if (sym->st_shndx == SHN_COMMON)
4706 sym_sec = bfd_com_section_ptr;
4707 else
4708 sym_sec =
4709 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
4710
4711 if (!sym_sec)
4712 /* This is an undefined symbol. It can never
4713 be resolved. */
4714 continue;
4715
4716 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4717 sym_value = sym->st_value;
4718 destination = (sym_value + irela->r_addend
4719 + sym_sec->output_offset
4720 + sym_sec->output_section->vma);
4721 st_type = ELF_ST_TYPE (sym->st_info);
4722 sym_name
4723 = bfd_elf_string_from_elf_section (input_bfd,
4724 symtab_hdr->sh_link,
4725 sym->st_name);
4726 }
4727 else
4728 {
4729 /* It's an external symbol. */
4730 while (hash->root.root.type == bfd_link_hash_indirect
4731 || hash->root.root.type == bfd_link_hash_warning)
4732 hash = ((struct elf32_arm_link_hash_entry *)
4733 hash->root.root.u.i.link);
4734
4735 if (hash->root.root.type == bfd_link_hash_defined
4736 || hash->root.root.type == bfd_link_hash_defweak)
4737 {
4738 sym_sec = hash->root.root.u.def.section;
4739 sym_value = hash->root.root.u.def.value;
4740
4741 struct elf32_arm_link_hash_table *globals =
4742 elf32_arm_hash_table (info);
4743
4744 /* For a destination in a shared library,
4745 use the PLT stub as target address to
4746 decide whether a branch stub is
4747 needed. */
4748 if (globals != NULL
4749 && globals->root.splt != NULL
4750 && hash != NULL
4751 && hash->root.plt.offset != (bfd_vma) -1)
4752 {
4753 sym_sec = globals->root.splt;
4754 sym_value = hash->root.plt.offset;
4755 if (sym_sec->output_section != NULL)
4756 destination = (sym_value
4757 + sym_sec->output_offset
4758 + sym_sec->output_section->vma);
4759 }
4760 else if (sym_sec->output_section != NULL)
4761 destination = (sym_value + irela->r_addend
4762 + sym_sec->output_offset
4763 + sym_sec->output_section->vma);
4764 }
4765 else if ((hash->root.root.type == bfd_link_hash_undefined)
4766 || (hash->root.root.type == bfd_link_hash_undefweak))
4767 {
4768 /* For a shared library, use the PLT stub as
4769 target address to decide whether a long
4770 branch stub is needed.
4771 For absolute code, they cannot be handled. */
4772 struct elf32_arm_link_hash_table *globals =
4773 elf32_arm_hash_table (info);
4774
4775 if (globals != NULL
4776 && globals->root.splt != NULL
4777 && hash != NULL
4778 && hash->root.plt.offset != (bfd_vma) -1)
4779 {
4780 sym_sec = globals->root.splt;
4781 sym_value = hash->root.plt.offset;
4782 if (sym_sec->output_section != NULL)
4783 destination = (sym_value
4784 + sym_sec->output_offset
4785 + sym_sec->output_section->vma);
4786 }
4787 else
4788 continue;
4789 }
4790 else
4791 {
4792 bfd_set_error (bfd_error_bad_value);
4793 goto error_ret_free_internal;
4794 }
4795 st_type = ELF_ST_TYPE (hash->root.type);
4796 sym_name = hash->root.root.root.string;
4797 }
4798
4799 do
4800 {
4801 /* Determine what (if any) linker stub is needed. */
4802 stub_type = arm_type_of_stub (info, section, irela,
4803 &st_type, hash,
4804 destination, sym_sec,
4805 input_bfd, sym_name);
4806 if (stub_type == arm_stub_none)
4807 break;
4808
4809 /* Support for grouping stub sections. */
4810 id_sec = htab->stub_group[section->id].link_sec;
4811
4812 /* Get the name of this stub. */
4813 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
4814 irela, stub_type);
4815 if (!stub_name)
4816 goto error_ret_free_internal;
4817
4818 /* We've either created a stub for this reloc already,
4819 or we are about to. */
4820 created_stub = TRUE;
4821
4822 stub_entry = arm_stub_hash_lookup
4823 (&htab->stub_hash_table, stub_name,
4824 FALSE, FALSE);
4825 if (stub_entry != NULL)
4826 {
4827 /* The proper stub has already been created. */
4828 free (stub_name);
4829 stub_entry->target_value = sym_value;
4830 break;
4831 }
4832
4833 stub_entry = elf32_arm_add_stub (stub_name, section,
4834 htab);
4835 if (stub_entry == NULL)
4836 {
4837 free (stub_name);
4838 goto error_ret_free_internal;
4839 }
4840
4841 stub_entry->target_value = sym_value;
4842 stub_entry->target_section = sym_sec;
4843 stub_entry->stub_type = stub_type;
4844 stub_entry->h = hash;
4845 stub_entry->st_type = st_type;
4846
4847 if (sym_name == NULL)
4848 sym_name = "unnamed";
4849 stub_entry->output_name = (char *)
4850 bfd_alloc (htab->stub_bfd,
4851 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4852 + strlen (sym_name));
4853 if (stub_entry->output_name == NULL)
4854 {
4855 free (stub_name);
4856 goto error_ret_free_internal;
4857 }
4858
4859 /* For historical reasons, use the existing names for
4860 ARM-to-Thumb and Thumb-to-ARM stubs. */
4861 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4862 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4863 && st_type != STT_ARM_TFUNC)
4864 sprintf (stub_entry->output_name,
4865 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4866 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4867 || (r_type == (unsigned int) R_ARM_JUMP24))
4868 && st_type == STT_ARM_TFUNC)
4869 sprintf (stub_entry->output_name,
4870 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4871 else
4872 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4873 sym_name);
4874
4875 stub_changed = TRUE;
4876 }
4877 while (0);
4878
4879 /* Look for relocations which might trigger Cortex-A8
4880 erratum. */
4881 if (htab->fix_cortex_a8
4882 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4883 || r_type == (unsigned int) R_ARM_THM_JUMP19
4884 || r_type == (unsigned int) R_ARM_THM_CALL
4885 || r_type == (unsigned int) R_ARM_THM_XPC22))
4886 {
4887 bfd_vma from = section->output_section->vma
4888 + section->output_offset
4889 + irela->r_offset;
4890
4891 if ((from & 0xfff) == 0xffe)
4892 {
4893 /* Found a candidate. Note we haven't checked the
4894 destination is within 4K here: if we do so (and
4895 don't create an entry in a8_relocs) we can't tell
4896 that a branch should have been relocated when
4897 scanning later. */
4898 if (num_a8_relocs == a8_reloc_table_size)
4899 {
4900 a8_reloc_table_size *= 2;
4901 a8_relocs = (struct a8_erratum_reloc *)
4902 bfd_realloc (a8_relocs,
4903 sizeof (struct a8_erratum_reloc)
4904 * a8_reloc_table_size);
4905 }
4906
4907 a8_relocs[num_a8_relocs].from = from;
4908 a8_relocs[num_a8_relocs].destination = destination;
4909 a8_relocs[num_a8_relocs].r_type = r_type;
4910 a8_relocs[num_a8_relocs].st_type = st_type;
4911 a8_relocs[num_a8_relocs].sym_name = sym_name;
4912 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
4913 a8_relocs[num_a8_relocs].hash = hash;
4914
4915 num_a8_relocs++;
4916 }
4917 }
4918 }
4919
4920 /* We're done with the internal relocs, free them. */
4921 if (elf_section_data (section)->relocs == NULL)
4922 free (internal_relocs);
4923 }
4924
4925 if (htab->fix_cortex_a8)
4926 {
4927 /* Sort relocs which might apply to Cortex-A8 erratum. */
4928 qsort (a8_relocs, num_a8_relocs,
4929 sizeof (struct a8_erratum_reloc),
4930 &a8_reloc_compare);
4931
4932 /* Scan for branches which might trigger Cortex-A8 erratum. */
4933 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4934 &num_a8_fixes, &a8_fix_table_size,
4935 a8_relocs, num_a8_relocs,
4936 prev_num_a8_fixes, &stub_changed)
4937 != 0)
4938 goto error_ret_free_local;
4939 }
4940 }
4941
4942 if (prev_num_a8_fixes != num_a8_fixes)
4943 stub_changed = TRUE;
4944
4945 if (!stub_changed)
4946 break;
4947
4948 /* OK, we've added some stubs. Find out the new size of the
4949 stub sections. */
4950 for (stub_sec = htab->stub_bfd->sections;
4951 stub_sec != NULL;
4952 stub_sec = stub_sec->next)
4953 {
4954 /* Ignore non-stub sections. */
4955 if (!strstr (stub_sec->name, STUB_SUFFIX))
4956 continue;
4957
4958 stub_sec->size = 0;
4959 }
4960
4961 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4962
4963 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4964 if (htab->fix_cortex_a8)
4965 for (i = 0; i < num_a8_fixes; i++)
4966 {
4967 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4968 a8_fixes[i].section, htab);
4969
4970 if (stub_sec == NULL)
4971 goto error_ret_free_local;
4972
4973 stub_sec->size
4974 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4975 NULL);
4976 }
4977
4978
4979 /* Ask the linker to do its stuff. */
4980 (*htab->layout_sections_again) ();
4981 }
4982
4983 /* Add stubs for Cortex-A8 erratum fixes now. */
4984 if (htab->fix_cortex_a8)
4985 {
4986 for (i = 0; i < num_a8_fixes; i++)
4987 {
4988 struct elf32_arm_stub_hash_entry *stub_entry;
4989 char *stub_name = a8_fixes[i].stub_name;
4990 asection *section = a8_fixes[i].section;
4991 unsigned int section_id = a8_fixes[i].section->id;
4992 asection *link_sec = htab->stub_group[section_id].link_sec;
4993 asection *stub_sec = htab->stub_group[section_id].stub_sec;
4994 const insn_sequence *template_sequence;
4995 int template_size, size = 0;
4996
4997 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4998 TRUE, FALSE);
4999 if (stub_entry == NULL)
5000 {
5001 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5002 section->owner,
5003 stub_name);
5004 return FALSE;
5005 }
5006
5007 stub_entry->stub_sec = stub_sec;
5008 stub_entry->stub_offset = 0;
5009 stub_entry->id_sec = link_sec;
5010 stub_entry->stub_type = a8_fixes[i].stub_type;
5011 stub_entry->target_section = a8_fixes[i].section;
5012 stub_entry->target_value = a8_fixes[i].offset;
5013 stub_entry->target_addend = a8_fixes[i].addend;
5014 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5015 stub_entry->st_type = a8_fixes[i].st_type;
5016
5017 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5018 &template_sequence,
5019 &template_size);
5020
5021 stub_entry->stub_size = size;
5022 stub_entry->stub_template = template_sequence;
5023 stub_entry->stub_template_size = template_size;
5024 }
5025
5026 /* Stash the Cortex-A8 erratum fix array for use later in
5027 elf32_arm_write_section(). */
5028 htab->a8_erratum_fixes = a8_fixes;
5029 htab->num_a8_erratum_fixes = num_a8_fixes;
5030 }
5031 else
5032 {
5033 htab->a8_erratum_fixes = NULL;
5034 htab->num_a8_erratum_fixes = 0;
5035 }
5036 return TRUE;
5037
5038 error_ret_free_local:
5039 return FALSE;
5040 }
5041
5042 /* Build all the stubs associated with the current output file. The
5043 stubs are kept in a hash table attached to the main linker hash
5044 table. We also set up the .plt entries for statically linked PIC
5045 functions here. This function is called via arm_elf_finish in the
5046 linker. */
5047
5048 bfd_boolean
5049 elf32_arm_build_stubs (struct bfd_link_info *info)
5050 {
5051 asection *stub_sec;
5052 struct bfd_hash_table *table;
5053 struct elf32_arm_link_hash_table *htab;
5054
5055 htab = elf32_arm_hash_table (info);
5056 if (htab == NULL)
5057 return FALSE;
5058
5059 for (stub_sec = htab->stub_bfd->sections;
5060 stub_sec != NULL;
5061 stub_sec = stub_sec->next)
5062 {
5063 bfd_size_type size;
5064
5065 /* Ignore non-stub sections. */
5066 if (!strstr (stub_sec->name, STUB_SUFFIX))
5067 continue;
5068
5069 /* Allocate memory to hold the linker stubs. */
5070 size = stub_sec->size;
5071 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5072 if (stub_sec->contents == NULL && size != 0)
5073 return FALSE;
5074 stub_sec->size = 0;
5075 }
5076
5077 /* Build the stubs as directed by the stub hash table. */
5078 table = &htab->stub_hash_table;
5079 bfd_hash_traverse (table, arm_build_one_stub, info);
5080 if (htab->fix_cortex_a8)
5081 {
5082 /* Place the cortex a8 stubs last. */
5083 htab->fix_cortex_a8 = -1;
5084 bfd_hash_traverse (table, arm_build_one_stub, info);
5085 }
5086
5087 return TRUE;
5088 }
5089
5090 /* Locate the Thumb encoded calling stub for NAME. */
5091
5092 static struct elf_link_hash_entry *
5093 find_thumb_glue (struct bfd_link_info *link_info,
5094 const char *name,
5095 char **error_message)
5096 {
5097 char *tmp_name;
5098 struct elf_link_hash_entry *hash;
5099 struct elf32_arm_link_hash_table *hash_table;
5100
5101 /* We need a pointer to the armelf specific hash table. */
5102 hash_table = elf32_arm_hash_table (link_info);
5103 if (hash_table == NULL)
5104 return NULL;
5105
5106 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5107 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5108
5109 BFD_ASSERT (tmp_name);
5110
5111 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5112
5113 hash = elf_link_hash_lookup
5114 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5115
5116 if (hash == NULL
5117 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5118 tmp_name, name) == -1)
5119 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5120
5121 free (tmp_name);
5122
5123 return hash;
5124 }
5125
5126 /* Locate the ARM encoded calling stub for NAME. */
5127
5128 static struct elf_link_hash_entry *
5129 find_arm_glue (struct bfd_link_info *link_info,
5130 const char *name,
5131 char **error_message)
5132 {
5133 char *tmp_name;
5134 struct elf_link_hash_entry *myh;
5135 struct elf32_arm_link_hash_table *hash_table;
5136
5137 /* We need a pointer to the elfarm specific hash table. */
5138 hash_table = elf32_arm_hash_table (link_info);
5139 if (hash_table == NULL)
5140 return NULL;
5141
5142 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5143 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5144
5145 BFD_ASSERT (tmp_name);
5146
5147 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5148
5149 myh = elf_link_hash_lookup
5150 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5151
5152 if (myh == NULL
5153 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5154 tmp_name, name) == -1)
5155 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5156
5157 free (tmp_name);
5158
5159 return myh;
5160 }
5161
5162 /* ARM->Thumb glue (static images):
5163
5164 .arm
5165 __func_from_arm:
5166 ldr r12, __func_addr
5167 bx r12
5168 __func_addr:
5169 .word func @ behave as if you saw a ARM_32 reloc.
5170
5171 (v5t static images)
5172 .arm
5173 __func_from_arm:
5174 ldr pc, __func_addr
5175 __func_addr:
5176 .word func @ behave as if you saw a ARM_32 reloc.
5177
5178 (relocatable images)
5179 .arm
5180 __func_from_arm:
5181 ldr r12, __func_offset
5182 add r12, r12, pc
5183 bx r12
5184 __func_offset:
5185 .word func - . */
5186
5187 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5188 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5189 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5190 static const insn32 a2t3_func_addr_insn = 0x00000001;
5191
5192 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5193 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5194 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5195
5196 #define ARM2THUMB_PIC_GLUE_SIZE 16
5197 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5198 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5199 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5200
5201 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5202
5203 .thumb .thumb
5204 .align 2 .align 2
5205 __func_from_thumb: __func_from_thumb:
5206 bx pc push {r6, lr}
5207 nop ldr r6, __func_addr
5208 .arm mov lr, pc
5209 b func bx r6
5210 .arm
5211 ;; back_to_thumb
5212 ldmia r13! {r6, lr}
5213 bx lr
5214 __func_addr:
5215 .word func */
5216
5217 #define THUMB2ARM_GLUE_SIZE 8
5218 static const insn16 t2a1_bx_pc_insn = 0x4778;
5219 static const insn16 t2a2_noop_insn = 0x46c0;
5220 static const insn32 t2a3_b_insn = 0xea000000;
5221
5222 #define VFP11_ERRATUM_VENEER_SIZE 8
5223
5224 #define ARM_BX_VENEER_SIZE 12
5225 static const insn32 armbx1_tst_insn = 0xe3100001;
5226 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5227 static const insn32 armbx3_bx_insn = 0xe12fff10;
5228
5229 #ifndef ELFARM_NABI_C_INCLUDED
5230 static void
5231 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5232 {
5233 asection * s;
5234 bfd_byte * contents;
5235
5236 if (size == 0)
5237 {
5238 /* Do not include empty glue sections in the output. */
5239 if (abfd != NULL)
5240 {
5241 s = bfd_get_section_by_name (abfd, name);
5242 if (s != NULL)
5243 s->flags |= SEC_EXCLUDE;
5244 }
5245 return;
5246 }
5247
5248 BFD_ASSERT (abfd != NULL);
5249
5250 s = bfd_get_section_by_name (abfd, name);
5251 BFD_ASSERT (s != NULL);
5252
5253 contents = (bfd_byte *) bfd_alloc (abfd, size);
5254
5255 BFD_ASSERT (s->size == size);
5256 s->contents = contents;
5257 }
5258
5259 bfd_boolean
5260 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5261 {
5262 struct elf32_arm_link_hash_table * globals;
5263
5264 globals = elf32_arm_hash_table (info);
5265 BFD_ASSERT (globals != NULL);
5266
5267 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5268 globals->arm_glue_size,
5269 ARM2THUMB_GLUE_SECTION_NAME);
5270
5271 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5272 globals->thumb_glue_size,
5273 THUMB2ARM_GLUE_SECTION_NAME);
5274
5275 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5276 globals->vfp11_erratum_glue_size,
5277 VFP11_ERRATUM_VENEER_SECTION_NAME);
5278
5279 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5280 globals->bx_glue_size,
5281 ARM_BX_GLUE_SECTION_NAME);
5282
5283 return TRUE;
5284 }
5285
5286 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5287 returns the symbol identifying the stub. */
5288
5289 static struct elf_link_hash_entry *
5290 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5291 struct elf_link_hash_entry * h)
5292 {
5293 const char * name = h->root.root.string;
5294 asection * s;
5295 char * tmp_name;
5296 struct elf_link_hash_entry * myh;
5297 struct bfd_link_hash_entry * bh;
5298 struct elf32_arm_link_hash_table * globals;
5299 bfd_vma val;
5300 bfd_size_type size;
5301
5302 globals = elf32_arm_hash_table (link_info);
5303 BFD_ASSERT (globals != NULL);
5304 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5305
5306 s = bfd_get_section_by_name
5307 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5308
5309 BFD_ASSERT (s != NULL);
5310
5311 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5312 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5313
5314 BFD_ASSERT (tmp_name);
5315
5316 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5317
5318 myh = elf_link_hash_lookup
5319 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5320
5321 if (myh != NULL)
5322 {
5323 /* We've already seen this guy. */
5324 free (tmp_name);
5325 return myh;
5326 }
5327
5328 /* The only trick here is using hash_table->arm_glue_size as the value.
5329 Even though the section isn't allocated yet, this is where we will be
5330 putting it. The +1 on the value marks that the stub has not been
5331 output yet - not that it is a Thumb function. */
5332 bh = NULL;
5333 val = globals->arm_glue_size + 1;
5334 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5335 tmp_name, BSF_GLOBAL, s, val,
5336 NULL, TRUE, FALSE, &bh);
5337
5338 myh = (struct elf_link_hash_entry *) bh;
5339 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5340 myh->forced_local = 1;
5341
5342 free (tmp_name);
5343
5344 if (link_info->shared || globals->root.is_relocatable_executable
5345 || globals->pic_veneer)
5346 size = ARM2THUMB_PIC_GLUE_SIZE;
5347 else if (globals->use_blx)
5348 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
5349 else
5350 size = ARM2THUMB_STATIC_GLUE_SIZE;
5351
5352 s->size += size;
5353 globals->arm_glue_size += size;
5354
5355 return myh;
5356 }
5357
5358 /* Allocate space for ARMv4 BX veneers. */
5359
5360 static void
5361 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5362 {
5363 asection * s;
5364 struct elf32_arm_link_hash_table *globals;
5365 char *tmp_name;
5366 struct elf_link_hash_entry *myh;
5367 struct bfd_link_hash_entry *bh;
5368 bfd_vma val;
5369
5370 /* BX PC does not need a veneer. */
5371 if (reg == 15)
5372 return;
5373
5374 globals = elf32_arm_hash_table (link_info);
5375 BFD_ASSERT (globals != NULL);
5376 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5377
5378 /* Check if this veneer has already been allocated. */
5379 if (globals->bx_glue_offset[reg])
5380 return;
5381
5382 s = bfd_get_section_by_name
5383 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5384
5385 BFD_ASSERT (s != NULL);
5386
5387 /* Add symbol for veneer. */
5388 tmp_name = (char *)
5389 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
5390
5391 BFD_ASSERT (tmp_name);
5392
5393 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
5394
5395 myh = elf_link_hash_lookup
5396 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
5397
5398 BFD_ASSERT (myh == NULL);
5399
5400 bh = NULL;
5401 val = globals->bx_glue_size;
5402 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5403 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5404 NULL, TRUE, FALSE, &bh);
5405
5406 myh = (struct elf_link_hash_entry *) bh;
5407 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5408 myh->forced_local = 1;
5409
5410 s->size += ARM_BX_VENEER_SIZE;
5411 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5412 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5413 }
5414
5415
5416 /* Add an entry to the code/data map for section SEC. */
5417
5418 static void
5419 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5420 {
5421 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5422 unsigned int newidx;
5423
5424 if (sec_data->map == NULL)
5425 {
5426 sec_data->map = (elf32_arm_section_map *)
5427 bfd_malloc (sizeof (elf32_arm_section_map));
5428 sec_data->mapcount = 0;
5429 sec_data->mapsize = 1;
5430 }
5431
5432 newidx = sec_data->mapcount++;
5433
5434 if (sec_data->mapcount > sec_data->mapsize)
5435 {
5436 sec_data->mapsize *= 2;
5437 sec_data->map = (elf32_arm_section_map *)
5438 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5439 * sizeof (elf32_arm_section_map));
5440 }
5441
5442 if (sec_data->map)
5443 {
5444 sec_data->map[newidx].vma = vma;
5445 sec_data->map[newidx].type = type;
5446 }
5447 }
5448
5449
5450 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5451 veneers are handled for now. */
5452
5453 static bfd_vma
5454 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5455 elf32_vfp11_erratum_list *branch,
5456 bfd *branch_bfd,
5457 asection *branch_sec,
5458 unsigned int offset)
5459 {
5460 asection *s;
5461 struct elf32_arm_link_hash_table *hash_table;
5462 char *tmp_name;
5463 struct elf_link_hash_entry *myh;
5464 struct bfd_link_hash_entry *bh;
5465 bfd_vma val;
5466 struct _arm_elf_section_data *sec_data;
5467 elf32_vfp11_erratum_list *newerr;
5468
5469 hash_table = elf32_arm_hash_table (link_info);
5470 BFD_ASSERT (hash_table != NULL);
5471 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
5472
5473 s = bfd_get_section_by_name
5474 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
5475
5476 sec_data = elf32_arm_section_data (s);
5477
5478 BFD_ASSERT (s != NULL);
5479
5480 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5481 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
5482
5483 BFD_ASSERT (tmp_name);
5484
5485 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5486 hash_table->num_vfp11_fixes);
5487
5488 myh = elf_link_hash_lookup
5489 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5490
5491 BFD_ASSERT (myh == NULL);
5492
5493 bh = NULL;
5494 val = hash_table->vfp11_erratum_glue_size;
5495 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5496 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5497 NULL, TRUE, FALSE, &bh);
5498
5499 myh = (struct elf_link_hash_entry *) bh;
5500 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5501 myh->forced_local = 1;
5502
5503 /* Link veneer back to calling location. */
5504 sec_data->erratumcount += 1;
5505 newerr = (elf32_vfp11_erratum_list *)
5506 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5507
5508 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5509 newerr->vma = -1;
5510 newerr->u.v.branch = branch;
5511 newerr->u.v.id = hash_table->num_vfp11_fixes;
5512 branch->u.b.veneer = newerr;
5513
5514 newerr->next = sec_data->erratumlist;
5515 sec_data->erratumlist = newerr;
5516
5517 /* A symbol for the return from the veneer. */
5518 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5519 hash_table->num_vfp11_fixes);
5520
5521 myh = elf_link_hash_lookup
5522 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5523
5524 if (myh != NULL)
5525 abort ();
5526
5527 bh = NULL;
5528 val = offset + 4;
5529 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5530 branch_sec, val, NULL, TRUE, FALSE, &bh);
5531
5532 myh = (struct elf_link_hash_entry *) bh;
5533 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5534 myh->forced_local = 1;
5535
5536 free (tmp_name);
5537
5538 /* Generate a mapping symbol for the veneer section, and explicitly add an
5539 entry for that symbol to the code/data map for the section. */
5540 if (hash_table->vfp11_erratum_glue_size == 0)
5541 {
5542 bh = NULL;
5543 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5544 ever requires this erratum fix. */
5545 _bfd_generic_link_add_one_symbol (link_info,
5546 hash_table->bfd_of_glue_owner, "$a",
5547 BSF_LOCAL, s, 0, NULL,
5548 TRUE, FALSE, &bh);
5549
5550 myh = (struct elf_link_hash_entry *) bh;
5551 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5552 myh->forced_local = 1;
5553
5554 /* The elf32_arm_init_maps function only cares about symbols from input
5555 BFDs. We must make a note of this generated mapping symbol
5556 ourselves so that code byteswapping works properly in
5557 elf32_arm_write_section. */
5558 elf32_arm_section_map_add (s, 'a', 0);
5559 }
5560
5561 s->size += VFP11_ERRATUM_VENEER_SIZE;
5562 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5563 hash_table->num_vfp11_fixes++;
5564
5565 /* The offset of the veneer. */
5566 return val;
5567 }
5568
5569 #define ARM_GLUE_SECTION_FLAGS \
5570 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5571 | SEC_READONLY | SEC_LINKER_CREATED)
5572
5573 /* Create a fake section for use by the ARM backend of the linker. */
5574
5575 static bfd_boolean
5576 arm_make_glue_section (bfd * abfd, const char * name)
5577 {
5578 asection * sec;
5579
5580 sec = bfd_get_section_by_name (abfd, name);
5581 if (sec != NULL)
5582 /* Already made. */
5583 return TRUE;
5584
5585 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5586
5587 if (sec == NULL
5588 || !bfd_set_section_alignment (abfd, sec, 2))
5589 return FALSE;
5590
5591 /* Set the gc mark to prevent the section from being removed by garbage
5592 collection, despite the fact that no relocs refer to this section. */
5593 sec->gc_mark = 1;
5594
5595 return TRUE;
5596 }
5597
5598 /* Add the glue sections to ABFD. This function is called from the
5599 linker scripts in ld/emultempl/{armelf}.em. */
5600
5601 bfd_boolean
5602 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5603 struct bfd_link_info *info)
5604 {
5605 /* If we are only performing a partial
5606 link do not bother adding the glue. */
5607 if (info->relocatable)
5608 return TRUE;
5609
5610 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5611 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5612 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5613 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
5614 }
5615
5616 /* Select a BFD to be used to hold the sections used by the glue code.
5617 This function is called from the linker scripts in ld/emultempl/
5618 {armelf/pe}.em. */
5619
5620 bfd_boolean
5621 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
5622 {
5623 struct elf32_arm_link_hash_table *globals;
5624
5625 /* If we are only performing a partial link
5626 do not bother getting a bfd to hold the glue. */
5627 if (info->relocatable)
5628 return TRUE;
5629
5630 /* Make sure we don't attach the glue sections to a dynamic object. */
5631 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5632
5633 globals = elf32_arm_hash_table (info);
5634 BFD_ASSERT (globals != NULL);
5635
5636 if (globals->bfd_of_glue_owner != NULL)
5637 return TRUE;
5638
5639 /* Save the bfd for later use. */
5640 globals->bfd_of_glue_owner = abfd;
5641
5642 return TRUE;
5643 }
5644
5645 static void
5646 check_use_blx (struct elf32_arm_link_hash_table *globals)
5647 {
5648 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5649 Tag_CPU_arch) > 2)
5650 globals->use_blx = 1;
5651 }
5652
5653 bfd_boolean
5654 bfd_elf32_arm_process_before_allocation (bfd *abfd,
5655 struct bfd_link_info *link_info)
5656 {
5657 Elf_Internal_Shdr *symtab_hdr;
5658 Elf_Internal_Rela *internal_relocs = NULL;
5659 Elf_Internal_Rela *irel, *irelend;
5660 bfd_byte *contents = NULL;
5661
5662 asection *sec;
5663 struct elf32_arm_link_hash_table *globals;
5664
5665 /* If we are only performing a partial link do not bother
5666 to construct any glue. */
5667 if (link_info->relocatable)
5668 return TRUE;
5669
5670 /* Here we have a bfd that is to be included on the link. We have a
5671 hook to do reloc rummaging, before section sizes are nailed down. */
5672 globals = elf32_arm_hash_table (link_info);
5673 BFD_ASSERT (globals != NULL);
5674
5675 check_use_blx (globals);
5676
5677 if (globals->byteswap_code && !bfd_big_endian (abfd))
5678 {
5679 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5680 abfd);
5681 return FALSE;
5682 }
5683
5684 /* PR 5398: If we have not decided to include any loadable sections in
5685 the output then we will not have a glue owner bfd. This is OK, it
5686 just means that there is nothing else for us to do here. */
5687 if (globals->bfd_of_glue_owner == NULL)
5688 return TRUE;
5689
5690 /* Rummage around all the relocs and map the glue vectors. */
5691 sec = abfd->sections;
5692
5693 if (sec == NULL)
5694 return TRUE;
5695
5696 for (; sec != NULL; sec = sec->next)
5697 {
5698 if (sec->reloc_count == 0)
5699 continue;
5700
5701 if ((sec->flags & SEC_EXCLUDE) != 0)
5702 continue;
5703
5704 symtab_hdr = & elf_symtab_hdr (abfd);
5705
5706 /* Load the relocs. */
5707 internal_relocs
5708 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
5709
5710 if (internal_relocs == NULL)
5711 goto error_return;
5712
5713 irelend = internal_relocs + sec->reloc_count;
5714 for (irel = internal_relocs; irel < irelend; irel++)
5715 {
5716 long r_type;
5717 unsigned long r_index;
5718
5719 struct elf_link_hash_entry *h;
5720
5721 r_type = ELF32_R_TYPE (irel->r_info);
5722 r_index = ELF32_R_SYM (irel->r_info);
5723
5724 /* These are the only relocation types we care about. */
5725 if ( r_type != R_ARM_PC24
5726 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
5727 continue;
5728
5729 /* Get the section contents if we haven't done so already. */
5730 if (contents == NULL)
5731 {
5732 /* Get cached copy if it exists. */
5733 if (elf_section_data (sec)->this_hdr.contents != NULL)
5734 contents = elf_section_data (sec)->this_hdr.contents;
5735 else
5736 {
5737 /* Go get them off disk. */
5738 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
5739 goto error_return;
5740 }
5741 }
5742
5743 if (r_type == R_ARM_V4BX)
5744 {
5745 int reg;
5746
5747 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5748 record_arm_bx_glue (link_info, reg);
5749 continue;
5750 }
5751
5752 /* If the relocation is not against a symbol it cannot concern us. */
5753 h = NULL;
5754
5755 /* We don't care about local symbols. */
5756 if (r_index < symtab_hdr->sh_info)
5757 continue;
5758
5759 /* This is an external symbol. */
5760 r_index -= symtab_hdr->sh_info;
5761 h = (struct elf_link_hash_entry *)
5762 elf_sym_hashes (abfd)[r_index];
5763
5764 /* If the relocation is against a static symbol it must be within
5765 the current section and so cannot be a cross ARM/Thumb relocation. */
5766 if (h == NULL)
5767 continue;
5768
5769 /* If the call will go through a PLT entry then we do not need
5770 glue. */
5771 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
5772 continue;
5773
5774 switch (r_type)
5775 {
5776 case R_ARM_PC24:
5777 /* This one is a call from arm code. We need to look up
5778 the target of the call. If it is a thumb target, we
5779 insert glue. */
5780 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
5781 record_arm_to_thumb_glue (link_info, h);
5782 break;
5783
5784 default:
5785 abort ();
5786 }
5787 }
5788
5789 if (contents != NULL
5790 && elf_section_data (sec)->this_hdr.contents != contents)
5791 free (contents);
5792 contents = NULL;
5793
5794 if (internal_relocs != NULL
5795 && elf_section_data (sec)->relocs != internal_relocs)
5796 free (internal_relocs);
5797 internal_relocs = NULL;
5798 }
5799
5800 return TRUE;
5801
5802 error_return:
5803 if (contents != NULL
5804 && elf_section_data (sec)->this_hdr.contents != contents)
5805 free (contents);
5806 if (internal_relocs != NULL
5807 && elf_section_data (sec)->relocs != internal_relocs)
5808 free (internal_relocs);
5809
5810 return FALSE;
5811 }
5812 #endif
5813
5814
5815 /* Initialise maps of ARM/Thumb/data for input BFDs. */
5816
5817 void
5818 bfd_elf32_arm_init_maps (bfd *abfd)
5819 {
5820 Elf_Internal_Sym *isymbuf;
5821 Elf_Internal_Shdr *hdr;
5822 unsigned int i, localsyms;
5823
5824 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5825 if (! is_arm_elf (abfd))
5826 return;
5827
5828 if ((abfd->flags & DYNAMIC) != 0)
5829 return;
5830
5831 hdr = & elf_symtab_hdr (abfd);
5832 localsyms = hdr->sh_info;
5833
5834 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5835 should contain the number of local symbols, which should come before any
5836 global symbols. Mapping symbols are always local. */
5837 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5838 NULL);
5839
5840 /* No internal symbols read? Skip this BFD. */
5841 if (isymbuf == NULL)
5842 return;
5843
5844 for (i = 0; i < localsyms; i++)
5845 {
5846 Elf_Internal_Sym *isym = &isymbuf[i];
5847 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5848 const char *name;
5849
5850 if (sec != NULL
5851 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5852 {
5853 name = bfd_elf_string_from_elf_section (abfd,
5854 hdr->sh_link, isym->st_name);
5855
5856 if (bfd_is_arm_special_symbol_name (name,
5857 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5858 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5859 }
5860 }
5861 }
5862
5863
5864 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5865 say what they wanted. */
5866
5867 void
5868 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5869 {
5870 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5871 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5872
5873 if (globals == NULL)
5874 return;
5875
5876 if (globals->fix_cortex_a8 == -1)
5877 {
5878 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5879 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5880 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5881 || out_attr[Tag_CPU_arch_profile].i == 0))
5882 globals->fix_cortex_a8 = 1;
5883 else
5884 globals->fix_cortex_a8 = 0;
5885 }
5886 }
5887
5888
5889 void
5890 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5891 {
5892 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5893 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5894
5895 if (globals == NULL)
5896 return;
5897 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5898 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5899 {
5900 switch (globals->vfp11_fix)
5901 {
5902 case BFD_ARM_VFP11_FIX_DEFAULT:
5903 case BFD_ARM_VFP11_FIX_NONE:
5904 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5905 break;
5906
5907 default:
5908 /* Give a warning, but do as the user requests anyway. */
5909 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5910 "workaround is not necessary for target architecture"), obfd);
5911 }
5912 }
5913 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5914 /* For earlier architectures, we might need the workaround, but do not
5915 enable it by default. If users is running with broken hardware, they
5916 must enable the erratum fix explicitly. */
5917 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5918 }
5919
5920
5921 enum bfd_arm_vfp11_pipe
5922 {
5923 VFP11_FMAC,
5924 VFP11_LS,
5925 VFP11_DS,
5926 VFP11_BAD
5927 };
5928
5929 /* Return a VFP register number. This is encoded as RX:X for single-precision
5930 registers, or X:RX for double-precision registers, where RX is the group of
5931 four bits in the instruction encoding and X is the single extension bit.
5932 RX and X fields are specified using their lowest (starting) bit. The return
5933 value is:
5934
5935 0...31: single-precision registers s0...s31
5936 32...63: double-precision registers d0...d31.
5937
5938 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5939 encounter VFP3 instructions, so we allow the full range for DP registers. */
5940
5941 static unsigned int
5942 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5943 unsigned int x)
5944 {
5945 if (is_double)
5946 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5947 else
5948 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5949 }
5950
5951 /* Set bits in *WMASK according to a register number REG as encoded by
5952 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5953
5954 static void
5955 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5956 {
5957 if (reg < 32)
5958 *wmask |= 1 << reg;
5959 else if (reg < 48)
5960 *wmask |= 3 << ((reg - 32) * 2);
5961 }
5962
5963 /* Return TRUE if WMASK overwrites anything in REGS. */
5964
5965 static bfd_boolean
5966 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5967 {
5968 int i;
5969
5970 for (i = 0; i < numregs; i++)
5971 {
5972 unsigned int reg = regs[i];
5973
5974 if (reg < 32 && (wmask & (1 << reg)) != 0)
5975 return TRUE;
5976
5977 reg -= 32;
5978
5979 if (reg >= 16)
5980 continue;
5981
5982 if ((wmask & (3 << (reg * 2))) != 0)
5983 return TRUE;
5984 }
5985
5986 return FALSE;
5987 }
5988
5989 /* In this function, we're interested in two things: finding input registers
5990 for VFP data-processing instructions, and finding the set of registers which
5991 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5992 hold the written set, so FLDM etc. are easy to deal with (we're only
5993 interested in 32 SP registers or 16 dp registers, due to the VFP version
5994 implemented by the chip in question). DP registers are marked by setting
5995 both SP registers in the write mask). */
5996
5997 static enum bfd_arm_vfp11_pipe
5998 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5999 int *numregs)
6000 {
6001 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6002 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6003
6004 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6005 {
6006 unsigned int pqrs;
6007 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6008 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6009
6010 pqrs = ((insn & 0x00800000) >> 20)
6011 | ((insn & 0x00300000) >> 19)
6012 | ((insn & 0x00000040) >> 6);
6013
6014 switch (pqrs)
6015 {
6016 case 0: /* fmac[sd]. */
6017 case 1: /* fnmac[sd]. */
6018 case 2: /* fmsc[sd]. */
6019 case 3: /* fnmsc[sd]. */
6020 vpipe = VFP11_FMAC;
6021 bfd_arm_vfp11_write_mask (destmask, fd);
6022 regs[0] = fd;
6023 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6024 regs[2] = fm;
6025 *numregs = 3;
6026 break;
6027
6028 case 4: /* fmul[sd]. */
6029 case 5: /* fnmul[sd]. */
6030 case 6: /* fadd[sd]. */
6031 case 7: /* fsub[sd]. */
6032 vpipe = VFP11_FMAC;
6033 goto vfp_binop;
6034
6035 case 8: /* fdiv[sd]. */
6036 vpipe = VFP11_DS;
6037 vfp_binop:
6038 bfd_arm_vfp11_write_mask (destmask, fd);
6039 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6040 regs[1] = fm;
6041 *numregs = 2;
6042 break;
6043
6044 case 15: /* extended opcode. */
6045 {
6046 unsigned int extn = ((insn >> 15) & 0x1e)
6047 | ((insn >> 7) & 1);
6048
6049 switch (extn)
6050 {
6051 case 0: /* fcpy[sd]. */
6052 case 1: /* fabs[sd]. */
6053 case 2: /* fneg[sd]. */
6054 case 8: /* fcmp[sd]. */
6055 case 9: /* fcmpe[sd]. */
6056 case 10: /* fcmpz[sd]. */
6057 case 11: /* fcmpez[sd]. */
6058 case 16: /* fuito[sd]. */
6059 case 17: /* fsito[sd]. */
6060 case 24: /* ftoui[sd]. */
6061 case 25: /* ftouiz[sd]. */
6062 case 26: /* ftosi[sd]. */
6063 case 27: /* ftosiz[sd]. */
6064 /* These instructions will not bounce due to underflow. */
6065 *numregs = 0;
6066 vpipe = VFP11_FMAC;
6067 break;
6068
6069 case 3: /* fsqrt[sd]. */
6070 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6071 registers to cause the erratum in previous instructions. */
6072 bfd_arm_vfp11_write_mask (destmask, fd);
6073 vpipe = VFP11_DS;
6074 break;
6075
6076 case 15: /* fcvt{ds,sd}. */
6077 {
6078 int rnum = 0;
6079
6080 bfd_arm_vfp11_write_mask (destmask, fd);
6081
6082 /* Only FCVTSD can underflow. */
6083 if ((insn & 0x100) != 0)
6084 regs[rnum++] = fm;
6085
6086 *numregs = rnum;
6087
6088 vpipe = VFP11_FMAC;
6089 }
6090 break;
6091
6092 default:
6093 return VFP11_BAD;
6094 }
6095 }
6096 break;
6097
6098 default:
6099 return VFP11_BAD;
6100 }
6101 }
6102 /* Two-register transfer. */
6103 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6104 {
6105 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6106
6107 if ((insn & 0x100000) == 0)
6108 {
6109 if (is_double)
6110 bfd_arm_vfp11_write_mask (destmask, fm);
6111 else
6112 {
6113 bfd_arm_vfp11_write_mask (destmask, fm);
6114 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6115 }
6116 }
6117
6118 vpipe = VFP11_LS;
6119 }
6120 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6121 {
6122 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6123 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6124
6125 switch (puw)
6126 {
6127 case 0: /* Two-reg transfer. We should catch these above. */
6128 abort ();
6129
6130 case 2: /* fldm[sdx]. */
6131 case 3:
6132 case 5:
6133 {
6134 unsigned int i, offset = insn & 0xff;
6135
6136 if (is_double)
6137 offset >>= 1;
6138
6139 for (i = fd; i < fd + offset; i++)
6140 bfd_arm_vfp11_write_mask (destmask, i);
6141 }
6142 break;
6143
6144 case 4: /* fld[sd]. */
6145 case 6:
6146 bfd_arm_vfp11_write_mask (destmask, fd);
6147 break;
6148
6149 default:
6150 return VFP11_BAD;
6151 }
6152
6153 vpipe = VFP11_LS;
6154 }
6155 /* Single-register transfer. Note L==0. */
6156 else if ((insn & 0x0f100e10) == 0x0e000a10)
6157 {
6158 unsigned int opcode = (insn >> 21) & 7;
6159 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6160
6161 switch (opcode)
6162 {
6163 case 0: /* fmsr/fmdlr. */
6164 case 1: /* fmdhr. */
6165 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6166 destination register. I don't know if this is exactly right,
6167 but it is the conservative choice. */
6168 bfd_arm_vfp11_write_mask (destmask, fn);
6169 break;
6170
6171 case 7: /* fmxr. */
6172 break;
6173 }
6174
6175 vpipe = VFP11_LS;
6176 }
6177
6178 return vpipe;
6179 }
6180
6181
6182 static int elf32_arm_compare_mapping (const void * a, const void * b);
6183
6184
6185 /* Look for potentially-troublesome code sequences which might trigger the
6186 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6187 (available from ARM) for details of the erratum. A short version is
6188 described in ld.texinfo. */
6189
6190 bfd_boolean
6191 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6192 {
6193 asection *sec;
6194 bfd_byte *contents = NULL;
6195 int state = 0;
6196 int regs[3], numregs = 0;
6197 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6198 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
6199
6200 if (globals == NULL)
6201 return FALSE;
6202
6203 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6204 The states transition as follows:
6205
6206 0 -> 1 (vector) or 0 -> 2 (scalar)
6207 A VFP FMAC-pipeline instruction has been seen. Fill
6208 regs[0]..regs[numregs-1] with its input operands. Remember this
6209 instruction in 'first_fmac'.
6210
6211 1 -> 2
6212 Any instruction, except for a VFP instruction which overwrites
6213 regs[*].
6214
6215 1 -> 3 [ -> 0 ] or
6216 2 -> 3 [ -> 0 ]
6217 A VFP instruction has been seen which overwrites any of regs[*].
6218 We must make a veneer! Reset state to 0 before examining next
6219 instruction.
6220
6221 2 -> 0
6222 If we fail to match anything in state 2, reset to state 0 and reset
6223 the instruction pointer to the instruction after 'first_fmac'.
6224
6225 If the VFP11 vector mode is in use, there must be at least two unrelated
6226 instructions between anti-dependent VFP11 instructions to properly avoid
6227 triggering the erratum, hence the use of the extra state 1. */
6228
6229 /* If we are only performing a partial link do not bother
6230 to construct any glue. */
6231 if (link_info->relocatable)
6232 return TRUE;
6233
6234 /* Skip if this bfd does not correspond to an ELF image. */
6235 if (! is_arm_elf (abfd))
6236 return TRUE;
6237
6238 /* We should have chosen a fix type by the time we get here. */
6239 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6240
6241 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6242 return TRUE;
6243
6244 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6245 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6246 return TRUE;
6247
6248 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6249 {
6250 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6251 struct _arm_elf_section_data *sec_data;
6252
6253 /* If we don't have executable progbits, we're not interested in this
6254 section. Also skip if section is to be excluded. */
6255 if (elf_section_type (sec) != SHT_PROGBITS
6256 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6257 || (sec->flags & SEC_EXCLUDE) != 0
6258 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
6259 || sec->output_section == bfd_abs_section_ptr
6260 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6261 continue;
6262
6263 sec_data = elf32_arm_section_data (sec);
6264
6265 if (sec_data->mapcount == 0)
6266 continue;
6267
6268 if (elf_section_data (sec)->this_hdr.contents != NULL)
6269 contents = elf_section_data (sec)->this_hdr.contents;
6270 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6271 goto error_return;
6272
6273 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6274 elf32_arm_compare_mapping);
6275
6276 for (span = 0; span < sec_data->mapcount; span++)
6277 {
6278 unsigned int span_start = sec_data->map[span].vma;
6279 unsigned int span_end = (span == sec_data->mapcount - 1)
6280 ? sec->size : sec_data->map[span + 1].vma;
6281 char span_type = sec_data->map[span].type;
6282
6283 /* FIXME: Only ARM mode is supported at present. We may need to
6284 support Thumb-2 mode also at some point. */
6285 if (span_type != 'a')
6286 continue;
6287
6288 for (i = span_start; i < span_end;)
6289 {
6290 unsigned int next_i = i + 4;
6291 unsigned int insn = bfd_big_endian (abfd)
6292 ? (contents[i] << 24)
6293 | (contents[i + 1] << 16)
6294 | (contents[i + 2] << 8)
6295 | contents[i + 3]
6296 : (contents[i + 3] << 24)
6297 | (contents[i + 2] << 16)
6298 | (contents[i + 1] << 8)
6299 | contents[i];
6300 unsigned int writemask = 0;
6301 enum bfd_arm_vfp11_pipe vpipe;
6302
6303 switch (state)
6304 {
6305 case 0:
6306 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6307 &numregs);
6308 /* I'm assuming the VFP11 erratum can trigger with denorm
6309 operands on either the FMAC or the DS pipeline. This might
6310 lead to slightly overenthusiastic veneer insertion. */
6311 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6312 {
6313 state = use_vector ? 1 : 2;
6314 first_fmac = i;
6315 veneer_of_insn = insn;
6316 }
6317 break;
6318
6319 case 1:
6320 {
6321 int other_regs[3], other_numregs;
6322 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6323 other_regs,
6324 &other_numregs);
6325 if (vpipe != VFP11_BAD
6326 && bfd_arm_vfp11_antidependency (writemask, regs,
6327 numregs))
6328 state = 3;
6329 else
6330 state = 2;
6331 }
6332 break;
6333
6334 case 2:
6335 {
6336 int other_regs[3], other_numregs;
6337 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6338 other_regs,
6339 &other_numregs);
6340 if (vpipe != VFP11_BAD
6341 && bfd_arm_vfp11_antidependency (writemask, regs,
6342 numregs))
6343 state = 3;
6344 else
6345 {
6346 state = 0;
6347 next_i = first_fmac + 4;
6348 }
6349 }
6350 break;
6351
6352 case 3:
6353 abort (); /* Should be unreachable. */
6354 }
6355
6356 if (state == 3)
6357 {
6358 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6359 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6360
6361 elf32_arm_section_data (sec)->erratumcount += 1;
6362
6363 newerr->u.b.vfp_insn = veneer_of_insn;
6364
6365 switch (span_type)
6366 {
6367 case 'a':
6368 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6369 break;
6370
6371 default:
6372 abort ();
6373 }
6374
6375 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6376 first_fmac);
6377
6378 newerr->vma = -1;
6379
6380 newerr->next = sec_data->erratumlist;
6381 sec_data->erratumlist = newerr;
6382
6383 state = 0;
6384 }
6385
6386 i = next_i;
6387 }
6388 }
6389
6390 if (contents != NULL
6391 && elf_section_data (sec)->this_hdr.contents != contents)
6392 free (contents);
6393 contents = NULL;
6394 }
6395
6396 return TRUE;
6397
6398 error_return:
6399 if (contents != NULL
6400 && elf_section_data (sec)->this_hdr.contents != contents)
6401 free (contents);
6402
6403 return FALSE;
6404 }
6405
6406 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6407 after sections have been laid out, using specially-named symbols. */
6408
6409 void
6410 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6411 struct bfd_link_info *link_info)
6412 {
6413 asection *sec;
6414 struct elf32_arm_link_hash_table *globals;
6415 char *tmp_name;
6416
6417 if (link_info->relocatable)
6418 return;
6419
6420 /* Skip if this bfd does not correspond to an ELF image. */
6421 if (! is_arm_elf (abfd))
6422 return;
6423
6424 globals = elf32_arm_hash_table (link_info);
6425 if (globals == NULL)
6426 return;
6427
6428 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6429 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6430
6431 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6432 {
6433 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6434 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
6435
6436 for (; errnode != NULL; errnode = errnode->next)
6437 {
6438 struct elf_link_hash_entry *myh;
6439 bfd_vma vma;
6440
6441 switch (errnode->type)
6442 {
6443 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6444 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6445 /* Find veneer symbol. */
6446 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6447 errnode->u.b.veneer->u.v.id);
6448
6449 myh = elf_link_hash_lookup
6450 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6451
6452 if (myh == NULL)
6453 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6454 "`%s'"), abfd, tmp_name);
6455
6456 vma = myh->root.u.def.section->output_section->vma
6457 + myh->root.u.def.section->output_offset
6458 + myh->root.u.def.value;
6459
6460 errnode->u.b.veneer->vma = vma;
6461 break;
6462
6463 case VFP11_ERRATUM_ARM_VENEER:
6464 case VFP11_ERRATUM_THUMB_VENEER:
6465 /* Find return location. */
6466 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6467 errnode->u.v.id);
6468
6469 myh = elf_link_hash_lookup
6470 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6471
6472 if (myh == NULL)
6473 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6474 "`%s'"), abfd, tmp_name);
6475
6476 vma = myh->root.u.def.section->output_section->vma
6477 + myh->root.u.def.section->output_offset
6478 + myh->root.u.def.value;
6479
6480 errnode->u.v.branch->vma = vma;
6481 break;
6482
6483 default:
6484 abort ();
6485 }
6486 }
6487 }
6488
6489 free (tmp_name);
6490 }
6491
6492
6493 /* Set target relocation values needed during linking. */
6494
6495 void
6496 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6497 struct bfd_link_info *link_info,
6498 int target1_is_rel,
6499 char * target2_type,
6500 int fix_v4bx,
6501 int use_blx,
6502 bfd_arm_vfp11_fix vfp11_fix,
6503 int no_enum_warn, int no_wchar_warn,
6504 int pic_veneer, int fix_cortex_a8)
6505 {
6506 struct elf32_arm_link_hash_table *globals;
6507
6508 globals = elf32_arm_hash_table (link_info);
6509 if (globals == NULL)
6510 return;
6511
6512 globals->target1_is_rel = target1_is_rel;
6513 if (strcmp (target2_type, "rel") == 0)
6514 globals->target2_reloc = R_ARM_REL32;
6515 else if (strcmp (target2_type, "abs") == 0)
6516 globals->target2_reloc = R_ARM_ABS32;
6517 else if (strcmp (target2_type, "got-rel") == 0)
6518 globals->target2_reloc = R_ARM_GOT_PREL;
6519 else
6520 {
6521 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6522 target2_type);
6523 }
6524 globals->fix_v4bx = fix_v4bx;
6525 globals->use_blx |= use_blx;
6526 globals->vfp11_fix = vfp11_fix;
6527 globals->pic_veneer = pic_veneer;
6528 globals->fix_cortex_a8 = fix_cortex_a8;
6529
6530 BFD_ASSERT (is_arm_elf (output_bfd));
6531 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
6532 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
6533 }
6534
6535 /* Replace the target offset of a Thumb bl or b.w instruction. */
6536
6537 static void
6538 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6539 {
6540 bfd_vma upper;
6541 bfd_vma lower;
6542 int reloc_sign;
6543
6544 BFD_ASSERT ((offset & 1) == 0);
6545
6546 upper = bfd_get_16 (abfd, insn);
6547 lower = bfd_get_16 (abfd, insn + 2);
6548 reloc_sign = (offset < 0) ? 1 : 0;
6549 upper = (upper & ~(bfd_vma) 0x7ff)
6550 | ((offset >> 12) & 0x3ff)
6551 | (reloc_sign << 10);
6552 lower = (lower & ~(bfd_vma) 0x2fff)
6553 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6554 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6555 | ((offset >> 1) & 0x7ff);
6556 bfd_put_16 (abfd, upper, insn);
6557 bfd_put_16 (abfd, lower, insn + 2);
6558 }
6559
6560 /* Thumb code calling an ARM function. */
6561
6562 static int
6563 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6564 const char * name,
6565 bfd * input_bfd,
6566 bfd * output_bfd,
6567 asection * input_section,
6568 bfd_byte * hit_data,
6569 asection * sym_sec,
6570 bfd_vma offset,
6571 bfd_signed_vma addend,
6572 bfd_vma val,
6573 char **error_message)
6574 {
6575 asection * s = 0;
6576 bfd_vma my_offset;
6577 long int ret_offset;
6578 struct elf_link_hash_entry * myh;
6579 struct elf32_arm_link_hash_table * globals;
6580
6581 myh = find_thumb_glue (info, name, error_message);
6582 if (myh == NULL)
6583 return FALSE;
6584
6585 globals = elf32_arm_hash_table (info);
6586 BFD_ASSERT (globals != NULL);
6587 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6588
6589 my_offset = myh->root.u.def.value;
6590
6591 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6592 THUMB2ARM_GLUE_SECTION_NAME);
6593
6594 BFD_ASSERT (s != NULL);
6595 BFD_ASSERT (s->contents != NULL);
6596 BFD_ASSERT (s->output_section != NULL);
6597
6598 if ((my_offset & 0x01) == 0x01)
6599 {
6600 if (sym_sec != NULL
6601 && sym_sec->owner != NULL
6602 && !INTERWORK_FLAG (sym_sec->owner))
6603 {
6604 (*_bfd_error_handler)
6605 (_("%B(%s): warning: interworking not enabled.\n"
6606 " first occurrence: %B: thumb call to arm"),
6607 sym_sec->owner, input_bfd, name);
6608
6609 return FALSE;
6610 }
6611
6612 --my_offset;
6613 myh->root.u.def.value = my_offset;
6614
6615 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6616 s->contents + my_offset);
6617
6618 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6619 s->contents + my_offset + 2);
6620
6621 ret_offset =
6622 /* Address of destination of the stub. */
6623 ((bfd_signed_vma) val)
6624 - ((bfd_signed_vma)
6625 /* Offset from the start of the current section
6626 to the start of the stubs. */
6627 (s->output_offset
6628 /* Offset of the start of this stub from the start of the stubs. */
6629 + my_offset
6630 /* Address of the start of the current section. */
6631 + s->output_section->vma)
6632 /* The branch instruction is 4 bytes into the stub. */
6633 + 4
6634 /* ARM branches work from the pc of the instruction + 8. */
6635 + 8);
6636
6637 put_arm_insn (globals, output_bfd,
6638 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6639 s->contents + my_offset + 4);
6640 }
6641
6642 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6643
6644 /* Now go back and fix up the original BL insn to point to here. */
6645 ret_offset =
6646 /* Address of where the stub is located. */
6647 (s->output_section->vma + s->output_offset + my_offset)
6648 /* Address of where the BL is located. */
6649 - (input_section->output_section->vma + input_section->output_offset
6650 + offset)
6651 /* Addend in the relocation. */
6652 - addend
6653 /* Biassing for PC-relative addressing. */
6654 - 8;
6655
6656 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
6657
6658 return TRUE;
6659 }
6660
6661 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
6662
6663 static struct elf_link_hash_entry *
6664 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6665 const char * name,
6666 bfd * input_bfd,
6667 bfd * output_bfd,
6668 asection * sym_sec,
6669 bfd_vma val,
6670 asection * s,
6671 char ** error_message)
6672 {
6673 bfd_vma my_offset;
6674 long int ret_offset;
6675 struct elf_link_hash_entry * myh;
6676 struct elf32_arm_link_hash_table * globals;
6677
6678 myh = find_arm_glue (info, name, error_message);
6679 if (myh == NULL)
6680 return NULL;
6681
6682 globals = elf32_arm_hash_table (info);
6683 BFD_ASSERT (globals != NULL);
6684 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6685
6686 my_offset = myh->root.u.def.value;
6687
6688 if ((my_offset & 0x01) == 0x01)
6689 {
6690 if (sym_sec != NULL
6691 && sym_sec->owner != NULL
6692 && !INTERWORK_FLAG (sym_sec->owner))
6693 {
6694 (*_bfd_error_handler)
6695 (_("%B(%s): warning: interworking not enabled.\n"
6696 " first occurrence: %B: arm call to thumb"),
6697 sym_sec->owner, input_bfd, name);
6698 }
6699
6700 --my_offset;
6701 myh->root.u.def.value = my_offset;
6702
6703 if (info->shared || globals->root.is_relocatable_executable
6704 || globals->pic_veneer)
6705 {
6706 /* For relocatable objects we can't use absolute addresses,
6707 so construct the address from a relative offset. */
6708 /* TODO: If the offset is small it's probably worth
6709 constructing the address with adds. */
6710 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6711 s->contents + my_offset);
6712 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6713 s->contents + my_offset + 4);
6714 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6715 s->contents + my_offset + 8);
6716 /* Adjust the offset by 4 for the position of the add,
6717 and 8 for the pipeline offset. */
6718 ret_offset = (val - (s->output_offset
6719 + s->output_section->vma
6720 + my_offset + 12))
6721 | 1;
6722 bfd_put_32 (output_bfd, ret_offset,
6723 s->contents + my_offset + 12);
6724 }
6725 else if (globals->use_blx)
6726 {
6727 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6728 s->contents + my_offset);
6729
6730 /* It's a thumb address. Add the low order bit. */
6731 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6732 s->contents + my_offset + 4);
6733 }
6734 else
6735 {
6736 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6737 s->contents + my_offset);
6738
6739 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6740 s->contents + my_offset + 4);
6741
6742 /* It's a thumb address. Add the low order bit. */
6743 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6744 s->contents + my_offset + 8);
6745
6746 my_offset += 12;
6747 }
6748 }
6749
6750 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6751
6752 return myh;
6753 }
6754
6755 /* Arm code calling a Thumb function. */
6756
6757 static int
6758 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6759 const char * name,
6760 bfd * input_bfd,
6761 bfd * output_bfd,
6762 asection * input_section,
6763 bfd_byte * hit_data,
6764 asection * sym_sec,
6765 bfd_vma offset,
6766 bfd_signed_vma addend,
6767 bfd_vma val,
6768 char **error_message)
6769 {
6770 unsigned long int tmp;
6771 bfd_vma my_offset;
6772 asection * s;
6773 long int ret_offset;
6774 struct elf_link_hash_entry * myh;
6775 struct elf32_arm_link_hash_table * globals;
6776
6777 globals = elf32_arm_hash_table (info);
6778 BFD_ASSERT (globals != NULL);
6779 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6780
6781 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6782 ARM2THUMB_GLUE_SECTION_NAME);
6783 BFD_ASSERT (s != NULL);
6784 BFD_ASSERT (s->contents != NULL);
6785 BFD_ASSERT (s->output_section != NULL);
6786
6787 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
6788 sym_sec, val, s, error_message);
6789 if (!myh)
6790 return FALSE;
6791
6792 my_offset = myh->root.u.def.value;
6793 tmp = bfd_get_32 (input_bfd, hit_data);
6794 tmp = tmp & 0xFF000000;
6795
6796 /* Somehow these are both 4 too far, so subtract 8. */
6797 ret_offset = (s->output_offset
6798 + my_offset
6799 + s->output_section->vma
6800 - (input_section->output_offset
6801 + input_section->output_section->vma
6802 + offset + addend)
6803 - 8);
6804
6805 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6806
6807 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
6808
6809 return TRUE;
6810 }
6811
6812 /* Populate Arm stub for an exported Thumb function. */
6813
6814 static bfd_boolean
6815 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6816 {
6817 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6818 asection * s;
6819 struct elf_link_hash_entry * myh;
6820 struct elf32_arm_link_hash_entry *eh;
6821 struct elf32_arm_link_hash_table * globals;
6822 asection *sec;
6823 bfd_vma val;
6824 char *error_message;
6825
6826 eh = elf32_arm_hash_entry (h);
6827 /* Allocate stubs for exported Thumb functions on v4t. */
6828 if (eh->export_glue == NULL)
6829 return TRUE;
6830
6831 globals = elf32_arm_hash_table (info);
6832 BFD_ASSERT (globals != NULL);
6833 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6834
6835 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6836 ARM2THUMB_GLUE_SECTION_NAME);
6837 BFD_ASSERT (s != NULL);
6838 BFD_ASSERT (s->contents != NULL);
6839 BFD_ASSERT (s->output_section != NULL);
6840
6841 sec = eh->export_glue->root.u.def.section;
6842
6843 BFD_ASSERT (sec->output_section != NULL);
6844
6845 val = eh->export_glue->root.u.def.value + sec->output_offset
6846 + sec->output_section->vma;
6847
6848 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6849 h->root.u.def.section->owner,
6850 globals->obfd, sec, val, s,
6851 &error_message);
6852 BFD_ASSERT (myh);
6853 return TRUE;
6854 }
6855
6856 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6857
6858 static bfd_vma
6859 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6860 {
6861 bfd_byte *p;
6862 bfd_vma glue_addr;
6863 asection *s;
6864 struct elf32_arm_link_hash_table *globals;
6865
6866 globals = elf32_arm_hash_table (info);
6867 BFD_ASSERT (globals != NULL);
6868 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6869
6870 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6871 ARM_BX_GLUE_SECTION_NAME);
6872 BFD_ASSERT (s != NULL);
6873 BFD_ASSERT (s->contents != NULL);
6874 BFD_ASSERT (s->output_section != NULL);
6875
6876 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6877
6878 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6879
6880 if ((globals->bx_glue_offset[reg] & 1) == 0)
6881 {
6882 p = s->contents + glue_addr;
6883 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6884 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6885 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6886 globals->bx_glue_offset[reg] |= 1;
6887 }
6888
6889 return glue_addr + s->output_section->vma + s->output_offset;
6890 }
6891
6892 /* Generate Arm stubs for exported Thumb symbols. */
6893 static void
6894 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
6895 struct bfd_link_info *link_info)
6896 {
6897 struct elf32_arm_link_hash_table * globals;
6898
6899 if (link_info == NULL)
6900 /* Ignore this if we are not called by the ELF backend linker. */
6901 return;
6902
6903 globals = elf32_arm_hash_table (link_info);
6904 if (globals == NULL)
6905 return;
6906
6907 /* If blx is available then exported Thumb symbols are OK and there is
6908 nothing to do. */
6909 if (globals->use_blx)
6910 return;
6911
6912 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6913 link_info);
6914 }
6915
6916 /* Reserve space for COUNT dynamic relocations in relocation selection
6917 SRELOC. */
6918
6919 static void
6920 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
6921 bfd_size_type count)
6922 {
6923 struct elf32_arm_link_hash_table *htab;
6924
6925 htab = elf32_arm_hash_table (info);
6926 BFD_ASSERT (htab->root.dynamic_sections_created);
6927 if (sreloc == NULL)
6928 abort ();
6929 sreloc->size += RELOC_SIZE (htab) * count;
6930 }
6931
6932 /* Add relocation REL to the end of relocation section SRELOC. */
6933
6934 static void
6935 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
6936 asection *sreloc, Elf_Internal_Rela *rel)
6937 {
6938 bfd_byte *loc;
6939 struct elf32_arm_link_hash_table *htab;
6940
6941 htab = elf32_arm_hash_table (info);
6942 if (sreloc == NULL)
6943 abort ();
6944 loc = sreloc->contents;
6945 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
6946 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
6947 abort ();
6948 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
6949 }
6950
6951 /* Some relocations map to different relocations depending on the
6952 target. Return the real relocation. */
6953
6954 static int
6955 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6956 int r_type)
6957 {
6958 switch (r_type)
6959 {
6960 case R_ARM_TARGET1:
6961 if (globals->target1_is_rel)
6962 return R_ARM_REL32;
6963 else
6964 return R_ARM_ABS32;
6965
6966 case R_ARM_TARGET2:
6967 return globals->target2_reloc;
6968
6969 default:
6970 return r_type;
6971 }
6972 }
6973
6974 /* Return the base VMA address which should be subtracted from real addresses
6975 when resolving @dtpoff relocation.
6976 This is PT_TLS segment p_vaddr. */
6977
6978 static bfd_vma
6979 dtpoff_base (struct bfd_link_info *info)
6980 {
6981 /* If tls_sec is NULL, we should have signalled an error already. */
6982 if (elf_hash_table (info)->tls_sec == NULL)
6983 return 0;
6984 return elf_hash_table (info)->tls_sec->vma;
6985 }
6986
6987 /* Return the relocation value for @tpoff relocation
6988 if STT_TLS virtual address is ADDRESS. */
6989
6990 static bfd_vma
6991 tpoff (struct bfd_link_info *info, bfd_vma address)
6992 {
6993 struct elf_link_hash_table *htab = elf_hash_table (info);
6994 bfd_vma base;
6995
6996 /* If tls_sec is NULL, we should have signalled an error already. */
6997 if (htab->tls_sec == NULL)
6998 return 0;
6999 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7000 return address - htab->tls_sec->vma + base;
7001 }
7002
7003 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7004 VALUE is the relocation value. */
7005
7006 static bfd_reloc_status_type
7007 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7008 {
7009 if (value > 0xfff)
7010 return bfd_reloc_overflow;
7011
7012 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7013 bfd_put_32 (abfd, value, data);
7014 return bfd_reloc_ok;
7015 }
7016
7017 /* Handle TLS relaxations. Relaxing is possible for symbols that use
7018 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7019 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7020
7021 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7022 is to then call final_link_relocate. Return other values in the
7023 case of error.
7024
7025 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7026 the pre-relaxed code. It would be nice if the relocs were updated
7027 to match the optimization. */
7028
7029 static bfd_reloc_status_type
7030 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7031 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7032 Elf_Internal_Rela *rel, unsigned long is_local)
7033 {
7034 unsigned long insn;
7035
7036 switch (ELF32_R_TYPE (rel->r_info))
7037 {
7038 default:
7039 return bfd_reloc_notsupported;
7040
7041 case R_ARM_TLS_GOTDESC:
7042 if (is_local)
7043 insn = 0;
7044 else
7045 {
7046 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7047 if (insn & 1)
7048 insn -= 5; /* THUMB */
7049 else
7050 insn -= 8; /* ARM */
7051 }
7052 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7053 return bfd_reloc_continue;
7054
7055 case R_ARM_THM_TLS_DESCSEQ:
7056 /* Thumb insn. */
7057 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7058 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7059 {
7060 if (is_local)
7061 /* nop */
7062 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7063 }
7064 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7065 {
7066 if (is_local)
7067 /* nop */
7068 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7069 else
7070 /* ldr rx,[ry] */
7071 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7072 }
7073 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7074 {
7075 if (is_local)
7076 /* nop */
7077 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7078 else
7079 /* mov r0, rx */
7080 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7081 contents + rel->r_offset);
7082 }
7083 else
7084 {
7085 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7086 /* It's a 32 bit instruction, fetch the rest of it for
7087 error generation. */
7088 insn = (insn << 16)
7089 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7090 (*_bfd_error_handler)
7091 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7092 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7093 return bfd_reloc_notsupported;
7094 }
7095 break;
7096
7097 case R_ARM_TLS_DESCSEQ:
7098 /* arm insn. */
7099 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7100 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7101 {
7102 if (is_local)
7103 /* mov rx, ry */
7104 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7105 contents + rel->r_offset);
7106 }
7107 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7108 {
7109 if (is_local)
7110 /* nop */
7111 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7112 else
7113 /* ldr rx,[ry] */
7114 bfd_put_32 (input_bfd, insn & 0xfffff000,
7115 contents + rel->r_offset);
7116 }
7117 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7118 {
7119 if (is_local)
7120 /* nop */
7121 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7122 else
7123 /* mov r0, rx */
7124 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7125 contents + rel->r_offset);
7126 }
7127 else
7128 {
7129 (*_bfd_error_handler)
7130 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7131 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7132 return bfd_reloc_notsupported;
7133 }
7134 break;
7135
7136 case R_ARM_TLS_CALL:
7137 /* GD->IE relaxation, turn the instruction into 'nop' or
7138 'ldr r0, [pc,r0]' */
7139 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7140 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7141 break;
7142
7143 case R_ARM_THM_TLS_CALL:
7144 /* GD->IE relaxation */
7145 if (!is_local)
7146 /* add r0,pc; ldr r0, [r0] */
7147 insn = 0x44786800;
7148 else if (arch_has_thumb2_nop (globals))
7149 /* nop.w */
7150 insn = 0xf3af8000;
7151 else
7152 /* nop; nop */
7153 insn = 0xbf00bf00;
7154
7155 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7156 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7157 break;
7158 }
7159 return bfd_reloc_ok;
7160 }
7161
7162 /* For a given value of n, calculate the value of G_n as required to
7163 deal with group relocations. We return it in the form of an
7164 encoded constant-and-rotation, together with the final residual. If n is
7165 specified as less than zero, then final_residual is filled with the
7166 input value and no further action is performed. */
7167
7168 static bfd_vma
7169 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7170 {
7171 int current_n;
7172 bfd_vma g_n;
7173 bfd_vma encoded_g_n = 0;
7174 bfd_vma residual = value; /* Also known as Y_n. */
7175
7176 for (current_n = 0; current_n <= n; current_n++)
7177 {
7178 int shift;
7179
7180 /* Calculate which part of the value to mask. */
7181 if (residual == 0)
7182 shift = 0;
7183 else
7184 {
7185 int msb;
7186
7187 /* Determine the most significant bit in the residual and
7188 align the resulting value to a 2-bit boundary. */
7189 for (msb = 30; msb >= 0; msb -= 2)
7190 if (residual & (3 << msb))
7191 break;
7192
7193 /* The desired shift is now (msb - 6), or zero, whichever
7194 is the greater. */
7195 shift = msb - 6;
7196 if (shift < 0)
7197 shift = 0;
7198 }
7199
7200 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7201 g_n = residual & (0xff << shift);
7202 encoded_g_n = (g_n >> shift)
7203 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7204
7205 /* Calculate the residual for the next time around. */
7206 residual &= ~g_n;
7207 }
7208
7209 *final_residual = residual;
7210
7211 return encoded_g_n;
7212 }
7213
7214 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
7215 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
7216
7217 static int
7218 identify_add_or_sub (bfd_vma insn)
7219 {
7220 int opcode = insn & 0x1e00000;
7221
7222 if (opcode == 1 << 23) /* ADD */
7223 return 1;
7224
7225 if (opcode == 1 << 22) /* SUB */
7226 return -1;
7227
7228 return 0;
7229 }
7230
7231 /* Perform a relocation as part of a final link. */
7232
7233 static bfd_reloc_status_type
7234 elf32_arm_final_link_relocate (reloc_howto_type * howto,
7235 bfd * input_bfd,
7236 bfd * output_bfd,
7237 asection * input_section,
7238 bfd_byte * contents,
7239 Elf_Internal_Rela * rel,
7240 bfd_vma value,
7241 struct bfd_link_info * info,
7242 asection * sym_sec,
7243 const char * sym_name,
7244 int sym_flags,
7245 struct elf_link_hash_entry * h,
7246 bfd_boolean * unresolved_reloc_p,
7247 char ** error_message)
7248 {
7249 unsigned long r_type = howto->type;
7250 unsigned long r_symndx;
7251 bfd_byte * hit_data = contents + rel->r_offset;
7252 bfd_vma * local_got_offsets;
7253 bfd_vma * local_tlsdesc_gotents;
7254 asection * sgot = NULL;
7255 asection * splt = NULL;
7256 asection * sreloc = NULL;
7257 asection * srelgot;
7258 bfd_vma addend;
7259 bfd_signed_vma signed_addend;
7260 struct elf32_arm_link_hash_table * globals;
7261
7262 globals = elf32_arm_hash_table (info);
7263 if (globals == NULL)
7264 return bfd_reloc_notsupported;
7265
7266 BFD_ASSERT (is_arm_elf (input_bfd));
7267
7268 /* Some relocation types map to different relocations depending on the
7269 target. We pick the right one here. */
7270 r_type = arm_real_reloc_type (globals, r_type);
7271
7272 /* It is possible to have linker relaxations on some TLS access
7273 models. Update our information here. */
7274 r_type = elf32_arm_tls_transition (info, r_type, h);
7275
7276 if (r_type != howto->type)
7277 howto = elf32_arm_howto_from_type (r_type);
7278
7279 /* If the start address has been set, then set the EF_ARM_HASENTRY
7280 flag. Setting this more than once is redundant, but the cost is
7281 not too high, and it keeps the code simple.
7282
7283 The test is done here, rather than somewhere else, because the
7284 start address is only set just before the final link commences.
7285
7286 Note - if the user deliberately sets a start address of 0, the
7287 flag will not be set. */
7288 if (bfd_get_start_address (output_bfd) != 0)
7289 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
7290
7291 sgot = globals->root.sgot;
7292 splt = globals->root.splt;
7293 srelgot = globals->root.srelgot;
7294 local_got_offsets = elf_local_got_offsets (input_bfd);
7295 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
7296
7297 r_symndx = ELF32_R_SYM (rel->r_info);
7298
7299 if (globals->use_rel)
7300 {
7301 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
7302
7303 if (addend & ((howto->src_mask + 1) >> 1))
7304 {
7305 signed_addend = -1;
7306 signed_addend &= ~ howto->src_mask;
7307 signed_addend |= addend;
7308 }
7309 else
7310 signed_addend = addend;
7311 }
7312 else
7313 addend = signed_addend = rel->r_addend;
7314
7315 switch (r_type)
7316 {
7317 case R_ARM_NONE:
7318 /* We don't need to find a value for this symbol. It's just a
7319 marker. */
7320 *unresolved_reloc_p = FALSE;
7321 return bfd_reloc_ok;
7322
7323 case R_ARM_ABS12:
7324 if (!globals->vxworks_p)
7325 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7326
7327 case R_ARM_PC24:
7328 case R_ARM_ABS32:
7329 case R_ARM_ABS32_NOI:
7330 case R_ARM_REL32:
7331 case R_ARM_REL32_NOI:
7332 case R_ARM_CALL:
7333 case R_ARM_JUMP24:
7334 case R_ARM_XPC25:
7335 case R_ARM_PREL31:
7336 case R_ARM_PLT32:
7337 /* Handle relocations which should use the PLT entry. ABS32/REL32
7338 will use the symbol's value, which may point to a PLT entry, but we
7339 don't need to handle that here. If we created a PLT entry, all
7340 branches in this object should go to it, except if the PLT is too
7341 far away, in which case a long branch stub should be inserted. */
7342 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
7343 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
7344 && r_type != R_ARM_CALL
7345 && r_type != R_ARM_JUMP24
7346 && r_type != R_ARM_PLT32)
7347 && h != NULL
7348 && splt != NULL
7349 && h->plt.offset != (bfd_vma) -1)
7350 {
7351 /* If we've created a .plt section, and assigned a PLT entry to
7352 this function, it should not be known to bind locally. If
7353 it were, we would have cleared the PLT entry. */
7354 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
7355
7356 value = (splt->output_section->vma
7357 + splt->output_offset
7358 + h->plt.offset);
7359 *unresolved_reloc_p = FALSE;
7360 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7361 contents, rel->r_offset, value,
7362 rel->r_addend);
7363 }
7364
7365 /* When generating a shared object or relocatable executable, these
7366 relocations are copied into the output file to be resolved at
7367 run time. */
7368 if ((info->shared || globals->root.is_relocatable_executable)
7369 && (input_section->flags & SEC_ALLOC)
7370 && !(globals->vxworks_p
7371 && strcmp (input_section->output_section->name,
7372 ".tls_vars") == 0)
7373 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
7374 || !SYMBOL_CALLS_LOCAL (info, h))
7375 && (!strstr (input_section->name, STUB_SUFFIX))
7376 && (h == NULL
7377 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
7378 || h->root.type != bfd_link_hash_undefweak)
7379 && r_type != R_ARM_PC24
7380 && r_type != R_ARM_CALL
7381 && r_type != R_ARM_JUMP24
7382 && r_type != R_ARM_PREL31
7383 && r_type != R_ARM_PLT32)
7384 {
7385 Elf_Internal_Rela outrel;
7386 bfd_boolean skip, relocate;
7387
7388 *unresolved_reloc_p = FALSE;
7389
7390 if (sreloc == NULL)
7391 {
7392 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
7393 ! globals->use_rel);
7394
7395 if (sreloc == NULL)
7396 return bfd_reloc_notsupported;
7397 }
7398
7399 skip = FALSE;
7400 relocate = FALSE;
7401
7402 outrel.r_addend = addend;
7403 outrel.r_offset =
7404 _bfd_elf_section_offset (output_bfd, info, input_section,
7405 rel->r_offset);
7406 if (outrel.r_offset == (bfd_vma) -1)
7407 skip = TRUE;
7408 else if (outrel.r_offset == (bfd_vma) -2)
7409 skip = TRUE, relocate = TRUE;
7410 outrel.r_offset += (input_section->output_section->vma
7411 + input_section->output_offset);
7412
7413 if (skip)
7414 memset (&outrel, 0, sizeof outrel);
7415 else if (h != NULL
7416 && h->dynindx != -1
7417 && (!info->shared
7418 || !info->symbolic
7419 || !h->def_regular))
7420 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
7421 else
7422 {
7423 int symbol;
7424
7425 /* This symbol is local, or marked to become local. */
7426 if (sym_flags == STT_ARM_TFUNC)
7427 value |= 1;
7428 if (globals->symbian_p)
7429 {
7430 asection *osec;
7431
7432 /* On Symbian OS, the data segment and text segement
7433 can be relocated independently. Therefore, we
7434 must indicate the segment to which this
7435 relocation is relative. The BPABI allows us to
7436 use any symbol in the right segment; we just use
7437 the section symbol as it is convenient. (We
7438 cannot use the symbol given by "h" directly as it
7439 will not appear in the dynamic symbol table.)
7440
7441 Note that the dynamic linker ignores the section
7442 symbol value, so we don't subtract osec->vma
7443 from the emitted reloc addend. */
7444 if (sym_sec)
7445 osec = sym_sec->output_section;
7446 else
7447 osec = input_section->output_section;
7448 symbol = elf_section_data (osec)->dynindx;
7449 if (symbol == 0)
7450 {
7451 struct elf_link_hash_table *htab = elf_hash_table (info);
7452
7453 if ((osec->flags & SEC_READONLY) == 0
7454 && htab->data_index_section != NULL)
7455 osec = htab->data_index_section;
7456 else
7457 osec = htab->text_index_section;
7458 symbol = elf_section_data (osec)->dynindx;
7459 }
7460 BFD_ASSERT (symbol != 0);
7461 }
7462 else
7463 /* On SVR4-ish systems, the dynamic loader cannot
7464 relocate the text and data segments independently,
7465 so the symbol does not matter. */
7466 symbol = 0;
7467 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
7468 if (globals->use_rel)
7469 relocate = TRUE;
7470 else
7471 outrel.r_addend += value;
7472 }
7473
7474 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
7475
7476 /* If this reloc is against an external symbol, we do not want to
7477 fiddle with the addend. Otherwise, we need to include the symbol
7478 value so that it becomes an addend for the dynamic reloc. */
7479 if (! relocate)
7480 return bfd_reloc_ok;
7481
7482 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7483 contents, rel->r_offset, value,
7484 (bfd_vma) 0);
7485 }
7486 else switch (r_type)
7487 {
7488 case R_ARM_ABS12:
7489 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7490
7491 case R_ARM_XPC25: /* Arm BLX instruction. */
7492 case R_ARM_CALL:
7493 case R_ARM_JUMP24:
7494 case R_ARM_PC24: /* Arm B/BL instruction. */
7495 case R_ARM_PLT32:
7496 {
7497 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7498
7499 if (r_type == R_ARM_XPC25)
7500 {
7501 /* Check for Arm calling Arm function. */
7502 /* FIXME: Should we translate the instruction into a BL
7503 instruction instead ? */
7504 if (sym_flags != STT_ARM_TFUNC)
7505 (*_bfd_error_handler)
7506 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
7507 input_bfd,
7508 h ? h->root.root.string : "(local)");
7509 }
7510 else if (r_type == R_ARM_PC24)
7511 {
7512 /* Check for Arm calling Thumb function. */
7513 if (sym_flags == STT_ARM_TFUNC)
7514 {
7515 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
7516 output_bfd, input_section,
7517 hit_data, sym_sec, rel->r_offset,
7518 signed_addend, value,
7519 error_message))
7520 return bfd_reloc_ok;
7521 else
7522 return bfd_reloc_dangerous;
7523 }
7524 }
7525
7526 /* Check if a stub has to be inserted because the
7527 destination is too far or we are changing mode. */
7528 if ( r_type == R_ARM_CALL
7529 || r_type == R_ARM_JUMP24
7530 || r_type == R_ARM_PLT32)
7531 {
7532 enum elf32_arm_stub_type stub_type = arm_stub_none;
7533 struct elf32_arm_link_hash_entry *hash;
7534
7535 hash = (struct elf32_arm_link_hash_entry *) h;
7536 stub_type = arm_type_of_stub (info, input_section, rel,
7537 &sym_flags, hash,
7538 value, sym_sec,
7539 input_bfd, sym_name);
7540
7541 if (stub_type != arm_stub_none)
7542 {
7543 /* The target is out of reach, so redirect the
7544 branch to the local stub for this function. */
7545
7546 stub_entry = elf32_arm_get_stub_entry (input_section,
7547 sym_sec, h,
7548 rel, globals,
7549 stub_type);
7550 if (stub_entry != NULL)
7551 value = (stub_entry->stub_offset
7552 + stub_entry->stub_sec->output_offset
7553 + stub_entry->stub_sec->output_section->vma);
7554 }
7555 else
7556 {
7557 /* If the call goes through a PLT entry, make sure to
7558 check distance to the right destination address. */
7559 if (h != NULL
7560 && splt != NULL
7561 && h->plt.offset != (bfd_vma) -1)
7562 {
7563 value = (splt->output_section->vma
7564 + splt->output_offset
7565 + h->plt.offset);
7566 *unresolved_reloc_p = FALSE;
7567 /* The PLT entry is in ARM mode, regardless of the
7568 target function. */
7569 sym_flags = STT_FUNC;
7570 }
7571 }
7572 }
7573
7574 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
7575 where:
7576 S is the address of the symbol in the relocation.
7577 P is address of the instruction being relocated.
7578 A is the addend (extracted from the instruction) in bytes.
7579
7580 S is held in 'value'.
7581 P is the base address of the section containing the
7582 instruction plus the offset of the reloc into that
7583 section, ie:
7584 (input_section->output_section->vma +
7585 input_section->output_offset +
7586 rel->r_offset).
7587 A is the addend, converted into bytes, ie:
7588 (signed_addend * 4)
7589
7590 Note: None of these operations have knowledge of the pipeline
7591 size of the processor, thus it is up to the assembler to
7592 encode this information into the addend. */
7593 value -= (input_section->output_section->vma
7594 + input_section->output_offset);
7595 value -= rel->r_offset;
7596 if (globals->use_rel)
7597 value += (signed_addend << howto->size);
7598 else
7599 /* RELA addends do not have to be adjusted by howto->size. */
7600 value += signed_addend;
7601
7602 signed_addend = value;
7603 signed_addend >>= howto->rightshift;
7604
7605 /* A branch to an undefined weak symbol is turned into a jump to
7606 the next instruction unless a PLT entry will be created.
7607 Do the same for local undefined symbols (but not for STN_UNDEF).
7608 The jump to the next instruction is optimized as a NOP depending
7609 on the architecture. */
7610 if (h ? (h->root.type == bfd_link_hash_undefweak
7611 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
7612 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
7613 {
7614 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
7615
7616 if (arch_has_arm_nop (globals))
7617 value |= 0x0320f000;
7618 else
7619 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
7620 }
7621 else
7622 {
7623 /* Perform a signed range check. */
7624 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
7625 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7626 return bfd_reloc_overflow;
7627
7628 addend = (value & 2);
7629
7630 value = (signed_addend & howto->dst_mask)
7631 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
7632
7633 if (r_type == R_ARM_CALL)
7634 {
7635 /* Set the H bit in the BLX instruction. */
7636 if (sym_flags == STT_ARM_TFUNC)
7637 {
7638 if (addend)
7639 value |= (1 << 24);
7640 else
7641 value &= ~(bfd_vma)(1 << 24);
7642 }
7643
7644 /* Select the correct instruction (BL or BLX). */
7645 /* Only if we are not handling a BL to a stub. In this
7646 case, mode switching is performed by the stub. */
7647 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
7648 value |= (1 << 28);
7649 else
7650 {
7651 value &= ~(bfd_vma)(1 << 28);
7652 value |= (1 << 24);
7653 }
7654 }
7655 }
7656 }
7657 break;
7658
7659 case R_ARM_ABS32:
7660 value += addend;
7661 if (sym_flags == STT_ARM_TFUNC)
7662 value |= 1;
7663 break;
7664
7665 case R_ARM_ABS32_NOI:
7666 value += addend;
7667 break;
7668
7669 case R_ARM_REL32:
7670 value += addend;
7671 if (sym_flags == STT_ARM_TFUNC)
7672 value |= 1;
7673 value -= (input_section->output_section->vma
7674 + input_section->output_offset + rel->r_offset);
7675 break;
7676
7677 case R_ARM_REL32_NOI:
7678 value += addend;
7679 value -= (input_section->output_section->vma
7680 + input_section->output_offset + rel->r_offset);
7681 break;
7682
7683 case R_ARM_PREL31:
7684 value -= (input_section->output_section->vma
7685 + input_section->output_offset + rel->r_offset);
7686 value += signed_addend;
7687 if (! h || h->root.type != bfd_link_hash_undefweak)
7688 {
7689 /* Check for overflow. */
7690 if ((value ^ (value >> 1)) & (1 << 30))
7691 return bfd_reloc_overflow;
7692 }
7693 value &= 0x7fffffff;
7694 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7695 if (sym_flags == STT_ARM_TFUNC)
7696 value |= 1;
7697 break;
7698 }
7699
7700 bfd_put_32 (input_bfd, value, hit_data);
7701 return bfd_reloc_ok;
7702
7703 case R_ARM_ABS8:
7704 value += addend;
7705
7706 /* There is no way to tell whether the user intended to use a signed or
7707 unsigned addend. When checking for overflow we accept either,
7708 as specified by the AAELF. */
7709 if ((long) value > 0xff || (long) value < -0x80)
7710 return bfd_reloc_overflow;
7711
7712 bfd_put_8 (input_bfd, value, hit_data);
7713 return bfd_reloc_ok;
7714
7715 case R_ARM_ABS16:
7716 value += addend;
7717
7718 /* See comment for R_ARM_ABS8. */
7719 if ((long) value > 0xffff || (long) value < -0x8000)
7720 return bfd_reloc_overflow;
7721
7722 bfd_put_16 (input_bfd, value, hit_data);
7723 return bfd_reloc_ok;
7724
7725 case R_ARM_THM_ABS5:
7726 /* Support ldr and str instructions for the thumb. */
7727 if (globals->use_rel)
7728 {
7729 /* Need to refetch addend. */
7730 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7731 /* ??? Need to determine shift amount from operand size. */
7732 addend >>= howto->rightshift;
7733 }
7734 value += addend;
7735
7736 /* ??? Isn't value unsigned? */
7737 if ((long) value > 0x1f || (long) value < -0x10)
7738 return bfd_reloc_overflow;
7739
7740 /* ??? Value needs to be properly shifted into place first. */
7741 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7742 bfd_put_16 (input_bfd, value, hit_data);
7743 return bfd_reloc_ok;
7744
7745 case R_ARM_THM_ALU_PREL_11_0:
7746 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7747 {
7748 bfd_vma insn;
7749 bfd_signed_vma relocation;
7750
7751 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7752 | bfd_get_16 (input_bfd, hit_data + 2);
7753
7754 if (globals->use_rel)
7755 {
7756 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7757 | ((insn & (1 << 26)) >> 15);
7758 if (insn & 0xf00000)
7759 signed_addend = -signed_addend;
7760 }
7761
7762 relocation = value + signed_addend;
7763 relocation -= (input_section->output_section->vma
7764 + input_section->output_offset
7765 + rel->r_offset);
7766
7767 value = abs (relocation);
7768
7769 if (value >= 0x1000)
7770 return bfd_reloc_overflow;
7771
7772 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7773 | ((value & 0x700) << 4)
7774 | ((value & 0x800) << 15);
7775 if (relocation < 0)
7776 insn |= 0xa00000;
7777
7778 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7779 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7780
7781 return bfd_reloc_ok;
7782 }
7783
7784 case R_ARM_THM_PC8:
7785 /* PR 10073: This reloc is not generated by the GNU toolchain,
7786 but it is supported for compatibility with third party libraries
7787 generated by other compilers, specifically the ARM/IAR. */
7788 {
7789 bfd_vma insn;
7790 bfd_signed_vma relocation;
7791
7792 insn = bfd_get_16 (input_bfd, hit_data);
7793
7794 if (globals->use_rel)
7795 addend = (insn & 0x00ff) << 2;
7796
7797 relocation = value + addend;
7798 relocation -= (input_section->output_section->vma
7799 + input_section->output_offset
7800 + rel->r_offset);
7801
7802 value = abs (relocation);
7803
7804 /* We do not check for overflow of this reloc. Although strictly
7805 speaking this is incorrect, it appears to be necessary in order
7806 to work with IAR generated relocs. Since GCC and GAS do not
7807 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7808 a problem for them. */
7809 value &= 0x3fc;
7810
7811 insn = (insn & 0xff00) | (value >> 2);
7812
7813 bfd_put_16 (input_bfd, insn, hit_data);
7814
7815 return bfd_reloc_ok;
7816 }
7817
7818 case R_ARM_THM_PC12:
7819 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7820 {
7821 bfd_vma insn;
7822 bfd_signed_vma relocation;
7823
7824 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7825 | bfd_get_16 (input_bfd, hit_data + 2);
7826
7827 if (globals->use_rel)
7828 {
7829 signed_addend = insn & 0xfff;
7830 if (!(insn & (1 << 23)))
7831 signed_addend = -signed_addend;
7832 }
7833
7834 relocation = value + signed_addend;
7835 relocation -= (input_section->output_section->vma
7836 + input_section->output_offset
7837 + rel->r_offset);
7838
7839 value = abs (relocation);
7840
7841 if (value >= 0x1000)
7842 return bfd_reloc_overflow;
7843
7844 insn = (insn & 0xff7ff000) | value;
7845 if (relocation >= 0)
7846 insn |= (1 << 23);
7847
7848 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7849 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7850
7851 return bfd_reloc_ok;
7852 }
7853
7854 case R_ARM_THM_XPC22:
7855 case R_ARM_THM_CALL:
7856 case R_ARM_THM_JUMP24:
7857 /* Thumb BL (branch long instruction). */
7858 {
7859 bfd_vma relocation;
7860 bfd_vma reloc_sign;
7861 bfd_boolean overflow = FALSE;
7862 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7863 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
7864 bfd_signed_vma reloc_signed_max;
7865 bfd_signed_vma reloc_signed_min;
7866 bfd_vma check;
7867 bfd_signed_vma signed_check;
7868 int bitsize;
7869 const int thumb2 = using_thumb2 (globals);
7870
7871 /* A branch to an undefined weak symbol is turned into a jump to
7872 the next instruction unless a PLT entry will be created.
7873 The jump to the next instruction is optimized as a NOP.W for
7874 Thumb-2 enabled architectures. */
7875 if (h && h->root.type == bfd_link_hash_undefweak
7876 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
7877 {
7878 if (arch_has_thumb2_nop (globals))
7879 {
7880 bfd_put_16 (input_bfd, 0xf3af, hit_data);
7881 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
7882 }
7883 else
7884 {
7885 bfd_put_16 (input_bfd, 0xe000, hit_data);
7886 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7887 }
7888 return bfd_reloc_ok;
7889 }
7890
7891 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7892 with Thumb-1) involving the J1 and J2 bits. */
7893 if (globals->use_rel)
7894 {
7895 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7896 bfd_vma upper = upper_insn & 0x3ff;
7897 bfd_vma lower = lower_insn & 0x7ff;
7898 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7899 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7900 bfd_vma i1 = j1 ^ s ? 0 : 1;
7901 bfd_vma i2 = j2 ^ s ? 0 : 1;
7902
7903 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7904 /* Sign extend. */
7905 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7906
7907 signed_addend = addend;
7908 }
7909
7910 if (r_type == R_ARM_THM_XPC22)
7911 {
7912 /* Check for Thumb to Thumb call. */
7913 /* FIXME: Should we translate the instruction into a BL
7914 instruction instead ? */
7915 if (sym_flags == STT_ARM_TFUNC)
7916 (*_bfd_error_handler)
7917 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7918 input_bfd,
7919 h ? h->root.root.string : "(local)");
7920 }
7921 else
7922 {
7923 /* If it is not a call to Thumb, assume call to Arm.
7924 If it is a call relative to a section name, then it is not a
7925 function call at all, but rather a long jump. Calls through
7926 the PLT do not require stubs. */
7927 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7928 && (h == NULL || splt == NULL
7929 || h->plt.offset == (bfd_vma) -1))
7930 {
7931 if (globals->use_blx && r_type == R_ARM_THM_CALL)
7932 {
7933 /* Convert BL to BLX. */
7934 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7935 }
7936 else if (( r_type != R_ARM_THM_CALL)
7937 && (r_type != R_ARM_THM_JUMP24))
7938 {
7939 if (elf32_thumb_to_arm_stub
7940 (info, sym_name, input_bfd, output_bfd, input_section,
7941 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7942 error_message))
7943 return bfd_reloc_ok;
7944 else
7945 return bfd_reloc_dangerous;
7946 }
7947 }
7948 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7949 && r_type == R_ARM_THM_CALL)
7950 {
7951 /* Make sure this is a BL. */
7952 lower_insn |= 0x1800;
7953 }
7954 }
7955
7956 enum elf32_arm_stub_type stub_type = arm_stub_none;
7957 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
7958 {
7959 /* Check if a stub has to be inserted because the destination
7960 is too far. */
7961 struct elf32_arm_stub_hash_entry *stub_entry;
7962 struct elf32_arm_link_hash_entry *hash;
7963
7964 hash = (struct elf32_arm_link_hash_entry *) h;
7965
7966 stub_type = arm_type_of_stub (info, input_section, rel,
7967 &sym_flags, hash, value, sym_sec,
7968 input_bfd, sym_name);
7969
7970 if (stub_type != arm_stub_none)
7971 {
7972 /* The target is out of reach or we are changing modes, so
7973 redirect the branch to the local stub for this
7974 function. */
7975 stub_entry = elf32_arm_get_stub_entry (input_section,
7976 sym_sec, h,
7977 rel, globals,
7978 stub_type);
7979 if (stub_entry != NULL)
7980 value = (stub_entry->stub_offset
7981 + stub_entry->stub_sec->output_offset
7982 + stub_entry->stub_sec->output_section->vma);
7983
7984 /* If this call becomes a call to Arm, force BLX. */
7985 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
7986 {
7987 if ((stub_entry
7988 && !arm_stub_is_thumb (stub_entry->stub_type))
7989 || (sym_flags != STT_ARM_TFUNC))
7990 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7991 }
7992 }
7993 }
7994
7995 /* Handle calls via the PLT. */
7996 if (stub_type == arm_stub_none
7997 && h != NULL
7998 && splt != NULL
7999 && h->plt.offset != (bfd_vma) -1)
8000 {
8001 value = (splt->output_section->vma
8002 + splt->output_offset
8003 + h->plt.offset);
8004
8005 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8006 {
8007 /* If the Thumb BLX instruction is available, convert
8008 the BL to a BLX instruction to call the ARM-mode
8009 PLT entry. */
8010 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8011 sym_flags = STT_FUNC;
8012 }
8013 else
8014 {
8015 /* Target the Thumb stub before the ARM PLT entry. */
8016 value -= PLT_THUMB_STUB_SIZE;
8017 sym_flags = STT_ARM_TFUNC;
8018 }
8019 *unresolved_reloc_p = FALSE;
8020 }
8021
8022 relocation = value + signed_addend;
8023
8024 relocation -= (input_section->output_section->vma
8025 + input_section->output_offset
8026 + rel->r_offset);
8027
8028 check = relocation >> howto->rightshift;
8029
8030 /* If this is a signed value, the rightshift just dropped
8031 leading 1 bits (assuming twos complement). */
8032 if ((bfd_signed_vma) relocation >= 0)
8033 signed_check = check;
8034 else
8035 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8036
8037 /* Calculate the permissable maximum and minimum values for
8038 this relocation according to whether we're relocating for
8039 Thumb-2 or not. */
8040 bitsize = howto->bitsize;
8041 if (!thumb2)
8042 bitsize -= 2;
8043 reloc_signed_max = (1 << (bitsize - 1)) - 1;
8044 reloc_signed_min = ~reloc_signed_max;
8045
8046 /* Assumes two's complement. */
8047 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8048 overflow = TRUE;
8049
8050 if ((lower_insn & 0x5000) == 0x4000)
8051 /* For a BLX instruction, make sure that the relocation is rounded up
8052 to a word boundary. This follows the semantics of the instruction
8053 which specifies that bit 1 of the target address will come from bit
8054 1 of the base address. */
8055 relocation = (relocation + 2) & ~ 3;
8056
8057 /* Put RELOCATION back into the insn. Assumes two's complement.
8058 We use the Thumb-2 encoding, which is safe even if dealing with
8059 a Thumb-1 instruction by virtue of our overflow check above. */
8060 reloc_sign = (signed_check < 0) ? 1 : 0;
8061 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8062 | ((relocation >> 12) & 0x3ff)
8063 | (reloc_sign << 10);
8064 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
8065 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8066 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8067 | ((relocation >> 1) & 0x7ff);
8068
8069 /* Put the relocated value back in the object file: */
8070 bfd_put_16 (input_bfd, upper_insn, hit_data);
8071 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8072
8073 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8074 }
8075 break;
8076
8077 case R_ARM_THM_JUMP19:
8078 /* Thumb32 conditional branch instruction. */
8079 {
8080 bfd_vma relocation;
8081 bfd_boolean overflow = FALSE;
8082 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8083 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8084 bfd_signed_vma reloc_signed_max = 0xffffe;
8085 bfd_signed_vma reloc_signed_min = -0x100000;
8086 bfd_signed_vma signed_check;
8087
8088 /* Need to refetch the addend, reconstruct the top three bits,
8089 and squish the two 11 bit pieces together. */
8090 if (globals->use_rel)
8091 {
8092 bfd_vma S = (upper_insn & 0x0400) >> 10;
8093 bfd_vma upper = (upper_insn & 0x003f);
8094 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8095 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8096 bfd_vma lower = (lower_insn & 0x07ff);
8097
8098 upper |= J1 << 6;
8099 upper |= J2 << 7;
8100 upper |= (!S) << 8;
8101 upper -= 0x0100; /* Sign extend. */
8102
8103 addend = (upper << 12) | (lower << 1);
8104 signed_addend = addend;
8105 }
8106
8107 /* Handle calls via the PLT. */
8108 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
8109 {
8110 value = (splt->output_section->vma
8111 + splt->output_offset
8112 + h->plt.offset);
8113 /* Target the Thumb stub before the ARM PLT entry. */
8114 value -= PLT_THUMB_STUB_SIZE;
8115 *unresolved_reloc_p = FALSE;
8116 }
8117
8118 /* ??? Should handle interworking? GCC might someday try to
8119 use this for tail calls. */
8120
8121 relocation = value + signed_addend;
8122 relocation -= (input_section->output_section->vma
8123 + input_section->output_offset
8124 + rel->r_offset);
8125 signed_check = (bfd_signed_vma) relocation;
8126
8127 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8128 overflow = TRUE;
8129
8130 /* Put RELOCATION back into the insn. */
8131 {
8132 bfd_vma S = (relocation & 0x00100000) >> 20;
8133 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8134 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8135 bfd_vma hi = (relocation & 0x0003f000) >> 12;
8136 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
8137
8138 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
8139 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
8140 }
8141
8142 /* Put the relocated value back in the object file: */
8143 bfd_put_16 (input_bfd, upper_insn, hit_data);
8144 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8145
8146 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8147 }
8148
8149 case R_ARM_THM_JUMP11:
8150 case R_ARM_THM_JUMP8:
8151 case R_ARM_THM_JUMP6:
8152 /* Thumb B (branch) instruction). */
8153 {
8154 bfd_signed_vma relocation;
8155 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
8156 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
8157 bfd_signed_vma signed_check;
8158
8159 /* CZB cannot jump backward. */
8160 if (r_type == R_ARM_THM_JUMP6)
8161 reloc_signed_min = 0;
8162
8163 if (globals->use_rel)
8164 {
8165 /* Need to refetch addend. */
8166 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8167 if (addend & ((howto->src_mask + 1) >> 1))
8168 {
8169 signed_addend = -1;
8170 signed_addend &= ~ howto->src_mask;
8171 signed_addend |= addend;
8172 }
8173 else
8174 signed_addend = addend;
8175 /* The value in the insn has been right shifted. We need to
8176 undo this, so that we can perform the address calculation
8177 in terms of bytes. */
8178 signed_addend <<= howto->rightshift;
8179 }
8180 relocation = value + signed_addend;
8181
8182 relocation -= (input_section->output_section->vma
8183 + input_section->output_offset
8184 + rel->r_offset);
8185
8186 relocation >>= howto->rightshift;
8187 signed_check = relocation;
8188
8189 if (r_type == R_ARM_THM_JUMP6)
8190 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
8191 else
8192 relocation &= howto->dst_mask;
8193 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
8194
8195 bfd_put_16 (input_bfd, relocation, hit_data);
8196
8197 /* Assumes two's complement. */
8198 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8199 return bfd_reloc_overflow;
8200
8201 return bfd_reloc_ok;
8202 }
8203
8204 case R_ARM_ALU_PCREL7_0:
8205 case R_ARM_ALU_PCREL15_8:
8206 case R_ARM_ALU_PCREL23_15:
8207 {
8208 bfd_vma insn;
8209 bfd_vma relocation;
8210
8211 insn = bfd_get_32 (input_bfd, hit_data);
8212 if (globals->use_rel)
8213 {
8214 /* Extract the addend. */
8215 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
8216 signed_addend = addend;
8217 }
8218 relocation = value + signed_addend;
8219
8220 relocation -= (input_section->output_section->vma
8221 + input_section->output_offset
8222 + rel->r_offset);
8223 insn = (insn & ~0xfff)
8224 | ((howto->bitpos << 7) & 0xf00)
8225 | ((relocation >> howto->bitpos) & 0xff);
8226 bfd_put_32 (input_bfd, value, hit_data);
8227 }
8228 return bfd_reloc_ok;
8229
8230 case R_ARM_GNU_VTINHERIT:
8231 case R_ARM_GNU_VTENTRY:
8232 return bfd_reloc_ok;
8233
8234 case R_ARM_GOTOFF32:
8235 /* Relocation is relative to the start of the
8236 global offset table. */
8237
8238 BFD_ASSERT (sgot != NULL);
8239 if (sgot == NULL)
8240 return bfd_reloc_notsupported;
8241
8242 /* If we are addressing a Thumb function, we need to adjust the
8243 address by one, so that attempts to call the function pointer will
8244 correctly interpret it as Thumb code. */
8245 if (sym_flags == STT_ARM_TFUNC)
8246 value += 1;
8247
8248 /* Note that sgot->output_offset is not involved in this
8249 calculation. We always want the start of .got. If we
8250 define _GLOBAL_OFFSET_TABLE in a different way, as is
8251 permitted by the ABI, we might have to change this
8252 calculation. */
8253 value -= sgot->output_section->vma;
8254 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8255 contents, rel->r_offset, value,
8256 rel->r_addend);
8257
8258 case R_ARM_GOTPC:
8259 /* Use global offset table as symbol value. */
8260 BFD_ASSERT (sgot != NULL);
8261
8262 if (sgot == NULL)
8263 return bfd_reloc_notsupported;
8264
8265 *unresolved_reloc_p = FALSE;
8266 value = sgot->output_section->vma;
8267 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8268 contents, rel->r_offset, value,
8269 rel->r_addend);
8270
8271 case R_ARM_GOT32:
8272 case R_ARM_GOT_PREL:
8273 /* Relocation is to the entry for this symbol in the
8274 global offset table. */
8275 if (sgot == NULL)
8276 return bfd_reloc_notsupported;
8277
8278 if (h != NULL)
8279 {
8280 bfd_vma off;
8281
8282 off = h->got.offset;
8283 BFD_ASSERT (off != (bfd_vma) -1);
8284 if ((off & 1) != 0)
8285 {
8286 /* We have already processsed one GOT relocation against
8287 this symbol. */
8288 off &= ~1;
8289 if (globals->root.dynamic_sections_created
8290 && !SYMBOL_REFERENCES_LOCAL (info, h))
8291 *unresolved_reloc_p = FALSE;
8292 }
8293 else
8294 {
8295 Elf_Internal_Rela outrel;
8296
8297 if (!SYMBOL_REFERENCES_LOCAL (info, h))
8298 {
8299 /* If the symbol doesn't resolve locally in a static
8300 object, we have an undefined reference. If the
8301 symbol doesn't resolve locally in a dynamic object,
8302 it should be resolved by the dynamic linker. */
8303 if (globals->root.dynamic_sections_created)
8304 {
8305 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
8306 *unresolved_reloc_p = FALSE;
8307 }
8308 else
8309 outrel.r_info = 0;
8310 outrel.r_addend = 0;
8311 }
8312 else
8313 {
8314 if (info->shared)
8315 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
8316 else
8317 outrel.r_info = 0;
8318 outrel.r_addend = value;
8319 if (sym_flags == STT_ARM_TFUNC)
8320 outrel.r_addend |= 1;
8321 }
8322
8323 /* The GOT entry is initialized to zero by default.
8324 See if we should install a different value. */
8325 if (outrel.r_addend != 0
8326 && (outrel.r_info == 0 || globals->use_rel))
8327 {
8328 bfd_put_32 (output_bfd, outrel.r_addend,
8329 sgot->contents + off);
8330 outrel.r_addend = 0;
8331 }
8332
8333 if (outrel.r_info != 0)
8334 {
8335 outrel.r_offset = (sgot->output_section->vma
8336 + sgot->output_offset
8337 + off);
8338 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
8339 }
8340 h->got.offset |= 1;
8341 }
8342 value = sgot->output_offset + off;
8343 }
8344 else
8345 {
8346 bfd_vma off;
8347
8348 BFD_ASSERT (local_got_offsets != NULL &&
8349 local_got_offsets[r_symndx] != (bfd_vma) -1);
8350
8351 off = local_got_offsets[r_symndx];
8352
8353 /* The offset must always be a multiple of 4. We use the
8354 least significant bit to record whether we have already
8355 generated the necessary reloc. */
8356 if ((off & 1) != 0)
8357 off &= ~1;
8358 else
8359 {
8360 /* If we are addressing a Thumb function, we need to
8361 adjust the address by one, so that attempts to
8362 call the function pointer will correctly
8363 interpret it as Thumb code. */
8364 if (sym_flags == STT_ARM_TFUNC)
8365 value |= 1;
8366
8367 if (globals->use_rel)
8368 bfd_put_32 (output_bfd, value, sgot->contents + off);
8369
8370 if (info->shared)
8371 {
8372 Elf_Internal_Rela outrel;
8373
8374 BFD_ASSERT (srelgot != NULL);
8375
8376 outrel.r_addend = addend + value;
8377 outrel.r_offset = (sgot->output_section->vma
8378 + sgot->output_offset
8379 + off);
8380 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
8381 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
8382 }
8383
8384 local_got_offsets[r_symndx] |= 1;
8385 }
8386
8387 value = sgot->output_offset + off;
8388 }
8389 if (r_type != R_ARM_GOT32)
8390 value += sgot->output_section->vma;
8391
8392 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8393 contents, rel->r_offset, value,
8394 rel->r_addend);
8395
8396 case R_ARM_TLS_LDO32:
8397 value = value - dtpoff_base (info);
8398
8399 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8400 contents, rel->r_offset, value,
8401 rel->r_addend);
8402
8403 case R_ARM_TLS_LDM32:
8404 {
8405 bfd_vma off;
8406
8407 if (sgot == NULL)
8408 abort ();
8409
8410 off = globals->tls_ldm_got.offset;
8411
8412 if ((off & 1) != 0)
8413 off &= ~1;
8414 else
8415 {
8416 /* If we don't know the module number, create a relocation
8417 for it. */
8418 if (info->shared)
8419 {
8420 Elf_Internal_Rela outrel;
8421
8422 if (srelgot == NULL)
8423 abort ();
8424
8425 outrel.r_addend = 0;
8426 outrel.r_offset = (sgot->output_section->vma
8427 + sgot->output_offset + off);
8428 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
8429
8430 if (globals->use_rel)
8431 bfd_put_32 (output_bfd, outrel.r_addend,
8432 sgot->contents + off);
8433
8434 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
8435 }
8436 else
8437 bfd_put_32 (output_bfd, 1, sgot->contents + off);
8438
8439 globals->tls_ldm_got.offset |= 1;
8440 }
8441
8442 value = sgot->output_section->vma + sgot->output_offset + off
8443 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8444
8445 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8446 contents, rel->r_offset, value,
8447 rel->r_addend);
8448 }
8449
8450 case R_ARM_TLS_CALL:
8451 case R_ARM_THM_TLS_CALL:
8452 case R_ARM_TLS_GD32:
8453 case R_ARM_TLS_IE32:
8454 case R_ARM_TLS_GOTDESC:
8455 case R_ARM_TLS_DESCSEQ:
8456 case R_ARM_THM_TLS_DESCSEQ:
8457 {
8458 bfd_vma off, offplt;
8459 int indx = 0;
8460 char tls_type;
8461
8462 BFD_ASSERT (sgot != NULL);
8463
8464 if (h != NULL)
8465 {
8466 bfd_boolean dyn;
8467 dyn = globals->root.dynamic_sections_created;
8468 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8469 && (!info->shared
8470 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8471 {
8472 *unresolved_reloc_p = FALSE;
8473 indx = h->dynindx;
8474 }
8475 off = h->got.offset;
8476 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
8477 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
8478 }
8479 else
8480 {
8481 BFD_ASSERT (local_got_offsets != NULL);
8482 off = local_got_offsets[r_symndx];
8483 offplt = local_tlsdesc_gotents[r_symndx];
8484 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
8485 }
8486
8487 /* Linker relaxations happens from one of the
8488 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
8489 if (ELF32_R_TYPE(rel->r_info) != r_type)
8490 tls_type = GOT_TLS_IE;
8491
8492 BFD_ASSERT (tls_type != GOT_UNKNOWN);
8493
8494 if ((off & 1) != 0)
8495 off &= ~1;
8496 else
8497 {
8498 bfd_boolean need_relocs = FALSE;
8499 Elf_Internal_Rela outrel;
8500 int cur_off = off;
8501
8502 /* The GOT entries have not been initialized yet. Do it
8503 now, and emit any relocations. If both an IE GOT and a
8504 GD GOT are necessary, we emit the GD first. */
8505
8506 if ((info->shared || indx != 0)
8507 && (h == NULL
8508 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8509 || h->root.type != bfd_link_hash_undefweak))
8510 {
8511 need_relocs = TRUE;
8512 BFD_ASSERT (srelgot != NULL);
8513 }
8514
8515 if (tls_type & GOT_TLS_GDESC)
8516 {
8517 bfd_byte *loc;
8518
8519 /* We should have relaxed, unless this is an undefined
8520 weak symbol. */
8521 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
8522 || info->shared);
8523 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
8524 <= globals->root.sgotplt->size);
8525
8526 outrel.r_addend = 0;
8527 outrel.r_offset = (globals->root.sgotplt->output_section->vma
8528 + globals->root.sgotplt->output_offset
8529 + offplt
8530 + globals->sgotplt_jump_table_size);
8531
8532 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
8533 sreloc = globals->root.srelplt;
8534 loc = sreloc->contents;
8535 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
8536 BFD_ASSERT (loc + RELOC_SIZE (globals)
8537 <= sreloc->contents + sreloc->size);
8538
8539 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
8540
8541 /* For globals, the first word in the relocation gets
8542 the relocation index and the top bit set, or zero,
8543 if we're binding now. For locals, it gets the
8544 symbol's offset in the tls section. */
8545 bfd_put_32 (output_bfd,
8546 !h ? value - elf_hash_table (info)->tls_sec->vma
8547 : info->flags & DF_BIND_NOW ? 0
8548 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
8549 globals->root.sgotplt->contents + offplt +
8550 globals->sgotplt_jump_table_size);
8551
8552 /* Second word in the relocation is always zero. */
8553 bfd_put_32 (output_bfd, 0,
8554 globals->root.sgotplt->contents + offplt +
8555 globals->sgotplt_jump_table_size + 4);
8556 }
8557 if (tls_type & GOT_TLS_GD)
8558 {
8559 if (need_relocs)
8560 {
8561 outrel.r_addend = 0;
8562 outrel.r_offset = (sgot->output_section->vma
8563 + sgot->output_offset
8564 + cur_off);
8565 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
8566
8567 if (globals->use_rel)
8568 bfd_put_32 (output_bfd, outrel.r_addend,
8569 sgot->contents + cur_off);
8570
8571 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
8572
8573 if (indx == 0)
8574 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8575 sgot->contents + cur_off + 4);
8576 else
8577 {
8578 outrel.r_addend = 0;
8579 outrel.r_info = ELF32_R_INFO (indx,
8580 R_ARM_TLS_DTPOFF32);
8581 outrel.r_offset += 4;
8582
8583 if (globals->use_rel)
8584 bfd_put_32 (output_bfd, outrel.r_addend,
8585 sgot->contents + cur_off + 4);
8586
8587 elf32_arm_add_dynreloc (output_bfd, info,
8588 srelgot, &outrel);
8589 }
8590 }
8591 else
8592 {
8593 /* If we are not emitting relocations for a
8594 general dynamic reference, then we must be in a
8595 static link or an executable link with the
8596 symbol binding locally. Mark it as belonging
8597 to module 1, the executable. */
8598 bfd_put_32 (output_bfd, 1,
8599 sgot->contents + cur_off);
8600 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8601 sgot->contents + cur_off + 4);
8602 }
8603
8604 cur_off += 8;
8605 }
8606
8607 if (tls_type & GOT_TLS_IE)
8608 {
8609 if (need_relocs)
8610 {
8611 if (indx == 0)
8612 outrel.r_addend = value - dtpoff_base (info);
8613 else
8614 outrel.r_addend = 0;
8615 outrel.r_offset = (sgot->output_section->vma
8616 + sgot->output_offset
8617 + cur_off);
8618 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
8619
8620 if (globals->use_rel)
8621 bfd_put_32 (output_bfd, outrel.r_addend,
8622 sgot->contents + cur_off);
8623
8624 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
8625 }
8626 else
8627 bfd_put_32 (output_bfd, tpoff (info, value),
8628 sgot->contents + cur_off);
8629 cur_off += 4;
8630 }
8631
8632 if (h != NULL)
8633 h->got.offset |= 1;
8634 else
8635 local_got_offsets[r_symndx] |= 1;
8636 }
8637
8638 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
8639 off += 8;
8640 else if (tls_type & GOT_TLS_GDESC)
8641 off = offplt;
8642
8643 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
8644 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
8645 {
8646 bfd_signed_vma offset;
8647 enum elf32_arm_stub_type stub_type
8648 = arm_type_of_stub (info, input_section, rel, &sym_flags,
8649 (struct elf32_arm_link_hash_entry *)h,
8650 globals->tls_trampoline, globals->root.splt,
8651 input_bfd, sym_name);
8652
8653 if (stub_type != arm_stub_none)
8654 {
8655 struct elf32_arm_stub_hash_entry *stub_entry
8656 = elf32_arm_get_stub_entry
8657 (input_section, globals->root.splt, 0, rel,
8658 globals, stub_type);
8659 offset = (stub_entry->stub_offset
8660 + stub_entry->stub_sec->output_offset
8661 + stub_entry->stub_sec->output_section->vma);
8662 }
8663 else
8664 offset = (globals->root.splt->output_section->vma
8665 + globals->root.splt->output_offset
8666 + globals->tls_trampoline);
8667
8668 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
8669 {
8670 unsigned long inst;
8671
8672 offset -= (input_section->output_section->vma +
8673 input_section->output_offset + rel->r_offset + 8);
8674
8675 inst = offset >> 2;
8676 inst &= 0x00ffffff;
8677 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
8678 }
8679 else
8680 {
8681 /* Thumb blx encodes the offset in a complicated
8682 fashion. */
8683 unsigned upper_insn, lower_insn;
8684 unsigned neg;
8685
8686 offset -= (input_section->output_section->vma +
8687 input_section->output_offset
8688 + rel->r_offset + 4);
8689
8690 /* Round up the offset to a word boundary */
8691 offset = (offset + 2) & ~2;
8692 neg = offset < 0;
8693 upper_insn = (0xf000
8694 | ((offset >> 12) & 0x3ff)
8695 | (neg << 10));
8696 lower_insn = (0xc000
8697 | (((!((offset >> 23) & 1)) ^ neg) << 13)
8698 | (((!((offset >> 22) & 1)) ^ neg) << 11)
8699 | ((offset >> 1) & 0x7ff));
8700 bfd_put_16 (input_bfd, upper_insn, hit_data);
8701 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8702 return bfd_reloc_ok;
8703 }
8704 }
8705 /* These relocations needs special care, as besides the fact
8706 they point somewhere in .gotplt, the addend must be
8707 adjusted accordingly depending on the type of instruction
8708 we refer to */
8709 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
8710 {
8711 unsigned long data, insn;
8712 unsigned thumb;
8713
8714 data = bfd_get_32 (input_bfd, hit_data);
8715 thumb = data & 1;
8716 data &= ~1u;
8717
8718 if (thumb)
8719 {
8720 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
8721 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
8722 insn = (insn << 16)
8723 | bfd_get_16 (input_bfd,
8724 contents + rel->r_offset - data + 2);
8725 if ((insn & 0xf800c000) == 0xf000c000)
8726 /* bl/blx */
8727 value = -6;
8728 else if ((insn & 0xffffff00) == 0x4400)
8729 /* add */
8730 value = -5;
8731 else
8732 {
8733 (*_bfd_error_handler)
8734 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
8735 input_bfd, input_section,
8736 (unsigned long)rel->r_offset, insn);
8737 return bfd_reloc_notsupported;
8738 }
8739 }
8740 else
8741 {
8742 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
8743
8744 switch (insn >> 24)
8745 {
8746 case 0xeb: /* bl */
8747 case 0xfa: /* blx */
8748 value = -4;
8749 break;
8750
8751 case 0xe0: /* add */
8752 value = -8;
8753 break;
8754
8755 default:
8756 (*_bfd_error_handler)
8757 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
8758 input_bfd, input_section,
8759 (unsigned long)rel->r_offset, insn);
8760 return bfd_reloc_notsupported;
8761 }
8762 }
8763
8764 value += ((globals->root.sgotplt->output_section->vma
8765 + globals->root.sgotplt->output_offset + off)
8766 - (input_section->output_section->vma
8767 + input_section->output_offset
8768 + rel->r_offset)
8769 + globals->sgotplt_jump_table_size);
8770 }
8771 else
8772 value = ((globals->root.sgot->output_section->vma
8773 + globals->root.sgot->output_offset + off)
8774 - (input_section->output_section->vma
8775 + input_section->output_offset + rel->r_offset));
8776
8777 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8778 contents, rel->r_offset, value,
8779 rel->r_addend);
8780 }
8781
8782 case R_ARM_TLS_LE32:
8783 if (info->shared)
8784 {
8785 (*_bfd_error_handler)
8786 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
8787 input_bfd, input_section,
8788 (long) rel->r_offset, howto->name);
8789 return (bfd_reloc_status_type) FALSE;
8790 }
8791 else
8792 value = tpoff (info, value);
8793
8794 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8795 contents, rel->r_offset, value,
8796 rel->r_addend);
8797
8798 case R_ARM_V4BX:
8799 if (globals->fix_v4bx)
8800 {
8801 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8802
8803 /* Ensure that we have a BX instruction. */
8804 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
8805
8806 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8807 {
8808 /* Branch to veneer. */
8809 bfd_vma glue_addr;
8810 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8811 glue_addr -= input_section->output_section->vma
8812 + input_section->output_offset
8813 + rel->r_offset + 8;
8814 insn = (insn & 0xf0000000) | 0x0a000000
8815 | ((glue_addr >> 2) & 0x00ffffff);
8816 }
8817 else
8818 {
8819 /* Preserve Rm (lowest four bits) and the condition code
8820 (highest four bits). Other bits encode MOV PC,Rm. */
8821 insn = (insn & 0xf000000f) | 0x01a0f000;
8822 }
8823
8824 bfd_put_32 (input_bfd, insn, hit_data);
8825 }
8826 return bfd_reloc_ok;
8827
8828 case R_ARM_MOVW_ABS_NC:
8829 case R_ARM_MOVT_ABS:
8830 case R_ARM_MOVW_PREL_NC:
8831 case R_ARM_MOVT_PREL:
8832 /* Until we properly support segment-base-relative addressing then
8833 we assume the segment base to be zero, as for the group relocations.
8834 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8835 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8836 case R_ARM_MOVW_BREL_NC:
8837 case R_ARM_MOVW_BREL:
8838 case R_ARM_MOVT_BREL:
8839 {
8840 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8841
8842 if (globals->use_rel)
8843 {
8844 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
8845 signed_addend = (addend ^ 0x8000) - 0x8000;
8846 }
8847
8848 value += signed_addend;
8849
8850 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8851 value -= (input_section->output_section->vma
8852 + input_section->output_offset + rel->r_offset);
8853
8854 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8855 return bfd_reloc_overflow;
8856
8857 if (sym_flags == STT_ARM_TFUNC)
8858 value |= 1;
8859
8860 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8861 || r_type == R_ARM_MOVT_BREL)
8862 value >>= 16;
8863
8864 insn &= 0xfff0f000;
8865 insn |= value & 0xfff;
8866 insn |= (value & 0xf000) << 4;
8867 bfd_put_32 (input_bfd, insn, hit_data);
8868 }
8869 return bfd_reloc_ok;
8870
8871 case R_ARM_THM_MOVW_ABS_NC:
8872 case R_ARM_THM_MOVT_ABS:
8873 case R_ARM_THM_MOVW_PREL_NC:
8874 case R_ARM_THM_MOVT_PREL:
8875 /* Until we properly support segment-base-relative addressing then
8876 we assume the segment base to be zero, as for the above relocations.
8877 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8878 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8879 as R_ARM_THM_MOVT_ABS. */
8880 case R_ARM_THM_MOVW_BREL_NC:
8881 case R_ARM_THM_MOVW_BREL:
8882 case R_ARM_THM_MOVT_BREL:
8883 {
8884 bfd_vma insn;
8885
8886 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8887 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8888
8889 if (globals->use_rel)
8890 {
8891 addend = ((insn >> 4) & 0xf000)
8892 | ((insn >> 15) & 0x0800)
8893 | ((insn >> 4) & 0x0700)
8894 | (insn & 0x00ff);
8895 signed_addend = (addend ^ 0x8000) - 0x8000;
8896 }
8897
8898 value += signed_addend;
8899
8900 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8901 value -= (input_section->output_section->vma
8902 + input_section->output_offset + rel->r_offset);
8903
8904 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8905 return bfd_reloc_overflow;
8906
8907 if (sym_flags == STT_ARM_TFUNC)
8908 value |= 1;
8909
8910 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8911 || r_type == R_ARM_THM_MOVT_BREL)
8912 value >>= 16;
8913
8914 insn &= 0xfbf08f00;
8915 insn |= (value & 0xf000) << 4;
8916 insn |= (value & 0x0800) << 15;
8917 insn |= (value & 0x0700) << 4;
8918 insn |= (value & 0x00ff);
8919
8920 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8921 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8922 }
8923 return bfd_reloc_ok;
8924
8925 case R_ARM_ALU_PC_G0_NC:
8926 case R_ARM_ALU_PC_G1_NC:
8927 case R_ARM_ALU_PC_G0:
8928 case R_ARM_ALU_PC_G1:
8929 case R_ARM_ALU_PC_G2:
8930 case R_ARM_ALU_SB_G0_NC:
8931 case R_ARM_ALU_SB_G1_NC:
8932 case R_ARM_ALU_SB_G0:
8933 case R_ARM_ALU_SB_G1:
8934 case R_ARM_ALU_SB_G2:
8935 {
8936 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8937 bfd_vma pc = input_section->output_section->vma
8938 + input_section->output_offset + rel->r_offset;
8939 /* sb should be the origin of the *segment* containing the symbol.
8940 It is not clear how to obtain this OS-dependent value, so we
8941 make an arbitrary choice of zero. */
8942 bfd_vma sb = 0;
8943 bfd_vma residual;
8944 bfd_vma g_n;
8945 bfd_signed_vma signed_value;
8946 int group = 0;
8947
8948 /* Determine which group of bits to select. */
8949 switch (r_type)
8950 {
8951 case R_ARM_ALU_PC_G0_NC:
8952 case R_ARM_ALU_PC_G0:
8953 case R_ARM_ALU_SB_G0_NC:
8954 case R_ARM_ALU_SB_G0:
8955 group = 0;
8956 break;
8957
8958 case R_ARM_ALU_PC_G1_NC:
8959 case R_ARM_ALU_PC_G1:
8960 case R_ARM_ALU_SB_G1_NC:
8961 case R_ARM_ALU_SB_G1:
8962 group = 1;
8963 break;
8964
8965 case R_ARM_ALU_PC_G2:
8966 case R_ARM_ALU_SB_G2:
8967 group = 2;
8968 break;
8969
8970 default:
8971 abort ();
8972 }
8973
8974 /* If REL, extract the addend from the insn. If RELA, it will
8975 have already been fetched for us. */
8976 if (globals->use_rel)
8977 {
8978 int negative;
8979 bfd_vma constant = insn & 0xff;
8980 bfd_vma rotation = (insn & 0xf00) >> 8;
8981
8982 if (rotation == 0)
8983 signed_addend = constant;
8984 else
8985 {
8986 /* Compensate for the fact that in the instruction, the
8987 rotation is stored in multiples of 2 bits. */
8988 rotation *= 2;
8989
8990 /* Rotate "constant" right by "rotation" bits. */
8991 signed_addend = (constant >> rotation) |
8992 (constant << (8 * sizeof (bfd_vma) - rotation));
8993 }
8994
8995 /* Determine if the instruction is an ADD or a SUB.
8996 (For REL, this determines the sign of the addend.) */
8997 negative = identify_add_or_sub (insn);
8998 if (negative == 0)
8999 {
9000 (*_bfd_error_handler)
9001 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9002 input_bfd, input_section,
9003 (long) rel->r_offset, howto->name);
9004 return bfd_reloc_overflow;
9005 }
9006
9007 signed_addend *= negative;
9008 }
9009
9010 /* Compute the value (X) to go in the place. */
9011 if (r_type == R_ARM_ALU_PC_G0_NC
9012 || r_type == R_ARM_ALU_PC_G1_NC
9013 || r_type == R_ARM_ALU_PC_G0
9014 || r_type == R_ARM_ALU_PC_G1
9015 || r_type == R_ARM_ALU_PC_G2)
9016 /* PC relative. */
9017 signed_value = value - pc + signed_addend;
9018 else
9019 /* Section base relative. */
9020 signed_value = value - sb + signed_addend;
9021
9022 /* If the target symbol is a Thumb function, then set the
9023 Thumb bit in the address. */
9024 if (sym_flags == STT_ARM_TFUNC)
9025 signed_value |= 1;
9026
9027 /* Calculate the value of the relevant G_n, in encoded
9028 constant-with-rotation format. */
9029 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9030 &residual);
9031
9032 /* Check for overflow if required. */
9033 if ((r_type == R_ARM_ALU_PC_G0
9034 || r_type == R_ARM_ALU_PC_G1
9035 || r_type == R_ARM_ALU_PC_G2
9036 || r_type == R_ARM_ALU_SB_G0
9037 || r_type == R_ARM_ALU_SB_G1
9038 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9039 {
9040 (*_bfd_error_handler)
9041 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9042 input_bfd, input_section,
9043 (long) rel->r_offset, abs (signed_value), howto->name);
9044 return bfd_reloc_overflow;
9045 }
9046
9047 /* Mask out the value and the ADD/SUB part of the opcode; take care
9048 not to destroy the S bit. */
9049 insn &= 0xff1ff000;
9050
9051 /* Set the opcode according to whether the value to go in the
9052 place is negative. */
9053 if (signed_value < 0)
9054 insn |= 1 << 22;
9055 else
9056 insn |= 1 << 23;
9057
9058 /* Encode the offset. */
9059 insn |= g_n;
9060
9061 bfd_put_32 (input_bfd, insn, hit_data);
9062 }
9063 return bfd_reloc_ok;
9064
9065 case R_ARM_LDR_PC_G0:
9066 case R_ARM_LDR_PC_G1:
9067 case R_ARM_LDR_PC_G2:
9068 case R_ARM_LDR_SB_G0:
9069 case R_ARM_LDR_SB_G1:
9070 case R_ARM_LDR_SB_G2:
9071 {
9072 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9073 bfd_vma pc = input_section->output_section->vma
9074 + input_section->output_offset + rel->r_offset;
9075 bfd_vma sb = 0; /* See note above. */
9076 bfd_vma residual;
9077 bfd_signed_vma signed_value;
9078 int group = 0;
9079
9080 /* Determine which groups of bits to calculate. */
9081 switch (r_type)
9082 {
9083 case R_ARM_LDR_PC_G0:
9084 case R_ARM_LDR_SB_G0:
9085 group = 0;
9086 break;
9087
9088 case R_ARM_LDR_PC_G1:
9089 case R_ARM_LDR_SB_G1:
9090 group = 1;
9091 break;
9092
9093 case R_ARM_LDR_PC_G2:
9094 case R_ARM_LDR_SB_G2:
9095 group = 2;
9096 break;
9097
9098 default:
9099 abort ();
9100 }
9101
9102 /* If REL, extract the addend from the insn. If RELA, it will
9103 have already been fetched for us. */
9104 if (globals->use_rel)
9105 {
9106 int negative = (insn & (1 << 23)) ? 1 : -1;
9107 signed_addend = negative * (insn & 0xfff);
9108 }
9109
9110 /* Compute the value (X) to go in the place. */
9111 if (r_type == R_ARM_LDR_PC_G0
9112 || r_type == R_ARM_LDR_PC_G1
9113 || r_type == R_ARM_LDR_PC_G2)
9114 /* PC relative. */
9115 signed_value = value - pc + signed_addend;
9116 else
9117 /* Section base relative. */
9118 signed_value = value - sb + signed_addend;
9119
9120 /* Calculate the value of the relevant G_{n-1} to obtain
9121 the residual at that stage. */
9122 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9123
9124 /* Check for overflow. */
9125 if (residual >= 0x1000)
9126 {
9127 (*_bfd_error_handler)
9128 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9129 input_bfd, input_section,
9130 (long) rel->r_offset, abs (signed_value), howto->name);
9131 return bfd_reloc_overflow;
9132 }
9133
9134 /* Mask out the value and U bit. */
9135 insn &= 0xff7ff000;
9136
9137 /* Set the U bit if the value to go in the place is non-negative. */
9138 if (signed_value >= 0)
9139 insn |= 1 << 23;
9140
9141 /* Encode the offset. */
9142 insn |= residual;
9143
9144 bfd_put_32 (input_bfd, insn, hit_data);
9145 }
9146 return bfd_reloc_ok;
9147
9148 case R_ARM_LDRS_PC_G0:
9149 case R_ARM_LDRS_PC_G1:
9150 case R_ARM_LDRS_PC_G2:
9151 case R_ARM_LDRS_SB_G0:
9152 case R_ARM_LDRS_SB_G1:
9153 case R_ARM_LDRS_SB_G2:
9154 {
9155 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9156 bfd_vma pc = input_section->output_section->vma
9157 + input_section->output_offset + rel->r_offset;
9158 bfd_vma sb = 0; /* See note above. */
9159 bfd_vma residual;
9160 bfd_signed_vma signed_value;
9161 int group = 0;
9162
9163 /* Determine which groups of bits to calculate. */
9164 switch (r_type)
9165 {
9166 case R_ARM_LDRS_PC_G0:
9167 case R_ARM_LDRS_SB_G0:
9168 group = 0;
9169 break;
9170
9171 case R_ARM_LDRS_PC_G1:
9172 case R_ARM_LDRS_SB_G1:
9173 group = 1;
9174 break;
9175
9176 case R_ARM_LDRS_PC_G2:
9177 case R_ARM_LDRS_SB_G2:
9178 group = 2;
9179 break;
9180
9181 default:
9182 abort ();
9183 }
9184
9185 /* If REL, extract the addend from the insn. If RELA, it will
9186 have already been fetched for us. */
9187 if (globals->use_rel)
9188 {
9189 int negative = (insn & (1 << 23)) ? 1 : -1;
9190 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
9191 }
9192
9193 /* Compute the value (X) to go in the place. */
9194 if (r_type == R_ARM_LDRS_PC_G0
9195 || r_type == R_ARM_LDRS_PC_G1
9196 || r_type == R_ARM_LDRS_PC_G2)
9197 /* PC relative. */
9198 signed_value = value - pc + signed_addend;
9199 else
9200 /* Section base relative. */
9201 signed_value = value - sb + signed_addend;
9202
9203 /* Calculate the value of the relevant G_{n-1} to obtain
9204 the residual at that stage. */
9205 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9206
9207 /* Check for overflow. */
9208 if (residual >= 0x100)
9209 {
9210 (*_bfd_error_handler)
9211 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9212 input_bfd, input_section,
9213 (long) rel->r_offset, abs (signed_value), howto->name);
9214 return bfd_reloc_overflow;
9215 }
9216
9217 /* Mask out the value and U bit. */
9218 insn &= 0xff7ff0f0;
9219
9220 /* Set the U bit if the value to go in the place is non-negative. */
9221 if (signed_value >= 0)
9222 insn |= 1 << 23;
9223
9224 /* Encode the offset. */
9225 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
9226
9227 bfd_put_32 (input_bfd, insn, hit_data);
9228 }
9229 return bfd_reloc_ok;
9230
9231 case R_ARM_LDC_PC_G0:
9232 case R_ARM_LDC_PC_G1:
9233 case R_ARM_LDC_PC_G2:
9234 case R_ARM_LDC_SB_G0:
9235 case R_ARM_LDC_SB_G1:
9236 case R_ARM_LDC_SB_G2:
9237 {
9238 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9239 bfd_vma pc = input_section->output_section->vma
9240 + input_section->output_offset + rel->r_offset;
9241 bfd_vma sb = 0; /* See note above. */
9242 bfd_vma residual;
9243 bfd_signed_vma signed_value;
9244 int group = 0;
9245
9246 /* Determine which groups of bits to calculate. */
9247 switch (r_type)
9248 {
9249 case R_ARM_LDC_PC_G0:
9250 case R_ARM_LDC_SB_G0:
9251 group = 0;
9252 break;
9253
9254 case R_ARM_LDC_PC_G1:
9255 case R_ARM_LDC_SB_G1:
9256 group = 1;
9257 break;
9258
9259 case R_ARM_LDC_PC_G2:
9260 case R_ARM_LDC_SB_G2:
9261 group = 2;
9262 break;
9263
9264 default:
9265 abort ();
9266 }
9267
9268 /* If REL, extract the addend from the insn. If RELA, it will
9269 have already been fetched for us. */
9270 if (globals->use_rel)
9271 {
9272 int negative = (insn & (1 << 23)) ? 1 : -1;
9273 signed_addend = negative * ((insn & 0xff) << 2);
9274 }
9275
9276 /* Compute the value (X) to go in the place. */
9277 if (r_type == R_ARM_LDC_PC_G0
9278 || r_type == R_ARM_LDC_PC_G1
9279 || r_type == R_ARM_LDC_PC_G2)
9280 /* PC relative. */
9281 signed_value = value - pc + signed_addend;
9282 else
9283 /* Section base relative. */
9284 signed_value = value - sb + signed_addend;
9285
9286 /* Calculate the value of the relevant G_{n-1} to obtain
9287 the residual at that stage. */
9288 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9289
9290 /* Check for overflow. (The absolute value to go in the place must be
9291 divisible by four and, after having been divided by four, must
9292 fit in eight bits.) */
9293 if ((residual & 0x3) != 0 || residual >= 0x400)
9294 {
9295 (*_bfd_error_handler)
9296 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9297 input_bfd, input_section,
9298 (long) rel->r_offset, abs (signed_value), howto->name);
9299 return bfd_reloc_overflow;
9300 }
9301
9302 /* Mask out the value and U bit. */
9303 insn &= 0xff7fff00;
9304
9305 /* Set the U bit if the value to go in the place is non-negative. */
9306 if (signed_value >= 0)
9307 insn |= 1 << 23;
9308
9309 /* Encode the offset. */
9310 insn |= residual >> 2;
9311
9312 bfd_put_32 (input_bfd, insn, hit_data);
9313 }
9314 return bfd_reloc_ok;
9315
9316 default:
9317 return bfd_reloc_notsupported;
9318 }
9319 }
9320
9321 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
9322 static void
9323 arm_add_to_rel (bfd * abfd,
9324 bfd_byte * address,
9325 reloc_howto_type * howto,
9326 bfd_signed_vma increment)
9327 {
9328 bfd_signed_vma addend;
9329
9330 if (howto->type == R_ARM_THM_CALL
9331 || howto->type == R_ARM_THM_JUMP24)
9332 {
9333 int upper_insn, lower_insn;
9334 int upper, lower;
9335
9336 upper_insn = bfd_get_16 (abfd, address);
9337 lower_insn = bfd_get_16 (abfd, address + 2);
9338 upper = upper_insn & 0x7ff;
9339 lower = lower_insn & 0x7ff;
9340
9341 addend = (upper << 12) | (lower << 1);
9342 addend += increment;
9343 addend >>= 1;
9344
9345 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
9346 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
9347
9348 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
9349 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9350 }
9351 else
9352 {
9353 bfd_vma contents;
9354
9355 contents = bfd_get_32 (abfd, address);
9356
9357 /* Get the (signed) value from the instruction. */
9358 addend = contents & howto->src_mask;
9359 if (addend & ((howto->src_mask + 1) >> 1))
9360 {
9361 bfd_signed_vma mask;
9362
9363 mask = -1;
9364 mask &= ~ howto->src_mask;
9365 addend |= mask;
9366 }
9367
9368 /* Add in the increment, (which is a byte value). */
9369 switch (howto->type)
9370 {
9371 default:
9372 addend += increment;
9373 break;
9374
9375 case R_ARM_PC24:
9376 case R_ARM_PLT32:
9377 case R_ARM_CALL:
9378 case R_ARM_JUMP24:
9379 addend <<= howto->size;
9380 addend += increment;
9381
9382 /* Should we check for overflow here ? */
9383
9384 /* Drop any undesired bits. */
9385 addend >>= howto->rightshift;
9386 break;
9387 }
9388
9389 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
9390
9391 bfd_put_32 (abfd, contents, address);
9392 }
9393 }
9394
9395 #define IS_ARM_TLS_RELOC(R_TYPE) \
9396 ((R_TYPE) == R_ARM_TLS_GD32 \
9397 || (R_TYPE) == R_ARM_TLS_LDO32 \
9398 || (R_TYPE) == R_ARM_TLS_LDM32 \
9399 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
9400 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
9401 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
9402 || (R_TYPE) == R_ARM_TLS_LE32 \
9403 || (R_TYPE) == R_ARM_TLS_IE32 \
9404 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
9405
9406 /* Specific set of relocations for the gnu tls dialect. */
9407 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
9408 ((R_TYPE) == R_ARM_TLS_GOTDESC \
9409 || (R_TYPE) == R_ARM_TLS_CALL \
9410 || (R_TYPE) == R_ARM_THM_TLS_CALL \
9411 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
9412 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
9413
9414 /* Relocate an ARM ELF section. */
9415
9416 static bfd_boolean
9417 elf32_arm_relocate_section (bfd * output_bfd,
9418 struct bfd_link_info * info,
9419 bfd * input_bfd,
9420 asection * input_section,
9421 bfd_byte * contents,
9422 Elf_Internal_Rela * relocs,
9423 Elf_Internal_Sym * local_syms,
9424 asection ** local_sections)
9425 {
9426 Elf_Internal_Shdr *symtab_hdr;
9427 struct elf_link_hash_entry **sym_hashes;
9428 Elf_Internal_Rela *rel;
9429 Elf_Internal_Rela *relend;
9430 const char *name;
9431 struct elf32_arm_link_hash_table * globals;
9432
9433 globals = elf32_arm_hash_table (info);
9434 if (globals == NULL)
9435 return FALSE;
9436
9437 symtab_hdr = & elf_symtab_hdr (input_bfd);
9438 sym_hashes = elf_sym_hashes (input_bfd);
9439
9440 rel = relocs;
9441 relend = relocs + input_section->reloc_count;
9442 for (; rel < relend; rel++)
9443 {
9444 int r_type;
9445 reloc_howto_type * howto;
9446 unsigned long r_symndx;
9447 Elf_Internal_Sym * sym;
9448 asection * sec;
9449 struct elf_link_hash_entry * h;
9450 bfd_vma relocation;
9451 bfd_reloc_status_type r;
9452 arelent bfd_reloc;
9453 char sym_type;
9454 bfd_boolean unresolved_reloc = FALSE;
9455 char *error_message = NULL;
9456
9457 r_symndx = ELF32_R_SYM (rel->r_info);
9458 r_type = ELF32_R_TYPE (rel->r_info);
9459 r_type = arm_real_reloc_type (globals, r_type);
9460
9461 if ( r_type == R_ARM_GNU_VTENTRY
9462 || r_type == R_ARM_GNU_VTINHERIT)
9463 continue;
9464
9465 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
9466 howto = bfd_reloc.howto;
9467
9468 h = NULL;
9469 sym = NULL;
9470 sec = NULL;
9471
9472 if (r_symndx < symtab_hdr->sh_info)
9473 {
9474 sym = local_syms + r_symndx;
9475 sym_type = ELF32_ST_TYPE (sym->st_info);
9476 sec = local_sections[r_symndx];
9477
9478 /* An object file might have a reference to a local
9479 undefined symbol. This is a daft object file, but we
9480 should at least do something about it. V4BX & NONE
9481 relocations do not use the symbol and are explicitly
9482 allowed to use the undefined symbol, so allow those.
9483 Likewise for relocations against STN_UNDEF. */
9484 if (r_type != R_ARM_V4BX
9485 && r_type != R_ARM_NONE
9486 && r_symndx != STN_UNDEF
9487 && bfd_is_und_section (sec)
9488 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
9489 {
9490 if (!info->callbacks->undefined_symbol
9491 (info, bfd_elf_string_from_elf_section
9492 (input_bfd, symtab_hdr->sh_link, sym->st_name),
9493 input_bfd, input_section,
9494 rel->r_offset, TRUE))
9495 return FALSE;
9496 }
9497
9498 if (globals->use_rel)
9499 {
9500 relocation = (sec->output_section->vma
9501 + sec->output_offset
9502 + sym->st_value);
9503 if (!info->relocatable
9504 && (sec->flags & SEC_MERGE)
9505 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
9506 {
9507 asection *msec;
9508 bfd_vma addend, value;
9509
9510 switch (r_type)
9511 {
9512 case R_ARM_MOVW_ABS_NC:
9513 case R_ARM_MOVT_ABS:
9514 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
9515 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
9516 addend = (addend ^ 0x8000) - 0x8000;
9517 break;
9518
9519 case R_ARM_THM_MOVW_ABS_NC:
9520 case R_ARM_THM_MOVT_ABS:
9521 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
9522 << 16;
9523 value |= bfd_get_16 (input_bfd,
9524 contents + rel->r_offset + 2);
9525 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
9526 | ((value & 0x04000000) >> 15);
9527 addend = (addend ^ 0x8000) - 0x8000;
9528 break;
9529
9530 default:
9531 if (howto->rightshift
9532 || (howto->src_mask & (howto->src_mask + 1)))
9533 {
9534 (*_bfd_error_handler)
9535 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
9536 input_bfd, input_section,
9537 (long) rel->r_offset, howto->name);
9538 return FALSE;
9539 }
9540
9541 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
9542
9543 /* Get the (signed) value from the instruction. */
9544 addend = value & howto->src_mask;
9545 if (addend & ((howto->src_mask + 1) >> 1))
9546 {
9547 bfd_signed_vma mask;
9548
9549 mask = -1;
9550 mask &= ~ howto->src_mask;
9551 addend |= mask;
9552 }
9553 break;
9554 }
9555
9556 msec = sec;
9557 addend =
9558 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
9559 - relocation;
9560 addend += msec->output_section->vma + msec->output_offset;
9561
9562 /* Cases here must match those in the preceeding
9563 switch statement. */
9564 switch (r_type)
9565 {
9566 case R_ARM_MOVW_ABS_NC:
9567 case R_ARM_MOVT_ABS:
9568 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
9569 | (addend & 0xfff);
9570 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
9571 break;
9572
9573 case R_ARM_THM_MOVW_ABS_NC:
9574 case R_ARM_THM_MOVT_ABS:
9575 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
9576 | (addend & 0xff) | ((addend & 0x0800) << 15);
9577 bfd_put_16 (input_bfd, value >> 16,
9578 contents + rel->r_offset);
9579 bfd_put_16 (input_bfd, value,
9580 contents + rel->r_offset + 2);
9581 break;
9582
9583 default:
9584 value = (value & ~ howto->dst_mask)
9585 | (addend & howto->dst_mask);
9586 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
9587 break;
9588 }
9589 }
9590 }
9591 else
9592 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
9593 }
9594 else
9595 {
9596 bfd_boolean warned;
9597
9598 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
9599 r_symndx, symtab_hdr, sym_hashes,
9600 h, sec, relocation,
9601 unresolved_reloc, warned);
9602
9603 sym_type = h->type;
9604 }
9605
9606 if (sec != NULL && elf_discarded_section (sec))
9607 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
9608 rel, relend, howto, contents);
9609
9610 if (info->relocatable)
9611 {
9612 /* This is a relocatable link. We don't have to change
9613 anything, unless the reloc is against a section symbol,
9614 in which case we have to adjust according to where the
9615 section symbol winds up in the output section. */
9616 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
9617 {
9618 if (globals->use_rel)
9619 arm_add_to_rel (input_bfd, contents + rel->r_offset,
9620 howto, (bfd_signed_vma) sec->output_offset);
9621 else
9622 rel->r_addend += sec->output_offset;
9623 }
9624 continue;
9625 }
9626
9627 if (h != NULL)
9628 name = h->root.root.string;
9629 else
9630 {
9631 name = (bfd_elf_string_from_elf_section
9632 (input_bfd, symtab_hdr->sh_link, sym->st_name));
9633 if (name == NULL || *name == '\0')
9634 name = bfd_section_name (input_bfd, sec);
9635 }
9636
9637 if (r_symndx != STN_UNDEF
9638 && r_type != R_ARM_NONE
9639 && (h == NULL
9640 || h->root.type == bfd_link_hash_defined
9641 || h->root.type == bfd_link_hash_defweak)
9642 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
9643 {
9644 (*_bfd_error_handler)
9645 ((sym_type == STT_TLS
9646 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
9647 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
9648 input_bfd,
9649 input_section,
9650 (long) rel->r_offset,
9651 howto->name,
9652 name);
9653 }
9654
9655 /* We call elf32_arm_final_link_relocate unless we're completely
9656 done, i.e., the relaxation produced the final output we want,
9657 and we won't let anybody mess with it. Also, we have to do
9658 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
9659 both in relaxed and non-relaxed cases */
9660 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
9661 || (IS_ARM_TLS_GNU_RELOC (r_type)
9662 && !((h ? elf32_arm_hash_entry (h)->tls_type :
9663 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
9664 & GOT_TLS_GDESC)))
9665 {
9666 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
9667 contents, rel, h == NULL);
9668 /* This may have been marked unresolved because it came from
9669 a shared library. But we've just dealt with that. */
9670 unresolved_reloc = 0;
9671 }
9672 else
9673 r = bfd_reloc_continue;
9674
9675 if (r == bfd_reloc_continue)
9676 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
9677 input_section, contents, rel,
9678 relocation, info, sec, name,
9679 (h ? ELF_ST_TYPE (h->type) :
9680 ELF_ST_TYPE (sym->st_info)), h,
9681 &unresolved_reloc, &error_message);
9682
9683 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
9684 because such sections are not SEC_ALLOC and thus ld.so will
9685 not process them. */
9686 if (unresolved_reloc
9687 && !((input_section->flags & SEC_DEBUGGING) != 0
9688 && h->def_dynamic))
9689 {
9690 (*_bfd_error_handler)
9691 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
9692 input_bfd,
9693 input_section,
9694 (long) rel->r_offset,
9695 howto->name,
9696 h->root.root.string);
9697 return FALSE;
9698 }
9699
9700 if (r != bfd_reloc_ok)
9701 {
9702 switch (r)
9703 {
9704 case bfd_reloc_overflow:
9705 /* If the overflowing reloc was to an undefined symbol,
9706 we have already printed one error message and there
9707 is no point complaining again. */
9708 if ((! h ||
9709 h->root.type != bfd_link_hash_undefined)
9710 && (!((*info->callbacks->reloc_overflow)
9711 (info, (h ? &h->root : NULL), name, howto->name,
9712 (bfd_vma) 0, input_bfd, input_section,
9713 rel->r_offset))))
9714 return FALSE;
9715 break;
9716
9717 case bfd_reloc_undefined:
9718 if (!((*info->callbacks->undefined_symbol)
9719 (info, name, input_bfd, input_section,
9720 rel->r_offset, TRUE)))
9721 return FALSE;
9722 break;
9723
9724 case bfd_reloc_outofrange:
9725 error_message = _("out of range");
9726 goto common_error;
9727
9728 case bfd_reloc_notsupported:
9729 error_message = _("unsupported relocation");
9730 goto common_error;
9731
9732 case bfd_reloc_dangerous:
9733 /* error_message should already be set. */
9734 goto common_error;
9735
9736 default:
9737 error_message = _("unknown error");
9738 /* Fall through. */
9739
9740 common_error:
9741 BFD_ASSERT (error_message != NULL);
9742 if (!((*info->callbacks->reloc_dangerous)
9743 (info, error_message, input_bfd, input_section,
9744 rel->r_offset)))
9745 return FALSE;
9746 break;
9747 }
9748 }
9749 }
9750
9751 return TRUE;
9752 }
9753
9754 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
9755 adds the edit to the start of the list. (The list must be built in order of
9756 ascending TINDEX: the function's callers are primarily responsible for
9757 maintaining that condition). */
9758
9759 static void
9760 add_unwind_table_edit (arm_unwind_table_edit **head,
9761 arm_unwind_table_edit **tail,
9762 arm_unwind_edit_type type,
9763 asection *linked_section,
9764 unsigned int tindex)
9765 {
9766 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
9767 xmalloc (sizeof (arm_unwind_table_edit));
9768
9769 new_edit->type = type;
9770 new_edit->linked_section = linked_section;
9771 new_edit->index = tindex;
9772
9773 if (tindex > 0)
9774 {
9775 new_edit->next = NULL;
9776
9777 if (*tail)
9778 (*tail)->next = new_edit;
9779
9780 (*tail) = new_edit;
9781
9782 if (!*head)
9783 (*head) = new_edit;
9784 }
9785 else
9786 {
9787 new_edit->next = *head;
9788
9789 if (!*tail)
9790 *tail = new_edit;
9791
9792 *head = new_edit;
9793 }
9794 }
9795
9796 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
9797
9798 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
9799 static void
9800 adjust_exidx_size(asection *exidx_sec, int adjust)
9801 {
9802 asection *out_sec;
9803
9804 if (!exidx_sec->rawsize)
9805 exidx_sec->rawsize = exidx_sec->size;
9806
9807 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
9808 out_sec = exidx_sec->output_section;
9809 /* Adjust size of output section. */
9810 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
9811 }
9812
9813 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
9814 static void
9815 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
9816 {
9817 struct _arm_elf_section_data *exidx_arm_data;
9818
9819 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9820 add_unwind_table_edit (
9821 &exidx_arm_data->u.exidx.unwind_edit_list,
9822 &exidx_arm_data->u.exidx.unwind_edit_tail,
9823 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
9824
9825 adjust_exidx_size(exidx_sec, 8);
9826 }
9827
9828 /* Scan .ARM.exidx tables, and create a list describing edits which should be
9829 made to those tables, such that:
9830
9831 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
9832 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
9833 codes which have been inlined into the index).
9834
9835 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
9836
9837 The edits are applied when the tables are written
9838 (in elf32_arm_write_section).
9839 */
9840
9841 bfd_boolean
9842 elf32_arm_fix_exidx_coverage (asection **text_section_order,
9843 unsigned int num_text_sections,
9844 struct bfd_link_info *info,
9845 bfd_boolean merge_exidx_entries)
9846 {
9847 bfd *inp;
9848 unsigned int last_second_word = 0, i;
9849 asection *last_exidx_sec = NULL;
9850 asection *last_text_sec = NULL;
9851 int last_unwind_type = -1;
9852
9853 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9854 text sections. */
9855 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9856 {
9857 asection *sec;
9858
9859 for (sec = inp->sections; sec != NULL; sec = sec->next)
9860 {
9861 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9862 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9863
9864 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
9865 continue;
9866
9867 if (elf_sec->linked_to)
9868 {
9869 Elf_Internal_Shdr *linked_hdr
9870 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9871 struct _arm_elf_section_data *linked_sec_arm_data
9872 = get_arm_elf_section_data (linked_hdr->bfd_section);
9873
9874 if (linked_sec_arm_data == NULL)
9875 continue;
9876
9877 /* Link this .ARM.exidx section back from the text section it
9878 describes. */
9879 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9880 }
9881 }
9882 }
9883
9884 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9885 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
9886 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
9887
9888 for (i = 0; i < num_text_sections; i++)
9889 {
9890 asection *sec = text_section_order[i];
9891 asection *exidx_sec;
9892 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9893 struct _arm_elf_section_data *exidx_arm_data;
9894 bfd_byte *contents = NULL;
9895 int deleted_exidx_bytes = 0;
9896 bfd_vma j;
9897 arm_unwind_table_edit *unwind_edit_head = NULL;
9898 arm_unwind_table_edit *unwind_edit_tail = NULL;
9899 Elf_Internal_Shdr *hdr;
9900 bfd *ibfd;
9901
9902 if (arm_data == NULL)
9903 continue;
9904
9905 exidx_sec = arm_data->u.text.arm_exidx_sec;
9906 if (exidx_sec == NULL)
9907 {
9908 /* Section has no unwind data. */
9909 if (last_unwind_type == 0 || !last_exidx_sec)
9910 continue;
9911
9912 /* Ignore zero sized sections. */
9913 if (sec->size == 0)
9914 continue;
9915
9916 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9917 last_unwind_type = 0;
9918 continue;
9919 }
9920
9921 /* Skip /DISCARD/ sections. */
9922 if (bfd_is_abs_section (exidx_sec->output_section))
9923 continue;
9924
9925 hdr = &elf_section_data (exidx_sec)->this_hdr;
9926 if (hdr->sh_type != SHT_ARM_EXIDX)
9927 continue;
9928
9929 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9930 if (exidx_arm_data == NULL)
9931 continue;
9932
9933 ibfd = exidx_sec->owner;
9934
9935 if (hdr->contents != NULL)
9936 contents = hdr->contents;
9937 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9938 /* An error? */
9939 continue;
9940
9941 for (j = 0; j < hdr->sh_size; j += 8)
9942 {
9943 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9944 int unwind_type;
9945 int elide = 0;
9946
9947 /* An EXIDX_CANTUNWIND entry. */
9948 if (second_word == 1)
9949 {
9950 if (last_unwind_type == 0)
9951 elide = 1;
9952 unwind_type = 0;
9953 }
9954 /* Inlined unwinding data. Merge if equal to previous. */
9955 else if ((second_word & 0x80000000) != 0)
9956 {
9957 if (merge_exidx_entries
9958 && last_second_word == second_word && last_unwind_type == 1)
9959 elide = 1;
9960 unwind_type = 1;
9961 last_second_word = second_word;
9962 }
9963 /* Normal table entry. In theory we could merge these too,
9964 but duplicate entries are likely to be much less common. */
9965 else
9966 unwind_type = 2;
9967
9968 if (elide)
9969 {
9970 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9971 DELETE_EXIDX_ENTRY, NULL, j / 8);
9972
9973 deleted_exidx_bytes += 8;
9974 }
9975
9976 last_unwind_type = unwind_type;
9977 }
9978
9979 /* Free contents if we allocated it ourselves. */
9980 if (contents != hdr->contents)
9981 free (contents);
9982
9983 /* Record edits to be applied later (in elf32_arm_write_section). */
9984 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9985 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9986
9987 if (deleted_exidx_bytes > 0)
9988 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9989
9990 last_exidx_sec = exidx_sec;
9991 last_text_sec = sec;
9992 }
9993
9994 /* Add terminating CANTUNWIND entry. */
9995 if (last_exidx_sec && last_unwind_type != 0)
9996 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9997
9998 return TRUE;
9999 }
10000
10001 static bfd_boolean
10002 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10003 bfd *ibfd, const char *name)
10004 {
10005 asection *sec, *osec;
10006
10007 sec = bfd_get_section_by_name (ibfd, name);
10008 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10009 return TRUE;
10010
10011 osec = sec->output_section;
10012 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10013 return TRUE;
10014
10015 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10016 sec->output_offset, sec->size))
10017 return FALSE;
10018
10019 return TRUE;
10020 }
10021
10022 static bfd_boolean
10023 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10024 {
10025 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
10026 asection *sec, *osec;
10027
10028 if (globals == NULL)
10029 return FALSE;
10030
10031 /* Invoke the regular ELF backend linker to do all the work. */
10032 if (!bfd_elf_final_link (abfd, info))
10033 return FALSE;
10034
10035 /* Process stub sections (eg BE8 encoding, ...). */
10036 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10037 int i;
10038 for (i=0; i<htab->top_id; i++)
10039 {
10040 sec = htab->stub_group[i].stub_sec;
10041 /* Only process it once, in its link_sec slot. */
10042 if (sec && i == htab->stub_group[i].link_sec->id)
10043 {
10044 osec = sec->output_section;
10045 elf32_arm_write_section (abfd, info, sec, sec->contents);
10046 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10047 sec->output_offset, sec->size))
10048 return FALSE;
10049 }
10050 }
10051
10052 /* Write out any glue sections now that we have created all the
10053 stubs. */
10054 if (globals->bfd_of_glue_owner != NULL)
10055 {
10056 if (! elf32_arm_output_glue_section (info, abfd,
10057 globals->bfd_of_glue_owner,
10058 ARM2THUMB_GLUE_SECTION_NAME))
10059 return FALSE;
10060
10061 if (! elf32_arm_output_glue_section (info, abfd,
10062 globals->bfd_of_glue_owner,
10063 THUMB2ARM_GLUE_SECTION_NAME))
10064 return FALSE;
10065
10066 if (! elf32_arm_output_glue_section (info, abfd,
10067 globals->bfd_of_glue_owner,
10068 VFP11_ERRATUM_VENEER_SECTION_NAME))
10069 return FALSE;
10070
10071 if (! elf32_arm_output_glue_section (info, abfd,
10072 globals->bfd_of_glue_owner,
10073 ARM_BX_GLUE_SECTION_NAME))
10074 return FALSE;
10075 }
10076
10077 return TRUE;
10078 }
10079
10080 /* Set the right machine number. */
10081
10082 static bfd_boolean
10083 elf32_arm_object_p (bfd *abfd)
10084 {
10085 unsigned int mach;
10086
10087 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
10088
10089 if (mach != bfd_mach_arm_unknown)
10090 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
10091
10092 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
10093 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
10094
10095 else
10096 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
10097
10098 return TRUE;
10099 }
10100
10101 /* Function to keep ARM specific flags in the ELF header. */
10102
10103 static bfd_boolean
10104 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
10105 {
10106 if (elf_flags_init (abfd)
10107 && elf_elfheader (abfd)->e_flags != flags)
10108 {
10109 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
10110 {
10111 if (flags & EF_ARM_INTERWORK)
10112 (*_bfd_error_handler)
10113 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
10114 abfd);
10115 else
10116 _bfd_error_handler
10117 (_("Warning: Clearing the interworking flag of %B due to outside request"),
10118 abfd);
10119 }
10120 }
10121 else
10122 {
10123 elf_elfheader (abfd)->e_flags = flags;
10124 elf_flags_init (abfd) = TRUE;
10125 }
10126
10127 return TRUE;
10128 }
10129
10130 /* Copy backend specific data from one object module to another. */
10131
10132 static bfd_boolean
10133 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
10134 {
10135 flagword in_flags;
10136 flagword out_flags;
10137
10138 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
10139 return TRUE;
10140
10141 in_flags = elf_elfheader (ibfd)->e_flags;
10142 out_flags = elf_elfheader (obfd)->e_flags;
10143
10144 if (elf_flags_init (obfd)
10145 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
10146 && in_flags != out_flags)
10147 {
10148 /* Cannot mix APCS26 and APCS32 code. */
10149 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
10150 return FALSE;
10151
10152 /* Cannot mix float APCS and non-float APCS code. */
10153 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
10154 return FALSE;
10155
10156 /* If the src and dest have different interworking flags
10157 then turn off the interworking bit. */
10158 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
10159 {
10160 if (out_flags & EF_ARM_INTERWORK)
10161 _bfd_error_handler
10162 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
10163 obfd, ibfd);
10164
10165 in_flags &= ~EF_ARM_INTERWORK;
10166 }
10167
10168 /* Likewise for PIC, though don't warn for this case. */
10169 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
10170 in_flags &= ~EF_ARM_PIC;
10171 }
10172
10173 elf_elfheader (obfd)->e_flags = in_flags;
10174 elf_flags_init (obfd) = TRUE;
10175
10176 /* Also copy the EI_OSABI field. */
10177 elf_elfheader (obfd)->e_ident[EI_OSABI] =
10178 elf_elfheader (ibfd)->e_ident[EI_OSABI];
10179
10180 /* Copy object attributes. */
10181 _bfd_elf_copy_obj_attributes (ibfd, obfd);
10182
10183 return TRUE;
10184 }
10185
10186 /* Values for Tag_ABI_PCS_R9_use. */
10187 enum
10188 {
10189 AEABI_R9_V6,
10190 AEABI_R9_SB,
10191 AEABI_R9_TLS,
10192 AEABI_R9_unused
10193 };
10194
10195 /* Values for Tag_ABI_PCS_RW_data. */
10196 enum
10197 {
10198 AEABI_PCS_RW_data_absolute,
10199 AEABI_PCS_RW_data_PCrel,
10200 AEABI_PCS_RW_data_SBrel,
10201 AEABI_PCS_RW_data_unused
10202 };
10203
10204 /* Values for Tag_ABI_enum_size. */
10205 enum
10206 {
10207 AEABI_enum_unused,
10208 AEABI_enum_short,
10209 AEABI_enum_wide,
10210 AEABI_enum_forced_wide
10211 };
10212
10213 /* Determine whether an object attribute tag takes an integer, a
10214 string or both. */
10215
10216 static int
10217 elf32_arm_obj_attrs_arg_type (int tag)
10218 {
10219 if (tag == Tag_compatibility)
10220 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
10221 else if (tag == Tag_nodefaults)
10222 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
10223 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
10224 return ATTR_TYPE_FLAG_STR_VAL;
10225 else if (tag < 32)
10226 return ATTR_TYPE_FLAG_INT_VAL;
10227 else
10228 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
10229 }
10230
10231 /* The ABI defines that Tag_conformance should be emitted first, and that
10232 Tag_nodefaults should be second (if either is defined). This sets those
10233 two positions, and bumps up the position of all the remaining tags to
10234 compensate. */
10235 static int
10236 elf32_arm_obj_attrs_order (int num)
10237 {
10238 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
10239 return Tag_conformance;
10240 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
10241 return Tag_nodefaults;
10242 if ((num - 2) < Tag_nodefaults)
10243 return num - 2;
10244 if ((num - 1) < Tag_conformance)
10245 return num - 1;
10246 return num;
10247 }
10248
10249 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10250 static bfd_boolean
10251 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
10252 {
10253 if ((tag & 127) < 64)
10254 {
10255 _bfd_error_handler
10256 (_("%B: Unknown mandatory EABI object attribute %d"),
10257 abfd, tag);
10258 bfd_set_error (bfd_error_bad_value);
10259 return FALSE;
10260 }
10261 else
10262 {
10263 _bfd_error_handler
10264 (_("Warning: %B: Unknown EABI object attribute %d"),
10265 abfd, tag);
10266 return TRUE;
10267 }
10268 }
10269
10270 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
10271 Returns -1 if no architecture could be read. */
10272
10273 static int
10274 get_secondary_compatible_arch (bfd *abfd)
10275 {
10276 obj_attribute *attr =
10277 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
10278
10279 /* Note: the tag and its argument below are uleb128 values, though
10280 currently-defined values fit in one byte for each. */
10281 if (attr->s
10282 && attr->s[0] == Tag_CPU_arch
10283 && (attr->s[1] & 128) != 128
10284 && attr->s[2] == 0)
10285 return attr->s[1];
10286
10287 /* This tag is "safely ignorable", so don't complain if it looks funny. */
10288 return -1;
10289 }
10290
10291 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10292 The tag is removed if ARCH is -1. */
10293
10294 static void
10295 set_secondary_compatible_arch (bfd *abfd, int arch)
10296 {
10297 obj_attribute *attr =
10298 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
10299
10300 if (arch == -1)
10301 {
10302 attr->s = NULL;
10303 return;
10304 }
10305
10306 /* Note: the tag and its argument below are uleb128 values, though
10307 currently-defined values fit in one byte for each. */
10308 if (!attr->s)
10309 attr->s = (char *) bfd_alloc (abfd, 3);
10310 attr->s[0] = Tag_CPU_arch;
10311 attr->s[1] = arch;
10312 attr->s[2] = '\0';
10313 }
10314
10315 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10316 into account. */
10317
10318 static int
10319 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
10320 int newtag, int secondary_compat)
10321 {
10322 #define T(X) TAG_CPU_ARCH_##X
10323 int tagl, tagh, result;
10324 const int v6t2[] =
10325 {
10326 T(V6T2), /* PRE_V4. */
10327 T(V6T2), /* V4. */
10328 T(V6T2), /* V4T. */
10329 T(V6T2), /* V5T. */
10330 T(V6T2), /* V5TE. */
10331 T(V6T2), /* V5TEJ. */
10332 T(V6T2), /* V6. */
10333 T(V7), /* V6KZ. */
10334 T(V6T2) /* V6T2. */
10335 };
10336 const int v6k[] =
10337 {
10338 T(V6K), /* PRE_V4. */
10339 T(V6K), /* V4. */
10340 T(V6K), /* V4T. */
10341 T(V6K), /* V5T. */
10342 T(V6K), /* V5TE. */
10343 T(V6K), /* V5TEJ. */
10344 T(V6K), /* V6. */
10345 T(V6KZ), /* V6KZ. */
10346 T(V7), /* V6T2. */
10347 T(V6K) /* V6K. */
10348 };
10349 const int v7[] =
10350 {
10351 T(V7), /* PRE_V4. */
10352 T(V7), /* V4. */
10353 T(V7), /* V4T. */
10354 T(V7), /* V5T. */
10355 T(V7), /* V5TE. */
10356 T(V7), /* V5TEJ. */
10357 T(V7), /* V6. */
10358 T(V7), /* V6KZ. */
10359 T(V7), /* V6T2. */
10360 T(V7), /* V6K. */
10361 T(V7) /* V7. */
10362 };
10363 const int v6_m[] =
10364 {
10365 -1, /* PRE_V4. */
10366 -1, /* V4. */
10367 T(V6K), /* V4T. */
10368 T(V6K), /* V5T. */
10369 T(V6K), /* V5TE. */
10370 T(V6K), /* V5TEJ. */
10371 T(V6K), /* V6. */
10372 T(V6KZ), /* V6KZ. */
10373 T(V7), /* V6T2. */
10374 T(V6K), /* V6K. */
10375 T(V7), /* V7. */
10376 T(V6_M) /* V6_M. */
10377 };
10378 const int v6s_m[] =
10379 {
10380 -1, /* PRE_V4. */
10381 -1, /* V4. */
10382 T(V6K), /* V4T. */
10383 T(V6K), /* V5T. */
10384 T(V6K), /* V5TE. */
10385 T(V6K), /* V5TEJ. */
10386 T(V6K), /* V6. */
10387 T(V6KZ), /* V6KZ. */
10388 T(V7), /* V6T2. */
10389 T(V6K), /* V6K. */
10390 T(V7), /* V7. */
10391 T(V6S_M), /* V6_M. */
10392 T(V6S_M) /* V6S_M. */
10393 };
10394 const int v7e_m[] =
10395 {
10396 -1, /* PRE_V4. */
10397 -1, /* V4. */
10398 T(V7E_M), /* V4T. */
10399 T(V7E_M), /* V5T. */
10400 T(V7E_M), /* V5TE. */
10401 T(V7E_M), /* V5TEJ. */
10402 T(V7E_M), /* V6. */
10403 T(V7E_M), /* V6KZ. */
10404 T(V7E_M), /* V6T2. */
10405 T(V7E_M), /* V6K. */
10406 T(V7E_M), /* V7. */
10407 T(V7E_M), /* V6_M. */
10408 T(V7E_M), /* V6S_M. */
10409 T(V7E_M) /* V7E_M. */
10410 };
10411 const int v4t_plus_v6_m[] =
10412 {
10413 -1, /* PRE_V4. */
10414 -1, /* V4. */
10415 T(V4T), /* V4T. */
10416 T(V5T), /* V5T. */
10417 T(V5TE), /* V5TE. */
10418 T(V5TEJ), /* V5TEJ. */
10419 T(V6), /* V6. */
10420 T(V6KZ), /* V6KZ. */
10421 T(V6T2), /* V6T2. */
10422 T(V6K), /* V6K. */
10423 T(V7), /* V7. */
10424 T(V6_M), /* V6_M. */
10425 T(V6S_M), /* V6S_M. */
10426 T(V7E_M), /* V7E_M. */
10427 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
10428 };
10429 const int *comb[] =
10430 {
10431 v6t2,
10432 v6k,
10433 v7,
10434 v6_m,
10435 v6s_m,
10436 v7e_m,
10437 /* Pseudo-architecture. */
10438 v4t_plus_v6_m
10439 };
10440
10441 /* Check we've not got a higher architecture than we know about. */
10442
10443 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
10444 {
10445 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
10446 return -1;
10447 }
10448
10449 /* Override old tag if we have a Tag_also_compatible_with on the output. */
10450
10451 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
10452 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
10453 oldtag = T(V4T_PLUS_V6_M);
10454
10455 /* And override the new tag if we have a Tag_also_compatible_with on the
10456 input. */
10457
10458 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
10459 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
10460 newtag = T(V4T_PLUS_V6_M);
10461
10462 tagl = (oldtag < newtag) ? oldtag : newtag;
10463 result = tagh = (oldtag > newtag) ? oldtag : newtag;
10464
10465 /* Architectures before V6KZ add features monotonically. */
10466 if (tagh <= TAG_CPU_ARCH_V6KZ)
10467 return result;
10468
10469 result = comb[tagh - T(V6T2)][tagl];
10470
10471 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10472 as the canonical version. */
10473 if (result == T(V4T_PLUS_V6_M))
10474 {
10475 result = T(V4T);
10476 *secondary_compat_out = T(V6_M);
10477 }
10478 else
10479 *secondary_compat_out = -1;
10480
10481 if (result == -1)
10482 {
10483 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
10484 ibfd, oldtag, newtag);
10485 return -1;
10486 }
10487
10488 return result;
10489 #undef T
10490 }
10491
10492 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
10493 are conflicting attributes. */
10494
10495 static bfd_boolean
10496 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
10497 {
10498 obj_attribute *in_attr;
10499 obj_attribute *out_attr;
10500 /* Some tags have 0 = don't care, 1 = strong requirement,
10501 2 = weak requirement. */
10502 static const int order_021[3] = {0, 2, 1};
10503 int i;
10504 bfd_boolean result = TRUE;
10505
10506 /* Skip the linker stubs file. This preserves previous behavior
10507 of accepting unknown attributes in the first input file - but
10508 is that a bug? */
10509 if (ibfd->flags & BFD_LINKER_CREATED)
10510 return TRUE;
10511
10512 if (!elf_known_obj_attributes_proc (obfd)[0].i)
10513 {
10514 /* This is the first object. Copy the attributes. */
10515 _bfd_elf_copy_obj_attributes (ibfd, obfd);
10516
10517 out_attr = elf_known_obj_attributes_proc (obfd);
10518
10519 /* Use the Tag_null value to indicate the attributes have been
10520 initialized. */
10521 out_attr[0].i = 1;
10522
10523 /* We do not output objects with Tag_MPextension_use_legacy - we move
10524 the attribute's value to Tag_MPextension_use. */
10525 if (out_attr[Tag_MPextension_use_legacy].i != 0)
10526 {
10527 if (out_attr[Tag_MPextension_use].i != 0
10528 && out_attr[Tag_MPextension_use_legacy].i
10529 != out_attr[Tag_MPextension_use].i)
10530 {
10531 _bfd_error_handler
10532 (_("Error: %B has both the current and legacy "
10533 "Tag_MPextension_use attributes"), ibfd);
10534 result = FALSE;
10535 }
10536
10537 out_attr[Tag_MPextension_use] =
10538 out_attr[Tag_MPextension_use_legacy];
10539 out_attr[Tag_MPextension_use_legacy].type = 0;
10540 out_attr[Tag_MPextension_use_legacy].i = 0;
10541 }
10542
10543 return result;
10544 }
10545
10546 in_attr = elf_known_obj_attributes_proc (ibfd);
10547 out_attr = elf_known_obj_attributes_proc (obfd);
10548 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
10549 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
10550 {
10551 /* Ignore mismatches if the object doesn't use floating point. */
10552 if (out_attr[Tag_ABI_FP_number_model].i == 0)
10553 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
10554 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
10555 {
10556 _bfd_error_handler
10557 (_("error: %B uses VFP register arguments, %B does not"),
10558 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
10559 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
10560 result = FALSE;
10561 }
10562 }
10563
10564 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
10565 {
10566 /* Merge this attribute with existing attributes. */
10567 switch (i)
10568 {
10569 case Tag_CPU_raw_name:
10570 case Tag_CPU_name:
10571 /* These are merged after Tag_CPU_arch. */
10572 break;
10573
10574 case Tag_ABI_optimization_goals:
10575 case Tag_ABI_FP_optimization_goals:
10576 /* Use the first value seen. */
10577 break;
10578
10579 case Tag_CPU_arch:
10580 {
10581 int secondary_compat = -1, secondary_compat_out = -1;
10582 unsigned int saved_out_attr = out_attr[i].i;
10583 static const char *name_table[] = {
10584 /* These aren't real CPU names, but we can't guess
10585 that from the architecture version alone. */
10586 "Pre v4",
10587 "ARM v4",
10588 "ARM v4T",
10589 "ARM v5T",
10590 "ARM v5TE",
10591 "ARM v5TEJ",
10592 "ARM v6",
10593 "ARM v6KZ",
10594 "ARM v6T2",
10595 "ARM v6K",
10596 "ARM v7",
10597 "ARM v6-M",
10598 "ARM v6S-M"
10599 };
10600
10601 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
10602 secondary_compat = get_secondary_compatible_arch (ibfd);
10603 secondary_compat_out = get_secondary_compatible_arch (obfd);
10604 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
10605 &secondary_compat_out,
10606 in_attr[i].i,
10607 secondary_compat);
10608 set_secondary_compatible_arch (obfd, secondary_compat_out);
10609
10610 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
10611 if (out_attr[i].i == saved_out_attr)
10612 ; /* Leave the names alone. */
10613 else if (out_attr[i].i == in_attr[i].i)
10614 {
10615 /* The output architecture has been changed to match the
10616 input architecture. Use the input names. */
10617 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
10618 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
10619 : NULL;
10620 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
10621 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
10622 : NULL;
10623 }
10624 else
10625 {
10626 out_attr[Tag_CPU_name].s = NULL;
10627 out_attr[Tag_CPU_raw_name].s = NULL;
10628 }
10629
10630 /* If we still don't have a value for Tag_CPU_name,
10631 make one up now. Tag_CPU_raw_name remains blank. */
10632 if (out_attr[Tag_CPU_name].s == NULL
10633 && out_attr[i].i < ARRAY_SIZE (name_table))
10634 out_attr[Tag_CPU_name].s =
10635 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
10636 }
10637 break;
10638
10639 case Tag_ARM_ISA_use:
10640 case Tag_THUMB_ISA_use:
10641 case Tag_WMMX_arch:
10642 case Tag_Advanced_SIMD_arch:
10643 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
10644 case Tag_ABI_FP_rounding:
10645 case Tag_ABI_FP_exceptions:
10646 case Tag_ABI_FP_user_exceptions:
10647 case Tag_ABI_FP_number_model:
10648 case Tag_FP_HP_extension:
10649 case Tag_CPU_unaligned_access:
10650 case Tag_T2EE_use:
10651 case Tag_MPextension_use:
10652 /* Use the largest value specified. */
10653 if (in_attr[i].i > out_attr[i].i)
10654 out_attr[i].i = in_attr[i].i;
10655 break;
10656
10657 case Tag_ABI_align_preserved:
10658 case Tag_ABI_PCS_RO_data:
10659 /* Use the smallest value specified. */
10660 if (in_attr[i].i < out_attr[i].i)
10661 out_attr[i].i = in_attr[i].i;
10662 break;
10663
10664 case Tag_ABI_align_needed:
10665 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
10666 && (in_attr[Tag_ABI_align_preserved].i == 0
10667 || out_attr[Tag_ABI_align_preserved].i == 0))
10668 {
10669 /* This error message should be enabled once all non-conformant
10670 binaries in the toolchain have had the attributes set
10671 properly.
10672 _bfd_error_handler
10673 (_("error: %B: 8-byte data alignment conflicts with %B"),
10674 obfd, ibfd);
10675 result = FALSE; */
10676 }
10677 /* Fall through. */
10678 case Tag_ABI_FP_denormal:
10679 case Tag_ABI_PCS_GOT_use:
10680 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
10681 value if greater than 2 (for future-proofing). */
10682 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
10683 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
10684 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
10685 out_attr[i].i = in_attr[i].i;
10686 break;
10687
10688 case Tag_Virtualization_use:
10689 /* The virtualization tag effectively stores two bits of
10690 information: the intended use of TrustZone (in bit 0), and the
10691 intended use of Virtualization (in bit 1). */
10692 if (out_attr[i].i == 0)
10693 out_attr[i].i = in_attr[i].i;
10694 else if (in_attr[i].i != 0
10695 && in_attr[i].i != out_attr[i].i)
10696 {
10697 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
10698 out_attr[i].i = 3;
10699 else
10700 {
10701 _bfd_error_handler
10702 (_("error: %B: unable to merge virtualization attributes "
10703 "with %B"),
10704 obfd, ibfd);
10705 result = FALSE;
10706 }
10707 }
10708 break;
10709
10710 case Tag_CPU_arch_profile:
10711 if (out_attr[i].i != in_attr[i].i)
10712 {
10713 /* 0 will merge with anything.
10714 'A' and 'S' merge to 'A'.
10715 'R' and 'S' merge to 'R'.
10716 'M' and 'A|R|S' is an error. */
10717 if (out_attr[i].i == 0
10718 || (out_attr[i].i == 'S'
10719 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
10720 out_attr[i].i = in_attr[i].i;
10721 else if (in_attr[i].i == 0
10722 || (in_attr[i].i == 'S'
10723 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
10724 ; /* Do nothing. */
10725 else
10726 {
10727 _bfd_error_handler
10728 (_("error: %B: Conflicting architecture profiles %c/%c"),
10729 ibfd,
10730 in_attr[i].i ? in_attr[i].i : '0',
10731 out_attr[i].i ? out_attr[i].i : '0');
10732 result = FALSE;
10733 }
10734 }
10735 break;
10736 case Tag_FP_arch:
10737 {
10738 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
10739 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
10740 when it's 0. It might mean absence of FP hardware if
10741 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
10742
10743 static const struct
10744 {
10745 int ver;
10746 int regs;
10747 } vfp_versions[7] =
10748 {
10749 {0, 0},
10750 {1, 16},
10751 {2, 16},
10752 {3, 32},
10753 {3, 16},
10754 {4, 32},
10755 {4, 16}
10756 };
10757 int ver;
10758 int regs;
10759 int newval;
10760
10761 /* If the output has no requirement about FP hardware,
10762 follow the requirement of the input. */
10763 if (out_attr[i].i == 0)
10764 {
10765 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
10766 out_attr[i].i = in_attr[i].i;
10767 out_attr[Tag_ABI_HardFP_use].i
10768 = in_attr[Tag_ABI_HardFP_use].i;
10769 break;
10770 }
10771 /* If the input has no requirement about FP hardware, do
10772 nothing. */
10773 else if (in_attr[i].i == 0)
10774 {
10775 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
10776 break;
10777 }
10778
10779 /* Both the input and the output have nonzero Tag_FP_arch.
10780 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
10781
10782 /* If both the input and the output have zero Tag_ABI_HardFP_use,
10783 do nothing. */
10784 if (in_attr[Tag_ABI_HardFP_use].i == 0
10785 && out_attr[Tag_ABI_HardFP_use].i == 0)
10786 ;
10787 /* If the input and the output have different Tag_ABI_HardFP_use,
10788 the combination of them is 3 (SP & DP). */
10789 else if (in_attr[Tag_ABI_HardFP_use].i
10790 != out_attr[Tag_ABI_HardFP_use].i)
10791 out_attr[Tag_ABI_HardFP_use].i = 3;
10792
10793 /* Now we can handle Tag_FP_arch. */
10794
10795 /* Values greater than 6 aren't defined, so just pick the
10796 biggest */
10797 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
10798 {
10799 out_attr[i] = in_attr[i];
10800 break;
10801 }
10802 /* The output uses the superset of input features
10803 (ISA version) and registers. */
10804 ver = vfp_versions[in_attr[i].i].ver;
10805 if (ver < vfp_versions[out_attr[i].i].ver)
10806 ver = vfp_versions[out_attr[i].i].ver;
10807 regs = vfp_versions[in_attr[i].i].regs;
10808 if (regs < vfp_versions[out_attr[i].i].regs)
10809 regs = vfp_versions[out_attr[i].i].regs;
10810 /* This assumes all possible supersets are also a valid
10811 options. */
10812 for (newval = 6; newval > 0; newval--)
10813 {
10814 if (regs == vfp_versions[newval].regs
10815 && ver == vfp_versions[newval].ver)
10816 break;
10817 }
10818 out_attr[i].i = newval;
10819 }
10820 break;
10821 case Tag_PCS_config:
10822 if (out_attr[i].i == 0)
10823 out_attr[i].i = in_attr[i].i;
10824 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
10825 {
10826 /* It's sometimes ok to mix different configs, so this is only
10827 a warning. */
10828 _bfd_error_handler
10829 (_("Warning: %B: Conflicting platform configuration"), ibfd);
10830 }
10831 break;
10832 case Tag_ABI_PCS_R9_use:
10833 if (in_attr[i].i != out_attr[i].i
10834 && out_attr[i].i != AEABI_R9_unused
10835 && in_attr[i].i != AEABI_R9_unused)
10836 {
10837 _bfd_error_handler
10838 (_("error: %B: Conflicting use of R9"), ibfd);
10839 result = FALSE;
10840 }
10841 if (out_attr[i].i == AEABI_R9_unused)
10842 out_attr[i].i = in_attr[i].i;
10843 break;
10844 case Tag_ABI_PCS_RW_data:
10845 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
10846 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
10847 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
10848 {
10849 _bfd_error_handler
10850 (_("error: %B: SB relative addressing conflicts with use of R9"),
10851 ibfd);
10852 result = FALSE;
10853 }
10854 /* Use the smallest value specified. */
10855 if (in_attr[i].i < out_attr[i].i)
10856 out_attr[i].i = in_attr[i].i;
10857 break;
10858 case Tag_ABI_PCS_wchar_t:
10859 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
10860 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
10861 {
10862 _bfd_error_handler
10863 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
10864 ibfd, in_attr[i].i, out_attr[i].i);
10865 }
10866 else if (in_attr[i].i && !out_attr[i].i)
10867 out_attr[i].i = in_attr[i].i;
10868 break;
10869 case Tag_ABI_enum_size:
10870 if (in_attr[i].i != AEABI_enum_unused)
10871 {
10872 if (out_attr[i].i == AEABI_enum_unused
10873 || out_attr[i].i == AEABI_enum_forced_wide)
10874 {
10875 /* The existing object is compatible with anything.
10876 Use whatever requirements the new object has. */
10877 out_attr[i].i = in_attr[i].i;
10878 }
10879 else if (in_attr[i].i != AEABI_enum_forced_wide
10880 && out_attr[i].i != in_attr[i].i
10881 && !elf_arm_tdata (obfd)->no_enum_size_warning)
10882 {
10883 static const char *aeabi_enum_names[] =
10884 { "", "variable-size", "32-bit", "" };
10885 const char *in_name =
10886 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10887 ? aeabi_enum_names[in_attr[i].i]
10888 : "<unknown>";
10889 const char *out_name =
10890 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10891 ? aeabi_enum_names[out_attr[i].i]
10892 : "<unknown>";
10893 _bfd_error_handler
10894 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
10895 ibfd, in_name, out_name);
10896 }
10897 }
10898 break;
10899 case Tag_ABI_VFP_args:
10900 /* Aready done. */
10901 break;
10902 case Tag_ABI_WMMX_args:
10903 if (in_attr[i].i != out_attr[i].i)
10904 {
10905 _bfd_error_handler
10906 (_("error: %B uses iWMMXt register arguments, %B does not"),
10907 ibfd, obfd);
10908 result = FALSE;
10909 }
10910 break;
10911 case Tag_compatibility:
10912 /* Merged in target-independent code. */
10913 break;
10914 case Tag_ABI_HardFP_use:
10915 /* This is handled along with Tag_FP_arch. */
10916 break;
10917 case Tag_ABI_FP_16bit_format:
10918 if (in_attr[i].i != 0 && out_attr[i].i != 0)
10919 {
10920 if (in_attr[i].i != out_attr[i].i)
10921 {
10922 _bfd_error_handler
10923 (_("error: fp16 format mismatch between %B and %B"),
10924 ibfd, obfd);
10925 result = FALSE;
10926 }
10927 }
10928 if (in_attr[i].i != 0)
10929 out_attr[i].i = in_attr[i].i;
10930 break;
10931
10932 case Tag_DIV_use:
10933 /* This tag is set to zero if we can use UDIV and SDIV in Thumb
10934 mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10935 SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10936 CPU. We will merge as follows: If the input attribute's value
10937 is one then the output attribute's value remains unchanged. If
10938 the input attribute's value is zero or two then if the output
10939 attribute's value is one the output value is set to the input
10940 value, otherwise the output value must be the same as the
10941 inputs. */
10942 if (in_attr[i].i != 1 && out_attr[i].i != 1)
10943 {
10944 if (in_attr[i].i != out_attr[i].i)
10945 {
10946 _bfd_error_handler
10947 (_("DIV usage mismatch between %B and %B"),
10948 ibfd, obfd);
10949 result = FALSE;
10950 }
10951 }
10952
10953 if (in_attr[i].i != 1)
10954 out_attr[i].i = in_attr[i].i;
10955
10956 break;
10957
10958 case Tag_MPextension_use_legacy:
10959 /* We don't output objects with Tag_MPextension_use_legacy - we
10960 move the value to Tag_MPextension_use. */
10961 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
10962 {
10963 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
10964 {
10965 _bfd_error_handler
10966 (_("%B has has both the current and legacy "
10967 "Tag_MPextension_use attributes"),
10968 ibfd);
10969 result = FALSE;
10970 }
10971 }
10972
10973 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
10974 out_attr[Tag_MPextension_use] = in_attr[i];
10975
10976 break;
10977
10978 case Tag_nodefaults:
10979 /* This tag is set if it exists, but the value is unused (and is
10980 typically zero). We don't actually need to do anything here -
10981 the merge happens automatically when the type flags are merged
10982 below. */
10983 break;
10984 case Tag_also_compatible_with:
10985 /* Already done in Tag_CPU_arch. */
10986 break;
10987 case Tag_conformance:
10988 /* Keep the attribute if it matches. Throw it away otherwise.
10989 No attribute means no claim to conform. */
10990 if (!in_attr[i].s || !out_attr[i].s
10991 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
10992 out_attr[i].s = NULL;
10993 break;
10994
10995 default:
10996 result
10997 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
10998 }
10999
11000 /* If out_attr was copied from in_attr then it won't have a type yet. */
11001 if (in_attr[i].type && !out_attr[i].type)
11002 out_attr[i].type = in_attr[i].type;
11003 }
11004
11005 /* Merge Tag_compatibility attributes and any common GNU ones. */
11006 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
11007 return FALSE;
11008
11009 /* Check for any attributes not known on ARM. */
11010 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
11011
11012 return result;
11013 }
11014
11015
11016 /* Return TRUE if the two EABI versions are incompatible. */
11017
11018 static bfd_boolean
11019 elf32_arm_versions_compatible (unsigned iver, unsigned over)
11020 {
11021 /* v4 and v5 are the same spec before and after it was released,
11022 so allow mixing them. */
11023 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
11024 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
11025 return TRUE;
11026
11027 return (iver == over);
11028 }
11029
11030 /* Merge backend specific data from an object file to the output
11031 object file when linking. */
11032
11033 static bfd_boolean
11034 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
11035
11036 /* Display the flags field. */
11037
11038 static bfd_boolean
11039 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
11040 {
11041 FILE * file = (FILE *) ptr;
11042 unsigned long flags;
11043
11044 BFD_ASSERT (abfd != NULL && ptr != NULL);
11045
11046 /* Print normal ELF private data. */
11047 _bfd_elf_print_private_bfd_data (abfd, ptr);
11048
11049 flags = elf_elfheader (abfd)->e_flags;
11050 /* Ignore init flag - it may not be set, despite the flags field
11051 containing valid data. */
11052
11053 /* xgettext:c-format */
11054 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
11055
11056 switch (EF_ARM_EABI_VERSION (flags))
11057 {
11058 case EF_ARM_EABI_UNKNOWN:
11059 /* The following flag bits are GNU extensions and not part of the
11060 official ARM ELF extended ABI. Hence they are only decoded if
11061 the EABI version is not set. */
11062 if (flags & EF_ARM_INTERWORK)
11063 fprintf (file, _(" [interworking enabled]"));
11064
11065 if (flags & EF_ARM_APCS_26)
11066 fprintf (file, " [APCS-26]");
11067 else
11068 fprintf (file, " [APCS-32]");
11069
11070 if (flags & EF_ARM_VFP_FLOAT)
11071 fprintf (file, _(" [VFP float format]"));
11072 else if (flags & EF_ARM_MAVERICK_FLOAT)
11073 fprintf (file, _(" [Maverick float format]"));
11074 else
11075 fprintf (file, _(" [FPA float format]"));
11076
11077 if (flags & EF_ARM_APCS_FLOAT)
11078 fprintf (file, _(" [floats passed in float registers]"));
11079
11080 if (flags & EF_ARM_PIC)
11081 fprintf (file, _(" [position independent]"));
11082
11083 if (flags & EF_ARM_NEW_ABI)
11084 fprintf (file, _(" [new ABI]"));
11085
11086 if (flags & EF_ARM_OLD_ABI)
11087 fprintf (file, _(" [old ABI]"));
11088
11089 if (flags & EF_ARM_SOFT_FLOAT)
11090 fprintf (file, _(" [software FP]"));
11091
11092 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
11093 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
11094 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
11095 | EF_ARM_MAVERICK_FLOAT);
11096 break;
11097
11098 case EF_ARM_EABI_VER1:
11099 fprintf (file, _(" [Version1 EABI]"));
11100
11101 if (flags & EF_ARM_SYMSARESORTED)
11102 fprintf (file, _(" [sorted symbol table]"));
11103 else
11104 fprintf (file, _(" [unsorted symbol table]"));
11105
11106 flags &= ~ EF_ARM_SYMSARESORTED;
11107 break;
11108
11109 case EF_ARM_EABI_VER2:
11110 fprintf (file, _(" [Version2 EABI]"));
11111
11112 if (flags & EF_ARM_SYMSARESORTED)
11113 fprintf (file, _(" [sorted symbol table]"));
11114 else
11115 fprintf (file, _(" [unsorted symbol table]"));
11116
11117 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
11118 fprintf (file, _(" [dynamic symbols use segment index]"));
11119
11120 if (flags & EF_ARM_MAPSYMSFIRST)
11121 fprintf (file, _(" [mapping symbols precede others]"));
11122
11123 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
11124 | EF_ARM_MAPSYMSFIRST);
11125 break;
11126
11127 case EF_ARM_EABI_VER3:
11128 fprintf (file, _(" [Version3 EABI]"));
11129 break;
11130
11131 case EF_ARM_EABI_VER4:
11132 fprintf (file, _(" [Version4 EABI]"));
11133 goto eabi;
11134
11135 case EF_ARM_EABI_VER5:
11136 fprintf (file, _(" [Version5 EABI]"));
11137 eabi:
11138 if (flags & EF_ARM_BE8)
11139 fprintf (file, _(" [BE8]"));
11140
11141 if (flags & EF_ARM_LE8)
11142 fprintf (file, _(" [LE8]"));
11143
11144 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
11145 break;
11146
11147 default:
11148 fprintf (file, _(" <EABI version unrecognised>"));
11149 break;
11150 }
11151
11152 flags &= ~ EF_ARM_EABIMASK;
11153
11154 if (flags & EF_ARM_RELEXEC)
11155 fprintf (file, _(" [relocatable executable]"));
11156
11157 if (flags & EF_ARM_HASENTRY)
11158 fprintf (file, _(" [has entry point]"));
11159
11160 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
11161
11162 if (flags)
11163 fprintf (file, _("<Unrecognised flag bits set>"));
11164
11165 fputc ('\n', file);
11166
11167 return TRUE;
11168 }
11169
11170 static int
11171 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
11172 {
11173 switch (ELF_ST_TYPE (elf_sym->st_info))
11174 {
11175 case STT_ARM_TFUNC:
11176 return ELF_ST_TYPE (elf_sym->st_info);
11177
11178 case STT_ARM_16BIT:
11179 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
11180 This allows us to distinguish between data used by Thumb instructions
11181 and non-data (which is probably code) inside Thumb regions of an
11182 executable. */
11183 if (type != STT_OBJECT && type != STT_TLS)
11184 return ELF_ST_TYPE (elf_sym->st_info);
11185 break;
11186
11187 default:
11188 break;
11189 }
11190
11191 return type;
11192 }
11193
11194 static asection *
11195 elf32_arm_gc_mark_hook (asection *sec,
11196 struct bfd_link_info *info,
11197 Elf_Internal_Rela *rel,
11198 struct elf_link_hash_entry *h,
11199 Elf_Internal_Sym *sym)
11200 {
11201 if (h != NULL)
11202 switch (ELF32_R_TYPE (rel->r_info))
11203 {
11204 case R_ARM_GNU_VTINHERIT:
11205 case R_ARM_GNU_VTENTRY:
11206 return NULL;
11207 }
11208
11209 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
11210 }
11211
11212 /* Update the got entry reference counts for the section being removed. */
11213
11214 static bfd_boolean
11215 elf32_arm_gc_sweep_hook (bfd * abfd,
11216 struct bfd_link_info * info,
11217 asection * sec,
11218 const Elf_Internal_Rela * relocs)
11219 {
11220 Elf_Internal_Shdr *symtab_hdr;
11221 struct elf_link_hash_entry **sym_hashes;
11222 bfd_signed_vma *local_got_refcounts;
11223 const Elf_Internal_Rela *rel, *relend;
11224 struct elf32_arm_link_hash_table * globals;
11225
11226 if (info->relocatable)
11227 return TRUE;
11228
11229 globals = elf32_arm_hash_table (info);
11230 if (globals == NULL)
11231 return FALSE;
11232
11233 elf_section_data (sec)->local_dynrel = NULL;
11234
11235 symtab_hdr = & elf_symtab_hdr (abfd);
11236 sym_hashes = elf_sym_hashes (abfd);
11237 local_got_refcounts = elf_local_got_refcounts (abfd);
11238
11239 check_use_blx (globals);
11240
11241 relend = relocs + sec->reloc_count;
11242 for (rel = relocs; rel < relend; rel++)
11243 {
11244 unsigned long r_symndx;
11245 struct elf_link_hash_entry *h = NULL;
11246 int r_type;
11247
11248 r_symndx = ELF32_R_SYM (rel->r_info);
11249 if (r_symndx >= symtab_hdr->sh_info)
11250 {
11251 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
11252 while (h->root.type == bfd_link_hash_indirect
11253 || h->root.type == bfd_link_hash_warning)
11254 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11255 }
11256
11257 r_type = ELF32_R_TYPE (rel->r_info);
11258 r_type = arm_real_reloc_type (globals, r_type);
11259 switch (r_type)
11260 {
11261 case R_ARM_GOT32:
11262 case R_ARM_GOT_PREL:
11263 case R_ARM_TLS_GD32:
11264 case R_ARM_TLS_IE32:
11265 if (h != NULL)
11266 {
11267 if (h->got.refcount > 0)
11268 h->got.refcount -= 1;
11269 }
11270 else if (local_got_refcounts != NULL)
11271 {
11272 if (local_got_refcounts[r_symndx] > 0)
11273 local_got_refcounts[r_symndx] -= 1;
11274 }
11275 break;
11276
11277 case R_ARM_TLS_LDM32:
11278 globals->tls_ldm_got.refcount -= 1;
11279 break;
11280
11281 case R_ARM_ABS32:
11282 case R_ARM_ABS32_NOI:
11283 case R_ARM_REL32:
11284 case R_ARM_REL32_NOI:
11285 case R_ARM_PC24:
11286 case R_ARM_PLT32:
11287 case R_ARM_CALL:
11288 case R_ARM_JUMP24:
11289 case R_ARM_PREL31:
11290 case R_ARM_THM_CALL:
11291 case R_ARM_THM_JUMP24:
11292 case R_ARM_THM_JUMP19:
11293 case R_ARM_MOVW_ABS_NC:
11294 case R_ARM_MOVT_ABS:
11295 case R_ARM_MOVW_PREL_NC:
11296 case R_ARM_MOVT_PREL:
11297 case R_ARM_THM_MOVW_ABS_NC:
11298 case R_ARM_THM_MOVT_ABS:
11299 case R_ARM_THM_MOVW_PREL_NC:
11300 case R_ARM_THM_MOVT_PREL:
11301 /* Should the interworking branches be here also? */
11302
11303 if (h != NULL)
11304 {
11305 struct elf32_arm_link_hash_entry *eh;
11306 struct elf_dyn_relocs **pp;
11307 struct elf_dyn_relocs *p;
11308
11309 eh = (struct elf32_arm_link_hash_entry *) h;
11310
11311 if (h->plt.refcount > 0)
11312 {
11313 h->plt.refcount -= 1;
11314 if (r_type == R_ARM_THM_CALL)
11315 eh->plt_maybe_thumb_refcount--;
11316
11317 if (r_type == R_ARM_THM_JUMP24
11318 || r_type == R_ARM_THM_JUMP19)
11319 eh->plt_thumb_refcount--;
11320 }
11321
11322 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
11323 if (p->sec == sec)
11324 {
11325 /* Everything must go for SEC. */
11326 *pp = p->next;
11327 break;
11328 }
11329 }
11330 break;
11331
11332 default:
11333 break;
11334 }
11335 }
11336
11337 return TRUE;
11338 }
11339
11340 /* Look through the relocs for a section during the first phase. */
11341
11342 static bfd_boolean
11343 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
11344 asection *sec, const Elf_Internal_Rela *relocs)
11345 {
11346 Elf_Internal_Shdr *symtab_hdr;
11347 struct elf_link_hash_entry **sym_hashes;
11348 const Elf_Internal_Rela *rel;
11349 const Elf_Internal_Rela *rel_end;
11350 bfd *dynobj;
11351 asection *sreloc;
11352 struct elf32_arm_link_hash_table *htab;
11353 bfd_boolean needs_plt;
11354 unsigned long nsyms;
11355
11356 if (info->relocatable)
11357 return TRUE;
11358
11359 BFD_ASSERT (is_arm_elf (abfd));
11360
11361 htab = elf32_arm_hash_table (info);
11362 if (htab == NULL)
11363 return FALSE;
11364
11365 sreloc = NULL;
11366
11367 /* Create dynamic sections for relocatable executables so that we can
11368 copy relocations. */
11369 if (htab->root.is_relocatable_executable
11370 && ! htab->root.dynamic_sections_created)
11371 {
11372 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
11373 return FALSE;
11374 }
11375
11376 dynobj = elf_hash_table (info)->dynobj;
11377 symtab_hdr = & elf_symtab_hdr (abfd);
11378 sym_hashes = elf_sym_hashes (abfd);
11379 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
11380
11381 rel_end = relocs + sec->reloc_count;
11382 for (rel = relocs; rel < rel_end; rel++)
11383 {
11384 struct elf_link_hash_entry *h;
11385 struct elf32_arm_link_hash_entry *eh;
11386 unsigned long r_symndx;
11387 int r_type;
11388
11389 r_symndx = ELF32_R_SYM (rel->r_info);
11390 r_type = ELF32_R_TYPE (rel->r_info);
11391 r_type = arm_real_reloc_type (htab, r_type);
11392
11393 if (r_symndx >= nsyms
11394 /* PR 9934: It is possible to have relocations that do not
11395 refer to symbols, thus it is also possible to have an
11396 object file containing relocations but no symbol table. */
11397 && (r_symndx > STN_UNDEF || nsyms > 0))
11398 {
11399 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
11400 r_symndx);
11401 return FALSE;
11402 }
11403
11404 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
11405 h = NULL;
11406 else
11407 {
11408 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
11409 while (h->root.type == bfd_link_hash_indirect
11410 || h->root.type == bfd_link_hash_warning)
11411 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11412 }
11413
11414 eh = (struct elf32_arm_link_hash_entry *) h;
11415
11416 /* Could be done earlier, if h were already available. */
11417 r_type = elf32_arm_tls_transition (info, r_type, h);
11418 switch (r_type)
11419 {
11420 case R_ARM_GOT32:
11421 case R_ARM_GOT_PREL:
11422 case R_ARM_TLS_GD32:
11423 case R_ARM_TLS_IE32:
11424 case R_ARM_TLS_GOTDESC:
11425 case R_ARM_TLS_DESCSEQ:
11426 case R_ARM_THM_TLS_DESCSEQ:
11427 case R_ARM_TLS_CALL:
11428 case R_ARM_THM_TLS_CALL:
11429 /* This symbol requires a global offset table entry. */
11430 {
11431 int tls_type, old_tls_type;
11432
11433 switch (r_type)
11434 {
11435 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
11436
11437 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
11438
11439 case R_ARM_TLS_GOTDESC:
11440 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
11441 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
11442 tls_type = GOT_TLS_GDESC; break;
11443
11444 default: tls_type = GOT_NORMAL; break;
11445 }
11446
11447 if (h != NULL)
11448 {
11449 h->got.refcount++;
11450 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
11451 }
11452 else
11453 {
11454 bfd_signed_vma *local_got_refcounts;
11455
11456 /* This is a global offset table entry for a local symbol. */
11457 local_got_refcounts = elf_local_got_refcounts (abfd);
11458 if (local_got_refcounts == NULL)
11459 {
11460 bfd_size_type size;
11461
11462 size = symtab_hdr->sh_info;
11463 size *= (sizeof (bfd_signed_vma)
11464 + sizeof (bfd_vma) + sizeof (char));
11465 local_got_refcounts = (bfd_signed_vma *)
11466 bfd_zalloc (abfd, size);
11467 if (local_got_refcounts == NULL)
11468 return FALSE;
11469 elf_local_got_refcounts (abfd) = local_got_refcounts;
11470 elf32_arm_local_tlsdesc_gotent (abfd)
11471 = (bfd_vma *) (local_got_refcounts
11472 + symtab_hdr->sh_info);
11473 elf32_arm_local_got_tls_type (abfd)
11474 = (char *) (elf32_arm_local_tlsdesc_gotent (abfd)
11475 + symtab_hdr->sh_info);
11476 }
11477 local_got_refcounts[r_symndx] += 1;
11478 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
11479 }
11480
11481 /* If a variable is accessed with both tls methods, two
11482 slots may be created. */
11483 if (GOT_TLS_GD_ANY_P (old_tls_type)
11484 && GOT_TLS_GD_ANY_P (tls_type))
11485 tls_type |= old_tls_type;
11486
11487 /* We will already have issued an error message if there
11488 is a TLS/non-TLS mismatch, based on the symbol
11489 type. So just combine any TLS types needed. */
11490 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
11491 && tls_type != GOT_NORMAL)
11492 tls_type |= old_tls_type;
11493
11494 /* If the symbol is accessed in both IE and GDESC
11495 method, we're able to relax. Turn off the GDESC flag,
11496 without messing up with any other kind of tls types
11497 that may be involved */
11498 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
11499 tls_type &= ~GOT_TLS_GDESC;
11500
11501 if (old_tls_type != tls_type)
11502 {
11503 if (h != NULL)
11504 elf32_arm_hash_entry (h)->tls_type = tls_type;
11505 else
11506 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
11507 }
11508 }
11509 /* Fall through. */
11510
11511 case R_ARM_TLS_LDM32:
11512 if (r_type == R_ARM_TLS_LDM32)
11513 htab->tls_ldm_got.refcount++;
11514 /* Fall through. */
11515
11516 case R_ARM_GOTOFF32:
11517 case R_ARM_GOTPC:
11518 if (htab->root.sgot == NULL)
11519 {
11520 if (htab->root.dynobj == NULL)
11521 htab->root.dynobj = abfd;
11522 if (!create_got_section (htab->root.dynobj, info))
11523 return FALSE;
11524 }
11525 break;
11526
11527 case R_ARM_ABS12:
11528 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
11529 ldr __GOTT_INDEX__ offsets. */
11530 if (!htab->vxworks_p)
11531 break;
11532 /* Fall through. */
11533
11534 case R_ARM_PC24:
11535 case R_ARM_PLT32:
11536 case R_ARM_CALL:
11537 case R_ARM_JUMP24:
11538 case R_ARM_PREL31:
11539 case R_ARM_THM_CALL:
11540 case R_ARM_THM_JUMP24:
11541 case R_ARM_THM_JUMP19:
11542 needs_plt = 1;
11543 goto normal_reloc;
11544
11545 case R_ARM_MOVW_ABS_NC:
11546 case R_ARM_MOVT_ABS:
11547 case R_ARM_THM_MOVW_ABS_NC:
11548 case R_ARM_THM_MOVT_ABS:
11549 if (info->shared)
11550 {
11551 (*_bfd_error_handler)
11552 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
11553 abfd, elf32_arm_howto_table_1[r_type].name,
11554 (h) ? h->root.root.string : "a local symbol");
11555 bfd_set_error (bfd_error_bad_value);
11556 return FALSE;
11557 }
11558
11559 /* Fall through. */
11560 case R_ARM_ABS32:
11561 case R_ARM_ABS32_NOI:
11562 case R_ARM_REL32:
11563 case R_ARM_REL32_NOI:
11564 case R_ARM_MOVW_PREL_NC:
11565 case R_ARM_MOVT_PREL:
11566 case R_ARM_THM_MOVW_PREL_NC:
11567 case R_ARM_THM_MOVT_PREL:
11568 needs_plt = 0;
11569 normal_reloc:
11570
11571 /* Should the interworking branches be listed here? */
11572 if (h != NULL)
11573 {
11574 /* If this reloc is in a read-only section, we might
11575 need a copy reloc. We can't check reliably at this
11576 stage whether the section is read-only, as input
11577 sections have not yet been mapped to output sections.
11578 Tentatively set the flag for now, and correct in
11579 adjust_dynamic_symbol. */
11580 if (!info->shared)
11581 h->non_got_ref = 1;
11582
11583 /* We may need a .plt entry if the function this reloc
11584 refers to is in a different object. We can't tell for
11585 sure yet, because something later might force the
11586 symbol local. */
11587 if (needs_plt)
11588 h->needs_plt = 1;
11589
11590 /* If we create a PLT entry, this relocation will reference
11591 it, even if it's an ABS32 relocation. */
11592 h->plt.refcount += 1;
11593
11594 /* It's too early to use htab->use_blx here, so we have to
11595 record possible blx references separately from
11596 relocs that definitely need a thumb stub. */
11597
11598 if (r_type == R_ARM_THM_CALL)
11599 eh->plt_maybe_thumb_refcount += 1;
11600
11601 if (r_type == R_ARM_THM_JUMP24
11602 || r_type == R_ARM_THM_JUMP19)
11603 eh->plt_thumb_refcount += 1;
11604 }
11605
11606 /* If we are creating a shared library or relocatable executable,
11607 and this is a reloc against a global symbol, or a non PC
11608 relative reloc against a local symbol, then we need to copy
11609 the reloc into the shared library. However, if we are linking
11610 with -Bsymbolic, we do not need to copy a reloc against a
11611 global symbol which is defined in an object we are
11612 including in the link (i.e., DEF_REGULAR is set). At
11613 this point we have not seen all the input files, so it is
11614 possible that DEF_REGULAR is not set now but will be set
11615 later (it is never cleared). We account for that
11616 possibility below by storing information in the
11617 dyn_relocs field of the hash table entry. */
11618 if ((info->shared || htab->root.is_relocatable_executable)
11619 && (sec->flags & SEC_ALLOC) != 0
11620 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
11621 || (h != NULL && ! needs_plt
11622 && (! info->symbolic || ! h->def_regular))))
11623 {
11624 struct elf_dyn_relocs *p, **head;
11625
11626 /* When creating a shared object, we must copy these
11627 reloc types into the output file. We create a reloc
11628 section in dynobj and make room for this reloc. */
11629 if (sreloc == NULL)
11630 {
11631 sreloc = _bfd_elf_make_dynamic_reloc_section
11632 (sec, dynobj, 2, abfd, ! htab->use_rel);
11633
11634 if (sreloc == NULL)
11635 return FALSE;
11636
11637 /* BPABI objects never have dynamic relocations mapped. */
11638 if (htab->symbian_p)
11639 {
11640 flagword flags;
11641
11642 flags = bfd_get_section_flags (dynobj, sreloc);
11643 flags &= ~(SEC_LOAD | SEC_ALLOC);
11644 bfd_set_section_flags (dynobj, sreloc, flags);
11645 }
11646 }
11647
11648 /* If this is a global symbol, we count the number of
11649 relocations we need for this symbol. */
11650 if (h != NULL)
11651 {
11652 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
11653 }
11654 else
11655 {
11656 /* Track dynamic relocs needed for local syms too.
11657 We really need local syms available to do this
11658 easily. Oh well. */
11659 asection *s;
11660 void *vpp;
11661 Elf_Internal_Sym *isym;
11662
11663 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
11664 abfd, r_symndx);
11665 if (isym == NULL)
11666 return FALSE;
11667
11668 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
11669 if (s == NULL)
11670 s = sec;
11671
11672 vpp = &elf_section_data (s)->local_dynrel;
11673 head = (struct elf_dyn_relocs **) vpp;
11674 }
11675
11676 p = *head;
11677 if (p == NULL || p->sec != sec)
11678 {
11679 bfd_size_type amt = sizeof *p;
11680
11681 p = (struct elf_dyn_relocs *)
11682 bfd_alloc (htab->root.dynobj, amt);
11683 if (p == NULL)
11684 return FALSE;
11685 p->next = *head;
11686 *head = p;
11687 p->sec = sec;
11688 p->count = 0;
11689 p->pc_count = 0;
11690 }
11691
11692 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
11693 p->pc_count += 1;
11694 p->count += 1;
11695 }
11696 break;
11697
11698 /* This relocation describes the C++ object vtable hierarchy.
11699 Reconstruct it for later use during GC. */
11700 case R_ARM_GNU_VTINHERIT:
11701 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
11702 return FALSE;
11703 break;
11704
11705 /* This relocation describes which C++ vtable entries are actually
11706 used. Record for later use during GC. */
11707 case R_ARM_GNU_VTENTRY:
11708 BFD_ASSERT (h != NULL);
11709 if (h != NULL
11710 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
11711 return FALSE;
11712 break;
11713 }
11714 }
11715
11716 return TRUE;
11717 }
11718
11719 /* Unwinding tables are not referenced directly. This pass marks them as
11720 required if the corresponding code section is marked. */
11721
11722 static bfd_boolean
11723 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
11724 elf_gc_mark_hook_fn gc_mark_hook)
11725 {
11726 bfd *sub;
11727 Elf_Internal_Shdr **elf_shdrp;
11728 bfd_boolean again;
11729
11730 /* Marking EH data may cause additional code sections to be marked,
11731 requiring multiple passes. */
11732 again = TRUE;
11733 while (again)
11734 {
11735 again = FALSE;
11736 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
11737 {
11738 asection *o;
11739
11740 if (! is_arm_elf (sub))
11741 continue;
11742
11743 elf_shdrp = elf_elfsections (sub);
11744 for (o = sub->sections; o != NULL; o = o->next)
11745 {
11746 Elf_Internal_Shdr *hdr;
11747
11748 hdr = &elf_section_data (o)->this_hdr;
11749 if (hdr->sh_type == SHT_ARM_EXIDX
11750 && hdr->sh_link
11751 && hdr->sh_link < elf_numsections (sub)
11752 && !o->gc_mark
11753 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
11754 {
11755 again = TRUE;
11756 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
11757 return FALSE;
11758 }
11759 }
11760 }
11761 }
11762
11763 return TRUE;
11764 }
11765
11766 /* Treat mapping symbols as special target symbols. */
11767
11768 static bfd_boolean
11769 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
11770 {
11771 return bfd_is_arm_special_symbol_name (sym->name,
11772 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
11773 }
11774
11775 /* This is a copy of elf_find_function() from elf.c except that
11776 ARM mapping symbols are ignored when looking for function names
11777 and STT_ARM_TFUNC is considered to a function type. */
11778
11779 static bfd_boolean
11780 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
11781 asection * section,
11782 asymbol ** symbols,
11783 bfd_vma offset,
11784 const char ** filename_ptr,
11785 const char ** functionname_ptr)
11786 {
11787 const char * filename = NULL;
11788 asymbol * func = NULL;
11789 bfd_vma low_func = 0;
11790 asymbol ** p;
11791
11792 for (p = symbols; *p != NULL; p++)
11793 {
11794 elf_symbol_type *q;
11795
11796 q = (elf_symbol_type *) *p;
11797
11798 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11799 {
11800 default:
11801 break;
11802 case STT_FILE:
11803 filename = bfd_asymbol_name (&q->symbol);
11804 break;
11805 case STT_FUNC:
11806 case STT_ARM_TFUNC:
11807 case STT_NOTYPE:
11808 /* Skip mapping symbols. */
11809 if ((q->symbol.flags & BSF_LOCAL)
11810 && bfd_is_arm_special_symbol_name (q->symbol.name,
11811 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
11812 continue;
11813 /* Fall through. */
11814 if (bfd_get_section (&q->symbol) == section
11815 && q->symbol.value >= low_func
11816 && q->symbol.value <= offset)
11817 {
11818 func = (asymbol *) q;
11819 low_func = q->symbol.value;
11820 }
11821 break;
11822 }
11823 }
11824
11825 if (func == NULL)
11826 return FALSE;
11827
11828 if (filename_ptr)
11829 *filename_ptr = filename;
11830 if (functionname_ptr)
11831 *functionname_ptr = bfd_asymbol_name (func);
11832
11833 return TRUE;
11834 }
11835
11836
11837 /* Find the nearest line to a particular section and offset, for error
11838 reporting. This code is a duplicate of the code in elf.c, except
11839 that it uses arm_elf_find_function. */
11840
11841 static bfd_boolean
11842 elf32_arm_find_nearest_line (bfd * abfd,
11843 asection * section,
11844 asymbol ** symbols,
11845 bfd_vma offset,
11846 const char ** filename_ptr,
11847 const char ** functionname_ptr,
11848 unsigned int * line_ptr)
11849 {
11850 bfd_boolean found = FALSE;
11851
11852 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11853
11854 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11855 filename_ptr, functionname_ptr,
11856 line_ptr, 0,
11857 & elf_tdata (abfd)->dwarf2_find_line_info))
11858 {
11859 if (!*functionname_ptr)
11860 arm_elf_find_function (abfd, section, symbols, offset,
11861 *filename_ptr ? NULL : filename_ptr,
11862 functionname_ptr);
11863
11864 return TRUE;
11865 }
11866
11867 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11868 & found, filename_ptr,
11869 functionname_ptr, line_ptr,
11870 & elf_tdata (abfd)->line_info))
11871 return FALSE;
11872
11873 if (found && (*functionname_ptr || *line_ptr))
11874 return TRUE;
11875
11876 if (symbols == NULL)
11877 return FALSE;
11878
11879 if (! arm_elf_find_function (abfd, section, symbols, offset,
11880 filename_ptr, functionname_ptr))
11881 return FALSE;
11882
11883 *line_ptr = 0;
11884 return TRUE;
11885 }
11886
11887 static bfd_boolean
11888 elf32_arm_find_inliner_info (bfd * abfd,
11889 const char ** filename_ptr,
11890 const char ** functionname_ptr,
11891 unsigned int * line_ptr)
11892 {
11893 bfd_boolean found;
11894 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11895 functionname_ptr, line_ptr,
11896 & elf_tdata (abfd)->dwarf2_find_line_info);
11897 return found;
11898 }
11899
11900 /* Adjust a symbol defined by a dynamic object and referenced by a
11901 regular object. The current definition is in some section of the
11902 dynamic object, but we're not including those sections. We have to
11903 change the definition to something the rest of the link can
11904 understand. */
11905
11906 static bfd_boolean
11907 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11908 struct elf_link_hash_entry * h)
11909 {
11910 bfd * dynobj;
11911 asection * s;
11912 struct elf32_arm_link_hash_entry * eh;
11913 struct elf32_arm_link_hash_table *globals;
11914
11915 globals = elf32_arm_hash_table (info);
11916 if (globals == NULL)
11917 return FALSE;
11918
11919 dynobj = elf_hash_table (info)->dynobj;
11920
11921 /* Make sure we know what is going on here. */
11922 BFD_ASSERT (dynobj != NULL
11923 && (h->needs_plt
11924 || h->u.weakdef != NULL
11925 || (h->def_dynamic
11926 && h->ref_regular
11927 && !h->def_regular)));
11928
11929 eh = (struct elf32_arm_link_hash_entry *) h;
11930
11931 /* If this is a function, put it in the procedure linkage table. We
11932 will fill in the contents of the procedure linkage table later,
11933 when we know the address of the .got section. */
11934 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
11935 || h->needs_plt)
11936 {
11937 if (h->plt.refcount <= 0
11938 || SYMBOL_CALLS_LOCAL (info, h)
11939 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11940 && h->root.type == bfd_link_hash_undefweak))
11941 {
11942 /* This case can occur if we saw a PLT32 reloc in an input
11943 file, but the symbol was never referred to by a dynamic
11944 object, or if all references were garbage collected. In
11945 such a case, we don't actually need to build a procedure
11946 linkage table, and we can just do a PC24 reloc instead. */
11947 h->plt.offset = (bfd_vma) -1;
11948 eh->plt_thumb_refcount = 0;
11949 eh->plt_maybe_thumb_refcount = 0;
11950 h->needs_plt = 0;
11951 }
11952
11953 return TRUE;
11954 }
11955 else
11956 {
11957 /* It's possible that we incorrectly decided a .plt reloc was
11958 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11959 in check_relocs. We can't decide accurately between function
11960 and non-function syms in check-relocs; Objects loaded later in
11961 the link may change h->type. So fix it now. */
11962 h->plt.offset = (bfd_vma) -1;
11963 eh->plt_thumb_refcount = 0;
11964 eh->plt_maybe_thumb_refcount = 0;
11965 }
11966
11967 /* If this is a weak symbol, and there is a real definition, the
11968 processor independent code will have arranged for us to see the
11969 real definition first, and we can just use the same value. */
11970 if (h->u.weakdef != NULL)
11971 {
11972 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11973 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11974 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11975 h->root.u.def.value = h->u.weakdef->root.u.def.value;
11976 return TRUE;
11977 }
11978
11979 /* If there are no non-GOT references, we do not need a copy
11980 relocation. */
11981 if (!h->non_got_ref)
11982 return TRUE;
11983
11984 /* This is a reference to a symbol defined by a dynamic object which
11985 is not a function. */
11986
11987 /* If we are creating a shared library, we must presume that the
11988 only references to the symbol are via the global offset table.
11989 For such cases we need not do anything here; the relocations will
11990 be handled correctly by relocate_section. Relocatable executables
11991 can reference data in shared objects directly, so we don't need to
11992 do anything here. */
11993 if (info->shared || globals->root.is_relocatable_executable)
11994 return TRUE;
11995
11996 if (h->size == 0)
11997 {
11998 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11999 h->root.root.string);
12000 return TRUE;
12001 }
12002
12003 /* We must allocate the symbol in our .dynbss section, which will
12004 become part of the .bss section of the executable. There will be
12005 an entry for this symbol in the .dynsym section. The dynamic
12006 object will contain position independent code, so all references
12007 from the dynamic object to this symbol will go through the global
12008 offset table. The dynamic linker will use the .dynsym entry to
12009 determine the address it must put in the global offset table, so
12010 both the dynamic object and the regular object will refer to the
12011 same memory location for the variable. */
12012 s = bfd_get_section_by_name (dynobj, ".dynbss");
12013 BFD_ASSERT (s != NULL);
12014
12015 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
12016 copy the initial value out of the dynamic object and into the
12017 runtime process image. We need to remember the offset into the
12018 .rel(a).bss section we are going to use. */
12019 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
12020 {
12021 asection *srel;
12022
12023 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
12024 elf32_arm_allocate_dynrelocs (info, srel, 1);
12025 h->needs_copy = 1;
12026 }
12027
12028 return _bfd_elf_adjust_dynamic_copy (h, s);
12029 }
12030
12031 /* Allocate space in .plt, .got and associated reloc sections for
12032 dynamic relocs. */
12033
12034 static bfd_boolean
12035 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
12036 {
12037 struct bfd_link_info *info;
12038 struct elf32_arm_link_hash_table *htab;
12039 struct elf32_arm_link_hash_entry *eh;
12040 struct elf_dyn_relocs *p;
12041 bfd_signed_vma thumb_refs;
12042
12043 if (h->root.type == bfd_link_hash_indirect)
12044 return TRUE;
12045
12046 if (h->root.type == bfd_link_hash_warning)
12047 /* When warning symbols are created, they **replace** the "real"
12048 entry in the hash table, thus we never get to see the real
12049 symbol in a hash traversal. So look at it now. */
12050 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12051
12052 eh = (struct elf32_arm_link_hash_entry *) h;
12053
12054 info = (struct bfd_link_info *) inf;
12055 htab = elf32_arm_hash_table (info);
12056 if (htab == NULL)
12057 return FALSE;
12058
12059 if (htab->root.dynamic_sections_created
12060 && h->plt.refcount > 0)
12061 {
12062 /* Make sure this symbol is output as a dynamic symbol.
12063 Undefined weak syms won't yet be marked as dynamic. */
12064 if (h->dynindx == -1
12065 && !h->forced_local)
12066 {
12067 if (! bfd_elf_link_record_dynamic_symbol (info, h))
12068 return FALSE;
12069 }
12070
12071 if (info->shared
12072 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
12073 {
12074 asection *s = htab->root.splt;
12075
12076 /* If this is the first .plt entry, make room for the special
12077 first entry. */
12078 if (s->size == 0)
12079 s->size += htab->plt_header_size;
12080
12081 h->plt.offset = s->size;
12082
12083 /* If we will insert a Thumb trampoline before this PLT, leave room
12084 for it. */
12085 thumb_refs = eh->plt_thumb_refcount;
12086 if (!htab->use_blx)
12087 thumb_refs += eh->plt_maybe_thumb_refcount;
12088
12089 if (thumb_refs > 0)
12090 {
12091 h->plt.offset += PLT_THUMB_STUB_SIZE;
12092 s->size += PLT_THUMB_STUB_SIZE;
12093 }
12094
12095 /* If this symbol is not defined in a regular file, and we are
12096 not generating a shared library, then set the symbol to this
12097 location in the .plt. This is required to make function
12098 pointers compare as equal between the normal executable and
12099 the shared library. */
12100 if (! info->shared
12101 && !h->def_regular)
12102 {
12103 h->root.u.def.section = s;
12104 h->root.u.def.value = h->plt.offset;
12105
12106 /* Make sure the function is not marked as Thumb, in case
12107 it is the target of an ABS32 relocation, which will
12108 point to the PLT entry. */
12109 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
12110 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
12111 }
12112
12113 /* Make room for this entry. */
12114 s->size += htab->plt_entry_size;
12115
12116 if (!htab->symbian_p)
12117 {
12118 /* We also need to make an entry in the .got.plt section, which
12119 will be placed in the .got section by the linker script. */
12120 eh->plt_got_offset = (htab->root.sgotplt->size
12121 - 8 * htab->num_tls_desc);
12122 htab->root.sgotplt->size += 4;
12123 }
12124
12125 /* We also need to make an entry in the .rel(a).plt section. */
12126 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
12127 htab->next_tls_desc_index++;
12128
12129 /* VxWorks executables have a second set of relocations for
12130 each PLT entry. They go in a separate relocation section,
12131 which is processed by the kernel loader. */
12132 if (htab->vxworks_p && !info->shared)
12133 {
12134 /* There is a relocation for the initial PLT entry:
12135 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
12136 if (h->plt.offset == htab->plt_header_size)
12137 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
12138
12139 /* There are two extra relocations for each subsequent
12140 PLT entry: an R_ARM_32 relocation for the GOT entry,
12141 and an R_ARM_32 relocation for the PLT entry. */
12142 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
12143 }
12144 }
12145 else
12146 {
12147 h->plt.offset = (bfd_vma) -1;
12148 h->needs_plt = 0;
12149 }
12150 }
12151 else
12152 {
12153 h->plt.offset = (bfd_vma) -1;
12154 h->needs_plt = 0;
12155 }
12156
12157 eh = (struct elf32_arm_link_hash_entry *) h;
12158 eh->tlsdesc_got = (bfd_vma) -1;
12159
12160 if (h->got.refcount > 0)
12161 {
12162 asection *s;
12163 bfd_boolean dyn;
12164 int tls_type = elf32_arm_hash_entry (h)->tls_type;
12165 int indx;
12166
12167 /* Make sure this symbol is output as a dynamic symbol.
12168 Undefined weak syms won't yet be marked as dynamic. */
12169 if (h->dynindx == -1
12170 && !h->forced_local)
12171 {
12172 if (! bfd_elf_link_record_dynamic_symbol (info, h))
12173 return FALSE;
12174 }
12175
12176 if (!htab->symbian_p)
12177 {
12178 s = htab->root.sgot;
12179 h->got.offset = s->size;
12180
12181 if (tls_type == GOT_UNKNOWN)
12182 abort ();
12183
12184 if (tls_type == GOT_NORMAL)
12185 /* Non-TLS symbols need one GOT slot. */
12186 s->size += 4;
12187 else
12188 {
12189 if (tls_type & GOT_TLS_GDESC)
12190 {
12191 /* R_ARM_TLS_DESC needs 2 GOT slots. */
12192 eh->tlsdesc_got
12193 = (htab->root.sgotplt->size
12194 - elf32_arm_compute_jump_table_size (htab));
12195 htab->root.sgotplt->size += 8;
12196 h->got.offset = (bfd_vma) -2;
12197 /* plt_got_offset needs to know there's a TLS_DESC
12198 reloc in the middle of .got.plt. */
12199 htab->num_tls_desc++;
12200 }
12201
12202 if (tls_type & GOT_TLS_GD)
12203 {
12204 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
12205 the symbol is both GD and GDESC, got.offset may
12206 have been overwritten. */
12207 h->got.offset = s->size;
12208 s->size += 8;
12209 }
12210
12211 if (tls_type & GOT_TLS_IE)
12212 /* R_ARM_TLS_IE32 needs one GOT slot. */
12213 s->size += 4;
12214 }
12215
12216 dyn = htab->root.dynamic_sections_created;
12217
12218 indx = 0;
12219 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
12220 && (!info->shared
12221 || !SYMBOL_REFERENCES_LOCAL (info, h)))
12222 indx = h->dynindx;
12223
12224 if (tls_type != GOT_NORMAL
12225 && (info->shared || indx != 0)
12226 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
12227 || h->root.type != bfd_link_hash_undefweak))
12228 {
12229 if (tls_type & GOT_TLS_IE)
12230 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
12231
12232 if (tls_type & GOT_TLS_GD)
12233 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
12234
12235 if (tls_type & GOT_TLS_GDESC)
12236 {
12237 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
12238 /* GDESC needs a trampoline to jump to. */
12239 htab->tls_trampoline = -1;
12240 }
12241
12242 /* Only GD needs it. GDESC just emits one relocation per
12243 2 entries. */
12244 if ((tls_type & GOT_TLS_GD) && indx != 0)
12245 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
12246 }
12247 else if (!SYMBOL_REFERENCES_LOCAL (info, h))
12248 {
12249 if (htab->root.dynamic_sections_created)
12250 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
12251 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
12252 }
12253 else if (info->shared)
12254 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
12255 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
12256 }
12257 }
12258 else
12259 h->got.offset = (bfd_vma) -1;
12260
12261 /* Allocate stubs for exported Thumb functions on v4t. */
12262 if (!htab->use_blx && h->dynindx != -1
12263 && h->def_regular
12264 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
12265 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
12266 {
12267 struct elf_link_hash_entry * th;
12268 struct bfd_link_hash_entry * bh;
12269 struct elf_link_hash_entry * myh;
12270 char name[1024];
12271 asection *s;
12272 bh = NULL;
12273 /* Create a new symbol to regist the real location of the function. */
12274 s = h->root.u.def.section;
12275 sprintf (name, "__real_%s", h->root.root.string);
12276 _bfd_generic_link_add_one_symbol (info, s->owner,
12277 name, BSF_GLOBAL, s,
12278 h->root.u.def.value,
12279 NULL, TRUE, FALSE, &bh);
12280
12281 myh = (struct elf_link_hash_entry *) bh;
12282 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
12283 myh->forced_local = 1;
12284 eh->export_glue = myh;
12285 th = record_arm_to_thumb_glue (info, h);
12286 /* Point the symbol at the stub. */
12287 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
12288 h->root.u.def.section = th->root.u.def.section;
12289 h->root.u.def.value = th->root.u.def.value & ~1;
12290 }
12291
12292 if (eh->dyn_relocs == NULL)
12293 return TRUE;
12294
12295 /* In the shared -Bsymbolic case, discard space allocated for
12296 dynamic pc-relative relocs against symbols which turn out to be
12297 defined in regular objects. For the normal shared case, discard
12298 space for pc-relative relocs that have become local due to symbol
12299 visibility changes. */
12300
12301 if (info->shared || htab->root.is_relocatable_executable)
12302 {
12303 /* The only relocs that use pc_count are R_ARM_REL32 and
12304 R_ARM_REL32_NOI, which will appear on something like
12305 ".long foo - .". We want calls to protected symbols to resolve
12306 directly to the function rather than going via the plt. If people
12307 want function pointer comparisons to work as expected then they
12308 should avoid writing assembly like ".long foo - .". */
12309 if (SYMBOL_CALLS_LOCAL (info, h))
12310 {
12311 struct elf_dyn_relocs **pp;
12312
12313 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
12314 {
12315 p->count -= p->pc_count;
12316 p->pc_count = 0;
12317 if (p->count == 0)
12318 *pp = p->next;
12319 else
12320 pp = &p->next;
12321 }
12322 }
12323
12324 if (htab->vxworks_p)
12325 {
12326 struct elf_dyn_relocs **pp;
12327
12328 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
12329 {
12330 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
12331 *pp = p->next;
12332 else
12333 pp = &p->next;
12334 }
12335 }
12336
12337 /* Also discard relocs on undefined weak syms with non-default
12338 visibility. */
12339 if (eh->dyn_relocs != NULL
12340 && h->root.type == bfd_link_hash_undefweak)
12341 {
12342 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
12343 eh->dyn_relocs = NULL;
12344
12345 /* Make sure undefined weak symbols are output as a dynamic
12346 symbol in PIEs. */
12347 else if (h->dynindx == -1
12348 && !h->forced_local)
12349 {
12350 if (! bfd_elf_link_record_dynamic_symbol (info, h))
12351 return FALSE;
12352 }
12353 }
12354
12355 else if (htab->root.is_relocatable_executable && h->dynindx == -1
12356 && h->root.type == bfd_link_hash_new)
12357 {
12358 /* Output absolute symbols so that we can create relocations
12359 against them. For normal symbols we output a relocation
12360 against the section that contains them. */
12361 if (! bfd_elf_link_record_dynamic_symbol (info, h))
12362 return FALSE;
12363 }
12364
12365 }
12366 else
12367 {
12368 /* For the non-shared case, discard space for relocs against
12369 symbols which turn out to need copy relocs or are not
12370 dynamic. */
12371
12372 if (!h->non_got_ref
12373 && ((h->def_dynamic
12374 && !h->def_regular)
12375 || (htab->root.dynamic_sections_created
12376 && (h->root.type == bfd_link_hash_undefweak
12377 || h->root.type == bfd_link_hash_undefined))))
12378 {
12379 /* Make sure this symbol is output as a dynamic symbol.
12380 Undefined weak syms won't yet be marked as dynamic. */
12381 if (h->dynindx == -1
12382 && !h->forced_local)
12383 {
12384 if (! bfd_elf_link_record_dynamic_symbol (info, h))
12385 return FALSE;
12386 }
12387
12388 /* If that succeeded, we know we'll be keeping all the
12389 relocs. */
12390 if (h->dynindx != -1)
12391 goto keep;
12392 }
12393
12394 eh->dyn_relocs = NULL;
12395
12396 keep: ;
12397 }
12398
12399 /* Finally, allocate space. */
12400 for (p = eh->dyn_relocs; p != NULL; p = p->next)
12401 {
12402 asection *sreloc = elf_section_data (p->sec)->sreloc;
12403 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
12404 }
12405
12406 return TRUE;
12407 }
12408
12409 /* Find any dynamic relocs that apply to read-only sections. */
12410
12411 static bfd_boolean
12412 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
12413 {
12414 struct elf32_arm_link_hash_entry * eh;
12415 struct elf_dyn_relocs * p;
12416
12417 if (h->root.type == bfd_link_hash_warning)
12418 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12419
12420 eh = (struct elf32_arm_link_hash_entry *) h;
12421 for (p = eh->dyn_relocs; p != NULL; p = p->next)
12422 {
12423 asection *s = p->sec;
12424
12425 if (s != NULL && (s->flags & SEC_READONLY) != 0)
12426 {
12427 struct bfd_link_info *info = (struct bfd_link_info *) inf;
12428
12429 info->flags |= DF_TEXTREL;
12430
12431 /* Not an error, just cut short the traversal. */
12432 return FALSE;
12433 }
12434 }
12435 return TRUE;
12436 }
12437
12438 void
12439 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
12440 int byteswap_code)
12441 {
12442 struct elf32_arm_link_hash_table *globals;
12443
12444 globals = elf32_arm_hash_table (info);
12445 if (globals == NULL)
12446 return;
12447
12448 globals->byteswap_code = byteswap_code;
12449 }
12450
12451 /* Set the sizes of the dynamic sections. */
12452
12453 static bfd_boolean
12454 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
12455 struct bfd_link_info * info)
12456 {
12457 bfd * dynobj;
12458 asection * s;
12459 bfd_boolean plt;
12460 bfd_boolean relocs;
12461 bfd *ibfd;
12462 struct elf32_arm_link_hash_table *htab;
12463
12464 htab = elf32_arm_hash_table (info);
12465 if (htab == NULL)
12466 return FALSE;
12467
12468 dynobj = elf_hash_table (info)->dynobj;
12469 BFD_ASSERT (dynobj != NULL);
12470 check_use_blx (htab);
12471
12472 if (elf_hash_table (info)->dynamic_sections_created)
12473 {
12474 /* Set the contents of the .interp section to the interpreter. */
12475 if (info->executable)
12476 {
12477 s = bfd_get_section_by_name (dynobj, ".interp");
12478 BFD_ASSERT (s != NULL);
12479 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
12480 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
12481 }
12482 }
12483
12484 /* Set up .got offsets for local syms, and space for local dynamic
12485 relocs. */
12486 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
12487 {
12488 bfd_signed_vma *local_got;
12489 bfd_signed_vma *end_local_got;
12490 char *local_tls_type;
12491 bfd_vma *local_tlsdesc_gotent;
12492 bfd_size_type locsymcount;
12493 Elf_Internal_Shdr *symtab_hdr;
12494 asection *srel;
12495 bfd_boolean is_vxworks = htab->vxworks_p;
12496
12497 if (! is_arm_elf (ibfd))
12498 continue;
12499
12500 for (s = ibfd->sections; s != NULL; s = s->next)
12501 {
12502 struct elf_dyn_relocs *p;
12503
12504 for (p = (struct elf_dyn_relocs *)
12505 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
12506 {
12507 if (!bfd_is_abs_section (p->sec)
12508 && bfd_is_abs_section (p->sec->output_section))
12509 {
12510 /* Input section has been discarded, either because
12511 it is a copy of a linkonce section or due to
12512 linker script /DISCARD/, so we'll be discarding
12513 the relocs too. */
12514 }
12515 else if (is_vxworks
12516 && strcmp (p->sec->output_section->name,
12517 ".tls_vars") == 0)
12518 {
12519 /* Relocations in vxworks .tls_vars sections are
12520 handled specially by the loader. */
12521 }
12522 else if (p->count != 0)
12523 {
12524 srel = elf_section_data (p->sec)->sreloc;
12525 elf32_arm_allocate_dynrelocs (info, srel, p->count);
12526 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
12527 info->flags |= DF_TEXTREL;
12528 }
12529 }
12530 }
12531
12532 local_got = elf_local_got_refcounts (ibfd);
12533 if (!local_got)
12534 continue;
12535
12536 symtab_hdr = & elf_symtab_hdr (ibfd);
12537 locsymcount = symtab_hdr->sh_info;
12538 end_local_got = local_got + locsymcount;
12539 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
12540 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
12541 s = htab->root.sgot;
12542 srel = htab->root.srelgot;
12543 for (; local_got < end_local_got;
12544 ++local_got, ++local_tls_type, ++local_tlsdesc_gotent)
12545 {
12546 *local_tlsdesc_gotent = (bfd_vma) -1;
12547 if (*local_got > 0)
12548 {
12549 *local_got = s->size;
12550 if (*local_tls_type & GOT_TLS_GD)
12551 /* TLS_GD relocs need an 8-byte structure in the GOT. */
12552 s->size += 8;
12553 if (*local_tls_type & GOT_TLS_GDESC)
12554 {
12555 *local_tlsdesc_gotent = htab->root.sgotplt->size
12556 - elf32_arm_compute_jump_table_size (htab);
12557 htab->root.sgotplt->size += 8;
12558 *local_got = (bfd_vma) -2;
12559 /* plt_got_offset needs to know there's a TLS_DESC
12560 reloc in the middle of .got.plt. */
12561 htab->num_tls_desc++;
12562 }
12563 if (*local_tls_type & GOT_TLS_IE)
12564 s->size += 4;
12565
12566 if (*local_tls_type & GOT_NORMAL)
12567 {
12568 /* If the symbol is both GD and GDESC, *local_got
12569 may have been overwritten. */
12570 *local_got = s->size;
12571 s->size += 4;
12572 }
12573
12574 if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
12575 || *local_tls_type & GOT_TLS_GD)
12576 elf32_arm_allocate_dynrelocs (info, srel, 1);
12577
12578 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
12579 {
12580 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
12581 htab->tls_trampoline = -1;
12582 }
12583 }
12584 else
12585 *local_got = (bfd_vma) -1;
12586 }
12587 }
12588
12589 if (htab->tls_ldm_got.refcount > 0)
12590 {
12591 /* Allocate two GOT entries and one dynamic relocation (if necessary)
12592 for R_ARM_TLS_LDM32 relocations. */
12593 htab->tls_ldm_got.offset = htab->root.sgot->size;
12594 htab->root.sgot->size += 8;
12595 if (info->shared)
12596 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
12597 }
12598 else
12599 htab->tls_ldm_got.offset = -1;
12600
12601 /* Allocate global sym .plt and .got entries, and space for global
12602 sym dynamic relocs. */
12603 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
12604
12605 /* Here we rummage through the found bfds to collect glue information. */
12606 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
12607 {
12608 if (! is_arm_elf (ibfd))
12609 continue;
12610
12611 /* Initialise mapping tables for code/data. */
12612 bfd_elf32_arm_init_maps (ibfd);
12613
12614 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
12615 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
12616 /* xgettext:c-format */
12617 _bfd_error_handler (_("Errors encountered processing file %s"),
12618 ibfd->filename);
12619 }
12620
12621 /* Allocate space for the glue sections now that we've sized them. */
12622 bfd_elf32_arm_allocate_interworking_sections (info);
12623
12624 /* For every jump slot reserved in the sgotplt, reloc_count is
12625 incremented. However, when we reserve space for TLS descriptors,
12626 it's not incremented, so in order to compute the space reserved
12627 for them, it suffices to multiply the reloc count by the jump
12628 slot size. */
12629 if (htab->root.srelplt)
12630 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
12631
12632 if (htab->tls_trampoline)
12633 {
12634 if (htab->root.splt->size == 0)
12635 htab->root.splt->size += htab->plt_header_size;
12636
12637 htab->tls_trampoline = htab->root.splt->size;
12638 htab->root.splt->size += htab->plt_entry_size;
12639
12640 /* If we're not using lazy TLS relocations, don't generate the
12641 PLT and GOT entries they require. */
12642 if (!(info->flags & DF_BIND_NOW))
12643 {
12644 htab->dt_tlsdesc_got = htab->root.sgot->size;
12645 htab->root.sgot->size += 4;
12646
12647 htab->dt_tlsdesc_plt = htab->root.splt->size;
12648 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
12649 }
12650 }
12651
12652 /* The check_relocs and adjust_dynamic_symbol entry points have
12653 determined the sizes of the various dynamic sections. Allocate
12654 memory for them. */
12655 plt = FALSE;
12656 relocs = FALSE;
12657 for (s = dynobj->sections; s != NULL; s = s->next)
12658 {
12659 const char * name;
12660
12661 if ((s->flags & SEC_LINKER_CREATED) == 0)
12662 continue;
12663
12664 /* It's OK to base decisions on the section name, because none
12665 of the dynobj section names depend upon the input files. */
12666 name = bfd_get_section_name (dynobj, s);
12667
12668 if (strcmp (name, ".plt") == 0)
12669 {
12670 /* Remember whether there is a PLT. */
12671 plt = s->size != 0;
12672 }
12673 else if (CONST_STRNEQ (name, ".rel"))
12674 {
12675 if (s->size != 0)
12676 {
12677 /* Remember whether there are any reloc sections other
12678 than .rel(a).plt and .rela.plt.unloaded. */
12679 if (s != htab->root.srelplt && s != htab->srelplt2)
12680 relocs = TRUE;
12681
12682 /* We use the reloc_count field as a counter if we need
12683 to copy relocs into the output file. */
12684 s->reloc_count = 0;
12685 }
12686 }
12687 else if (! CONST_STRNEQ (name, ".got")
12688 && strcmp (name, ".dynbss") != 0)
12689 {
12690 /* It's not one of our sections, so don't allocate space. */
12691 continue;
12692 }
12693
12694 if (s->size == 0)
12695 {
12696 /* If we don't need this section, strip it from the
12697 output file. This is mostly to handle .rel(a).bss and
12698 .rel(a).plt. We must create both sections in
12699 create_dynamic_sections, because they must be created
12700 before the linker maps input sections to output
12701 sections. The linker does that before
12702 adjust_dynamic_symbol is called, and it is that
12703 function which decides whether anything needs to go
12704 into these sections. */
12705 s->flags |= SEC_EXCLUDE;
12706 continue;
12707 }
12708
12709 if ((s->flags & SEC_HAS_CONTENTS) == 0)
12710 continue;
12711
12712 /* Allocate memory for the section contents. */
12713 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
12714 if (s->contents == NULL)
12715 return FALSE;
12716 }
12717
12718 if (elf_hash_table (info)->dynamic_sections_created)
12719 {
12720 /* Add some entries to the .dynamic section. We fill in the
12721 values later, in elf32_arm_finish_dynamic_sections, but we
12722 must add the entries now so that we get the correct size for
12723 the .dynamic section. The DT_DEBUG entry is filled in by the
12724 dynamic linker and used by the debugger. */
12725 #define add_dynamic_entry(TAG, VAL) \
12726 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
12727
12728 if (info->executable)
12729 {
12730 if (!add_dynamic_entry (DT_DEBUG, 0))
12731 return FALSE;
12732 }
12733
12734 if (plt)
12735 {
12736 if ( !add_dynamic_entry (DT_PLTGOT, 0)
12737 || !add_dynamic_entry (DT_PLTRELSZ, 0)
12738 || !add_dynamic_entry (DT_PLTREL,
12739 htab->use_rel ? DT_REL : DT_RELA)
12740 || !add_dynamic_entry (DT_JMPREL, 0))
12741 return FALSE;
12742
12743 if (htab->dt_tlsdesc_plt &&
12744 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
12745 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
12746 return FALSE;
12747 }
12748
12749 if (relocs)
12750 {
12751 if (htab->use_rel)
12752 {
12753 if (!add_dynamic_entry (DT_REL, 0)
12754 || !add_dynamic_entry (DT_RELSZ, 0)
12755 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
12756 return FALSE;
12757 }
12758 else
12759 {
12760 if (!add_dynamic_entry (DT_RELA, 0)
12761 || !add_dynamic_entry (DT_RELASZ, 0)
12762 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
12763 return FALSE;
12764 }
12765 }
12766
12767 /* If any dynamic relocs apply to a read-only section,
12768 then we need a DT_TEXTREL entry. */
12769 if ((info->flags & DF_TEXTREL) == 0)
12770 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
12771 info);
12772
12773 if ((info->flags & DF_TEXTREL) != 0)
12774 {
12775 if (!add_dynamic_entry (DT_TEXTREL, 0))
12776 return FALSE;
12777 }
12778 if (htab->vxworks_p
12779 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
12780 return FALSE;
12781 }
12782 #undef add_dynamic_entry
12783
12784 return TRUE;
12785 }
12786
12787 /* Size sections even though they're not dynamic. We use it to setup
12788 _TLS_MODULE_BASE_, if needed. */
12789
12790 static bfd_boolean
12791 elf32_arm_always_size_sections (bfd *output_bfd,
12792 struct bfd_link_info *info)
12793 {
12794 asection *tls_sec;
12795
12796 if (info->relocatable)
12797 return TRUE;
12798
12799 tls_sec = elf_hash_table (info)->tls_sec;
12800
12801 if (tls_sec)
12802 {
12803 struct elf_link_hash_entry *tlsbase;
12804
12805 tlsbase = elf_link_hash_lookup
12806 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
12807
12808 if (tlsbase)
12809 {
12810 struct bfd_link_hash_entry *bh = NULL;
12811 const struct elf_backend_data *bed
12812 = get_elf_backend_data (output_bfd);
12813
12814 if (!(_bfd_generic_link_add_one_symbol
12815 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
12816 tls_sec, 0, NULL, FALSE,
12817 bed->collect, &bh)))
12818 return FALSE;
12819
12820 tlsbase->type = STT_TLS;
12821 tlsbase = (struct elf_link_hash_entry *)bh;
12822 tlsbase->def_regular = 1;
12823 tlsbase->other = STV_HIDDEN;
12824 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
12825 }
12826 }
12827 return TRUE;
12828 }
12829
12830 /* Finish up dynamic symbol handling. We set the contents of various
12831 dynamic sections here. */
12832
12833 static bfd_boolean
12834 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
12835 struct bfd_link_info * info,
12836 struct elf_link_hash_entry * h,
12837 Elf_Internal_Sym * sym)
12838 {
12839 struct elf32_arm_link_hash_table *htab;
12840 struct elf32_arm_link_hash_entry *eh;
12841
12842 htab = elf32_arm_hash_table (info);
12843 if (htab == NULL)
12844 return FALSE;
12845
12846 eh = (struct elf32_arm_link_hash_entry *) h;
12847
12848 if (h->plt.offset != (bfd_vma) -1)
12849 {
12850 asection * splt;
12851 asection * srel;
12852 bfd_byte *loc;
12853 bfd_vma plt_index;
12854 Elf_Internal_Rela rel;
12855
12856 /* This symbol has an entry in the procedure linkage table. Set
12857 it up. */
12858
12859 BFD_ASSERT (h->dynindx != -1);
12860
12861 splt = htab->root.splt;
12862 srel = htab->root.srelplt;
12863 BFD_ASSERT (splt != NULL && srel != NULL);
12864
12865 /* Fill in the entry in the procedure linkage table. */
12866 if (htab->symbian_p)
12867 {
12868 put_arm_insn (htab, output_bfd,
12869 elf32_arm_symbian_plt_entry[0],
12870 splt->contents + h->plt.offset);
12871 bfd_put_32 (output_bfd,
12872 elf32_arm_symbian_plt_entry[1],
12873 splt->contents + h->plt.offset + 4);
12874
12875 /* Fill in the entry in the .rel.plt section. */
12876 rel.r_offset = (splt->output_section->vma
12877 + splt->output_offset
12878 + h->plt.offset + 4);
12879 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12880
12881 /* Get the index in the procedure linkage table which
12882 corresponds to this symbol. This is the index of this symbol
12883 in all the symbols for which we are making plt entries. The
12884 first entry in the procedure linkage table is reserved. */
12885 plt_index = ((h->plt.offset - htab->plt_header_size)
12886 / htab->plt_entry_size);
12887 }
12888 else
12889 {
12890 bfd_vma got_offset, got_address, plt_address;
12891 bfd_vma got_displacement;
12892 asection * sgot;
12893 bfd_byte * ptr;
12894
12895 sgot = htab->root.sgotplt;
12896 BFD_ASSERT (sgot != NULL);
12897
12898 /* Get the offset into the .got.plt table of the entry that
12899 corresponds to this function. */
12900 got_offset = eh->plt_got_offset;
12901
12902 /* Get the index in the procedure linkage table which
12903 corresponds to this symbol. This is the index of this symbol
12904 in all the symbols for which we are making plt entries. The
12905 first three entries in .got.plt are reserved; after that
12906 symbols appear in the same order as in .plt. */
12907 plt_index = (got_offset - 12) / 4;
12908
12909 /* Calculate the address of the GOT entry. */
12910 got_address = (sgot->output_section->vma
12911 + sgot->output_offset
12912 + got_offset);
12913
12914 /* ...and the address of the PLT entry. */
12915 plt_address = (splt->output_section->vma
12916 + splt->output_offset
12917 + h->plt.offset);
12918
12919 ptr = splt->contents + h->plt.offset;
12920 if (htab->vxworks_p && info->shared)
12921 {
12922 unsigned int i;
12923 bfd_vma val;
12924
12925 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
12926 {
12927 val = elf32_arm_vxworks_shared_plt_entry[i];
12928 if (i == 2)
12929 val |= got_address - sgot->output_section->vma;
12930 if (i == 5)
12931 val |= plt_index * RELOC_SIZE (htab);
12932 if (i == 2 || i == 5)
12933 bfd_put_32 (output_bfd, val, ptr);
12934 else
12935 put_arm_insn (htab, output_bfd, val, ptr);
12936 }
12937 }
12938 else if (htab->vxworks_p)
12939 {
12940 unsigned int i;
12941 bfd_vma val;
12942
12943 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
12944 {
12945 val = elf32_arm_vxworks_exec_plt_entry[i];
12946 if (i == 2)
12947 val |= got_address;
12948 if (i == 4)
12949 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12950 if (i == 5)
12951 val |= plt_index * RELOC_SIZE (htab);
12952 if (i == 2 || i == 5)
12953 bfd_put_32 (output_bfd, val, ptr);
12954 else
12955 put_arm_insn (htab, output_bfd, val, ptr);
12956 }
12957
12958 loc = (htab->srelplt2->contents
12959 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12960
12961 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12962 referencing the GOT for this PLT entry. */
12963 rel.r_offset = plt_address + 8;
12964 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12965 rel.r_addend = got_offset;
12966 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12967 loc += RELOC_SIZE (htab);
12968
12969 /* Create the R_ARM_ABS32 relocation referencing the
12970 beginning of the PLT for this GOT entry. */
12971 rel.r_offset = got_address;
12972 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12973 rel.r_addend = 0;
12974 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12975 }
12976 else
12977 {
12978 bfd_signed_vma thumb_refs;
12979 /* Calculate the displacement between the PLT slot and the
12980 entry in the GOT. The eight-byte offset accounts for the
12981 value produced by adding to pc in the first instruction
12982 of the PLT stub. */
12983 got_displacement = got_address - (plt_address + 8);
12984
12985 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12986
12987 thumb_refs = eh->plt_thumb_refcount;
12988 if (!htab->use_blx)
12989 thumb_refs += eh->plt_maybe_thumb_refcount;
12990
12991 if (thumb_refs > 0)
12992 {
12993 put_thumb_insn (htab, output_bfd,
12994 elf32_arm_plt_thumb_stub[0], ptr - 4);
12995 put_thumb_insn (htab, output_bfd,
12996 elf32_arm_plt_thumb_stub[1], ptr - 2);
12997 }
12998
12999 put_arm_insn (htab, output_bfd,
13000 elf32_arm_plt_entry[0]
13001 | ((got_displacement & 0x0ff00000) >> 20),
13002 ptr + 0);
13003 put_arm_insn (htab, output_bfd,
13004 elf32_arm_plt_entry[1]
13005 | ((got_displacement & 0x000ff000) >> 12),
13006 ptr+ 4);
13007 put_arm_insn (htab, output_bfd,
13008 elf32_arm_plt_entry[2]
13009 | (got_displacement & 0x00000fff),
13010 ptr + 8);
13011 #ifdef FOUR_WORD_PLT
13012 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
13013 #endif
13014 }
13015
13016 /* Fill in the entry in the global offset table. */
13017 bfd_put_32 (output_bfd,
13018 (splt->output_section->vma
13019 + splt->output_offset),
13020 sgot->contents + got_offset);
13021
13022 /* Fill in the entry in the .rel(a).plt section. */
13023 rel.r_addend = 0;
13024 rel.r_offset = got_address;
13025 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
13026 }
13027
13028 loc = srel->contents + plt_index * RELOC_SIZE (htab);
13029 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
13030
13031 if (!h->def_regular)
13032 {
13033 /* Mark the symbol as undefined, rather than as defined in
13034 the .plt section. Leave the value alone. */
13035 sym->st_shndx = SHN_UNDEF;
13036 /* If the symbol is weak, we do need to clear the value.
13037 Otherwise, the PLT entry would provide a definition for
13038 the symbol even if the symbol wasn't defined anywhere,
13039 and so the symbol would never be NULL. */
13040 if (!h->ref_regular_nonweak)
13041 sym->st_value = 0;
13042 }
13043 }
13044
13045 if (h->needs_copy)
13046 {
13047 asection * s;
13048 Elf_Internal_Rela rel;
13049
13050 /* This symbol needs a copy reloc. Set it up. */
13051 BFD_ASSERT (h->dynindx != -1
13052 && (h->root.type == bfd_link_hash_defined
13053 || h->root.type == bfd_link_hash_defweak));
13054
13055 s = htab->srelbss;
13056 BFD_ASSERT (s != NULL);
13057
13058 rel.r_addend = 0;
13059 rel.r_offset = (h->root.u.def.value
13060 + h->root.u.def.section->output_section->vma
13061 + h->root.u.def.section->output_offset);
13062 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
13063 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
13064 }
13065
13066 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
13067 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
13068 to the ".got" section. */
13069 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
13070 || (!htab->vxworks_p && h == htab->root.hgot))
13071 sym->st_shndx = SHN_ABS;
13072
13073 return TRUE;
13074 }
13075
13076 static void
13077 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
13078 void *contents,
13079 const unsigned long *template, unsigned count)
13080 {
13081 unsigned ix;
13082
13083 for (ix = 0; ix != count; ix++)
13084 {
13085 unsigned long insn = template[ix];
13086
13087 /* Emit mov pc,rx if bx is not permitted. */
13088 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
13089 insn = (insn & 0xf000000f) | 0x01a0f000;
13090 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
13091 }
13092 }
13093
13094 /* Finish up the dynamic sections. */
13095
13096 static bfd_boolean
13097 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
13098 {
13099 bfd * dynobj;
13100 asection * sgot;
13101 asection * sdyn;
13102 struct elf32_arm_link_hash_table *htab;
13103
13104 htab = elf32_arm_hash_table (info);
13105 if (htab == NULL)
13106 return FALSE;
13107
13108 dynobj = elf_hash_table (info)->dynobj;
13109
13110 sgot = htab->root.sgotplt;
13111 BFD_ASSERT (htab->symbian_p || sgot != NULL);
13112 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
13113
13114 if (elf_hash_table (info)->dynamic_sections_created)
13115 {
13116 asection *splt;
13117 Elf32_External_Dyn *dyncon, *dynconend;
13118
13119 splt = htab->root.splt;
13120 BFD_ASSERT (splt != NULL && sdyn != NULL);
13121
13122 dyncon = (Elf32_External_Dyn *) sdyn->contents;
13123 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
13124
13125 for (; dyncon < dynconend; dyncon++)
13126 {
13127 Elf_Internal_Dyn dyn;
13128 const char * name;
13129 asection * s;
13130
13131 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
13132
13133 switch (dyn.d_tag)
13134 {
13135 unsigned int type;
13136
13137 default:
13138 if (htab->vxworks_p
13139 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
13140 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13141 break;
13142
13143 case DT_HASH:
13144 name = ".hash";
13145 goto get_vma_if_bpabi;
13146 case DT_STRTAB:
13147 name = ".dynstr";
13148 goto get_vma_if_bpabi;
13149 case DT_SYMTAB:
13150 name = ".dynsym";
13151 goto get_vma_if_bpabi;
13152 case DT_VERSYM:
13153 name = ".gnu.version";
13154 goto get_vma_if_bpabi;
13155 case DT_VERDEF:
13156 name = ".gnu.version_d";
13157 goto get_vma_if_bpabi;
13158 case DT_VERNEED:
13159 name = ".gnu.version_r";
13160 goto get_vma_if_bpabi;
13161
13162 case DT_PLTGOT:
13163 name = ".got";
13164 goto get_vma;
13165 case DT_JMPREL:
13166 name = RELOC_SECTION (htab, ".plt");
13167 get_vma:
13168 s = bfd_get_section_by_name (output_bfd, name);
13169 BFD_ASSERT (s != NULL);
13170 if (!htab->symbian_p)
13171 dyn.d_un.d_ptr = s->vma;
13172 else
13173 /* In the BPABI, tags in the PT_DYNAMIC section point
13174 at the file offset, not the memory address, for the
13175 convenience of the post linker. */
13176 dyn.d_un.d_ptr = s->filepos;
13177 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13178 break;
13179
13180 get_vma_if_bpabi:
13181 if (htab->symbian_p)
13182 goto get_vma;
13183 break;
13184
13185 case DT_PLTRELSZ:
13186 s = htab->root.srelplt;
13187 BFD_ASSERT (s != NULL);
13188 dyn.d_un.d_val = s->size;
13189 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13190 break;
13191
13192 case DT_RELSZ:
13193 case DT_RELASZ:
13194 if (!htab->symbian_p)
13195 {
13196 /* My reading of the SVR4 ABI indicates that the
13197 procedure linkage table relocs (DT_JMPREL) should be
13198 included in the overall relocs (DT_REL). This is
13199 what Solaris does. However, UnixWare can not handle
13200 that case. Therefore, we override the DT_RELSZ entry
13201 here to make it not include the JMPREL relocs. Since
13202 the linker script arranges for .rel(a).plt to follow all
13203 other relocation sections, we don't have to worry
13204 about changing the DT_REL entry. */
13205 s = htab->root.srelplt;
13206 if (s != NULL)
13207 dyn.d_un.d_val -= s->size;
13208 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13209 break;
13210 }
13211 /* Fall through. */
13212
13213 case DT_REL:
13214 case DT_RELA:
13215 /* In the BPABI, the DT_REL tag must point at the file
13216 offset, not the VMA, of the first relocation
13217 section. So, we use code similar to that in
13218 elflink.c, but do not check for SHF_ALLOC on the
13219 relcoation section, since relocations sections are
13220 never allocated under the BPABI. The comments above
13221 about Unixware notwithstanding, we include all of the
13222 relocations here. */
13223 if (htab->symbian_p)
13224 {
13225 unsigned int i;
13226 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
13227 ? SHT_REL : SHT_RELA);
13228 dyn.d_un.d_val = 0;
13229 for (i = 1; i < elf_numsections (output_bfd); i++)
13230 {
13231 Elf_Internal_Shdr *hdr
13232 = elf_elfsections (output_bfd)[i];
13233 if (hdr->sh_type == type)
13234 {
13235 if (dyn.d_tag == DT_RELSZ
13236 || dyn.d_tag == DT_RELASZ)
13237 dyn.d_un.d_val += hdr->sh_size;
13238 else if ((ufile_ptr) hdr->sh_offset
13239 <= dyn.d_un.d_val - 1)
13240 dyn.d_un.d_val = hdr->sh_offset;
13241 }
13242 }
13243 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13244 }
13245 break;
13246
13247 case DT_TLSDESC_PLT:
13248 s = htab->root.splt;
13249 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
13250 + htab->dt_tlsdesc_plt);
13251 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13252 break;
13253
13254 case DT_TLSDESC_GOT:
13255 s = htab->root.sgot;
13256 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
13257 + htab->dt_tlsdesc_got);
13258 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13259 break;
13260
13261 /* Set the bottom bit of DT_INIT/FINI if the
13262 corresponding function is Thumb. */
13263 case DT_INIT:
13264 name = info->init_function;
13265 goto get_sym;
13266 case DT_FINI:
13267 name = info->fini_function;
13268 get_sym:
13269 /* If it wasn't set by elf_bfd_final_link
13270 then there is nothing to adjust. */
13271 if (dyn.d_un.d_val != 0)
13272 {
13273 struct elf_link_hash_entry * eh;
13274
13275 eh = elf_link_hash_lookup (elf_hash_table (info), name,
13276 FALSE, FALSE, TRUE);
13277 if (eh != NULL
13278 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
13279 {
13280 dyn.d_un.d_val |= 1;
13281 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13282 }
13283 }
13284 break;
13285 }
13286 }
13287
13288 /* Fill in the first entry in the procedure linkage table. */
13289 if (splt->size > 0 && htab->plt_header_size)
13290 {
13291 const bfd_vma *plt0_entry;
13292 bfd_vma got_address, plt_address, got_displacement;
13293
13294 /* Calculate the addresses of the GOT and PLT. */
13295 got_address = sgot->output_section->vma + sgot->output_offset;
13296 plt_address = splt->output_section->vma + splt->output_offset;
13297
13298 if (htab->vxworks_p)
13299 {
13300 /* The VxWorks GOT is relocated by the dynamic linker.
13301 Therefore, we must emit relocations rather than simply
13302 computing the values now. */
13303 Elf_Internal_Rela rel;
13304
13305 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
13306 put_arm_insn (htab, output_bfd, plt0_entry[0],
13307 splt->contents + 0);
13308 put_arm_insn (htab, output_bfd, plt0_entry[1],
13309 splt->contents + 4);
13310 put_arm_insn (htab, output_bfd, plt0_entry[2],
13311 splt->contents + 8);
13312 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
13313
13314 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
13315 rel.r_offset = plt_address + 12;
13316 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
13317 rel.r_addend = 0;
13318 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
13319 htab->srelplt2->contents);
13320 }
13321 else
13322 {
13323 got_displacement = got_address - (plt_address + 16);
13324
13325 plt0_entry = elf32_arm_plt0_entry;
13326 put_arm_insn (htab, output_bfd, plt0_entry[0],
13327 splt->contents + 0);
13328 put_arm_insn (htab, output_bfd, plt0_entry[1],
13329 splt->contents + 4);
13330 put_arm_insn (htab, output_bfd, plt0_entry[2],
13331 splt->contents + 8);
13332 put_arm_insn (htab, output_bfd, plt0_entry[3],
13333 splt->contents + 12);
13334
13335 #ifdef FOUR_WORD_PLT
13336 /* The displacement value goes in the otherwise-unused
13337 last word of the second entry. */
13338 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
13339 #else
13340 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
13341 #endif
13342 }
13343 }
13344
13345 /* UnixWare sets the entsize of .plt to 4, although that doesn't
13346 really seem like the right value. */
13347 if (splt->output_section->owner == output_bfd)
13348 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
13349
13350 if (htab->dt_tlsdesc_plt)
13351 {
13352 bfd_vma got_address
13353 = sgot->output_section->vma + sgot->output_offset;
13354 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
13355 + htab->root.sgot->output_offset);
13356 bfd_vma plt_address
13357 = splt->output_section->vma + splt->output_offset;
13358
13359 arm_put_trampoline (htab, output_bfd,
13360 splt->contents + htab->dt_tlsdesc_plt,
13361 dl_tlsdesc_lazy_trampoline, 6);
13362
13363 bfd_put_32 (output_bfd,
13364 gotplt_address + htab->dt_tlsdesc_got
13365 - (plt_address + htab->dt_tlsdesc_plt)
13366 - dl_tlsdesc_lazy_trampoline[6],
13367 splt->contents + htab->dt_tlsdesc_plt + 24);
13368 bfd_put_32 (output_bfd,
13369 got_address - (plt_address + htab->dt_tlsdesc_plt)
13370 - dl_tlsdesc_lazy_trampoline[7],
13371 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
13372 }
13373
13374 if (htab->tls_trampoline)
13375 {
13376 arm_put_trampoline (htab, output_bfd,
13377 splt->contents + htab->tls_trampoline,
13378 tls_trampoline, 3);
13379 #ifdef FOUR_WORD_PLT
13380 bfd_put_32 (output_bfd, 0x00000000,
13381 splt->contents + htab->tls_trampoline + 12);
13382 #endif
13383 }
13384
13385 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
13386 {
13387 /* Correct the .rel(a).plt.unloaded relocations. They will have
13388 incorrect symbol indexes. */
13389 int num_plts;
13390 unsigned char *p;
13391
13392 num_plts = ((htab->root.splt->size - htab->plt_header_size)
13393 / htab->plt_entry_size);
13394 p = htab->srelplt2->contents + RELOC_SIZE (htab);
13395
13396 for (; num_plts; num_plts--)
13397 {
13398 Elf_Internal_Rela rel;
13399
13400 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
13401 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
13402 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
13403 p += RELOC_SIZE (htab);
13404
13405 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
13406 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
13407 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
13408 p += RELOC_SIZE (htab);
13409 }
13410 }
13411 }
13412
13413 /* Fill in the first three entries in the global offset table. */
13414 if (sgot)
13415 {
13416 if (sgot->size > 0)
13417 {
13418 if (sdyn == NULL)
13419 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
13420 else
13421 bfd_put_32 (output_bfd,
13422 sdyn->output_section->vma + sdyn->output_offset,
13423 sgot->contents);
13424 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
13425 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
13426 }
13427
13428 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
13429 }
13430
13431 return TRUE;
13432 }
13433
13434 static void
13435 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
13436 {
13437 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
13438 struct elf32_arm_link_hash_table *globals;
13439
13440 i_ehdrp = elf_elfheader (abfd);
13441
13442 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
13443 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
13444 else
13445 i_ehdrp->e_ident[EI_OSABI] = 0;
13446 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
13447
13448 if (link_info)
13449 {
13450 globals = elf32_arm_hash_table (link_info);
13451 if (globals != NULL && globals->byteswap_code)
13452 i_ehdrp->e_flags |= EF_ARM_BE8;
13453 }
13454 }
13455
13456 static enum elf_reloc_type_class
13457 elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
13458 {
13459 switch ((int) ELF32_R_TYPE (rela->r_info))
13460 {
13461 case R_ARM_RELATIVE:
13462 return reloc_class_relative;
13463 case R_ARM_JUMP_SLOT:
13464 return reloc_class_plt;
13465 case R_ARM_COPY:
13466 return reloc_class_copy;
13467 default:
13468 return reloc_class_normal;
13469 }
13470 }
13471
13472 /* Set the right machine number for an Arm ELF file. */
13473
13474 static bfd_boolean
13475 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
13476 {
13477 if (hdr->sh_type == SHT_NOTE)
13478 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
13479
13480 return TRUE;
13481 }
13482
13483 static void
13484 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
13485 {
13486 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
13487 }
13488
13489 /* Return TRUE if this is an unwinding table entry. */
13490
13491 static bfd_boolean
13492 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
13493 {
13494 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
13495 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
13496 }
13497
13498
13499 /* Set the type and flags for an ARM section. We do this by
13500 the section name, which is a hack, but ought to work. */
13501
13502 static bfd_boolean
13503 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
13504 {
13505 const char * name;
13506
13507 name = bfd_get_section_name (abfd, sec);
13508
13509 if (is_arm_elf_unwind_section_name (abfd, name))
13510 {
13511 hdr->sh_type = SHT_ARM_EXIDX;
13512 hdr->sh_flags |= SHF_LINK_ORDER;
13513 }
13514 return TRUE;
13515 }
13516
13517 /* Handle an ARM specific section when reading an object file. This is
13518 called when bfd_section_from_shdr finds a section with an unknown
13519 type. */
13520
13521 static bfd_boolean
13522 elf32_arm_section_from_shdr (bfd *abfd,
13523 Elf_Internal_Shdr * hdr,
13524 const char *name,
13525 int shindex)
13526 {
13527 /* There ought to be a place to keep ELF backend specific flags, but
13528 at the moment there isn't one. We just keep track of the
13529 sections by their name, instead. Fortunately, the ABI gives
13530 names for all the ARM specific sections, so we will probably get
13531 away with this. */
13532 switch (hdr->sh_type)
13533 {
13534 case SHT_ARM_EXIDX:
13535 case SHT_ARM_PREEMPTMAP:
13536 case SHT_ARM_ATTRIBUTES:
13537 break;
13538
13539 default:
13540 return FALSE;
13541 }
13542
13543 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
13544 return FALSE;
13545
13546 return TRUE;
13547 }
13548
13549 static _arm_elf_section_data *
13550 get_arm_elf_section_data (asection * sec)
13551 {
13552 if (sec && sec->owner && is_arm_elf (sec->owner))
13553 return elf32_arm_section_data (sec);
13554 else
13555 return NULL;
13556 }
13557
13558 typedef struct
13559 {
13560 void *finfo;
13561 struct bfd_link_info *info;
13562 asection *sec;
13563 int sec_shndx;
13564 int (*func) (void *, const char *, Elf_Internal_Sym *,
13565 asection *, struct elf_link_hash_entry *);
13566 } output_arch_syminfo;
13567
13568 enum map_symbol_type
13569 {
13570 ARM_MAP_ARM,
13571 ARM_MAP_THUMB,
13572 ARM_MAP_DATA
13573 };
13574
13575
13576 /* Output a single mapping symbol. */
13577
13578 static bfd_boolean
13579 elf32_arm_output_map_sym (output_arch_syminfo *osi,
13580 enum map_symbol_type type,
13581 bfd_vma offset)
13582 {
13583 static const char *names[3] = {"$a", "$t", "$d"};
13584 Elf_Internal_Sym sym;
13585
13586 sym.st_value = osi->sec->output_section->vma
13587 + osi->sec->output_offset
13588 + offset;
13589 sym.st_size = 0;
13590 sym.st_other = 0;
13591 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
13592 sym.st_shndx = osi->sec_shndx;
13593 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
13594 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
13595 }
13596
13597
13598 /* Output mapping symbols for PLT entries associated with H. */
13599
13600 static bfd_boolean
13601 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
13602 {
13603 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
13604 struct elf32_arm_link_hash_table *htab;
13605 struct elf32_arm_link_hash_entry *eh;
13606 bfd_vma addr;
13607
13608 if (h->root.type == bfd_link_hash_indirect)
13609 return TRUE;
13610
13611 if (h->root.type == bfd_link_hash_warning)
13612 /* When warning symbols are created, they **replace** the "real"
13613 entry in the hash table, thus we never get to see the real
13614 symbol in a hash traversal. So look at it now. */
13615 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13616
13617 if (h->plt.offset == (bfd_vma) -1)
13618 return TRUE;
13619
13620 htab = elf32_arm_hash_table (osi->info);
13621 if (htab == NULL)
13622 return FALSE;
13623
13624 eh = (struct elf32_arm_link_hash_entry *) h;
13625 addr = h->plt.offset;
13626 if (htab->symbian_p)
13627 {
13628 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
13629 return FALSE;
13630 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
13631 return FALSE;
13632 }
13633 else if (htab->vxworks_p)
13634 {
13635 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
13636 return FALSE;
13637 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
13638 return FALSE;
13639 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
13640 return FALSE;
13641 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
13642 return FALSE;
13643 }
13644 else
13645 {
13646 bfd_signed_vma thumb_refs;
13647
13648 thumb_refs = eh->plt_thumb_refcount;
13649 if (!htab->use_blx)
13650 thumb_refs += eh->plt_maybe_thumb_refcount;
13651
13652 if (thumb_refs > 0)
13653 {
13654 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
13655 return FALSE;
13656 }
13657 #ifdef FOUR_WORD_PLT
13658 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
13659 return FALSE;
13660 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
13661 return FALSE;
13662 #else
13663 /* A three-word PLT with no Thumb thunk contains only Arm code,
13664 so only need to output a mapping symbol for the first PLT entry and
13665 entries with thumb thunks. */
13666 if (thumb_refs > 0 || addr == 20)
13667 {
13668 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
13669 return FALSE;
13670 }
13671 #endif
13672 }
13673
13674 return TRUE;
13675 }
13676
13677 /* Output a single local symbol for a generated stub. */
13678
13679 static bfd_boolean
13680 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
13681 bfd_vma offset, bfd_vma size)
13682 {
13683 Elf_Internal_Sym sym;
13684
13685 sym.st_value = osi->sec->output_section->vma
13686 + osi->sec->output_offset
13687 + offset;
13688 sym.st_size = size;
13689 sym.st_other = 0;
13690 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13691 sym.st_shndx = osi->sec_shndx;
13692 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
13693 }
13694
13695 static bfd_boolean
13696 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
13697 void * in_arg)
13698 {
13699 struct elf32_arm_stub_hash_entry *stub_entry;
13700 asection *stub_sec;
13701 bfd_vma addr;
13702 char *stub_name;
13703 output_arch_syminfo *osi;
13704 const insn_sequence *template_sequence;
13705 enum stub_insn_type prev_type;
13706 int size;
13707 int i;
13708 enum map_symbol_type sym_type;
13709
13710 /* Massage our args to the form they really have. */
13711 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13712 osi = (output_arch_syminfo *) in_arg;
13713
13714 stub_sec = stub_entry->stub_sec;
13715
13716 /* Ensure this stub is attached to the current section being
13717 processed. */
13718 if (stub_sec != osi->sec)
13719 return TRUE;
13720
13721 addr = (bfd_vma) stub_entry->stub_offset;
13722 stub_name = stub_entry->output_name;
13723
13724 template_sequence = stub_entry->stub_template;
13725 switch (template_sequence[0].type)
13726 {
13727 case ARM_TYPE:
13728 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
13729 return FALSE;
13730 break;
13731 case THUMB16_TYPE:
13732 case THUMB32_TYPE:
13733 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
13734 stub_entry->stub_size))
13735 return FALSE;
13736 break;
13737 default:
13738 BFD_FAIL ();
13739 return 0;
13740 }
13741
13742 prev_type = DATA_TYPE;
13743 size = 0;
13744 for (i = 0; i < stub_entry->stub_template_size; i++)
13745 {
13746 switch (template_sequence[i].type)
13747 {
13748 case ARM_TYPE:
13749 sym_type = ARM_MAP_ARM;
13750 break;
13751
13752 case THUMB16_TYPE:
13753 case THUMB32_TYPE:
13754 sym_type = ARM_MAP_THUMB;
13755 break;
13756
13757 case DATA_TYPE:
13758 sym_type = ARM_MAP_DATA;
13759 break;
13760
13761 default:
13762 BFD_FAIL ();
13763 return FALSE;
13764 }
13765
13766 if (template_sequence[i].type != prev_type)
13767 {
13768 prev_type = template_sequence[i].type;
13769 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
13770 return FALSE;
13771 }
13772
13773 switch (template_sequence[i].type)
13774 {
13775 case ARM_TYPE:
13776 case THUMB32_TYPE:
13777 size += 4;
13778 break;
13779
13780 case THUMB16_TYPE:
13781 size += 2;
13782 break;
13783
13784 case DATA_TYPE:
13785 size += 4;
13786 break;
13787
13788 default:
13789 BFD_FAIL ();
13790 return FALSE;
13791 }
13792 }
13793
13794 return TRUE;
13795 }
13796
13797 /* Output mapping symbols for linker generated sections,
13798 and for those data-only sections that do not have a
13799 $d. */
13800
13801 static bfd_boolean
13802 elf32_arm_output_arch_local_syms (bfd *output_bfd,
13803 struct bfd_link_info *info,
13804 void *finfo,
13805 int (*func) (void *, const char *,
13806 Elf_Internal_Sym *,
13807 asection *,
13808 struct elf_link_hash_entry *))
13809 {
13810 output_arch_syminfo osi;
13811 struct elf32_arm_link_hash_table *htab;
13812 bfd_vma offset;
13813 bfd_size_type size;
13814 bfd *input_bfd;
13815
13816 htab = elf32_arm_hash_table (info);
13817 if (htab == NULL)
13818 return FALSE;
13819
13820 check_use_blx (htab);
13821
13822 osi.finfo = finfo;
13823 osi.info = info;
13824 osi.func = func;
13825
13826 /* Add a $d mapping symbol to data-only sections that
13827 don't have any mapping symbol. This may result in (harmless) redundant
13828 mapping symbols. */
13829 for (input_bfd = info->input_bfds;
13830 input_bfd != NULL;
13831 input_bfd = input_bfd->link_next)
13832 {
13833 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
13834 for (osi.sec = input_bfd->sections;
13835 osi.sec != NULL;
13836 osi.sec = osi.sec->next)
13837 {
13838 if (osi.sec->output_section != NULL
13839 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
13840 != 0)
13841 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
13842 == SEC_HAS_CONTENTS
13843 && get_arm_elf_section_data (osi.sec) != NULL
13844 && get_arm_elf_section_data (osi.sec)->mapcount == 0
13845 && osi.sec->size > 0)
13846 {
13847 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13848 (output_bfd, osi.sec->output_section);
13849 if (osi.sec_shndx != (int)SHN_BAD)
13850 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
13851 }
13852 }
13853 }
13854
13855 /* ARM->Thumb glue. */
13856 if (htab->arm_glue_size > 0)
13857 {
13858 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13859 ARM2THUMB_GLUE_SECTION_NAME);
13860
13861 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13862 (output_bfd, osi.sec->output_section);
13863 if (info->shared || htab->root.is_relocatable_executable
13864 || htab->pic_veneer)
13865 size = ARM2THUMB_PIC_GLUE_SIZE;
13866 else if (htab->use_blx)
13867 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
13868 else
13869 size = ARM2THUMB_STATIC_GLUE_SIZE;
13870
13871 for (offset = 0; offset < htab->arm_glue_size; offset += size)
13872 {
13873 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
13874 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
13875 }
13876 }
13877
13878 /* Thumb->ARM glue. */
13879 if (htab->thumb_glue_size > 0)
13880 {
13881 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13882 THUMB2ARM_GLUE_SECTION_NAME);
13883
13884 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13885 (output_bfd, osi.sec->output_section);
13886 size = THUMB2ARM_GLUE_SIZE;
13887
13888 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13889 {
13890 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13891 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
13892 }
13893 }
13894
13895 /* ARMv4 BX veneers. */
13896 if (htab->bx_glue_size > 0)
13897 {
13898 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13899 ARM_BX_GLUE_SECTION_NAME);
13900
13901 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13902 (output_bfd, osi.sec->output_section);
13903
13904 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
13905 }
13906
13907 /* Long calls stubs. */
13908 if (htab->stub_bfd && htab->stub_bfd->sections)
13909 {
13910 asection* stub_sec;
13911
13912 for (stub_sec = htab->stub_bfd->sections;
13913 stub_sec != NULL;
13914 stub_sec = stub_sec->next)
13915 {
13916 /* Ignore non-stub sections. */
13917 if (!strstr (stub_sec->name, STUB_SUFFIX))
13918 continue;
13919
13920 osi.sec = stub_sec;
13921
13922 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13923 (output_bfd, osi.sec->output_section);
13924
13925 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13926 }
13927 }
13928
13929 /* Finally, output mapping symbols for the PLT. */
13930 if (!htab->root.splt || htab->root.splt->size == 0)
13931 return TRUE;
13932
13933 osi.sec = htab->root.splt;
13934 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
13935 osi.sec->output_section);
13936 /* Output mapping symbols for the plt header. SymbianOS does not have a
13937 plt header. */
13938 if (htab->vxworks_p)
13939 {
13940 /* VxWorks shared libraries have no PLT header. */
13941 if (!info->shared)
13942 {
13943 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
13944 return FALSE;
13945 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
13946 return FALSE;
13947 }
13948 }
13949 else if (!htab->symbian_p)
13950 {
13951 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
13952 return FALSE;
13953 #ifndef FOUR_WORD_PLT
13954 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
13955 return FALSE;
13956 #endif
13957 }
13958
13959 if (htab->dt_tlsdesc_plt != 0)
13960 {
13961 /* Mapping symbols for the lazy tls trampoline. */
13962 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
13963 return FALSE;
13964
13965 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
13966 htab->dt_tlsdesc_plt + 24))
13967 return FALSE;
13968 }
13969 if (htab->tls_trampoline != 0)
13970 {
13971 /* Mapping symbols for the tls trampoline. */
13972 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
13973 return FALSE;
13974 #ifdef FOUR_WORD_PLT
13975 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
13976 htab->tls_trampoline + 12))
13977 return FALSE;
13978 #endif
13979 }
13980
13981 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13982 return TRUE;
13983 }
13984
13985 /* Allocate target specific section data. */
13986
13987 static bfd_boolean
13988 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13989 {
13990 if (!sec->used_by_bfd)
13991 {
13992 _arm_elf_section_data *sdata;
13993 bfd_size_type amt = sizeof (*sdata);
13994
13995 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
13996 if (sdata == NULL)
13997 return FALSE;
13998 sec->used_by_bfd = sdata;
13999 }
14000
14001 return _bfd_elf_new_section_hook (abfd, sec);
14002 }
14003
14004
14005 /* Used to order a list of mapping symbols by address. */
14006
14007 static int
14008 elf32_arm_compare_mapping (const void * a, const void * b)
14009 {
14010 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
14011 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
14012
14013 if (amap->vma > bmap->vma)
14014 return 1;
14015 else if (amap->vma < bmap->vma)
14016 return -1;
14017 else if (amap->type > bmap->type)
14018 /* Ensure results do not depend on the host qsort for objects with
14019 multiple mapping symbols at the same address by sorting on type
14020 after vma. */
14021 return 1;
14022 else if (amap->type < bmap->type)
14023 return -1;
14024 else
14025 return 0;
14026 }
14027
14028 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
14029
14030 static unsigned long
14031 offset_prel31 (unsigned long addr, bfd_vma offset)
14032 {
14033 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
14034 }
14035
14036 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
14037 relocations. */
14038
14039 static void
14040 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
14041 {
14042 unsigned long first_word = bfd_get_32 (output_bfd, from);
14043 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
14044
14045 /* High bit of first word is supposed to be zero. */
14046 if ((first_word & 0x80000000ul) == 0)
14047 first_word = offset_prel31 (first_word, offset);
14048
14049 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
14050 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
14051 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
14052 second_word = offset_prel31 (second_word, offset);
14053
14054 bfd_put_32 (output_bfd, first_word, to);
14055 bfd_put_32 (output_bfd, second_word, to + 4);
14056 }
14057
14058 /* Data for make_branch_to_a8_stub(). */
14059
14060 struct a8_branch_to_stub_data {
14061 asection *writing_section;
14062 bfd_byte *contents;
14063 };
14064
14065
14066 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
14067 places for a particular section. */
14068
14069 static bfd_boolean
14070 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
14071 void *in_arg)
14072 {
14073 struct elf32_arm_stub_hash_entry *stub_entry;
14074 struct a8_branch_to_stub_data *data;
14075 bfd_byte *contents;
14076 unsigned long branch_insn;
14077 bfd_vma veneered_insn_loc, veneer_entry_loc;
14078 bfd_signed_vma branch_offset;
14079 bfd *abfd;
14080 unsigned int target;
14081
14082 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14083 data = (struct a8_branch_to_stub_data *) in_arg;
14084
14085 if (stub_entry->target_section != data->writing_section
14086 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
14087 return TRUE;
14088
14089 contents = data->contents;
14090
14091 veneered_insn_loc = stub_entry->target_section->output_section->vma
14092 + stub_entry->target_section->output_offset
14093 + stub_entry->target_value;
14094
14095 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
14096 + stub_entry->stub_sec->output_offset
14097 + stub_entry->stub_offset;
14098
14099 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
14100 veneered_insn_loc &= ~3u;
14101
14102 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
14103
14104 abfd = stub_entry->target_section->owner;
14105 target = stub_entry->target_value;
14106
14107 /* We attempt to avoid this condition by setting stubs_always_after_branch
14108 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
14109 This check is just to be on the safe side... */
14110 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
14111 {
14112 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
14113 "allocated in unsafe location"), abfd);
14114 return FALSE;
14115 }
14116
14117 switch (stub_entry->stub_type)
14118 {
14119 case arm_stub_a8_veneer_b:
14120 case arm_stub_a8_veneer_b_cond:
14121 branch_insn = 0xf0009000;
14122 goto jump24;
14123
14124 case arm_stub_a8_veneer_blx:
14125 branch_insn = 0xf000e800;
14126 goto jump24;
14127
14128 case arm_stub_a8_veneer_bl:
14129 {
14130 unsigned int i1, j1, i2, j2, s;
14131
14132 branch_insn = 0xf000d000;
14133
14134 jump24:
14135 if (branch_offset < -16777216 || branch_offset > 16777214)
14136 {
14137 /* There's not much we can do apart from complain if this
14138 happens. */
14139 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
14140 "of range (input file too large)"), abfd);
14141 return FALSE;
14142 }
14143
14144 /* i1 = not(j1 eor s), so:
14145 not i1 = j1 eor s
14146 j1 = (not i1) eor s. */
14147
14148 branch_insn |= (branch_offset >> 1) & 0x7ff;
14149 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
14150 i2 = (branch_offset >> 22) & 1;
14151 i1 = (branch_offset >> 23) & 1;
14152 s = (branch_offset >> 24) & 1;
14153 j1 = (!i1) ^ s;
14154 j2 = (!i2) ^ s;
14155 branch_insn |= j2 << 11;
14156 branch_insn |= j1 << 13;
14157 branch_insn |= s << 26;
14158 }
14159 break;
14160
14161 default:
14162 BFD_FAIL ();
14163 return FALSE;
14164 }
14165
14166 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
14167 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
14168
14169 return TRUE;
14170 }
14171
14172 /* Do code byteswapping. Return FALSE afterwards so that the section is
14173 written out as normal. */
14174
14175 static bfd_boolean
14176 elf32_arm_write_section (bfd *output_bfd,
14177 struct bfd_link_info *link_info,
14178 asection *sec,
14179 bfd_byte *contents)
14180 {
14181 unsigned int mapcount, errcount;
14182 _arm_elf_section_data *arm_data;
14183 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
14184 elf32_arm_section_map *map;
14185 elf32_vfp11_erratum_list *errnode;
14186 bfd_vma ptr;
14187 bfd_vma end;
14188 bfd_vma offset = sec->output_section->vma + sec->output_offset;
14189 bfd_byte tmp;
14190 unsigned int i;
14191
14192 if (globals == NULL)
14193 return FALSE;
14194
14195 /* If this section has not been allocated an _arm_elf_section_data
14196 structure then we cannot record anything. */
14197 arm_data = get_arm_elf_section_data (sec);
14198 if (arm_data == NULL)
14199 return FALSE;
14200
14201 mapcount = arm_data->mapcount;
14202 map = arm_data->map;
14203 errcount = arm_data->erratumcount;
14204
14205 if (errcount != 0)
14206 {
14207 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
14208
14209 for (errnode = arm_data->erratumlist; errnode != 0;
14210 errnode = errnode->next)
14211 {
14212 bfd_vma target = errnode->vma - offset;
14213
14214 switch (errnode->type)
14215 {
14216 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
14217 {
14218 bfd_vma branch_to_veneer;
14219 /* Original condition code of instruction, plus bit mask for
14220 ARM B instruction. */
14221 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
14222 | 0x0a000000;
14223
14224 /* The instruction is before the label. */
14225 target -= 4;
14226
14227 /* Above offset included in -4 below. */
14228 branch_to_veneer = errnode->u.b.veneer->vma
14229 - errnode->vma - 4;
14230
14231 if ((signed) branch_to_veneer < -(1 << 25)
14232 || (signed) branch_to_veneer >= (1 << 25))
14233 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
14234 "range"), output_bfd);
14235
14236 insn |= (branch_to_veneer >> 2) & 0xffffff;
14237 contents[endianflip ^ target] = insn & 0xff;
14238 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
14239 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
14240 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
14241 }
14242 break;
14243
14244 case VFP11_ERRATUM_ARM_VENEER:
14245 {
14246 bfd_vma branch_from_veneer;
14247 unsigned int insn;
14248
14249 /* Take size of veneer into account. */
14250 branch_from_veneer = errnode->u.v.branch->vma
14251 - errnode->vma - 12;
14252
14253 if ((signed) branch_from_veneer < -(1 << 25)
14254 || (signed) branch_from_veneer >= (1 << 25))
14255 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
14256 "range"), output_bfd);
14257
14258 /* Original instruction. */
14259 insn = errnode->u.v.branch->u.b.vfp_insn;
14260 contents[endianflip ^ target] = insn & 0xff;
14261 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
14262 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
14263 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
14264
14265 /* Branch back to insn after original insn. */
14266 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
14267 contents[endianflip ^ (target + 4)] = insn & 0xff;
14268 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
14269 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
14270 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
14271 }
14272 break;
14273
14274 default:
14275 abort ();
14276 }
14277 }
14278 }
14279
14280 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
14281 {
14282 arm_unwind_table_edit *edit_node
14283 = arm_data->u.exidx.unwind_edit_list;
14284 /* Now, sec->size is the size of the section we will write. The original
14285 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
14286 markers) was sec->rawsize. (This isn't the case if we perform no
14287 edits, then rawsize will be zero and we should use size). */
14288 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
14289 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
14290 unsigned int in_index, out_index;
14291 bfd_vma add_to_offsets = 0;
14292
14293 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
14294 {
14295 if (edit_node)
14296 {
14297 unsigned int edit_index = edit_node->index;
14298
14299 if (in_index < edit_index && in_index * 8 < input_size)
14300 {
14301 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
14302 contents + in_index * 8, add_to_offsets);
14303 out_index++;
14304 in_index++;
14305 }
14306 else if (in_index == edit_index
14307 || (in_index * 8 >= input_size
14308 && edit_index == UINT_MAX))
14309 {
14310 switch (edit_node->type)
14311 {
14312 case DELETE_EXIDX_ENTRY:
14313 in_index++;
14314 add_to_offsets += 8;
14315 break;
14316
14317 case INSERT_EXIDX_CANTUNWIND_AT_END:
14318 {
14319 asection *text_sec = edit_node->linked_section;
14320 bfd_vma text_offset = text_sec->output_section->vma
14321 + text_sec->output_offset
14322 + text_sec->size;
14323 bfd_vma exidx_offset = offset + out_index * 8;
14324 unsigned long prel31_offset;
14325
14326 /* Note: this is meant to be equivalent to an
14327 R_ARM_PREL31 relocation. These synthetic
14328 EXIDX_CANTUNWIND markers are not relocated by the
14329 usual BFD method. */
14330 prel31_offset = (text_offset - exidx_offset)
14331 & 0x7ffffffful;
14332
14333 /* First address we can't unwind. */
14334 bfd_put_32 (output_bfd, prel31_offset,
14335 &edited_contents[out_index * 8]);
14336
14337 /* Code for EXIDX_CANTUNWIND. */
14338 bfd_put_32 (output_bfd, 0x1,
14339 &edited_contents[out_index * 8 + 4]);
14340
14341 out_index++;
14342 add_to_offsets -= 8;
14343 }
14344 break;
14345 }
14346
14347 edit_node = edit_node->next;
14348 }
14349 }
14350 else
14351 {
14352 /* No more edits, copy remaining entries verbatim. */
14353 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
14354 contents + in_index * 8, add_to_offsets);
14355 out_index++;
14356 in_index++;
14357 }
14358 }
14359
14360 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
14361 bfd_set_section_contents (output_bfd, sec->output_section,
14362 edited_contents,
14363 (file_ptr) sec->output_offset, sec->size);
14364
14365 return TRUE;
14366 }
14367
14368 /* Fix code to point to Cortex-A8 erratum stubs. */
14369 if (globals->fix_cortex_a8)
14370 {
14371 struct a8_branch_to_stub_data data;
14372
14373 data.writing_section = sec;
14374 data.contents = contents;
14375
14376 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
14377 &data);
14378 }
14379
14380 if (mapcount == 0)
14381 return FALSE;
14382
14383 if (globals->byteswap_code)
14384 {
14385 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
14386
14387 ptr = map[0].vma;
14388 for (i = 0; i < mapcount; i++)
14389 {
14390 if (i == mapcount - 1)
14391 end = sec->size;
14392 else
14393 end = map[i + 1].vma;
14394
14395 switch (map[i].type)
14396 {
14397 case 'a':
14398 /* Byte swap code words. */
14399 while (ptr + 3 < end)
14400 {
14401 tmp = contents[ptr];
14402 contents[ptr] = contents[ptr + 3];
14403 contents[ptr + 3] = tmp;
14404 tmp = contents[ptr + 1];
14405 contents[ptr + 1] = contents[ptr + 2];
14406 contents[ptr + 2] = tmp;
14407 ptr += 4;
14408 }
14409 break;
14410
14411 case 't':
14412 /* Byte swap code halfwords. */
14413 while (ptr + 1 < end)
14414 {
14415 tmp = contents[ptr];
14416 contents[ptr] = contents[ptr + 1];
14417 contents[ptr + 1] = tmp;
14418 ptr += 2;
14419 }
14420 break;
14421
14422 case 'd':
14423 /* Leave data alone. */
14424 break;
14425 }
14426 ptr = end;
14427 }
14428 }
14429
14430 free (map);
14431 arm_data->mapcount = -1;
14432 arm_data->mapsize = 0;
14433 arm_data->map = NULL;
14434
14435 return FALSE;
14436 }
14437
14438 /* Display STT_ARM_TFUNC symbols as functions. */
14439
14440 static void
14441 elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
14442 asymbol *asym)
14443 {
14444 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
14445
14446 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
14447 elfsym->symbol.flags |= BSF_FUNCTION;
14448 }
14449
14450
14451 /* Mangle thumb function symbols as we read them in. */
14452
14453 static bfd_boolean
14454 elf32_arm_swap_symbol_in (bfd * abfd,
14455 const void *psrc,
14456 const void *pshn,
14457 Elf_Internal_Sym *dst)
14458 {
14459 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
14460 return FALSE;
14461
14462 /* New EABI objects mark thumb function symbols by setting the low bit of
14463 the address. Turn these into STT_ARM_TFUNC. */
14464 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
14465 && (dst->st_value & 1))
14466 {
14467 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
14468 dst->st_value &= ~(bfd_vma) 1;
14469 }
14470 return TRUE;
14471 }
14472
14473
14474 /* Mangle thumb function symbols as we write them out. */
14475
14476 static void
14477 elf32_arm_swap_symbol_out (bfd *abfd,
14478 const Elf_Internal_Sym *src,
14479 void *cdst,
14480 void *shndx)
14481 {
14482 Elf_Internal_Sym newsym;
14483
14484 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
14485 of the address set, as per the new EABI. We do this unconditionally
14486 because objcopy does not set the elf header flags until after
14487 it writes out the symbol table. */
14488 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
14489 {
14490 newsym = *src;
14491 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
14492 if (newsym.st_shndx != SHN_UNDEF)
14493 {
14494 /* Do this only for defined symbols. At link type, the static
14495 linker will simulate the work of dynamic linker of resolving
14496 symbols and will carry over the thumbness of found symbols to
14497 the output symbol table. It's not clear how it happens, but
14498 the thumbness of undefined symbols can well be different at
14499 runtime, and writing '1' for them will be confusing for users
14500 and possibly for dynamic linker itself.
14501 */
14502 newsym.st_value |= 1;
14503 }
14504
14505 src = &newsym;
14506 }
14507 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
14508 }
14509
14510 /* Add the PT_ARM_EXIDX program header. */
14511
14512 static bfd_boolean
14513 elf32_arm_modify_segment_map (bfd *abfd,
14514 struct bfd_link_info *info ATTRIBUTE_UNUSED)
14515 {
14516 struct elf_segment_map *m;
14517 asection *sec;
14518
14519 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
14520 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
14521 {
14522 /* If there is already a PT_ARM_EXIDX header, then we do not
14523 want to add another one. This situation arises when running
14524 "strip"; the input binary already has the header. */
14525 m = elf_tdata (abfd)->segment_map;
14526 while (m && m->p_type != PT_ARM_EXIDX)
14527 m = m->next;
14528 if (!m)
14529 {
14530 m = (struct elf_segment_map *)
14531 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
14532 if (m == NULL)
14533 return FALSE;
14534 m->p_type = PT_ARM_EXIDX;
14535 m->count = 1;
14536 m->sections[0] = sec;
14537
14538 m->next = elf_tdata (abfd)->segment_map;
14539 elf_tdata (abfd)->segment_map = m;
14540 }
14541 }
14542
14543 return TRUE;
14544 }
14545
14546 /* We may add a PT_ARM_EXIDX program header. */
14547
14548 static int
14549 elf32_arm_additional_program_headers (bfd *abfd,
14550 struct bfd_link_info *info ATTRIBUTE_UNUSED)
14551 {
14552 asection *sec;
14553
14554 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
14555 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
14556 return 1;
14557 else
14558 return 0;
14559 }
14560
14561 /* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
14562
14563 static bfd_boolean
14564 elf32_arm_is_function_type (unsigned int type)
14565 {
14566 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
14567 }
14568
14569 /* We use this to override swap_symbol_in and swap_symbol_out. */
14570 const struct elf_size_info elf32_arm_size_info =
14571 {
14572 sizeof (Elf32_External_Ehdr),
14573 sizeof (Elf32_External_Phdr),
14574 sizeof (Elf32_External_Shdr),
14575 sizeof (Elf32_External_Rel),
14576 sizeof (Elf32_External_Rela),
14577 sizeof (Elf32_External_Sym),
14578 sizeof (Elf32_External_Dyn),
14579 sizeof (Elf_External_Note),
14580 4,
14581 1,
14582 32, 2,
14583 ELFCLASS32, EV_CURRENT,
14584 bfd_elf32_write_out_phdrs,
14585 bfd_elf32_write_shdrs_and_ehdr,
14586 bfd_elf32_checksum_contents,
14587 bfd_elf32_write_relocs,
14588 elf32_arm_swap_symbol_in,
14589 elf32_arm_swap_symbol_out,
14590 bfd_elf32_slurp_reloc_table,
14591 bfd_elf32_slurp_symbol_table,
14592 bfd_elf32_swap_dyn_in,
14593 bfd_elf32_swap_dyn_out,
14594 bfd_elf32_swap_reloc_in,
14595 bfd_elf32_swap_reloc_out,
14596 bfd_elf32_swap_reloca_in,
14597 bfd_elf32_swap_reloca_out
14598 };
14599
14600 #define ELF_ARCH bfd_arch_arm
14601 #define ELF_TARGET_ID ARM_ELF_DATA
14602 #define ELF_MACHINE_CODE EM_ARM
14603 #ifdef __QNXTARGET__
14604 #define ELF_MAXPAGESIZE 0x1000
14605 #else
14606 #define ELF_MAXPAGESIZE 0x8000
14607 #endif
14608 #define ELF_MINPAGESIZE 0x1000
14609 #define ELF_COMMONPAGESIZE 0x1000
14610
14611 #define bfd_elf32_mkobject elf32_arm_mkobject
14612
14613 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
14614 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
14615 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
14616 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
14617 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
14618 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
14619 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
14620 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
14621 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
14622 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
14623 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
14624 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
14625 #define bfd_elf32_bfd_final_link elf32_arm_final_link
14626
14627 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
14628 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
14629 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
14630 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
14631 #define elf_backend_check_relocs elf32_arm_check_relocs
14632 #define elf_backend_relocate_section elf32_arm_relocate_section
14633 #define elf_backend_write_section elf32_arm_write_section
14634 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
14635 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
14636 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
14637 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
14638 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
14639 #define elf_backend_always_size_sections elf32_arm_always_size_sections
14640 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
14641 #define elf_backend_post_process_headers elf32_arm_post_process_headers
14642 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
14643 #define elf_backend_object_p elf32_arm_object_p
14644 #define elf_backend_section_flags elf32_arm_section_flags
14645 #define elf_backend_fake_sections elf32_arm_fake_sections
14646 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
14647 #define elf_backend_final_write_processing elf32_arm_final_write_processing
14648 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
14649 #define elf_backend_symbol_processing elf32_arm_symbol_processing
14650 #define elf_backend_size_info elf32_arm_size_info
14651 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
14652 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
14653 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
14654 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
14655 #define elf_backend_is_function_type elf32_arm_is_function_type
14656
14657 #define elf_backend_can_refcount 1
14658 #define elf_backend_can_gc_sections 1
14659 #define elf_backend_plt_readonly 1
14660 #define elf_backend_want_got_plt 1
14661 #define elf_backend_want_plt_sym 0
14662 #define elf_backend_may_use_rel_p 1
14663 #define elf_backend_may_use_rela_p 0
14664 #define elf_backend_default_use_rela_p 0
14665
14666 #define elf_backend_got_header_size 12
14667
14668 #undef elf_backend_obj_attrs_vendor
14669 #define elf_backend_obj_attrs_vendor "aeabi"
14670 #undef elf_backend_obj_attrs_section
14671 #define elf_backend_obj_attrs_section ".ARM.attributes"
14672 #undef elf_backend_obj_attrs_arg_type
14673 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
14674 #undef elf_backend_obj_attrs_section_type
14675 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
14676 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
14677 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
14678
14679 #include "elf32-target.h"
14680
14681 /* VxWorks Targets. */
14682
14683 #undef TARGET_LITTLE_SYM
14684 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
14685 #undef TARGET_LITTLE_NAME
14686 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
14687 #undef TARGET_BIG_SYM
14688 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
14689 #undef TARGET_BIG_NAME
14690 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
14691
14692 /* Like elf32_arm_link_hash_table_create -- but overrides
14693 appropriately for VxWorks. */
14694
14695 static struct bfd_link_hash_table *
14696 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
14697 {
14698 struct bfd_link_hash_table *ret;
14699
14700 ret = elf32_arm_link_hash_table_create (abfd);
14701 if (ret)
14702 {
14703 struct elf32_arm_link_hash_table *htab
14704 = (struct elf32_arm_link_hash_table *) ret;
14705 htab->use_rel = 0;
14706 htab->vxworks_p = 1;
14707 }
14708 return ret;
14709 }
14710
14711 static void
14712 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
14713 {
14714 elf32_arm_final_write_processing (abfd, linker);
14715 elf_vxworks_final_write_processing (abfd, linker);
14716 }
14717
14718 #undef elf32_bed
14719 #define elf32_bed elf32_arm_vxworks_bed
14720
14721 #undef bfd_elf32_bfd_link_hash_table_create
14722 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
14723 #undef elf_backend_add_symbol_hook
14724 #define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
14725 #undef elf_backend_final_write_processing
14726 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
14727 #undef elf_backend_emit_relocs
14728 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
14729
14730 #undef elf_backend_may_use_rel_p
14731 #define elf_backend_may_use_rel_p 0
14732 #undef elf_backend_may_use_rela_p
14733 #define elf_backend_may_use_rela_p 1
14734 #undef elf_backend_default_use_rela_p
14735 #define elf_backend_default_use_rela_p 1
14736 #undef elf_backend_want_plt_sym
14737 #define elf_backend_want_plt_sym 1
14738 #undef ELF_MAXPAGESIZE
14739 #define ELF_MAXPAGESIZE 0x1000
14740
14741 #include "elf32-target.h"
14742
14743
14744 /* Merge backend specific data from an object file to the output
14745 object file when linking. */
14746
14747 static bfd_boolean
14748 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
14749 {
14750 flagword out_flags;
14751 flagword in_flags;
14752 bfd_boolean flags_compatible = TRUE;
14753 asection *sec;
14754
14755 /* Check if we have the same endianess. */
14756 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
14757 return FALSE;
14758
14759 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
14760 return TRUE;
14761
14762 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
14763 return FALSE;
14764
14765 /* The input BFD must have had its flags initialised. */
14766 /* The following seems bogus to me -- The flags are initialized in
14767 the assembler but I don't think an elf_flags_init field is
14768 written into the object. */
14769 /* BFD_ASSERT (elf_flags_init (ibfd)); */
14770
14771 in_flags = elf_elfheader (ibfd)->e_flags;
14772 out_flags = elf_elfheader (obfd)->e_flags;
14773
14774 /* In theory there is no reason why we couldn't handle this. However
14775 in practice it isn't even close to working and there is no real
14776 reason to want it. */
14777 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
14778 && !(ibfd->flags & DYNAMIC)
14779 && (in_flags & EF_ARM_BE8))
14780 {
14781 _bfd_error_handler (_("error: %B is already in final BE8 format"),
14782 ibfd);
14783 return FALSE;
14784 }
14785
14786 if (!elf_flags_init (obfd))
14787 {
14788 /* If the input is the default architecture and had the default
14789 flags then do not bother setting the flags for the output
14790 architecture, instead allow future merges to do this. If no
14791 future merges ever set these flags then they will retain their
14792 uninitialised values, which surprise surprise, correspond
14793 to the default values. */
14794 if (bfd_get_arch_info (ibfd)->the_default
14795 && elf_elfheader (ibfd)->e_flags == 0)
14796 return TRUE;
14797
14798 elf_flags_init (obfd) = TRUE;
14799 elf_elfheader (obfd)->e_flags = in_flags;
14800
14801 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
14802 && bfd_get_arch_info (obfd)->the_default)
14803 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
14804
14805 return TRUE;
14806 }
14807
14808 /* Determine what should happen if the input ARM architecture
14809 does not match the output ARM architecture. */
14810 if (! bfd_arm_merge_machines (ibfd, obfd))
14811 return FALSE;
14812
14813 /* Identical flags must be compatible. */
14814 if (in_flags == out_flags)
14815 return TRUE;
14816
14817 /* Check to see if the input BFD actually contains any sections. If
14818 not, its flags may not have been initialised either, but it
14819 cannot actually cause any incompatiblity. Do not short-circuit
14820 dynamic objects; their section list may be emptied by
14821 elf_link_add_object_symbols.
14822
14823 Also check to see if there are no code sections in the input.
14824 In this case there is no need to check for code specific flags.
14825 XXX - do we need to worry about floating-point format compatability
14826 in data sections ? */
14827 if (!(ibfd->flags & DYNAMIC))
14828 {
14829 bfd_boolean null_input_bfd = TRUE;
14830 bfd_boolean only_data_sections = TRUE;
14831
14832 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
14833 {
14834 /* Ignore synthetic glue sections. */
14835 if (strcmp (sec->name, ".glue_7")
14836 && strcmp (sec->name, ".glue_7t"))
14837 {
14838 if ((bfd_get_section_flags (ibfd, sec)
14839 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14840 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14841 only_data_sections = FALSE;
14842
14843 null_input_bfd = FALSE;
14844 break;
14845 }
14846 }
14847
14848 if (null_input_bfd || only_data_sections)
14849 return TRUE;
14850 }
14851
14852 /* Complain about various flag mismatches. */
14853 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
14854 EF_ARM_EABI_VERSION (out_flags)))
14855 {
14856 _bfd_error_handler
14857 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
14858 ibfd, obfd,
14859 (in_flags & EF_ARM_EABIMASK) >> 24,
14860 (out_flags & EF_ARM_EABIMASK) >> 24);
14861 return FALSE;
14862 }
14863
14864 /* Not sure what needs to be checked for EABI versions >= 1. */
14865 /* VxWorks libraries do not use these flags. */
14866 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
14867 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
14868 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
14869 {
14870 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
14871 {
14872 _bfd_error_handler
14873 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
14874 ibfd, obfd,
14875 in_flags & EF_ARM_APCS_26 ? 26 : 32,
14876 out_flags & EF_ARM_APCS_26 ? 26 : 32);
14877 flags_compatible = FALSE;
14878 }
14879
14880 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
14881 {
14882 if (in_flags & EF_ARM_APCS_FLOAT)
14883 _bfd_error_handler
14884 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
14885 ibfd, obfd);
14886 else
14887 _bfd_error_handler
14888 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
14889 ibfd, obfd);
14890
14891 flags_compatible = FALSE;
14892 }
14893
14894 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
14895 {
14896 if (in_flags & EF_ARM_VFP_FLOAT)
14897 _bfd_error_handler
14898 (_("error: %B uses VFP instructions, whereas %B does not"),
14899 ibfd, obfd);
14900 else
14901 _bfd_error_handler
14902 (_("error: %B uses FPA instructions, whereas %B does not"),
14903 ibfd, obfd);
14904
14905 flags_compatible = FALSE;
14906 }
14907
14908 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
14909 {
14910 if (in_flags & EF_ARM_MAVERICK_FLOAT)
14911 _bfd_error_handler
14912 (_("error: %B uses Maverick instructions, whereas %B does not"),
14913 ibfd, obfd);
14914 else
14915 _bfd_error_handler
14916 (_("error: %B does not use Maverick instructions, whereas %B does"),
14917 ibfd, obfd);
14918
14919 flags_compatible = FALSE;
14920 }
14921
14922 #ifdef EF_ARM_SOFT_FLOAT
14923 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
14924 {
14925 /* We can allow interworking between code that is VFP format
14926 layout, and uses either soft float or integer regs for
14927 passing floating point arguments and results. We already
14928 know that the APCS_FLOAT flags match; similarly for VFP
14929 flags. */
14930 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
14931 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
14932 {
14933 if (in_flags & EF_ARM_SOFT_FLOAT)
14934 _bfd_error_handler
14935 (_("error: %B uses software FP, whereas %B uses hardware FP"),
14936 ibfd, obfd);
14937 else
14938 _bfd_error_handler
14939 (_("error: %B uses hardware FP, whereas %B uses software FP"),
14940 ibfd, obfd);
14941
14942 flags_compatible = FALSE;
14943 }
14944 }
14945 #endif
14946
14947 /* Interworking mismatch is only a warning. */
14948 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
14949 {
14950 if (in_flags & EF_ARM_INTERWORK)
14951 {
14952 _bfd_error_handler
14953 (_("Warning: %B supports interworking, whereas %B does not"),
14954 ibfd, obfd);
14955 }
14956 else
14957 {
14958 _bfd_error_handler
14959 (_("Warning: %B does not support interworking, whereas %B does"),
14960 ibfd, obfd);
14961 }
14962 }
14963 }
14964
14965 return flags_compatible;
14966 }
14967
14968
14969 /* Symbian OS Targets. */
14970
14971 #undef TARGET_LITTLE_SYM
14972 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
14973 #undef TARGET_LITTLE_NAME
14974 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
14975 #undef TARGET_BIG_SYM
14976 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
14977 #undef TARGET_BIG_NAME
14978 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
14979
14980 /* Like elf32_arm_link_hash_table_create -- but overrides
14981 appropriately for Symbian OS. */
14982
14983 static struct bfd_link_hash_table *
14984 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
14985 {
14986 struct bfd_link_hash_table *ret;
14987
14988 ret = elf32_arm_link_hash_table_create (abfd);
14989 if (ret)
14990 {
14991 struct elf32_arm_link_hash_table *htab
14992 = (struct elf32_arm_link_hash_table *)ret;
14993 /* There is no PLT header for Symbian OS. */
14994 htab->plt_header_size = 0;
14995 /* The PLT entries are each one instruction and one word. */
14996 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
14997 htab->symbian_p = 1;
14998 /* Symbian uses armv5t or above, so use_blx is always true. */
14999 htab->use_blx = 1;
15000 htab->root.is_relocatable_executable = 1;
15001 }
15002 return ret;
15003 }
15004
15005 static const struct bfd_elf_special_section
15006 elf32_arm_symbian_special_sections[] =
15007 {
15008 /* In a BPABI executable, the dynamic linking sections do not go in
15009 the loadable read-only segment. The post-linker may wish to
15010 refer to these sections, but they are not part of the final
15011 program image. */
15012 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
15013 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
15014 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
15015 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
15016 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
15017 /* These sections do not need to be writable as the SymbianOS
15018 postlinker will arrange things so that no dynamic relocation is
15019 required. */
15020 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
15021 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
15022 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
15023 { NULL, 0, 0, 0, 0 }
15024 };
15025
15026 static void
15027 elf32_arm_symbian_begin_write_processing (bfd *abfd,
15028 struct bfd_link_info *link_info)
15029 {
15030 /* BPABI objects are never loaded directly by an OS kernel; they are
15031 processed by a postlinker first, into an OS-specific format. If
15032 the D_PAGED bit is set on the file, BFD will align segments on
15033 page boundaries, so that an OS can directly map the file. With
15034 BPABI objects, that just results in wasted space. In addition,
15035 because we clear the D_PAGED bit, map_sections_to_segments will
15036 recognize that the program headers should not be mapped into any
15037 loadable segment. */
15038 abfd->flags &= ~D_PAGED;
15039 elf32_arm_begin_write_processing (abfd, link_info);
15040 }
15041
15042 static bfd_boolean
15043 elf32_arm_symbian_modify_segment_map (bfd *abfd,
15044 struct bfd_link_info *info)
15045 {
15046 struct elf_segment_map *m;
15047 asection *dynsec;
15048
15049 /* BPABI shared libraries and executables should have a PT_DYNAMIC
15050 segment. However, because the .dynamic section is not marked
15051 with SEC_LOAD, the generic ELF code will not create such a
15052 segment. */
15053 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
15054 if (dynsec)
15055 {
15056 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
15057 if (m->p_type == PT_DYNAMIC)
15058 break;
15059
15060 if (m == NULL)
15061 {
15062 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
15063 m->next = elf_tdata (abfd)->segment_map;
15064 elf_tdata (abfd)->segment_map = m;
15065 }
15066 }
15067
15068 /* Also call the generic arm routine. */
15069 return elf32_arm_modify_segment_map (abfd, info);
15070 }
15071
15072 /* Return address for Ith PLT stub in section PLT, for relocation REL
15073 or (bfd_vma) -1 if it should not be included. */
15074
15075 static bfd_vma
15076 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
15077 const arelent *rel ATTRIBUTE_UNUSED)
15078 {
15079 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
15080 }
15081
15082
15083 #undef elf32_bed
15084 #define elf32_bed elf32_arm_symbian_bed
15085
15086 /* The dynamic sections are not allocated on SymbianOS; the postlinker
15087 will process them and then discard them. */
15088 #undef ELF_DYNAMIC_SEC_FLAGS
15089 #define ELF_DYNAMIC_SEC_FLAGS \
15090 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
15091
15092 #undef elf_backend_add_symbol_hook
15093 #undef elf_backend_emit_relocs
15094
15095 #undef bfd_elf32_bfd_link_hash_table_create
15096 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
15097 #undef elf_backend_special_sections
15098 #define elf_backend_special_sections elf32_arm_symbian_special_sections
15099 #undef elf_backend_begin_write_processing
15100 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
15101 #undef elf_backend_final_write_processing
15102 #define elf_backend_final_write_processing elf32_arm_final_write_processing
15103
15104 #undef elf_backend_modify_segment_map
15105 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
15106
15107 /* There is no .got section for BPABI objects, and hence no header. */
15108 #undef elf_backend_got_header_size
15109 #define elf_backend_got_header_size 0
15110
15111 /* Similarly, there is no .got.plt section. */
15112 #undef elf_backend_want_got_plt
15113 #define elf_backend_want_got_plt 0
15114
15115 #undef elf_backend_plt_sym_val
15116 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
15117
15118 #undef elf_backend_may_use_rel_p
15119 #define elf_backend_may_use_rel_p 1
15120 #undef elf_backend_may_use_rela_p
15121 #define elf_backend_may_use_rela_p 0
15122 #undef elf_backend_default_use_rela_p
15123 #define elf_backend_default_use_rela_p 0
15124 #undef elf_backend_want_plt_sym
15125 #define elf_backend_want_plt_sym 0
15126 #undef ELF_MAXPAGESIZE
15127 #define ELF_MAXPAGESIZE 0x8000
15128
15129 #include "elf32-target.h"