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2012-01-10 Tristan Gingold <gingold@adacore.com>
[binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22 #include "sysdep.h"
23 #include <limits.h>
24
25 #include "bfd.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-vxworks.h"
30 #include "elf/arm.h"
31
32 /* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34 #define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37 /* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39 #define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44 /* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46 #define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51 /* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53 #define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
58 #define elf_info_to_howto 0
59 #define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61 #define ARM_ELF_ABI_VERSION 0
62 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
64 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
69 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
73 static reloc_howto_type elf32_arm_howto_table_1[] =
74 {
75 /* No relocation. */
76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
135 HOWTO (R_ARM_LDR_PC_G0, /* type */
136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
138 32, /* bitsize */
139 TRUE, /* pc_relative */
140 0, /* bitpos */
141 complain_overflow_dont,/* complain_on_overflow */
142 bfd_elf_generic_reloc, /* special_function */
143 "R_ARM_LDR_PC_G0", /* name */
144 FALSE, /* partial_inplace */
145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
222 HOWTO (R_ARM_THM_CALL, /* type */
223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
225 24, /* bitsize */
226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
230 "R_ARM_THM_CALL", /* name */
231 FALSE, /* partial_inplace */
232 0x07ff2fff, /* src_mask */
233 0x07ff2fff, /* dst_mask */
234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
250 HOWTO (R_ARM_BREL_ADJ, /* type */
251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
253 32, /* bitsize */
254 FALSE, /* pc_relative */
255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
258 "R_ARM_BREL_ADJ", /* name */
259 FALSE, /* partial_inplace */
260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
263
264 HOWTO (R_ARM_TLS_DESC, /* type */
265 0, /* rightshift */
266 2, /* size (0 = byte, 1 = short, 2 = long) */
267 32, /* bitsize */
268 FALSE, /* pc_relative */
269 0, /* bitpos */
270 complain_overflow_bitfield,/* complain_on_overflow */
271 bfd_elf_generic_reloc, /* special_function */
272 "R_ARM_TLS_DESC", /* name */
273 FALSE, /* partial_inplace */
274 0xffffffff, /* src_mask */
275 0xffffffff, /* dst_mask */
276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
296 24, /* bitsize */
297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
311 24, /* bitsize */
312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
318 0x07ff2fff, /* src_mask */
319 0x07ff2fff, /* dst_mask */
320 TRUE), /* pcrel_offset */
321
322 /* Dynamic TLS relocations. */
323
324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
337
338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
351
352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
424 HOWTO (R_ARM_GOTOFF32, /* type */
425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
432 "R_ARM_GOTOFF32", /* name */
433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
469 24, /* bitsize */
470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
475 FALSE, /* partial_inplace */
476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
513 0, /* bitpos */
514 complain_overflow_signed,/* complain_on_overflow */
515 bfd_elf_generic_reloc, /* special_function */
516 "R_ARM_THM_JUMP24", /* name */
517 FALSE, /* partial_inplace */
518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
521
522 HOWTO (R_ARM_BASE_ABS, /* type */
523 0, /* rightshift */
524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
530 "R_ARM_BASE_ABS", /* name */
531 FALSE, /* partial_inplace */
532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
839 complain_overflow_dont,/* complain_on_overflow */
840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
853 complain_overflow_dont,/* complain_on_overflow */
854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
888
889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
1270
1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
1355 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1356 0, /* rightshift */
1357 2, /* size (0 = byte, 1 = short, 2 = long) */
1358 32, /* bitsize */
1359 FALSE, /* pc_relative */
1360 0, /* bitpos */
1361 complain_overflow_bitfield,/* complain_on_overflow */
1362 NULL, /* special_function */
1363 "R_ARM_TLS_GOTDESC", /* name */
1364 TRUE, /* partial_inplace */
1365 0xffffffff, /* src_mask */
1366 0xffffffff, /* dst_mask */
1367 FALSE), /* pcrel_offset */
1368
1369 HOWTO (R_ARM_TLS_CALL, /* type */
1370 0, /* rightshift */
1371 2, /* size (0 = byte, 1 = short, 2 = long) */
1372 24, /* bitsize */
1373 FALSE, /* pc_relative */
1374 0, /* bitpos */
1375 complain_overflow_dont,/* complain_on_overflow */
1376 bfd_elf_generic_reloc, /* special_function */
1377 "R_ARM_TLS_CALL", /* name */
1378 FALSE, /* partial_inplace */
1379 0x00ffffff, /* src_mask */
1380 0x00ffffff, /* dst_mask */
1381 FALSE), /* pcrel_offset */
1382
1383 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1384 0, /* rightshift */
1385 2, /* size (0 = byte, 1 = short, 2 = long) */
1386 0, /* bitsize */
1387 FALSE, /* pc_relative */
1388 0, /* bitpos */
1389 complain_overflow_bitfield,/* complain_on_overflow */
1390 bfd_elf_generic_reloc, /* special_function */
1391 "R_ARM_TLS_DESCSEQ", /* name */
1392 FALSE, /* partial_inplace */
1393 0x00000000, /* src_mask */
1394 0x00000000, /* dst_mask */
1395 FALSE), /* pcrel_offset */
1396
1397 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1398 0, /* rightshift */
1399 2, /* size (0 = byte, 1 = short, 2 = long) */
1400 24, /* bitsize */
1401 FALSE, /* pc_relative */
1402 0, /* bitpos */
1403 complain_overflow_dont,/* complain_on_overflow */
1404 bfd_elf_generic_reloc, /* special_function */
1405 "R_ARM_THM_TLS_CALL", /* name */
1406 FALSE, /* partial_inplace */
1407 0x07ff07ff, /* src_mask */
1408 0x07ff07ff, /* dst_mask */
1409 FALSE), /* pcrel_offset */
1410
1411 HOWTO (R_ARM_PLT32_ABS, /* type */
1412 0, /* rightshift */
1413 2, /* size (0 = byte, 1 = short, 2 = long) */
1414 32, /* bitsize */
1415 FALSE, /* pc_relative */
1416 0, /* bitpos */
1417 complain_overflow_dont,/* complain_on_overflow */
1418 bfd_elf_generic_reloc, /* special_function */
1419 "R_ARM_PLT32_ABS", /* name */
1420 FALSE, /* partial_inplace */
1421 0xffffffff, /* src_mask */
1422 0xffffffff, /* dst_mask */
1423 FALSE), /* pcrel_offset */
1424
1425 HOWTO (R_ARM_GOT_ABS, /* type */
1426 0, /* rightshift */
1427 2, /* size (0 = byte, 1 = short, 2 = long) */
1428 32, /* bitsize */
1429 FALSE, /* pc_relative */
1430 0, /* bitpos */
1431 complain_overflow_dont,/* complain_on_overflow */
1432 bfd_elf_generic_reloc, /* special_function */
1433 "R_ARM_GOT_ABS", /* name */
1434 FALSE, /* partial_inplace */
1435 0xffffffff, /* src_mask */
1436 0xffffffff, /* dst_mask */
1437 FALSE), /* pcrel_offset */
1438
1439 HOWTO (R_ARM_GOT_PREL, /* type */
1440 0, /* rightshift */
1441 2, /* size (0 = byte, 1 = short, 2 = long) */
1442 32, /* bitsize */
1443 TRUE, /* pc_relative */
1444 0, /* bitpos */
1445 complain_overflow_dont, /* complain_on_overflow */
1446 bfd_elf_generic_reloc, /* special_function */
1447 "R_ARM_GOT_PREL", /* name */
1448 FALSE, /* partial_inplace */
1449 0xffffffff, /* src_mask */
1450 0xffffffff, /* dst_mask */
1451 TRUE), /* pcrel_offset */
1452
1453 HOWTO (R_ARM_GOT_BREL12, /* type */
1454 0, /* rightshift */
1455 2, /* size (0 = byte, 1 = short, 2 = long) */
1456 12, /* bitsize */
1457 FALSE, /* pc_relative */
1458 0, /* bitpos */
1459 complain_overflow_bitfield,/* complain_on_overflow */
1460 bfd_elf_generic_reloc, /* special_function */
1461 "R_ARM_GOT_BREL12", /* name */
1462 FALSE, /* partial_inplace */
1463 0x00000fff, /* src_mask */
1464 0x00000fff, /* dst_mask */
1465 FALSE), /* pcrel_offset */
1466
1467 HOWTO (R_ARM_GOTOFF12, /* type */
1468 0, /* rightshift */
1469 2, /* size (0 = byte, 1 = short, 2 = long) */
1470 12, /* bitsize */
1471 FALSE, /* pc_relative */
1472 0, /* bitpos */
1473 complain_overflow_bitfield,/* complain_on_overflow */
1474 bfd_elf_generic_reloc, /* special_function */
1475 "R_ARM_GOTOFF12", /* name */
1476 FALSE, /* partial_inplace */
1477 0x00000fff, /* src_mask */
1478 0x00000fff, /* dst_mask */
1479 FALSE), /* pcrel_offset */
1480
1481 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1482
1483 /* GNU extension to record C++ vtable member usage */
1484 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1485 0, /* rightshift */
1486 2, /* size (0 = byte, 1 = short, 2 = long) */
1487 0, /* bitsize */
1488 FALSE, /* pc_relative */
1489 0, /* bitpos */
1490 complain_overflow_dont, /* complain_on_overflow */
1491 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1492 "R_ARM_GNU_VTENTRY", /* name */
1493 FALSE, /* partial_inplace */
1494 0, /* src_mask */
1495 0, /* dst_mask */
1496 FALSE), /* pcrel_offset */
1497
1498 /* GNU extension to record C++ vtable hierarchy */
1499 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1500 0, /* rightshift */
1501 2, /* size (0 = byte, 1 = short, 2 = long) */
1502 0, /* bitsize */
1503 FALSE, /* pc_relative */
1504 0, /* bitpos */
1505 complain_overflow_dont, /* complain_on_overflow */
1506 NULL, /* special_function */
1507 "R_ARM_GNU_VTINHERIT", /* name */
1508 FALSE, /* partial_inplace */
1509 0, /* src_mask */
1510 0, /* dst_mask */
1511 FALSE), /* pcrel_offset */
1512
1513 HOWTO (R_ARM_THM_JUMP11, /* type */
1514 1, /* rightshift */
1515 1, /* size (0 = byte, 1 = short, 2 = long) */
1516 11, /* bitsize */
1517 TRUE, /* pc_relative */
1518 0, /* bitpos */
1519 complain_overflow_signed, /* complain_on_overflow */
1520 bfd_elf_generic_reloc, /* special_function */
1521 "R_ARM_THM_JUMP11", /* name */
1522 FALSE, /* partial_inplace */
1523 0x000007ff, /* src_mask */
1524 0x000007ff, /* dst_mask */
1525 TRUE), /* pcrel_offset */
1526
1527 HOWTO (R_ARM_THM_JUMP8, /* type */
1528 1, /* rightshift */
1529 1, /* size (0 = byte, 1 = short, 2 = long) */
1530 8, /* bitsize */
1531 TRUE, /* pc_relative */
1532 0, /* bitpos */
1533 complain_overflow_signed, /* complain_on_overflow */
1534 bfd_elf_generic_reloc, /* special_function */
1535 "R_ARM_THM_JUMP8", /* name */
1536 FALSE, /* partial_inplace */
1537 0x000000ff, /* src_mask */
1538 0x000000ff, /* dst_mask */
1539 TRUE), /* pcrel_offset */
1540
1541 /* TLS relocations */
1542 HOWTO (R_ARM_TLS_GD32, /* type */
1543 0, /* rightshift */
1544 2, /* size (0 = byte, 1 = short, 2 = long) */
1545 32, /* bitsize */
1546 FALSE, /* pc_relative */
1547 0, /* bitpos */
1548 complain_overflow_bitfield,/* complain_on_overflow */
1549 NULL, /* special_function */
1550 "R_ARM_TLS_GD32", /* name */
1551 TRUE, /* partial_inplace */
1552 0xffffffff, /* src_mask */
1553 0xffffffff, /* dst_mask */
1554 FALSE), /* pcrel_offset */
1555
1556 HOWTO (R_ARM_TLS_LDM32, /* type */
1557 0, /* rightshift */
1558 2, /* size (0 = byte, 1 = short, 2 = long) */
1559 32, /* bitsize */
1560 FALSE, /* pc_relative */
1561 0, /* bitpos */
1562 complain_overflow_bitfield,/* complain_on_overflow */
1563 bfd_elf_generic_reloc, /* special_function */
1564 "R_ARM_TLS_LDM32", /* name */
1565 TRUE, /* partial_inplace */
1566 0xffffffff, /* src_mask */
1567 0xffffffff, /* dst_mask */
1568 FALSE), /* pcrel_offset */
1569
1570 HOWTO (R_ARM_TLS_LDO32, /* type */
1571 0, /* rightshift */
1572 2, /* size (0 = byte, 1 = short, 2 = long) */
1573 32, /* bitsize */
1574 FALSE, /* pc_relative */
1575 0, /* bitpos */
1576 complain_overflow_bitfield,/* complain_on_overflow */
1577 bfd_elf_generic_reloc, /* special_function */
1578 "R_ARM_TLS_LDO32", /* name */
1579 TRUE, /* partial_inplace */
1580 0xffffffff, /* src_mask */
1581 0xffffffff, /* dst_mask */
1582 FALSE), /* pcrel_offset */
1583
1584 HOWTO (R_ARM_TLS_IE32, /* type */
1585 0, /* rightshift */
1586 2, /* size (0 = byte, 1 = short, 2 = long) */
1587 32, /* bitsize */
1588 FALSE, /* pc_relative */
1589 0, /* bitpos */
1590 complain_overflow_bitfield,/* complain_on_overflow */
1591 NULL, /* special_function */
1592 "R_ARM_TLS_IE32", /* name */
1593 TRUE, /* partial_inplace */
1594 0xffffffff, /* src_mask */
1595 0xffffffff, /* dst_mask */
1596 FALSE), /* pcrel_offset */
1597
1598 HOWTO (R_ARM_TLS_LE32, /* type */
1599 0, /* rightshift */
1600 2, /* size (0 = byte, 1 = short, 2 = long) */
1601 32, /* bitsize */
1602 FALSE, /* pc_relative */
1603 0, /* bitpos */
1604 complain_overflow_bitfield,/* complain_on_overflow */
1605 bfd_elf_generic_reloc, /* special_function */
1606 "R_ARM_TLS_LE32", /* name */
1607 TRUE, /* partial_inplace */
1608 0xffffffff, /* src_mask */
1609 0xffffffff, /* dst_mask */
1610 FALSE), /* pcrel_offset */
1611
1612 HOWTO (R_ARM_TLS_LDO12, /* type */
1613 0, /* rightshift */
1614 2, /* size (0 = byte, 1 = short, 2 = long) */
1615 12, /* bitsize */
1616 FALSE, /* pc_relative */
1617 0, /* bitpos */
1618 complain_overflow_bitfield,/* complain_on_overflow */
1619 bfd_elf_generic_reloc, /* special_function */
1620 "R_ARM_TLS_LDO12", /* name */
1621 FALSE, /* partial_inplace */
1622 0x00000fff, /* src_mask */
1623 0x00000fff, /* dst_mask */
1624 FALSE), /* pcrel_offset */
1625
1626 HOWTO (R_ARM_TLS_LE12, /* type */
1627 0, /* rightshift */
1628 2, /* size (0 = byte, 1 = short, 2 = long) */
1629 12, /* bitsize */
1630 FALSE, /* pc_relative */
1631 0, /* bitpos */
1632 complain_overflow_bitfield,/* complain_on_overflow */
1633 bfd_elf_generic_reloc, /* special_function */
1634 "R_ARM_TLS_LE12", /* name */
1635 FALSE, /* partial_inplace */
1636 0x00000fff, /* src_mask */
1637 0x00000fff, /* dst_mask */
1638 FALSE), /* pcrel_offset */
1639
1640 HOWTO (R_ARM_TLS_IE12GP, /* type */
1641 0, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
1643 12, /* bitsize */
1644 FALSE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_bitfield,/* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_ARM_TLS_IE12GP", /* name */
1649 FALSE, /* partial_inplace */
1650 0x00000fff, /* src_mask */
1651 0x00000fff, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
1654 /* 112-127 private relocations. */
1655 EMPTY_HOWTO (112),
1656 EMPTY_HOWTO (113),
1657 EMPTY_HOWTO (114),
1658 EMPTY_HOWTO (115),
1659 EMPTY_HOWTO (116),
1660 EMPTY_HOWTO (117),
1661 EMPTY_HOWTO (118),
1662 EMPTY_HOWTO (119),
1663 EMPTY_HOWTO (120),
1664 EMPTY_HOWTO (121),
1665 EMPTY_HOWTO (122),
1666 EMPTY_HOWTO (123),
1667 EMPTY_HOWTO (124),
1668 EMPTY_HOWTO (125),
1669 EMPTY_HOWTO (126),
1670 EMPTY_HOWTO (127),
1671
1672 /* R_ARM_ME_TOO, obsolete. */
1673 EMPTY_HOWTO (128),
1674
1675 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1676 0, /* rightshift */
1677 1, /* size (0 = byte, 1 = short, 2 = long) */
1678 0, /* bitsize */
1679 FALSE, /* pc_relative */
1680 0, /* bitpos */
1681 complain_overflow_bitfield,/* complain_on_overflow */
1682 bfd_elf_generic_reloc, /* special_function */
1683 "R_ARM_THM_TLS_DESCSEQ",/* name */
1684 FALSE, /* partial_inplace */
1685 0x00000000, /* src_mask */
1686 0x00000000, /* dst_mask */
1687 FALSE), /* pcrel_offset */
1688 };
1689
1690 /* 160 onwards: */
1691 static reloc_howto_type elf32_arm_howto_table_2[1] =
1692 {
1693 HOWTO (R_ARM_IRELATIVE, /* type */
1694 0, /* rightshift */
1695 2, /* size (0 = byte, 1 = short, 2 = long) */
1696 32, /* bitsize */
1697 FALSE, /* pc_relative */
1698 0, /* bitpos */
1699 complain_overflow_bitfield,/* complain_on_overflow */
1700 bfd_elf_generic_reloc, /* special_function */
1701 "R_ARM_IRELATIVE", /* name */
1702 TRUE, /* partial_inplace */
1703 0xffffffff, /* src_mask */
1704 0xffffffff, /* dst_mask */
1705 FALSE) /* pcrel_offset */
1706 };
1707
1708 /* 249-255 extended, currently unused, relocations: */
1709 static reloc_howto_type elf32_arm_howto_table_3[4] =
1710 {
1711 HOWTO (R_ARM_RREL32, /* type */
1712 0, /* rightshift */
1713 0, /* size (0 = byte, 1 = short, 2 = long) */
1714 0, /* bitsize */
1715 FALSE, /* pc_relative */
1716 0, /* bitpos */
1717 complain_overflow_dont,/* complain_on_overflow */
1718 bfd_elf_generic_reloc, /* special_function */
1719 "R_ARM_RREL32", /* name */
1720 FALSE, /* partial_inplace */
1721 0, /* src_mask */
1722 0, /* dst_mask */
1723 FALSE), /* pcrel_offset */
1724
1725 HOWTO (R_ARM_RABS32, /* type */
1726 0, /* rightshift */
1727 0, /* size (0 = byte, 1 = short, 2 = long) */
1728 0, /* bitsize */
1729 FALSE, /* pc_relative */
1730 0, /* bitpos */
1731 complain_overflow_dont,/* complain_on_overflow */
1732 bfd_elf_generic_reloc, /* special_function */
1733 "R_ARM_RABS32", /* name */
1734 FALSE, /* partial_inplace */
1735 0, /* src_mask */
1736 0, /* dst_mask */
1737 FALSE), /* pcrel_offset */
1738
1739 HOWTO (R_ARM_RPC24, /* type */
1740 0, /* rightshift */
1741 0, /* size (0 = byte, 1 = short, 2 = long) */
1742 0, /* bitsize */
1743 FALSE, /* pc_relative */
1744 0, /* bitpos */
1745 complain_overflow_dont,/* complain_on_overflow */
1746 bfd_elf_generic_reloc, /* special_function */
1747 "R_ARM_RPC24", /* name */
1748 FALSE, /* partial_inplace */
1749 0, /* src_mask */
1750 0, /* dst_mask */
1751 FALSE), /* pcrel_offset */
1752
1753 HOWTO (R_ARM_RBASE, /* type */
1754 0, /* rightshift */
1755 0, /* size (0 = byte, 1 = short, 2 = long) */
1756 0, /* bitsize */
1757 FALSE, /* pc_relative */
1758 0, /* bitpos */
1759 complain_overflow_dont,/* complain_on_overflow */
1760 bfd_elf_generic_reloc, /* special_function */
1761 "R_ARM_RBASE", /* name */
1762 FALSE, /* partial_inplace */
1763 0, /* src_mask */
1764 0, /* dst_mask */
1765 FALSE) /* pcrel_offset */
1766 };
1767
1768 static reloc_howto_type *
1769 elf32_arm_howto_from_type (unsigned int r_type)
1770 {
1771 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1772 return &elf32_arm_howto_table_1[r_type];
1773
1774 if (r_type == R_ARM_IRELATIVE)
1775 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1776
1777 if (r_type >= R_ARM_RREL32
1778 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1779 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1780
1781 return NULL;
1782 }
1783
1784 static void
1785 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1786 Elf_Internal_Rela * elf_reloc)
1787 {
1788 unsigned int r_type;
1789
1790 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1791 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1792 }
1793
1794 struct elf32_arm_reloc_map
1795 {
1796 bfd_reloc_code_real_type bfd_reloc_val;
1797 unsigned char elf_reloc_val;
1798 };
1799
1800 /* All entries in this list must also be present in elf32_arm_howto_table. */
1801 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1802 {
1803 {BFD_RELOC_NONE, R_ARM_NONE},
1804 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1805 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1806 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1807 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1808 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1809 {BFD_RELOC_32, R_ARM_ABS32},
1810 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1811 {BFD_RELOC_8, R_ARM_ABS8},
1812 {BFD_RELOC_16, R_ARM_ABS16},
1813 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1814 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1815 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1816 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1817 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1818 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1821 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1822 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1823 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1824 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1825 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1826 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1827 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1828 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1829 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1830 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1831 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1832 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1833 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1834 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1835 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1836 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1837 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1838 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1839 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1840 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1841 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1842 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1843 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1844 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1845 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1846 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1847 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1848 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1849 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1850 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1851 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1852 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1853 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1854 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1855 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1856 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1858 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1860 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1861 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1862 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1863 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1864 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1865 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1866 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1867 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1868 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1869 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1870 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1871 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1872 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1873 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1874 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1875 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1876 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1877 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1878 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1879 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1880 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1881 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1882 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1883 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1884 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1885 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1886 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1887 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1888 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
1889 };
1890
1891 static reloc_howto_type *
1892 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1893 bfd_reloc_code_real_type code)
1894 {
1895 unsigned int i;
1896
1897 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1898 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1899 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1900
1901 return NULL;
1902 }
1903
1904 static reloc_howto_type *
1905 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1906 const char *r_name)
1907 {
1908 unsigned int i;
1909
1910 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1911 if (elf32_arm_howto_table_1[i].name != NULL
1912 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1913 return &elf32_arm_howto_table_1[i];
1914
1915 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1916 if (elf32_arm_howto_table_2[i].name != NULL
1917 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1918 return &elf32_arm_howto_table_2[i];
1919
1920 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1921 if (elf32_arm_howto_table_3[i].name != NULL
1922 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1923 return &elf32_arm_howto_table_3[i];
1924
1925 return NULL;
1926 }
1927
1928 /* Support for core dump NOTE sections. */
1929
1930 static bfd_boolean
1931 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1932 {
1933 int offset;
1934 size_t size;
1935
1936 switch (note->descsz)
1937 {
1938 default:
1939 return FALSE;
1940
1941 case 148: /* Linux/ARM 32-bit. */
1942 /* pr_cursig */
1943 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1944
1945 /* pr_pid */
1946 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
1947
1948 /* pr_reg */
1949 offset = 72;
1950 size = 72;
1951
1952 break;
1953 }
1954
1955 /* Make a ".reg/999" section. */
1956 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1957 size, note->descpos + offset);
1958 }
1959
1960 static bfd_boolean
1961 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
1962 {
1963 switch (note->descsz)
1964 {
1965 default:
1966 return FALSE;
1967
1968 case 124: /* Linux/ARM elf_prpsinfo. */
1969 elf_tdata (abfd)->core_pid
1970 = bfd_get_32 (abfd, note->descdata + 12);
1971 elf_tdata (abfd)->core_program
1972 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1973 elf_tdata (abfd)->core_command
1974 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1975 }
1976
1977 /* Note that for some reason, a spurious space is tacked
1978 onto the end of the args in some (at least one anyway)
1979 implementations, so strip it off if it exists. */
1980 {
1981 char *command = elf_tdata (abfd)->core_command;
1982 int n = strlen (command);
1983
1984 if (0 < n && command[n - 1] == ' ')
1985 command[n - 1] = '\0';
1986 }
1987
1988 return TRUE;
1989 }
1990
1991 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1992 #define TARGET_LITTLE_NAME "elf32-littlearm"
1993 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1994 #define TARGET_BIG_NAME "elf32-bigarm"
1995
1996 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1997 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1998
1999 typedef unsigned long int insn32;
2000 typedef unsigned short int insn16;
2001
2002 /* In lieu of proper flags, assume all EABIv4 or later objects are
2003 interworkable. */
2004 #define INTERWORK_FLAG(abfd) \
2005 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2006 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2007 || ((abfd)->flags & BFD_LINKER_CREATED))
2008
2009 /* The linker script knows the section names for placement.
2010 The entry_names are used to do simple name mangling on the stubs.
2011 Given a function name, and its type, the stub can be found. The
2012 name can be changed. The only requirement is the %s be present. */
2013 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2014 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2015
2016 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2017 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2018
2019 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2020 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2021
2022 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2023 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2024
2025 #define STUB_ENTRY_NAME "__%s_veneer"
2026
2027 /* The name of the dynamic interpreter. This is put in the .interp
2028 section. */
2029 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2030
2031 static const unsigned long tls_trampoline [] =
2032 {
2033 0xe08e0000, /* add r0, lr, r0 */
2034 0xe5901004, /* ldr r1, [r0,#4] */
2035 0xe12fff11, /* bx r1 */
2036 };
2037
2038 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2039 {
2040 0xe52d2004, /* push {r2} */
2041 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2042 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2043 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2044 0xe081100f, /* 2: add r1, pc */
2045 0xe12fff12, /* bx r2 */
2046 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2047 + dl_tlsdesc_lazy_resolver(GOT) */
2048 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2049 };
2050
2051 #ifdef FOUR_WORD_PLT
2052
2053 /* The first entry in a procedure linkage table looks like
2054 this. It is set up so that any shared library function that is
2055 called before the relocation has been set up calls the dynamic
2056 linker first. */
2057 static const bfd_vma elf32_arm_plt0_entry [] =
2058 {
2059 0xe52de004, /* str lr, [sp, #-4]! */
2060 0xe59fe010, /* ldr lr, [pc, #16] */
2061 0xe08fe00e, /* add lr, pc, lr */
2062 0xe5bef008, /* ldr pc, [lr, #8]! */
2063 };
2064
2065 /* Subsequent entries in a procedure linkage table look like
2066 this. */
2067 static const bfd_vma elf32_arm_plt_entry [] =
2068 {
2069 0xe28fc600, /* add ip, pc, #NN */
2070 0xe28cca00, /* add ip, ip, #NN */
2071 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2072 0x00000000, /* unused */
2073 };
2074
2075 #else
2076
2077 /* The first entry in a procedure linkage table looks like
2078 this. It is set up so that any shared library function that is
2079 called before the relocation has been set up calls the dynamic
2080 linker first. */
2081 static const bfd_vma elf32_arm_plt0_entry [] =
2082 {
2083 0xe52de004, /* str lr, [sp, #-4]! */
2084 0xe59fe004, /* ldr lr, [pc, #4] */
2085 0xe08fe00e, /* add lr, pc, lr */
2086 0xe5bef008, /* ldr pc, [lr, #8]! */
2087 0x00000000, /* &GOT[0] - . */
2088 };
2089
2090 /* Subsequent entries in a procedure linkage table look like
2091 this. */
2092 static const bfd_vma elf32_arm_plt_entry [] =
2093 {
2094 0xe28fc600, /* add ip, pc, #0xNN00000 */
2095 0xe28cca00, /* add ip, ip, #0xNN000 */
2096 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2097 };
2098
2099 #endif
2100
2101 /* The format of the first entry in the procedure linkage table
2102 for a VxWorks executable. */
2103 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2104 {
2105 0xe52dc008, /* str ip,[sp,#-8]! */
2106 0xe59fc000, /* ldr ip,[pc] */
2107 0xe59cf008, /* ldr pc,[ip,#8] */
2108 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2109 };
2110
2111 /* The format of subsequent entries in a VxWorks executable. */
2112 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2113 {
2114 0xe59fc000, /* ldr ip,[pc] */
2115 0xe59cf000, /* ldr pc,[ip] */
2116 0x00000000, /* .long @got */
2117 0xe59fc000, /* ldr ip,[pc] */
2118 0xea000000, /* b _PLT */
2119 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2120 };
2121
2122 /* The format of entries in a VxWorks shared library. */
2123 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2124 {
2125 0xe59fc000, /* ldr ip,[pc] */
2126 0xe79cf009, /* ldr pc,[ip,r9] */
2127 0x00000000, /* .long @got */
2128 0xe59fc000, /* ldr ip,[pc] */
2129 0xe599f008, /* ldr pc,[r9,#8] */
2130 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2131 };
2132
2133 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2134 #define PLT_THUMB_STUB_SIZE 4
2135 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2136 {
2137 0x4778, /* bx pc */
2138 0x46c0 /* nop */
2139 };
2140
2141 /* The entries in a PLT when using a DLL-based target with multiple
2142 address spaces. */
2143 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2144 {
2145 0xe51ff004, /* ldr pc, [pc, #-4] */
2146 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2147 };
2148
2149 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2150 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2151 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2152 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2153 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2154 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2155
2156 enum stub_insn_type
2157 {
2158 THUMB16_TYPE = 1,
2159 THUMB32_TYPE,
2160 ARM_TYPE,
2161 DATA_TYPE
2162 };
2163
2164 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2165 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2166 is inserted in arm_build_one_stub(). */
2167 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2168 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2169 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2170 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2171 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2172 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2173
2174 typedef struct
2175 {
2176 bfd_vma data;
2177 enum stub_insn_type type;
2178 unsigned int r_type;
2179 int reloc_addend;
2180 } insn_sequence;
2181
2182 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2183 to reach the stub if necessary. */
2184 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2185 {
2186 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2187 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2188 };
2189
2190 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2191 available. */
2192 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2193 {
2194 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2195 ARM_INSN(0xe12fff1c), /* bx ip */
2196 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2197 };
2198
2199 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2200 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2201 {
2202 THUMB16_INSN(0xb401), /* push {r0} */
2203 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2204 THUMB16_INSN(0x4684), /* mov ip, r0 */
2205 THUMB16_INSN(0xbc01), /* pop {r0} */
2206 THUMB16_INSN(0x4760), /* bx ip */
2207 THUMB16_INSN(0xbf00), /* nop */
2208 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2209 };
2210
2211 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2212 allowed. */
2213 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2214 {
2215 THUMB16_INSN(0x4778), /* bx pc */
2216 THUMB16_INSN(0x46c0), /* nop */
2217 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2218 ARM_INSN(0xe12fff1c), /* bx ip */
2219 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2220 };
2221
2222 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2223 available. */
2224 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2225 {
2226 THUMB16_INSN(0x4778), /* bx pc */
2227 THUMB16_INSN(0x46c0), /* nop */
2228 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2229 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2230 };
2231
2232 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2233 one, when the destination is close enough. */
2234 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2235 {
2236 THUMB16_INSN(0x4778), /* bx pc */
2237 THUMB16_INSN(0x46c0), /* nop */
2238 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
2239 };
2240
2241 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2242 blx to reach the stub if necessary. */
2243 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2244 {
2245 ARM_INSN(0xe59fc000), /* ldr ip, [pc] */
2246 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2247 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2248 };
2249
2250 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2251 blx to reach the stub if necessary. We can not add into pc;
2252 it is not guaranteed to mode switch (different in ARMv6 and
2253 ARMv7). */
2254 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2255 {
2256 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2257 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2258 ARM_INSN(0xe12fff1c), /* bx ip */
2259 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2260 };
2261
2262 /* V4T ARM -> ARM long branch stub, PIC. */
2263 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2264 {
2265 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2266 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2267 ARM_INSN(0xe12fff1c), /* bx ip */
2268 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2269 };
2270
2271 /* V4T Thumb -> ARM long branch stub, PIC. */
2272 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2273 {
2274 THUMB16_INSN(0x4778), /* bx pc */
2275 THUMB16_INSN(0x46c0), /* nop */
2276 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2277 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2278 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2279 };
2280
2281 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2282 architectures. */
2283 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2284 {
2285 THUMB16_INSN(0xb401), /* push {r0} */
2286 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2287 THUMB16_INSN(0x46fc), /* mov ip, pc */
2288 THUMB16_INSN(0x4484), /* add ip, r0 */
2289 THUMB16_INSN(0xbc01), /* pop {r0} */
2290 THUMB16_INSN(0x4760), /* bx ip */
2291 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2292 };
2293
2294 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2295 allowed. */
2296 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2297 {
2298 THUMB16_INSN(0x4778), /* bx pc */
2299 THUMB16_INSN(0x46c0), /* nop */
2300 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2301 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2302 ARM_INSN(0xe12fff1c), /* bx ip */
2303 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2304 };
2305
2306 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2307 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2308 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2309 {
2310 ARM_INSN(0xe59f1000), /* ldr r1, [pc] */
2311 ARM_INSN(0xe08ff001), /* add pc, pc, r1 */
2312 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2313 };
2314
2315 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2316 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2317 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2318 {
2319 THUMB16_INSN(0x4778), /* bx pc */
2320 THUMB16_INSN(0x46c0), /* nop */
2321 ARM_INSN(0xe59f1000), /* ldr r1, [pc, #0] */
2322 ARM_INSN(0xe081f00f), /* add pc, r1, pc */
2323 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2324 };
2325
2326 /* Cortex-A8 erratum-workaround stubs. */
2327
2328 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2329 can't use a conditional branch to reach this stub). */
2330
2331 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2332 {
2333 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2334 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2335 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2336 };
2337
2338 /* Stub used for b.w and bl.w instructions. */
2339
2340 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2341 {
2342 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2343 };
2344
2345 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2346 {
2347 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2348 };
2349
2350 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2351 instruction (which switches to ARM mode) to point to this stub. Jump to the
2352 real destination using an ARM-mode branch. */
2353
2354 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2355 {
2356 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2357 };
2358
2359 /* For each section group there can be a specially created linker section
2360 to hold the stubs for that group. The name of the stub section is based
2361 upon the name of another section within that group with the suffix below
2362 applied.
2363
2364 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2365 create what appeared to be a linker stub section when it actually
2366 contained user code/data. For example, consider this fragment:
2367
2368 const char * stubborn_problems[] = { "np" };
2369
2370 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2371 section called:
2372
2373 .data.rel.local.stubborn_problems
2374
2375 This then causes problems in arm32_arm_build_stubs() as it triggers:
2376
2377 // Ignore non-stub sections.
2378 if (!strstr (stub_sec->name, STUB_SUFFIX))
2379 continue;
2380
2381 And so the section would be ignored instead of being processed. Hence
2382 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2383 C identifier. */
2384 #define STUB_SUFFIX ".__stub"
2385
2386 /* One entry per long/short branch stub defined above. */
2387 #define DEF_STUBS \
2388 DEF_STUB(long_branch_any_any) \
2389 DEF_STUB(long_branch_v4t_arm_thumb) \
2390 DEF_STUB(long_branch_thumb_only) \
2391 DEF_STUB(long_branch_v4t_thumb_thumb) \
2392 DEF_STUB(long_branch_v4t_thumb_arm) \
2393 DEF_STUB(short_branch_v4t_thumb_arm) \
2394 DEF_STUB(long_branch_any_arm_pic) \
2395 DEF_STUB(long_branch_any_thumb_pic) \
2396 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2397 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2398 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2399 DEF_STUB(long_branch_thumb_only_pic) \
2400 DEF_STUB(long_branch_any_tls_pic) \
2401 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2402 DEF_STUB(a8_veneer_b_cond) \
2403 DEF_STUB(a8_veneer_b) \
2404 DEF_STUB(a8_veneer_bl) \
2405 DEF_STUB(a8_veneer_blx)
2406
2407 #define DEF_STUB(x) arm_stub_##x,
2408 enum elf32_arm_stub_type {
2409 arm_stub_none,
2410 DEF_STUBS
2411 /* Note the first a8_veneer type */
2412 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
2413 };
2414 #undef DEF_STUB
2415
2416 typedef struct
2417 {
2418 const insn_sequence* template_sequence;
2419 int template_size;
2420 } stub_def;
2421
2422 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2423 static const stub_def stub_definitions[] = {
2424 {NULL, 0},
2425 DEF_STUBS
2426 };
2427
2428 struct elf32_arm_stub_hash_entry
2429 {
2430 /* Base hash table entry structure. */
2431 struct bfd_hash_entry root;
2432
2433 /* The stub section. */
2434 asection *stub_sec;
2435
2436 /* Offset within stub_sec of the beginning of this stub. */
2437 bfd_vma stub_offset;
2438
2439 /* Given the symbol's value and its section we can determine its final
2440 value when building the stubs (so the stub knows where to jump). */
2441 bfd_vma target_value;
2442 asection *target_section;
2443
2444 /* Offset to apply to relocation referencing target_value. */
2445 bfd_vma target_addend;
2446
2447 /* The instruction which caused this stub to be generated (only valid for
2448 Cortex-A8 erratum workaround stubs at present). */
2449 unsigned long orig_insn;
2450
2451 /* The stub type. */
2452 enum elf32_arm_stub_type stub_type;
2453 /* Its encoding size in bytes. */
2454 int stub_size;
2455 /* Its template. */
2456 const insn_sequence *stub_template;
2457 /* The size of the template (number of entries). */
2458 int stub_template_size;
2459
2460 /* The symbol table entry, if any, that this was derived from. */
2461 struct elf32_arm_link_hash_entry *h;
2462
2463 /* Type of branch. */
2464 enum arm_st_branch_type branch_type;
2465
2466 /* Where this stub is being called from, or, in the case of combined
2467 stub sections, the first input section in the group. */
2468 asection *id_sec;
2469
2470 /* The name for the local symbol at the start of this stub. The
2471 stub name in the hash table has to be unique; this does not, so
2472 it can be friendlier. */
2473 char *output_name;
2474 };
2475
2476 /* Used to build a map of a section. This is required for mixed-endian
2477 code/data. */
2478
2479 typedef struct elf32_elf_section_map
2480 {
2481 bfd_vma vma;
2482 char type;
2483 }
2484 elf32_arm_section_map;
2485
2486 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2487
2488 typedef enum
2489 {
2490 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2491 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2492 VFP11_ERRATUM_ARM_VENEER,
2493 VFP11_ERRATUM_THUMB_VENEER
2494 }
2495 elf32_vfp11_erratum_type;
2496
2497 typedef struct elf32_vfp11_erratum_list
2498 {
2499 struct elf32_vfp11_erratum_list *next;
2500 bfd_vma vma;
2501 union
2502 {
2503 struct
2504 {
2505 struct elf32_vfp11_erratum_list *veneer;
2506 unsigned int vfp_insn;
2507 } b;
2508 struct
2509 {
2510 struct elf32_vfp11_erratum_list *branch;
2511 unsigned int id;
2512 } v;
2513 } u;
2514 elf32_vfp11_erratum_type type;
2515 }
2516 elf32_vfp11_erratum_list;
2517
2518 typedef enum
2519 {
2520 DELETE_EXIDX_ENTRY,
2521 INSERT_EXIDX_CANTUNWIND_AT_END
2522 }
2523 arm_unwind_edit_type;
2524
2525 /* A (sorted) list of edits to apply to an unwind table. */
2526 typedef struct arm_unwind_table_edit
2527 {
2528 arm_unwind_edit_type type;
2529 /* Note: we sometimes want to insert an unwind entry corresponding to a
2530 section different from the one we're currently writing out, so record the
2531 (text) section this edit relates to here. */
2532 asection *linked_section;
2533 unsigned int index;
2534 struct arm_unwind_table_edit *next;
2535 }
2536 arm_unwind_table_edit;
2537
2538 typedef struct _arm_elf_section_data
2539 {
2540 /* Information about mapping symbols. */
2541 struct bfd_elf_section_data elf;
2542 unsigned int mapcount;
2543 unsigned int mapsize;
2544 elf32_arm_section_map *map;
2545 /* Information about CPU errata. */
2546 unsigned int erratumcount;
2547 elf32_vfp11_erratum_list *erratumlist;
2548 /* Information about unwind tables. */
2549 union
2550 {
2551 /* Unwind info attached to a text section. */
2552 struct
2553 {
2554 asection *arm_exidx_sec;
2555 } text;
2556
2557 /* Unwind info attached to an .ARM.exidx section. */
2558 struct
2559 {
2560 arm_unwind_table_edit *unwind_edit_list;
2561 arm_unwind_table_edit *unwind_edit_tail;
2562 } exidx;
2563 } u;
2564 }
2565 _arm_elf_section_data;
2566
2567 #define elf32_arm_section_data(sec) \
2568 ((_arm_elf_section_data *) elf_section_data (sec))
2569
2570 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2571 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2572 so may be created multiple times: we use an array of these entries whilst
2573 relaxing which we can refresh easily, then create stubs for each potentially
2574 erratum-triggering instruction once we've settled on a solution. */
2575
2576 struct a8_erratum_fix {
2577 bfd *input_bfd;
2578 asection *section;
2579 bfd_vma offset;
2580 bfd_vma addend;
2581 unsigned long orig_insn;
2582 char *stub_name;
2583 enum elf32_arm_stub_type stub_type;
2584 enum arm_st_branch_type branch_type;
2585 };
2586
2587 /* A table of relocs applied to branches which might trigger Cortex-A8
2588 erratum. */
2589
2590 struct a8_erratum_reloc {
2591 bfd_vma from;
2592 bfd_vma destination;
2593 struct elf32_arm_link_hash_entry *hash;
2594 const char *sym_name;
2595 unsigned int r_type;
2596 enum arm_st_branch_type branch_type;
2597 bfd_boolean non_a8_stub;
2598 };
2599
2600 /* The size of the thread control block. */
2601 #define TCB_SIZE 8
2602
2603 /* ARM-specific information about a PLT entry, over and above the usual
2604 gotplt_union. */
2605 struct arm_plt_info {
2606 /* We reference count Thumb references to a PLT entry separately,
2607 so that we can emit the Thumb trampoline only if needed. */
2608 bfd_signed_vma thumb_refcount;
2609
2610 /* Some references from Thumb code may be eliminated by BL->BLX
2611 conversion, so record them separately. */
2612 bfd_signed_vma maybe_thumb_refcount;
2613
2614 /* How many of the recorded PLT accesses were from non-call relocations.
2615 This information is useful when deciding whether anything takes the
2616 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2617 non-call references to the function should resolve directly to the
2618 real runtime target. */
2619 unsigned int noncall_refcount;
2620
2621 /* Since PLT entries have variable size if the Thumb prologue is
2622 used, we need to record the index into .got.plt instead of
2623 recomputing it from the PLT offset. */
2624 bfd_signed_vma got_offset;
2625 };
2626
2627 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2628 struct arm_local_iplt_info {
2629 /* The information that is usually found in the generic ELF part of
2630 the hash table entry. */
2631 union gotplt_union root;
2632
2633 /* The information that is usually found in the ARM-specific part of
2634 the hash table entry. */
2635 struct arm_plt_info arm;
2636
2637 /* A list of all potential dynamic relocations against this symbol. */
2638 struct elf_dyn_relocs *dyn_relocs;
2639 };
2640
2641 struct elf_arm_obj_tdata
2642 {
2643 struct elf_obj_tdata root;
2644
2645 /* tls_type for each local got entry. */
2646 char *local_got_tls_type;
2647
2648 /* GOTPLT entries for TLS descriptors. */
2649 bfd_vma *local_tlsdesc_gotent;
2650
2651 /* Information for local symbols that need entries in .iplt. */
2652 struct arm_local_iplt_info **local_iplt;
2653
2654 /* Zero to warn when linking objects with incompatible enum sizes. */
2655 int no_enum_size_warning;
2656
2657 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2658 int no_wchar_size_warning;
2659 };
2660
2661 #define elf_arm_tdata(bfd) \
2662 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2663
2664 #define elf32_arm_local_got_tls_type(bfd) \
2665 (elf_arm_tdata (bfd)->local_got_tls_type)
2666
2667 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2668 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2669
2670 #define elf32_arm_local_iplt(bfd) \
2671 (elf_arm_tdata (bfd)->local_iplt)
2672
2673 #define is_arm_elf(bfd) \
2674 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2675 && elf_tdata (bfd) != NULL \
2676 && elf_object_id (bfd) == ARM_ELF_DATA)
2677
2678 static bfd_boolean
2679 elf32_arm_mkobject (bfd *abfd)
2680 {
2681 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2682 ARM_ELF_DATA);
2683 }
2684
2685 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2686
2687 /* Arm ELF linker hash entry. */
2688 struct elf32_arm_link_hash_entry
2689 {
2690 struct elf_link_hash_entry root;
2691
2692 /* Track dynamic relocs copied for this symbol. */
2693 struct elf_dyn_relocs *dyn_relocs;
2694
2695 /* ARM-specific PLT information. */
2696 struct arm_plt_info plt;
2697
2698 #define GOT_UNKNOWN 0
2699 #define GOT_NORMAL 1
2700 #define GOT_TLS_GD 2
2701 #define GOT_TLS_IE 4
2702 #define GOT_TLS_GDESC 8
2703 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2704 unsigned int tls_type : 8;
2705
2706 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2707 unsigned int is_iplt : 1;
2708
2709 unsigned int unused : 23;
2710
2711 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2712 starting at the end of the jump table. */
2713 bfd_vma tlsdesc_got;
2714
2715 /* The symbol marking the real symbol location for exported thumb
2716 symbols with Arm stubs. */
2717 struct elf_link_hash_entry *export_glue;
2718
2719 /* A pointer to the most recently used stub hash entry against this
2720 symbol. */
2721 struct elf32_arm_stub_hash_entry *stub_cache;
2722 };
2723
2724 /* Traverse an arm ELF linker hash table. */
2725 #define elf32_arm_link_hash_traverse(table, func, info) \
2726 (elf_link_hash_traverse \
2727 (&(table)->root, \
2728 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2729 (info)))
2730
2731 /* Get the ARM elf linker hash table from a link_info structure. */
2732 #define elf32_arm_hash_table(info) \
2733 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2734 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2735
2736 #define arm_stub_hash_lookup(table, string, create, copy) \
2737 ((struct elf32_arm_stub_hash_entry *) \
2738 bfd_hash_lookup ((table), (string), (create), (copy)))
2739
2740 /* Array to keep track of which stub sections have been created, and
2741 information on stub grouping. */
2742 struct map_stub
2743 {
2744 /* This is the section to which stubs in the group will be
2745 attached. */
2746 asection *link_sec;
2747 /* The stub section. */
2748 asection *stub_sec;
2749 };
2750
2751 #define elf32_arm_compute_jump_table_size(htab) \
2752 ((htab)->next_tls_desc_index * 4)
2753
2754 /* ARM ELF linker hash table. */
2755 struct elf32_arm_link_hash_table
2756 {
2757 /* The main hash table. */
2758 struct elf_link_hash_table root;
2759
2760 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2761 bfd_size_type thumb_glue_size;
2762
2763 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2764 bfd_size_type arm_glue_size;
2765
2766 /* The size in bytes of section containing the ARMv4 BX veneers. */
2767 bfd_size_type bx_glue_size;
2768
2769 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2770 veneer has been populated. */
2771 bfd_vma bx_glue_offset[15];
2772
2773 /* The size in bytes of the section containing glue for VFP11 erratum
2774 veneers. */
2775 bfd_size_type vfp11_erratum_glue_size;
2776
2777 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2778 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2779 elf32_arm_write_section(). */
2780 struct a8_erratum_fix *a8_erratum_fixes;
2781 unsigned int num_a8_erratum_fixes;
2782
2783 /* An arbitrary input BFD chosen to hold the glue sections. */
2784 bfd * bfd_of_glue_owner;
2785
2786 /* Nonzero to output a BE8 image. */
2787 int byteswap_code;
2788
2789 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2790 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2791 int target1_is_rel;
2792
2793 /* The relocation to use for R_ARM_TARGET2 relocations. */
2794 int target2_reloc;
2795
2796 /* 0 = Ignore R_ARM_V4BX.
2797 1 = Convert BX to MOV PC.
2798 2 = Generate v4 interworing stubs. */
2799 int fix_v4bx;
2800
2801 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2802 int fix_cortex_a8;
2803
2804 /* Whether we should fix the ARM1176 BLX immediate issue. */
2805 int fix_arm1176;
2806
2807 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2808 int use_blx;
2809
2810 /* What sort of code sequences we should look for which may trigger the
2811 VFP11 denorm erratum. */
2812 bfd_arm_vfp11_fix vfp11_fix;
2813
2814 /* Global counter for the number of fixes we have emitted. */
2815 int num_vfp11_fixes;
2816
2817 /* Nonzero to force PIC branch veneers. */
2818 int pic_veneer;
2819
2820 /* The number of bytes in the initial entry in the PLT. */
2821 bfd_size_type plt_header_size;
2822
2823 /* The number of bytes in the subsequent PLT etries. */
2824 bfd_size_type plt_entry_size;
2825
2826 /* True if the target system is VxWorks. */
2827 int vxworks_p;
2828
2829 /* True if the target system is Symbian OS. */
2830 int symbian_p;
2831
2832 /* True if the target uses REL relocations. */
2833 int use_rel;
2834
2835 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2836 bfd_vma next_tls_desc_index;
2837
2838 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2839 bfd_vma num_tls_desc;
2840
2841 /* Short-cuts to get to dynamic linker sections. */
2842 asection *sdynbss;
2843 asection *srelbss;
2844
2845 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2846 asection *srelplt2;
2847
2848 /* The offset into splt of the PLT entry for the TLS descriptor
2849 resolver. Special values are 0, if not necessary (or not found
2850 to be necessary yet), and -1 if needed but not determined
2851 yet. */
2852 bfd_vma dt_tlsdesc_plt;
2853
2854 /* The offset into sgot of the GOT entry used by the PLT entry
2855 above. */
2856 bfd_vma dt_tlsdesc_got;
2857
2858 /* Offset in .plt section of tls_arm_trampoline. */
2859 bfd_vma tls_trampoline;
2860
2861 /* Data for R_ARM_TLS_LDM32 relocations. */
2862 union
2863 {
2864 bfd_signed_vma refcount;
2865 bfd_vma offset;
2866 } tls_ldm_got;
2867
2868 /* Small local sym cache. */
2869 struct sym_cache sym_cache;
2870
2871 /* For convenience in allocate_dynrelocs. */
2872 bfd * obfd;
2873
2874 /* The amount of space used by the reserved portion of the sgotplt
2875 section, plus whatever space is used by the jump slots. */
2876 bfd_vma sgotplt_jump_table_size;
2877
2878 /* The stub hash table. */
2879 struct bfd_hash_table stub_hash_table;
2880
2881 /* Linker stub bfd. */
2882 bfd *stub_bfd;
2883
2884 /* Linker call-backs. */
2885 asection * (*add_stub_section) (const char *, asection *);
2886 void (*layout_sections_again) (void);
2887
2888 /* Array to keep track of which stub sections have been created, and
2889 information on stub grouping. */
2890 struct map_stub *stub_group;
2891
2892 /* Number of elements in stub_group. */
2893 int top_id;
2894
2895 /* Assorted information used by elf32_arm_size_stubs. */
2896 unsigned int bfd_count;
2897 int top_index;
2898 asection **input_list;
2899 };
2900
2901 /* Create an entry in an ARM ELF linker hash table. */
2902
2903 static struct bfd_hash_entry *
2904 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2905 struct bfd_hash_table * table,
2906 const char * string)
2907 {
2908 struct elf32_arm_link_hash_entry * ret =
2909 (struct elf32_arm_link_hash_entry *) entry;
2910
2911 /* Allocate the structure if it has not already been allocated by a
2912 subclass. */
2913 if (ret == NULL)
2914 ret = (struct elf32_arm_link_hash_entry *)
2915 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2916 if (ret == NULL)
2917 return (struct bfd_hash_entry *) ret;
2918
2919 /* Call the allocation method of the superclass. */
2920 ret = ((struct elf32_arm_link_hash_entry *)
2921 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2922 table, string));
2923 if (ret != NULL)
2924 {
2925 ret->dyn_relocs = NULL;
2926 ret->tls_type = GOT_UNKNOWN;
2927 ret->tlsdesc_got = (bfd_vma) -1;
2928 ret->plt.thumb_refcount = 0;
2929 ret->plt.maybe_thumb_refcount = 0;
2930 ret->plt.noncall_refcount = 0;
2931 ret->plt.got_offset = -1;
2932 ret->is_iplt = FALSE;
2933 ret->export_glue = NULL;
2934
2935 ret->stub_cache = NULL;
2936 }
2937
2938 return (struct bfd_hash_entry *) ret;
2939 }
2940
2941 /* Ensure that we have allocated bookkeeping structures for ABFD's local
2942 symbols. */
2943
2944 static bfd_boolean
2945 elf32_arm_allocate_local_sym_info (bfd *abfd)
2946 {
2947 if (elf_local_got_refcounts (abfd) == NULL)
2948 {
2949 bfd_size_type num_syms;
2950 bfd_size_type size;
2951 char *data;
2952
2953 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
2954 size = num_syms * (sizeof (bfd_signed_vma)
2955 + sizeof (struct arm_local_iplt_info *)
2956 + sizeof (bfd_vma)
2957 + sizeof (char));
2958 data = bfd_zalloc (abfd, size);
2959 if (data == NULL)
2960 return FALSE;
2961
2962 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
2963 data += num_syms * sizeof (bfd_signed_vma);
2964
2965 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
2966 data += num_syms * sizeof (struct arm_local_iplt_info *);
2967
2968 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
2969 data += num_syms * sizeof (bfd_vma);
2970
2971 elf32_arm_local_got_tls_type (abfd) = data;
2972 }
2973 return TRUE;
2974 }
2975
2976 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
2977 to input bfd ABFD. Create the information if it doesn't already exist.
2978 Return null if an allocation fails. */
2979
2980 static struct arm_local_iplt_info *
2981 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
2982 {
2983 struct arm_local_iplt_info **ptr;
2984
2985 if (!elf32_arm_allocate_local_sym_info (abfd))
2986 return NULL;
2987
2988 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
2989 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
2990 if (*ptr == NULL)
2991 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
2992 return *ptr;
2993 }
2994
2995 /* Try to obtain PLT information for the symbol with index R_SYMNDX
2996 in ABFD's symbol table. If the symbol is global, H points to its
2997 hash table entry, otherwise H is null.
2998
2999 Return true if the symbol does have PLT information. When returning
3000 true, point *ROOT_PLT at the target-independent reference count/offset
3001 union and *ARM_PLT at the ARM-specific information. */
3002
3003 static bfd_boolean
3004 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3005 unsigned long r_symndx, union gotplt_union **root_plt,
3006 struct arm_plt_info **arm_plt)
3007 {
3008 struct arm_local_iplt_info *local_iplt;
3009
3010 if (h != NULL)
3011 {
3012 *root_plt = &h->root.plt;
3013 *arm_plt = &h->plt;
3014 return TRUE;
3015 }
3016
3017 if (elf32_arm_local_iplt (abfd) == NULL)
3018 return FALSE;
3019
3020 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3021 if (local_iplt == NULL)
3022 return FALSE;
3023
3024 *root_plt = &local_iplt->root;
3025 *arm_plt = &local_iplt->arm;
3026 return TRUE;
3027 }
3028
3029 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3030 before it. */
3031
3032 static bfd_boolean
3033 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3034 struct arm_plt_info *arm_plt)
3035 {
3036 struct elf32_arm_link_hash_table *htab;
3037
3038 htab = elf32_arm_hash_table (info);
3039 return (arm_plt->thumb_refcount != 0
3040 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3041 }
3042
3043 /* Return a pointer to the head of the dynamic reloc list that should
3044 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3045 ABFD's symbol table. Return null if an error occurs. */
3046
3047 static struct elf_dyn_relocs **
3048 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3049 Elf_Internal_Sym *isym)
3050 {
3051 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3052 {
3053 struct arm_local_iplt_info *local_iplt;
3054
3055 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3056 if (local_iplt == NULL)
3057 return NULL;
3058 return &local_iplt->dyn_relocs;
3059 }
3060 else
3061 {
3062 /* Track dynamic relocs needed for local syms too.
3063 We really need local syms available to do this
3064 easily. Oh well. */
3065 asection *s;
3066 void *vpp;
3067
3068 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3069 if (s == NULL)
3070 abort ();
3071
3072 vpp = &elf_section_data (s)->local_dynrel;
3073 return (struct elf_dyn_relocs **) vpp;
3074 }
3075 }
3076
3077 /* Initialize an entry in the stub hash table. */
3078
3079 static struct bfd_hash_entry *
3080 stub_hash_newfunc (struct bfd_hash_entry *entry,
3081 struct bfd_hash_table *table,
3082 const char *string)
3083 {
3084 /* Allocate the structure if it has not already been allocated by a
3085 subclass. */
3086 if (entry == NULL)
3087 {
3088 entry = (struct bfd_hash_entry *)
3089 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3090 if (entry == NULL)
3091 return entry;
3092 }
3093
3094 /* Call the allocation method of the superclass. */
3095 entry = bfd_hash_newfunc (entry, table, string);
3096 if (entry != NULL)
3097 {
3098 struct elf32_arm_stub_hash_entry *eh;
3099
3100 /* Initialize the local fields. */
3101 eh = (struct elf32_arm_stub_hash_entry *) entry;
3102 eh->stub_sec = NULL;
3103 eh->stub_offset = 0;
3104 eh->target_value = 0;
3105 eh->target_section = NULL;
3106 eh->target_addend = 0;
3107 eh->orig_insn = 0;
3108 eh->stub_type = arm_stub_none;
3109 eh->stub_size = 0;
3110 eh->stub_template = NULL;
3111 eh->stub_template_size = 0;
3112 eh->h = NULL;
3113 eh->id_sec = NULL;
3114 eh->output_name = NULL;
3115 }
3116
3117 return entry;
3118 }
3119
3120 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3121 shortcuts to them in our hash table. */
3122
3123 static bfd_boolean
3124 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3125 {
3126 struct elf32_arm_link_hash_table *htab;
3127
3128 htab = elf32_arm_hash_table (info);
3129 if (htab == NULL)
3130 return FALSE;
3131
3132 /* BPABI objects never have a GOT, or associated sections. */
3133 if (htab->symbian_p)
3134 return TRUE;
3135
3136 if (! _bfd_elf_create_got_section (dynobj, info))
3137 return FALSE;
3138
3139 return TRUE;
3140 }
3141
3142 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3143
3144 static bfd_boolean
3145 create_ifunc_sections (struct bfd_link_info *info)
3146 {
3147 struct elf32_arm_link_hash_table *htab;
3148 const struct elf_backend_data *bed;
3149 bfd *dynobj;
3150 asection *s;
3151 flagword flags;
3152
3153 htab = elf32_arm_hash_table (info);
3154 dynobj = htab->root.dynobj;
3155 bed = get_elf_backend_data (dynobj);
3156 flags = bed->dynamic_sec_flags;
3157
3158 if (htab->root.iplt == NULL)
3159 {
3160 s = bfd_make_section_with_flags (dynobj, ".iplt",
3161 flags | SEC_READONLY | SEC_CODE);
3162 if (s == NULL
3163 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3164 return FALSE;
3165 htab->root.iplt = s;
3166 }
3167
3168 if (htab->root.irelplt == NULL)
3169 {
3170 s = bfd_make_section_with_flags (dynobj, RELOC_SECTION (htab, ".iplt"),
3171 flags | SEC_READONLY);
3172 if (s == NULL
3173 || !bfd_set_section_alignment (abfd, s, bed->s->log_file_align))
3174 return FALSE;
3175 htab->root.irelplt = s;
3176 }
3177
3178 if (htab->root.igotplt == NULL)
3179 {
3180 s = bfd_make_section_with_flags (dynobj, ".igot.plt", flags);
3181 if (s == NULL
3182 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3183 return FALSE;
3184 htab->root.igotplt = s;
3185 }
3186 return TRUE;
3187 }
3188
3189 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3190 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3191 hash table. */
3192
3193 static bfd_boolean
3194 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3195 {
3196 struct elf32_arm_link_hash_table *htab;
3197
3198 htab = elf32_arm_hash_table (info);
3199 if (htab == NULL)
3200 return FALSE;
3201
3202 if (!htab->root.sgot && !create_got_section (dynobj, info))
3203 return FALSE;
3204
3205 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3206 return FALSE;
3207
3208 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
3209 if (!info->shared)
3210 htab->srelbss = bfd_get_section_by_name (dynobj,
3211 RELOC_SECTION (htab, ".bss"));
3212
3213 if (htab->vxworks_p)
3214 {
3215 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3216 return FALSE;
3217
3218 if (info->shared)
3219 {
3220 htab->plt_header_size = 0;
3221 htab->plt_entry_size
3222 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3223 }
3224 else
3225 {
3226 htab->plt_header_size
3227 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3228 htab->plt_entry_size
3229 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3230 }
3231 }
3232
3233 if (!htab->root.splt
3234 || !htab->root.srelplt
3235 || !htab->sdynbss
3236 || (!info->shared && !htab->srelbss))
3237 abort ();
3238
3239 return TRUE;
3240 }
3241
3242 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3243
3244 static void
3245 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3246 struct elf_link_hash_entry *dir,
3247 struct elf_link_hash_entry *ind)
3248 {
3249 struct elf32_arm_link_hash_entry *edir, *eind;
3250
3251 edir = (struct elf32_arm_link_hash_entry *) dir;
3252 eind = (struct elf32_arm_link_hash_entry *) ind;
3253
3254 if (eind->dyn_relocs != NULL)
3255 {
3256 if (edir->dyn_relocs != NULL)
3257 {
3258 struct elf_dyn_relocs **pp;
3259 struct elf_dyn_relocs *p;
3260
3261 /* Add reloc counts against the indirect sym to the direct sym
3262 list. Merge any entries against the same section. */
3263 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3264 {
3265 struct elf_dyn_relocs *q;
3266
3267 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3268 if (q->sec == p->sec)
3269 {
3270 q->pc_count += p->pc_count;
3271 q->count += p->count;
3272 *pp = p->next;
3273 break;
3274 }
3275 if (q == NULL)
3276 pp = &p->next;
3277 }
3278 *pp = edir->dyn_relocs;
3279 }
3280
3281 edir->dyn_relocs = eind->dyn_relocs;
3282 eind->dyn_relocs = NULL;
3283 }
3284
3285 if (ind->root.type == bfd_link_hash_indirect)
3286 {
3287 /* Copy over PLT info. */
3288 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3289 eind->plt.thumb_refcount = 0;
3290 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3291 eind->plt.maybe_thumb_refcount = 0;
3292 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3293 eind->plt.noncall_refcount = 0;
3294
3295 /* We should only allocate a function to .iplt once the final
3296 symbol information is known. */
3297 BFD_ASSERT (!eind->is_iplt);
3298
3299 if (dir->got.refcount <= 0)
3300 {
3301 edir->tls_type = eind->tls_type;
3302 eind->tls_type = GOT_UNKNOWN;
3303 }
3304 }
3305
3306 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3307 }
3308
3309 /* Create an ARM elf linker hash table. */
3310
3311 static struct bfd_link_hash_table *
3312 elf32_arm_link_hash_table_create (bfd *abfd)
3313 {
3314 struct elf32_arm_link_hash_table *ret;
3315 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3316
3317 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
3318 if (ret == NULL)
3319 return NULL;
3320
3321 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3322 elf32_arm_link_hash_newfunc,
3323 sizeof (struct elf32_arm_link_hash_entry),
3324 ARM_ELF_DATA))
3325 {
3326 free (ret);
3327 return NULL;
3328 }
3329
3330 ret->sdynbss = NULL;
3331 ret->srelbss = NULL;
3332 ret->srelplt2 = NULL;
3333 ret->dt_tlsdesc_plt = 0;
3334 ret->dt_tlsdesc_got = 0;
3335 ret->tls_trampoline = 0;
3336 ret->next_tls_desc_index = 0;
3337 ret->num_tls_desc = 0;
3338 ret->thumb_glue_size = 0;
3339 ret->arm_glue_size = 0;
3340 ret->bx_glue_size = 0;
3341 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
3342 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3343 ret->vfp11_erratum_glue_size = 0;
3344 ret->num_vfp11_fixes = 0;
3345 ret->fix_cortex_a8 = 0;
3346 ret->fix_arm1176 = 0;
3347 ret->bfd_of_glue_owner = NULL;
3348 ret->byteswap_code = 0;
3349 ret->target1_is_rel = 0;
3350 ret->target2_reloc = R_ARM_NONE;
3351 #ifdef FOUR_WORD_PLT
3352 ret->plt_header_size = 16;
3353 ret->plt_entry_size = 16;
3354 #else
3355 ret->plt_header_size = 20;
3356 ret->plt_entry_size = 12;
3357 #endif
3358 ret->fix_v4bx = 0;
3359 ret->use_blx = 0;
3360 ret->vxworks_p = 0;
3361 ret->symbian_p = 0;
3362 ret->use_rel = 1;
3363 ret->sym_cache.abfd = NULL;
3364 ret->obfd = abfd;
3365 ret->tls_ldm_got.refcount = 0;
3366 ret->stub_bfd = NULL;
3367 ret->add_stub_section = NULL;
3368 ret->layout_sections_again = NULL;
3369 ret->stub_group = NULL;
3370 ret->top_id = 0;
3371 ret->bfd_count = 0;
3372 ret->top_index = 0;
3373 ret->input_list = NULL;
3374
3375 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3376 sizeof (struct elf32_arm_stub_hash_entry)))
3377 {
3378 free (ret);
3379 return NULL;
3380 }
3381
3382 return &ret->root.root;
3383 }
3384
3385 /* Free the derived linker hash table. */
3386
3387 static void
3388 elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3389 {
3390 struct elf32_arm_link_hash_table *ret
3391 = (struct elf32_arm_link_hash_table *) hash;
3392
3393 bfd_hash_table_free (&ret->stub_hash_table);
3394 _bfd_generic_link_hash_table_free (hash);
3395 }
3396
3397 /* Determine if we're dealing with a Thumb only architecture. */
3398
3399 static bfd_boolean
3400 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3401 {
3402 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3403 Tag_CPU_arch);
3404 int profile;
3405
3406 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3407 return TRUE;
3408
3409 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3410 return FALSE;
3411
3412 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3413 Tag_CPU_arch_profile);
3414
3415 return profile == 'M';
3416 }
3417
3418 /* Determine if we're dealing with a Thumb-2 object. */
3419
3420 static bfd_boolean
3421 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3422 {
3423 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3424 Tag_CPU_arch);
3425 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3426 }
3427
3428 /* Determine what kind of NOPs are available. */
3429
3430 static bfd_boolean
3431 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3432 {
3433 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3434 Tag_CPU_arch);
3435 return arch == TAG_CPU_ARCH_V6T2
3436 || arch == TAG_CPU_ARCH_V6K
3437 || arch == TAG_CPU_ARCH_V7
3438 || arch == TAG_CPU_ARCH_V7E_M;
3439 }
3440
3441 static bfd_boolean
3442 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3443 {
3444 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3445 Tag_CPU_arch);
3446 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3447 || arch == TAG_CPU_ARCH_V7E_M);
3448 }
3449
3450 static bfd_boolean
3451 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3452 {
3453 switch (stub_type)
3454 {
3455 case arm_stub_long_branch_thumb_only:
3456 case arm_stub_long_branch_v4t_thumb_arm:
3457 case arm_stub_short_branch_v4t_thumb_arm:
3458 case arm_stub_long_branch_v4t_thumb_arm_pic:
3459 case arm_stub_long_branch_v4t_thumb_tls_pic:
3460 case arm_stub_long_branch_thumb_only_pic:
3461 return TRUE;
3462 case arm_stub_none:
3463 BFD_FAIL ();
3464 return FALSE;
3465 break;
3466 default:
3467 return FALSE;
3468 }
3469 }
3470
3471 /* Determine the type of stub needed, if any, for a call. */
3472
3473 static enum elf32_arm_stub_type
3474 arm_type_of_stub (struct bfd_link_info *info,
3475 asection *input_sec,
3476 const Elf_Internal_Rela *rel,
3477 unsigned char st_type,
3478 enum arm_st_branch_type *actual_branch_type,
3479 struct elf32_arm_link_hash_entry *hash,
3480 bfd_vma destination,
3481 asection *sym_sec,
3482 bfd *input_bfd,
3483 const char *name)
3484 {
3485 bfd_vma location;
3486 bfd_signed_vma branch_offset;
3487 unsigned int r_type;
3488 struct elf32_arm_link_hash_table * globals;
3489 int thumb2;
3490 int thumb_only;
3491 enum elf32_arm_stub_type stub_type = arm_stub_none;
3492 int use_plt = 0;
3493 enum arm_st_branch_type branch_type = *actual_branch_type;
3494 union gotplt_union *root_plt;
3495 struct arm_plt_info *arm_plt;
3496
3497 if (branch_type == ST_BRANCH_LONG)
3498 return stub_type;
3499
3500 globals = elf32_arm_hash_table (info);
3501 if (globals == NULL)
3502 return stub_type;
3503
3504 thumb_only = using_thumb_only (globals);
3505
3506 thumb2 = using_thumb2 (globals);
3507
3508 /* Determine where the call point is. */
3509 location = (input_sec->output_offset
3510 + input_sec->output_section->vma
3511 + rel->r_offset);
3512
3513 r_type = ELF32_R_TYPE (rel->r_info);
3514
3515 /* For TLS call relocs, it is the caller's responsibility to provide
3516 the address of the appropriate trampoline. */
3517 if (r_type != R_ARM_TLS_CALL
3518 && r_type != R_ARM_THM_TLS_CALL
3519 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3520 &root_plt, &arm_plt)
3521 && root_plt->offset != (bfd_vma) -1)
3522 {
3523 asection *splt;
3524
3525 if (hash == NULL || hash->is_iplt)
3526 splt = globals->root.iplt;
3527 else
3528 splt = globals->root.splt;
3529 if (splt != NULL)
3530 {
3531 use_plt = 1;
3532
3533 /* Note when dealing with PLT entries: the main PLT stub is in
3534 ARM mode, so if the branch is in Thumb mode, another
3535 Thumb->ARM stub will be inserted later just before the ARM
3536 PLT stub. We don't take this extra distance into account
3537 here, because if a long branch stub is needed, we'll add a
3538 Thumb->Arm one and branch directly to the ARM PLT entry
3539 because it avoids spreading offset corrections in several
3540 places. */
3541
3542 destination = (splt->output_section->vma
3543 + splt->output_offset
3544 + root_plt->offset);
3545 st_type = STT_FUNC;
3546 branch_type = ST_BRANCH_TO_ARM;
3547 }
3548 }
3549 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3550 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3551
3552 branch_offset = (bfd_signed_vma)(destination - location);
3553
3554 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3555 || r_type == R_ARM_THM_TLS_CALL)
3556 {
3557 /* Handle cases where:
3558 - this call goes too far (different Thumb/Thumb2 max
3559 distance)
3560 - it's a Thumb->Arm call and blx is not available, or it's a
3561 Thumb->Arm branch (not bl). A stub is needed in this case,
3562 but only if this call is not through a PLT entry. Indeed,
3563 PLT stubs handle mode switching already.
3564 */
3565 if ((!thumb2
3566 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3567 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3568 || (thumb2
3569 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3570 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3571 || (branch_type == ST_BRANCH_TO_ARM
3572 && (((r_type == R_ARM_THM_CALL
3573 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3574 || (r_type == R_ARM_THM_JUMP24))
3575 && !use_plt))
3576 {
3577 if (branch_type == ST_BRANCH_TO_THUMB)
3578 {
3579 /* Thumb to thumb. */
3580 if (!thumb_only)
3581 {
3582 stub_type = (info->shared | globals->pic_veneer)
3583 /* PIC stubs. */
3584 ? ((globals->use_blx
3585 && (r_type == R_ARM_THM_CALL))
3586 /* V5T and above. Stub starts with ARM code, so
3587 we must be able to switch mode before
3588 reaching it, which is only possible for 'bl'
3589 (ie R_ARM_THM_CALL relocation). */
3590 ? arm_stub_long_branch_any_thumb_pic
3591 /* On V4T, use Thumb code only. */
3592 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3593
3594 /* non-PIC stubs. */
3595 : ((globals->use_blx
3596 && (r_type == R_ARM_THM_CALL))
3597 /* V5T and above. */
3598 ? arm_stub_long_branch_any_any
3599 /* V4T. */
3600 : arm_stub_long_branch_v4t_thumb_thumb);
3601 }
3602 else
3603 {
3604 stub_type = (info->shared | globals->pic_veneer)
3605 /* PIC stub. */
3606 ? arm_stub_long_branch_thumb_only_pic
3607 /* non-PIC stub. */
3608 : arm_stub_long_branch_thumb_only;
3609 }
3610 }
3611 else
3612 {
3613 /* Thumb to arm. */
3614 if (sym_sec != NULL
3615 && sym_sec->owner != NULL
3616 && !INTERWORK_FLAG (sym_sec->owner))
3617 {
3618 (*_bfd_error_handler)
3619 (_("%B(%s): warning: interworking not enabled.\n"
3620 " first occurrence: %B: Thumb call to ARM"),
3621 sym_sec->owner, input_bfd, name);
3622 }
3623
3624 stub_type =
3625 (info->shared | globals->pic_veneer)
3626 /* PIC stubs. */
3627 ? (r_type == R_ARM_THM_TLS_CALL
3628 /* TLS PIC stubs */
3629 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3630 : arm_stub_long_branch_v4t_thumb_tls_pic)
3631 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3632 /* V5T PIC and above. */
3633 ? arm_stub_long_branch_any_arm_pic
3634 /* V4T PIC stub. */
3635 : arm_stub_long_branch_v4t_thumb_arm_pic))
3636
3637 /* non-PIC stubs. */
3638 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3639 /* V5T and above. */
3640 ? arm_stub_long_branch_any_any
3641 /* V4T. */
3642 : arm_stub_long_branch_v4t_thumb_arm);
3643
3644 /* Handle v4t short branches. */
3645 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3646 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3647 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3648 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3649 }
3650 }
3651 }
3652 else if (r_type == R_ARM_CALL
3653 || r_type == R_ARM_JUMP24
3654 || r_type == R_ARM_PLT32
3655 || r_type == R_ARM_TLS_CALL)
3656 {
3657 if (branch_type == ST_BRANCH_TO_THUMB)
3658 {
3659 /* Arm to thumb. */
3660
3661 if (sym_sec != NULL
3662 && sym_sec->owner != NULL
3663 && !INTERWORK_FLAG (sym_sec->owner))
3664 {
3665 (*_bfd_error_handler)
3666 (_("%B(%s): warning: interworking not enabled.\n"
3667 " first occurrence: %B: ARM call to Thumb"),
3668 sym_sec->owner, input_bfd, name);
3669 }
3670
3671 /* We have an extra 2-bytes reach because of
3672 the mode change (bit 24 (H) of BLX encoding). */
3673 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3674 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3675 || (r_type == R_ARM_CALL && !globals->use_blx)
3676 || (r_type == R_ARM_JUMP24)
3677 || (r_type == R_ARM_PLT32))
3678 {
3679 stub_type = (info->shared | globals->pic_veneer)
3680 /* PIC stubs. */
3681 ? ((globals->use_blx)
3682 /* V5T and above. */
3683 ? arm_stub_long_branch_any_thumb_pic
3684 /* V4T stub. */
3685 : arm_stub_long_branch_v4t_arm_thumb_pic)
3686
3687 /* non-PIC stubs. */
3688 : ((globals->use_blx)
3689 /* V5T and above. */
3690 ? arm_stub_long_branch_any_any
3691 /* V4T. */
3692 : arm_stub_long_branch_v4t_arm_thumb);
3693 }
3694 }
3695 else
3696 {
3697 /* Arm to arm. */
3698 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3699 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3700 {
3701 stub_type =
3702 (info->shared | globals->pic_veneer)
3703 /* PIC stubs. */
3704 ? (r_type == R_ARM_TLS_CALL
3705 /* TLS PIC Stub */
3706 ? arm_stub_long_branch_any_tls_pic
3707 : arm_stub_long_branch_any_arm_pic)
3708 /* non-PIC stubs. */
3709 : arm_stub_long_branch_any_any;
3710 }
3711 }
3712 }
3713
3714 /* If a stub is needed, record the actual destination type. */
3715 if (stub_type != arm_stub_none)
3716 *actual_branch_type = branch_type;
3717
3718 return stub_type;
3719 }
3720
3721 /* Build a name for an entry in the stub hash table. */
3722
3723 static char *
3724 elf32_arm_stub_name (const asection *input_section,
3725 const asection *sym_sec,
3726 const struct elf32_arm_link_hash_entry *hash,
3727 const Elf_Internal_Rela *rel,
3728 enum elf32_arm_stub_type stub_type)
3729 {
3730 char *stub_name;
3731 bfd_size_type len;
3732
3733 if (hash)
3734 {
3735 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
3736 stub_name = (char *) bfd_malloc (len);
3737 if (stub_name != NULL)
3738 sprintf (stub_name, "%08x_%s+%x_%d",
3739 input_section->id & 0xffffffff,
3740 hash->root.root.root.string,
3741 (int) rel->r_addend & 0xffffffff,
3742 (int) stub_type);
3743 }
3744 else
3745 {
3746 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
3747 stub_name = (char *) bfd_malloc (len);
3748 if (stub_name != NULL)
3749 sprintf (stub_name, "%08x_%x:%x+%x_%d",
3750 input_section->id & 0xffffffff,
3751 sym_sec->id & 0xffffffff,
3752 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3753 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3754 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3755 (int) rel->r_addend & 0xffffffff,
3756 (int) stub_type);
3757 }
3758
3759 return stub_name;
3760 }
3761
3762 /* Look up an entry in the stub hash. Stub entries are cached because
3763 creating the stub name takes a bit of time. */
3764
3765 static struct elf32_arm_stub_hash_entry *
3766 elf32_arm_get_stub_entry (const asection *input_section,
3767 const asection *sym_sec,
3768 struct elf_link_hash_entry *hash,
3769 const Elf_Internal_Rela *rel,
3770 struct elf32_arm_link_hash_table *htab,
3771 enum elf32_arm_stub_type stub_type)
3772 {
3773 struct elf32_arm_stub_hash_entry *stub_entry;
3774 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3775 const asection *id_sec;
3776
3777 if ((input_section->flags & SEC_CODE) == 0)
3778 return NULL;
3779
3780 /* If this input section is part of a group of sections sharing one
3781 stub section, then use the id of the first section in the group.
3782 Stub names need to include a section id, as there may well be
3783 more than one stub used to reach say, printf, and we need to
3784 distinguish between them. */
3785 id_sec = htab->stub_group[input_section->id].link_sec;
3786
3787 if (h != NULL && h->stub_cache != NULL
3788 && h->stub_cache->h == h
3789 && h->stub_cache->id_sec == id_sec
3790 && h->stub_cache->stub_type == stub_type)
3791 {
3792 stub_entry = h->stub_cache;
3793 }
3794 else
3795 {
3796 char *stub_name;
3797
3798 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
3799 if (stub_name == NULL)
3800 return NULL;
3801
3802 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3803 stub_name, FALSE, FALSE);
3804 if (h != NULL)
3805 h->stub_cache = stub_entry;
3806
3807 free (stub_name);
3808 }
3809
3810 return stub_entry;
3811 }
3812
3813 /* Find or create a stub section. Returns a pointer to the stub section, and
3814 the section to which the stub section will be attached (in *LINK_SEC_P).
3815 LINK_SEC_P may be NULL. */
3816
3817 static asection *
3818 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3819 struct elf32_arm_link_hash_table *htab)
3820 {
3821 asection *link_sec;
3822 asection *stub_sec;
3823
3824 link_sec = htab->stub_group[section->id].link_sec;
3825 BFD_ASSERT (link_sec != NULL);
3826 stub_sec = htab->stub_group[section->id].stub_sec;
3827
3828 if (stub_sec == NULL)
3829 {
3830 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3831 if (stub_sec == NULL)
3832 {
3833 size_t namelen;
3834 bfd_size_type len;
3835 char *s_name;
3836
3837 namelen = strlen (link_sec->name);
3838 len = namelen + sizeof (STUB_SUFFIX);
3839 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
3840 if (s_name == NULL)
3841 return NULL;
3842
3843 memcpy (s_name, link_sec->name, namelen);
3844 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3845 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3846 if (stub_sec == NULL)
3847 return NULL;
3848 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3849 }
3850 htab->stub_group[section->id].stub_sec = stub_sec;
3851 }
3852
3853 if (link_sec_p)
3854 *link_sec_p = link_sec;
3855
3856 return stub_sec;
3857 }
3858
3859 /* Add a new stub entry to the stub hash. Not all fields of the new
3860 stub entry are initialised. */
3861
3862 static struct elf32_arm_stub_hash_entry *
3863 elf32_arm_add_stub (const char *stub_name,
3864 asection *section,
3865 struct elf32_arm_link_hash_table *htab)
3866 {
3867 asection *link_sec;
3868 asection *stub_sec;
3869 struct elf32_arm_stub_hash_entry *stub_entry;
3870
3871 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3872 if (stub_sec == NULL)
3873 return NULL;
3874
3875 /* Enter this entry into the linker stub hash table. */
3876 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3877 TRUE, FALSE);
3878 if (stub_entry == NULL)
3879 {
3880 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3881 section->owner,
3882 stub_name);
3883 return NULL;
3884 }
3885
3886 stub_entry->stub_sec = stub_sec;
3887 stub_entry->stub_offset = 0;
3888 stub_entry->id_sec = link_sec;
3889
3890 return stub_entry;
3891 }
3892
3893 /* Store an Arm insn into an output section not processed by
3894 elf32_arm_write_section. */
3895
3896 static void
3897 put_arm_insn (struct elf32_arm_link_hash_table * htab,
3898 bfd * output_bfd, bfd_vma val, void * ptr)
3899 {
3900 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3901 bfd_putl32 (val, ptr);
3902 else
3903 bfd_putb32 (val, ptr);
3904 }
3905
3906 /* Store a 16-bit Thumb insn into an output section not processed by
3907 elf32_arm_write_section. */
3908
3909 static void
3910 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3911 bfd * output_bfd, bfd_vma val, void * ptr)
3912 {
3913 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3914 bfd_putl16 (val, ptr);
3915 else
3916 bfd_putb16 (val, ptr);
3917 }
3918
3919 /* If it's possible to change R_TYPE to a more efficient access
3920 model, return the new reloc type. */
3921
3922 static unsigned
3923 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
3924 struct elf_link_hash_entry *h)
3925 {
3926 int is_local = (h == NULL);
3927
3928 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
3929 return r_type;
3930
3931 /* We do not support relaxations for Old TLS models. */
3932 switch (r_type)
3933 {
3934 case R_ARM_TLS_GOTDESC:
3935 case R_ARM_TLS_CALL:
3936 case R_ARM_THM_TLS_CALL:
3937 case R_ARM_TLS_DESCSEQ:
3938 case R_ARM_THM_TLS_DESCSEQ:
3939 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
3940 }
3941
3942 return r_type;
3943 }
3944
3945 static bfd_reloc_status_type elf32_arm_final_link_relocate
3946 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3947 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3948 const char *, unsigned char, enum arm_st_branch_type,
3949 struct elf_link_hash_entry *, bfd_boolean *, char **);
3950
3951 static unsigned int
3952 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
3953 {
3954 switch (stub_type)
3955 {
3956 case arm_stub_a8_veneer_b_cond:
3957 case arm_stub_a8_veneer_b:
3958 case arm_stub_a8_veneer_bl:
3959 return 2;
3960
3961 case arm_stub_long_branch_any_any:
3962 case arm_stub_long_branch_v4t_arm_thumb:
3963 case arm_stub_long_branch_thumb_only:
3964 case arm_stub_long_branch_v4t_thumb_thumb:
3965 case arm_stub_long_branch_v4t_thumb_arm:
3966 case arm_stub_short_branch_v4t_thumb_arm:
3967 case arm_stub_long_branch_any_arm_pic:
3968 case arm_stub_long_branch_any_thumb_pic:
3969 case arm_stub_long_branch_v4t_thumb_thumb_pic:
3970 case arm_stub_long_branch_v4t_arm_thumb_pic:
3971 case arm_stub_long_branch_v4t_thumb_arm_pic:
3972 case arm_stub_long_branch_thumb_only_pic:
3973 case arm_stub_long_branch_any_tls_pic:
3974 case arm_stub_long_branch_v4t_thumb_tls_pic:
3975 case arm_stub_a8_veneer_blx:
3976 return 4;
3977
3978 default:
3979 abort (); /* Should be unreachable. */
3980 }
3981 }
3982
3983 static bfd_boolean
3984 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3985 void * in_arg)
3986 {
3987 #define MAXRELOCS 2
3988 struct elf32_arm_stub_hash_entry *stub_entry;
3989 struct elf32_arm_link_hash_table *globals;
3990 struct bfd_link_info *info;
3991 asection *stub_sec;
3992 bfd *stub_bfd;
3993 bfd_byte *loc;
3994 bfd_vma sym_value;
3995 int template_size;
3996 int size;
3997 const insn_sequence *template_sequence;
3998 int i;
3999 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4000 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4001 int nrelocs = 0;
4002
4003 /* Massage our args to the form they really have. */
4004 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4005 info = (struct bfd_link_info *) in_arg;
4006
4007 globals = elf32_arm_hash_table (info);
4008 if (globals == NULL)
4009 return FALSE;
4010
4011 stub_sec = stub_entry->stub_sec;
4012
4013 if ((globals->fix_cortex_a8 < 0)
4014 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4015 /* We have to do less-strictly-aligned fixes last. */
4016 return TRUE;
4017
4018 /* Make a note of the offset within the stubs for this entry. */
4019 stub_entry->stub_offset = stub_sec->size;
4020 loc = stub_sec->contents + stub_entry->stub_offset;
4021
4022 stub_bfd = stub_sec->owner;
4023
4024 /* This is the address of the stub destination. */
4025 sym_value = (stub_entry->target_value
4026 + stub_entry->target_section->output_offset
4027 + stub_entry->target_section->output_section->vma);
4028
4029 template_sequence = stub_entry->stub_template;
4030 template_size = stub_entry->stub_template_size;
4031
4032 size = 0;
4033 for (i = 0; i < template_size; i++)
4034 {
4035 switch (template_sequence[i].type)
4036 {
4037 case THUMB16_TYPE:
4038 {
4039 bfd_vma data = (bfd_vma) template_sequence[i].data;
4040 if (template_sequence[i].reloc_addend != 0)
4041 {
4042 /* We've borrowed the reloc_addend field to mean we should
4043 insert a condition code into this (Thumb-1 branch)
4044 instruction. See THUMB16_BCOND_INSN. */
4045 BFD_ASSERT ((data & 0xff00) == 0xd000);
4046 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4047 }
4048 bfd_put_16 (stub_bfd, data, loc + size);
4049 size += 2;
4050 }
4051 break;
4052
4053 case THUMB32_TYPE:
4054 bfd_put_16 (stub_bfd,
4055 (template_sequence[i].data >> 16) & 0xffff,
4056 loc + size);
4057 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4058 loc + size + 2);
4059 if (template_sequence[i].r_type != R_ARM_NONE)
4060 {
4061 stub_reloc_idx[nrelocs] = i;
4062 stub_reloc_offset[nrelocs++] = size;
4063 }
4064 size += 4;
4065 break;
4066
4067 case ARM_TYPE:
4068 bfd_put_32 (stub_bfd, template_sequence[i].data,
4069 loc + size);
4070 /* Handle cases where the target is encoded within the
4071 instruction. */
4072 if (template_sequence[i].r_type == R_ARM_JUMP24)
4073 {
4074 stub_reloc_idx[nrelocs] = i;
4075 stub_reloc_offset[nrelocs++] = size;
4076 }
4077 size += 4;
4078 break;
4079
4080 case DATA_TYPE:
4081 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4082 stub_reloc_idx[nrelocs] = i;
4083 stub_reloc_offset[nrelocs++] = size;
4084 size += 4;
4085 break;
4086
4087 default:
4088 BFD_FAIL ();
4089 return FALSE;
4090 }
4091 }
4092
4093 stub_sec->size += size;
4094
4095 /* Stub size has already been computed in arm_size_one_stub. Check
4096 consistency. */
4097 BFD_ASSERT (size == stub_entry->stub_size);
4098
4099 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4100 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4101 sym_value |= 1;
4102
4103 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4104 in each stub. */
4105 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4106
4107 for (i = 0; i < nrelocs; i++)
4108 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4109 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4110 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4111 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
4112 {
4113 Elf_Internal_Rela rel;
4114 bfd_boolean unresolved_reloc;
4115 char *error_message;
4116 enum arm_st_branch_type branch_type
4117 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4118 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
4119 bfd_vma points_to = sym_value + stub_entry->target_addend;
4120
4121 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4122 rel.r_info = ELF32_R_INFO (0,
4123 template_sequence[stub_reloc_idx[i]].r_type);
4124 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
4125
4126 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4127 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4128 template should refer back to the instruction after the original
4129 branch. */
4130 points_to = sym_value;
4131
4132 /* There may be unintended consequences if this is not true. */
4133 BFD_ASSERT (stub_entry->h == NULL);
4134
4135 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4136 properly. We should probably use this function unconditionally,
4137 rather than only for certain relocations listed in the enclosing
4138 conditional, for the sake of consistency. */
4139 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4140 (template_sequence[stub_reloc_idx[i]].r_type),
4141 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4142 points_to, info, stub_entry->target_section, "", STT_FUNC,
4143 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4144 &unresolved_reloc, &error_message);
4145 }
4146 else
4147 {
4148 Elf_Internal_Rela rel;
4149 bfd_boolean unresolved_reloc;
4150 char *error_message;
4151 bfd_vma points_to = sym_value + stub_entry->target_addend
4152 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4153
4154 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4155 rel.r_info = ELF32_R_INFO (0,
4156 template_sequence[stub_reloc_idx[i]].r_type);
4157 rel.r_addend = 0;
4158
4159 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4160 (template_sequence[stub_reloc_idx[i]].r_type),
4161 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4162 points_to, info, stub_entry->target_section, "", STT_FUNC,
4163 stub_entry->branch_type,
4164 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4165 &error_message);
4166 }
4167
4168 return TRUE;
4169 #undef MAXRELOCS
4170 }
4171
4172 /* Calculate the template, template size and instruction size for a stub.
4173 Return value is the instruction size. */
4174
4175 static unsigned int
4176 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4177 const insn_sequence **stub_template,
4178 int *stub_template_size)
4179 {
4180 const insn_sequence *template_sequence = NULL;
4181 int template_size = 0, i;
4182 unsigned int size;
4183
4184 template_sequence = stub_definitions[stub_type].template_sequence;
4185 if (stub_template)
4186 *stub_template = template_sequence;
4187
4188 template_size = stub_definitions[stub_type].template_size;
4189 if (stub_template_size)
4190 *stub_template_size = template_size;
4191
4192 size = 0;
4193 for (i = 0; i < template_size; i++)
4194 {
4195 switch (template_sequence[i].type)
4196 {
4197 case THUMB16_TYPE:
4198 size += 2;
4199 break;
4200
4201 case ARM_TYPE:
4202 case THUMB32_TYPE:
4203 case DATA_TYPE:
4204 size += 4;
4205 break;
4206
4207 default:
4208 BFD_FAIL ();
4209 return 0;
4210 }
4211 }
4212
4213 return size;
4214 }
4215
4216 /* As above, but don't actually build the stub. Just bump offset so
4217 we know stub section sizes. */
4218
4219 static bfd_boolean
4220 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4221 void *in_arg ATTRIBUTE_UNUSED)
4222 {
4223 struct elf32_arm_stub_hash_entry *stub_entry;
4224 const insn_sequence *template_sequence;
4225 int template_size, size;
4226
4227 /* Massage our args to the form they really have. */
4228 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4229
4230 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4231 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4232
4233 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4234 &template_size);
4235
4236 stub_entry->stub_size = size;
4237 stub_entry->stub_template = template_sequence;
4238 stub_entry->stub_template_size = template_size;
4239
4240 size = (size + 7) & ~7;
4241 stub_entry->stub_sec->size += size;
4242
4243 return TRUE;
4244 }
4245
4246 /* External entry points for sizing and building linker stubs. */
4247
4248 /* Set up various things so that we can make a list of input sections
4249 for each output section included in the link. Returns -1 on error,
4250 0 when no stubs will be needed, and 1 on success. */
4251
4252 int
4253 elf32_arm_setup_section_lists (bfd *output_bfd,
4254 struct bfd_link_info *info)
4255 {
4256 bfd *input_bfd;
4257 unsigned int bfd_count;
4258 int top_id, top_index;
4259 asection *section;
4260 asection **input_list, **list;
4261 bfd_size_type amt;
4262 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4263
4264 if (htab == NULL)
4265 return 0;
4266 if (! is_elf_hash_table (htab))
4267 return 0;
4268
4269 /* Count the number of input BFDs and find the top input section id. */
4270 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4271 input_bfd != NULL;
4272 input_bfd = input_bfd->link_next)
4273 {
4274 bfd_count += 1;
4275 for (section = input_bfd->sections;
4276 section != NULL;
4277 section = section->next)
4278 {
4279 if (top_id < section->id)
4280 top_id = section->id;
4281 }
4282 }
4283 htab->bfd_count = bfd_count;
4284
4285 amt = sizeof (struct map_stub) * (top_id + 1);
4286 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4287 if (htab->stub_group == NULL)
4288 return -1;
4289 htab->top_id = top_id;
4290
4291 /* We can't use output_bfd->section_count here to find the top output
4292 section index as some sections may have been removed, and
4293 _bfd_strip_section_from_output doesn't renumber the indices. */
4294 for (section = output_bfd->sections, top_index = 0;
4295 section != NULL;
4296 section = section->next)
4297 {
4298 if (top_index < section->index)
4299 top_index = section->index;
4300 }
4301
4302 htab->top_index = top_index;
4303 amt = sizeof (asection *) * (top_index + 1);
4304 input_list = (asection **) bfd_malloc (amt);
4305 htab->input_list = input_list;
4306 if (input_list == NULL)
4307 return -1;
4308
4309 /* For sections we aren't interested in, mark their entries with a
4310 value we can check later. */
4311 list = input_list + top_index;
4312 do
4313 *list = bfd_abs_section_ptr;
4314 while (list-- != input_list);
4315
4316 for (section = output_bfd->sections;
4317 section != NULL;
4318 section = section->next)
4319 {
4320 if ((section->flags & SEC_CODE) != 0)
4321 input_list[section->index] = NULL;
4322 }
4323
4324 return 1;
4325 }
4326
4327 /* The linker repeatedly calls this function for each input section,
4328 in the order that input sections are linked into output sections.
4329 Build lists of input sections to determine groupings between which
4330 we may insert linker stubs. */
4331
4332 void
4333 elf32_arm_next_input_section (struct bfd_link_info *info,
4334 asection *isec)
4335 {
4336 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4337
4338 if (htab == NULL)
4339 return;
4340
4341 if (isec->output_section->index <= htab->top_index)
4342 {
4343 asection **list = htab->input_list + isec->output_section->index;
4344
4345 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4346 {
4347 /* Steal the link_sec pointer for our list. */
4348 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4349 /* This happens to make the list in reverse order,
4350 which we reverse later. */
4351 PREV_SEC (isec) = *list;
4352 *list = isec;
4353 }
4354 }
4355 }
4356
4357 /* See whether we can group stub sections together. Grouping stub
4358 sections may result in fewer stubs. More importantly, we need to
4359 put all .init* and .fini* stubs at the end of the .init or
4360 .fini output sections respectively, because glibc splits the
4361 _init and _fini functions into multiple parts. Putting a stub in
4362 the middle of a function is not a good idea. */
4363
4364 static void
4365 group_sections (struct elf32_arm_link_hash_table *htab,
4366 bfd_size_type stub_group_size,
4367 bfd_boolean stubs_always_after_branch)
4368 {
4369 asection **list = htab->input_list;
4370
4371 do
4372 {
4373 asection *tail = *list;
4374 asection *head;
4375
4376 if (tail == bfd_abs_section_ptr)
4377 continue;
4378
4379 /* Reverse the list: we must avoid placing stubs at the
4380 beginning of the section because the beginning of the text
4381 section may be required for an interrupt vector in bare metal
4382 code. */
4383 #define NEXT_SEC PREV_SEC
4384 head = NULL;
4385 while (tail != NULL)
4386 {
4387 /* Pop from tail. */
4388 asection *item = tail;
4389 tail = PREV_SEC (item);
4390
4391 /* Push on head. */
4392 NEXT_SEC (item) = head;
4393 head = item;
4394 }
4395
4396 while (head != NULL)
4397 {
4398 asection *curr;
4399 asection *next;
4400 bfd_vma stub_group_start = head->output_offset;
4401 bfd_vma end_of_next;
4402
4403 curr = head;
4404 while (NEXT_SEC (curr) != NULL)
4405 {
4406 next = NEXT_SEC (curr);
4407 end_of_next = next->output_offset + next->size;
4408 if (end_of_next - stub_group_start >= stub_group_size)
4409 /* End of NEXT is too far from start, so stop. */
4410 break;
4411 /* Add NEXT to the group. */
4412 curr = next;
4413 }
4414
4415 /* OK, the size from the start to the start of CURR is less
4416 than stub_group_size and thus can be handled by one stub
4417 section. (Or the head section is itself larger than
4418 stub_group_size, in which case we may be toast.)
4419 We should really be keeping track of the total size of
4420 stubs added here, as stubs contribute to the final output
4421 section size. */
4422 do
4423 {
4424 next = NEXT_SEC (head);
4425 /* Set up this stub group. */
4426 htab->stub_group[head->id].link_sec = curr;
4427 }
4428 while (head != curr && (head = next) != NULL);
4429
4430 /* But wait, there's more! Input sections up to stub_group_size
4431 bytes after the stub section can be handled by it too. */
4432 if (!stubs_always_after_branch)
4433 {
4434 stub_group_start = curr->output_offset + curr->size;
4435
4436 while (next != NULL)
4437 {
4438 end_of_next = next->output_offset + next->size;
4439 if (end_of_next - stub_group_start >= stub_group_size)
4440 /* End of NEXT is too far from stubs, so stop. */
4441 break;
4442 /* Add NEXT to the stub group. */
4443 head = next;
4444 next = NEXT_SEC (head);
4445 htab->stub_group[head->id].link_sec = curr;
4446 }
4447 }
4448 head = next;
4449 }
4450 }
4451 while (list++ != htab->input_list + htab->top_index);
4452
4453 free (htab->input_list);
4454 #undef PREV_SEC
4455 #undef NEXT_SEC
4456 }
4457
4458 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4459 erratum fix. */
4460
4461 static int
4462 a8_reloc_compare (const void *a, const void *b)
4463 {
4464 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4465 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4466
4467 if (ra->from < rb->from)
4468 return -1;
4469 else if (ra->from > rb->from)
4470 return 1;
4471 else
4472 return 0;
4473 }
4474
4475 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4476 const char *, char **);
4477
4478 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4479 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4480 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4481 otherwise. */
4482
4483 static bfd_boolean
4484 cortex_a8_erratum_scan (bfd *input_bfd,
4485 struct bfd_link_info *info,
4486 struct a8_erratum_fix **a8_fixes_p,
4487 unsigned int *num_a8_fixes_p,
4488 unsigned int *a8_fix_table_size_p,
4489 struct a8_erratum_reloc *a8_relocs,
4490 unsigned int num_a8_relocs,
4491 unsigned prev_num_a8_fixes,
4492 bfd_boolean *stub_changed_p)
4493 {
4494 asection *section;
4495 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4496 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4497 unsigned int num_a8_fixes = *num_a8_fixes_p;
4498 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4499
4500 if (htab == NULL)
4501 return FALSE;
4502
4503 for (section = input_bfd->sections;
4504 section != NULL;
4505 section = section->next)
4506 {
4507 bfd_byte *contents = NULL;
4508 struct _arm_elf_section_data *sec_data;
4509 unsigned int span;
4510 bfd_vma base_vma;
4511
4512 if (elf_section_type (section) != SHT_PROGBITS
4513 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4514 || (section->flags & SEC_EXCLUDE) != 0
4515 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
4516 || (section->output_section == bfd_abs_section_ptr))
4517 continue;
4518
4519 base_vma = section->output_section->vma + section->output_offset;
4520
4521 if (elf_section_data (section)->this_hdr.contents != NULL)
4522 contents = elf_section_data (section)->this_hdr.contents;
4523 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4524 return TRUE;
4525
4526 sec_data = elf32_arm_section_data (section);
4527
4528 for (span = 0; span < sec_data->mapcount; span++)
4529 {
4530 unsigned int span_start = sec_data->map[span].vma;
4531 unsigned int span_end = (span == sec_data->mapcount - 1)
4532 ? section->size : sec_data->map[span + 1].vma;
4533 unsigned int i;
4534 char span_type = sec_data->map[span].type;
4535 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4536
4537 if (span_type != 't')
4538 continue;
4539
4540 /* Span is entirely within a single 4KB region: skip scanning. */
4541 if (((base_vma + span_start) & ~0xfff)
4542 == ((base_vma + span_end) & ~0xfff))
4543 continue;
4544
4545 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4546
4547 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4548 * The branch target is in the same 4KB region as the
4549 first half of the branch.
4550 * The instruction before the branch is a 32-bit
4551 length non-branch instruction. */
4552 for (i = span_start; i < span_end;)
4553 {
4554 unsigned int insn = bfd_getl16 (&contents[i]);
4555 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4556 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4557
4558 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4559 insn_32bit = TRUE;
4560
4561 if (insn_32bit)
4562 {
4563 /* Load the rest of the insn (in manual-friendly order). */
4564 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4565
4566 /* Encoding T4: B<c>.W. */
4567 is_b = (insn & 0xf800d000) == 0xf0009000;
4568 /* Encoding T1: BL<c>.W. */
4569 is_bl = (insn & 0xf800d000) == 0xf000d000;
4570 /* Encoding T2: BLX<c>.W. */
4571 is_blx = (insn & 0xf800d000) == 0xf000c000;
4572 /* Encoding T3: B<c>.W (not permitted in IT block). */
4573 is_bcc = (insn & 0xf800d000) == 0xf0008000
4574 && (insn & 0x07f00000) != 0x03800000;
4575 }
4576
4577 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4578
4579 if (((base_vma + i) & 0xfff) == 0xffe
4580 && insn_32bit
4581 && is_32bit_branch
4582 && last_was_32bit
4583 && ! last_was_branch)
4584 {
4585 bfd_signed_vma offset = 0;
4586 bfd_boolean force_target_arm = FALSE;
4587 bfd_boolean force_target_thumb = FALSE;
4588 bfd_vma target;
4589 enum elf32_arm_stub_type stub_type = arm_stub_none;
4590 struct a8_erratum_reloc key, *found;
4591 bfd_boolean use_plt = FALSE;
4592
4593 key.from = base_vma + i;
4594 found = (struct a8_erratum_reloc *)
4595 bsearch (&key, a8_relocs, num_a8_relocs,
4596 sizeof (struct a8_erratum_reloc),
4597 &a8_reloc_compare);
4598
4599 if (found)
4600 {
4601 char *error_message = NULL;
4602 struct elf_link_hash_entry *entry;
4603
4604 /* We don't care about the error returned from this
4605 function, only if there is glue or not. */
4606 entry = find_thumb_glue (info, found->sym_name,
4607 &error_message);
4608
4609 if (entry)
4610 found->non_a8_stub = TRUE;
4611
4612 /* Keep a simpler condition, for the sake of clarity. */
4613 if (htab->root.splt != NULL && found->hash != NULL
4614 && found->hash->root.plt.offset != (bfd_vma) -1)
4615 use_plt = TRUE;
4616
4617 if (found->r_type == R_ARM_THM_CALL)
4618 {
4619 if (found->branch_type == ST_BRANCH_TO_ARM
4620 || use_plt)
4621 force_target_arm = TRUE;
4622 else
4623 force_target_thumb = TRUE;
4624 }
4625 }
4626
4627 /* Check if we have an offending branch instruction. */
4628
4629 if (found && found->non_a8_stub)
4630 /* We've already made a stub for this instruction, e.g.
4631 it's a long branch or a Thumb->ARM stub. Assume that
4632 stub will suffice to work around the A8 erratum (see
4633 setting of always_after_branch above). */
4634 ;
4635 else if (is_bcc)
4636 {
4637 offset = (insn & 0x7ff) << 1;
4638 offset |= (insn & 0x3f0000) >> 4;
4639 offset |= (insn & 0x2000) ? 0x40000 : 0;
4640 offset |= (insn & 0x800) ? 0x80000 : 0;
4641 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4642 if (offset & 0x100000)
4643 offset |= ~ ((bfd_signed_vma) 0xfffff);
4644 stub_type = arm_stub_a8_veneer_b_cond;
4645 }
4646 else if (is_b || is_bl || is_blx)
4647 {
4648 int s = (insn & 0x4000000) != 0;
4649 int j1 = (insn & 0x2000) != 0;
4650 int j2 = (insn & 0x800) != 0;
4651 int i1 = !(j1 ^ s);
4652 int i2 = !(j2 ^ s);
4653
4654 offset = (insn & 0x7ff) << 1;
4655 offset |= (insn & 0x3ff0000) >> 4;
4656 offset |= i2 << 22;
4657 offset |= i1 << 23;
4658 offset |= s << 24;
4659 if (offset & 0x1000000)
4660 offset |= ~ ((bfd_signed_vma) 0xffffff);
4661
4662 if (is_blx)
4663 offset &= ~ ((bfd_signed_vma) 3);
4664
4665 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4666 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4667 }
4668
4669 if (stub_type != arm_stub_none)
4670 {
4671 bfd_vma pc_for_insn = base_vma + i + 4;
4672
4673 /* The original instruction is a BL, but the target is
4674 an ARM instruction. If we were not making a stub,
4675 the BL would have been converted to a BLX. Use the
4676 BLX stub instead in that case. */
4677 if (htab->use_blx && force_target_arm
4678 && stub_type == arm_stub_a8_veneer_bl)
4679 {
4680 stub_type = arm_stub_a8_veneer_blx;
4681 is_blx = TRUE;
4682 is_bl = FALSE;
4683 }
4684 /* Conversely, if the original instruction was
4685 BLX but the target is Thumb mode, use the BL
4686 stub. */
4687 else if (force_target_thumb
4688 && stub_type == arm_stub_a8_veneer_blx)
4689 {
4690 stub_type = arm_stub_a8_veneer_bl;
4691 is_blx = FALSE;
4692 is_bl = TRUE;
4693 }
4694
4695 if (is_blx)
4696 pc_for_insn &= ~ ((bfd_vma) 3);
4697
4698 /* If we found a relocation, use the proper destination,
4699 not the offset in the (unrelocated) instruction.
4700 Note this is always done if we switched the stub type
4701 above. */
4702 if (found)
4703 offset =
4704 (bfd_signed_vma) (found->destination - pc_for_insn);
4705
4706 /* If the stub will use a Thumb-mode branch to a
4707 PLT target, redirect it to the preceding Thumb
4708 entry point. */
4709 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4710 offset -= PLT_THUMB_STUB_SIZE;
4711
4712 target = pc_for_insn + offset;
4713
4714 /* The BLX stub is ARM-mode code. Adjust the offset to
4715 take the different PC value (+8 instead of +4) into
4716 account. */
4717 if (stub_type == arm_stub_a8_veneer_blx)
4718 offset += 4;
4719
4720 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4721 {
4722 char *stub_name = NULL;
4723
4724 if (num_a8_fixes == a8_fix_table_size)
4725 {
4726 a8_fix_table_size *= 2;
4727 a8_fixes = (struct a8_erratum_fix *)
4728 bfd_realloc (a8_fixes,
4729 sizeof (struct a8_erratum_fix)
4730 * a8_fix_table_size);
4731 }
4732
4733 if (num_a8_fixes < prev_num_a8_fixes)
4734 {
4735 /* If we're doing a subsequent scan,
4736 check if we've found the same fix as
4737 before, and try and reuse the stub
4738 name. */
4739 stub_name = a8_fixes[num_a8_fixes].stub_name;
4740 if ((a8_fixes[num_a8_fixes].section != section)
4741 || (a8_fixes[num_a8_fixes].offset != i))
4742 {
4743 free (stub_name);
4744 stub_name = NULL;
4745 *stub_changed_p = TRUE;
4746 }
4747 }
4748
4749 if (!stub_name)
4750 {
4751 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
4752 if (stub_name != NULL)
4753 sprintf (stub_name, "%x:%x", section->id, i);
4754 }
4755
4756 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4757 a8_fixes[num_a8_fixes].section = section;
4758 a8_fixes[num_a8_fixes].offset = i;
4759 a8_fixes[num_a8_fixes].addend = offset;
4760 a8_fixes[num_a8_fixes].orig_insn = insn;
4761 a8_fixes[num_a8_fixes].stub_name = stub_name;
4762 a8_fixes[num_a8_fixes].stub_type = stub_type;
4763 a8_fixes[num_a8_fixes].branch_type =
4764 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
4765
4766 num_a8_fixes++;
4767 }
4768 }
4769 }
4770
4771 i += insn_32bit ? 4 : 2;
4772 last_was_32bit = insn_32bit;
4773 last_was_branch = is_32bit_branch;
4774 }
4775 }
4776
4777 if (elf_section_data (section)->this_hdr.contents == NULL)
4778 free (contents);
4779 }
4780
4781 *a8_fixes_p = a8_fixes;
4782 *num_a8_fixes_p = num_a8_fixes;
4783 *a8_fix_table_size_p = a8_fix_table_size;
4784
4785 return FALSE;
4786 }
4787
4788 /* Determine and set the size of the stub section for a final link.
4789
4790 The basic idea here is to examine all the relocations looking for
4791 PC-relative calls to a target that is unreachable with a "bl"
4792 instruction. */
4793
4794 bfd_boolean
4795 elf32_arm_size_stubs (bfd *output_bfd,
4796 bfd *stub_bfd,
4797 struct bfd_link_info *info,
4798 bfd_signed_vma group_size,
4799 asection * (*add_stub_section) (const char *, asection *),
4800 void (*layout_sections_again) (void))
4801 {
4802 bfd_size_type stub_group_size;
4803 bfd_boolean stubs_always_after_branch;
4804 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4805 struct a8_erratum_fix *a8_fixes = NULL;
4806 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
4807 struct a8_erratum_reloc *a8_relocs = NULL;
4808 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4809
4810 if (htab == NULL)
4811 return FALSE;
4812
4813 if (htab->fix_cortex_a8)
4814 {
4815 a8_fixes = (struct a8_erratum_fix *)
4816 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4817 a8_relocs = (struct a8_erratum_reloc *)
4818 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
4819 }
4820
4821 /* Propagate mach to stub bfd, because it may not have been
4822 finalized when we created stub_bfd. */
4823 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4824 bfd_get_mach (output_bfd));
4825
4826 /* Stash our params away. */
4827 htab->stub_bfd = stub_bfd;
4828 htab->add_stub_section = add_stub_section;
4829 htab->layout_sections_again = layout_sections_again;
4830 stubs_always_after_branch = group_size < 0;
4831
4832 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4833 as the first half of a 32-bit branch straddling two 4K pages. This is a
4834 crude way of enforcing that. */
4835 if (htab->fix_cortex_a8)
4836 stubs_always_after_branch = 1;
4837
4838 if (group_size < 0)
4839 stub_group_size = -group_size;
4840 else
4841 stub_group_size = group_size;
4842
4843 if (stub_group_size == 1)
4844 {
4845 /* Default values. */
4846 /* Thumb branch range is +-4MB has to be used as the default
4847 maximum size (a given section can contain both ARM and Thumb
4848 code, so the worst case has to be taken into account).
4849
4850 This value is 24K less than that, which allows for 2025
4851 12-byte stubs. If we exceed that, then we will fail to link.
4852 The user will have to relink with an explicit group size
4853 option. */
4854 stub_group_size = 4170000;
4855 }
4856
4857 group_sections (htab, stub_group_size, stubs_always_after_branch);
4858
4859 /* If we're applying the cortex A8 fix, we need to determine the
4860 program header size now, because we cannot change it later --
4861 that could alter section placements. Notice the A8 erratum fix
4862 ends up requiring the section addresses to remain unchanged
4863 modulo the page size. That's something we cannot represent
4864 inside BFD, and we don't want to force the section alignment to
4865 be the page size. */
4866 if (htab->fix_cortex_a8)
4867 (*htab->layout_sections_again) ();
4868
4869 while (1)
4870 {
4871 bfd *input_bfd;
4872 unsigned int bfd_indx;
4873 asection *stub_sec;
4874 bfd_boolean stub_changed = FALSE;
4875 unsigned prev_num_a8_fixes = num_a8_fixes;
4876
4877 num_a8_fixes = 0;
4878 for (input_bfd = info->input_bfds, bfd_indx = 0;
4879 input_bfd != NULL;
4880 input_bfd = input_bfd->link_next, bfd_indx++)
4881 {
4882 Elf_Internal_Shdr *symtab_hdr;
4883 asection *section;
4884 Elf_Internal_Sym *local_syms = NULL;
4885
4886 num_a8_relocs = 0;
4887
4888 /* We'll need the symbol table in a second. */
4889 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4890 if (symtab_hdr->sh_info == 0)
4891 continue;
4892
4893 /* Walk over each section attached to the input bfd. */
4894 for (section = input_bfd->sections;
4895 section != NULL;
4896 section = section->next)
4897 {
4898 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4899
4900 /* If there aren't any relocs, then there's nothing more
4901 to do. */
4902 if ((section->flags & SEC_RELOC) == 0
4903 || section->reloc_count == 0
4904 || (section->flags & SEC_CODE) == 0)
4905 continue;
4906
4907 /* If this section is a link-once section that will be
4908 discarded, then don't create any stubs. */
4909 if (section->output_section == NULL
4910 || section->output_section->owner != output_bfd)
4911 continue;
4912
4913 /* Get the relocs. */
4914 internal_relocs
4915 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4916 NULL, info->keep_memory);
4917 if (internal_relocs == NULL)
4918 goto error_ret_free_local;
4919
4920 /* Now examine each relocation. */
4921 irela = internal_relocs;
4922 irelaend = irela + section->reloc_count;
4923 for (; irela < irelaend; irela++)
4924 {
4925 unsigned int r_type, r_indx;
4926 enum elf32_arm_stub_type stub_type;
4927 struct elf32_arm_stub_hash_entry *stub_entry;
4928 asection *sym_sec;
4929 bfd_vma sym_value;
4930 bfd_vma destination;
4931 struct elf32_arm_link_hash_entry *hash;
4932 const char *sym_name;
4933 char *stub_name;
4934 const asection *id_sec;
4935 unsigned char st_type;
4936 enum arm_st_branch_type branch_type;
4937 bfd_boolean created_stub = FALSE;
4938
4939 r_type = ELF32_R_TYPE (irela->r_info);
4940 r_indx = ELF32_R_SYM (irela->r_info);
4941
4942 if (r_type >= (unsigned int) R_ARM_max)
4943 {
4944 bfd_set_error (bfd_error_bad_value);
4945 error_ret_free_internal:
4946 if (elf_section_data (section)->relocs == NULL)
4947 free (internal_relocs);
4948 goto error_ret_free_local;
4949 }
4950
4951 hash = NULL;
4952 if (r_indx >= symtab_hdr->sh_info)
4953 hash = elf32_arm_hash_entry
4954 (elf_sym_hashes (input_bfd)
4955 [r_indx - symtab_hdr->sh_info]);
4956
4957 /* Only look for stubs on branch instructions, or
4958 non-relaxed TLSCALL */
4959 if ((r_type != (unsigned int) R_ARM_CALL)
4960 && (r_type != (unsigned int) R_ARM_THM_CALL)
4961 && (r_type != (unsigned int) R_ARM_JUMP24)
4962 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4963 && (r_type != (unsigned int) R_ARM_THM_XPC22)
4964 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4965 && (r_type != (unsigned int) R_ARM_PLT32)
4966 && !((r_type == (unsigned int) R_ARM_TLS_CALL
4967 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
4968 && r_type == elf32_arm_tls_transition
4969 (info, r_type, &hash->root)
4970 && ((hash ? hash->tls_type
4971 : (elf32_arm_local_got_tls_type
4972 (input_bfd)[r_indx]))
4973 & GOT_TLS_GDESC) != 0))
4974 continue;
4975
4976 /* Now determine the call target, its name, value,
4977 section. */
4978 sym_sec = NULL;
4979 sym_value = 0;
4980 destination = 0;
4981 sym_name = NULL;
4982
4983 if (r_type == (unsigned int) R_ARM_TLS_CALL
4984 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
4985 {
4986 /* A non-relaxed TLS call. The target is the
4987 plt-resident trampoline and nothing to do
4988 with the symbol. */
4989 BFD_ASSERT (htab->tls_trampoline > 0);
4990 sym_sec = htab->root.splt;
4991 sym_value = htab->tls_trampoline;
4992 hash = 0;
4993 st_type = STT_FUNC;
4994 branch_type = ST_BRANCH_TO_ARM;
4995 }
4996 else if (!hash)
4997 {
4998 /* It's a local symbol. */
4999 Elf_Internal_Sym *sym;
5000
5001 if (local_syms == NULL)
5002 {
5003 local_syms
5004 = (Elf_Internal_Sym *) symtab_hdr->contents;
5005 if (local_syms == NULL)
5006 local_syms
5007 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5008 symtab_hdr->sh_info, 0,
5009 NULL, NULL, NULL);
5010 if (local_syms == NULL)
5011 goto error_ret_free_internal;
5012 }
5013
5014 sym = local_syms + r_indx;
5015 if (sym->st_shndx == SHN_UNDEF)
5016 sym_sec = bfd_und_section_ptr;
5017 else if (sym->st_shndx == SHN_ABS)
5018 sym_sec = bfd_abs_section_ptr;
5019 else if (sym->st_shndx == SHN_COMMON)
5020 sym_sec = bfd_com_section_ptr;
5021 else
5022 sym_sec =
5023 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5024
5025 if (!sym_sec)
5026 /* This is an undefined symbol. It can never
5027 be resolved. */
5028 continue;
5029
5030 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5031 sym_value = sym->st_value;
5032 destination = (sym_value + irela->r_addend
5033 + sym_sec->output_offset
5034 + sym_sec->output_section->vma);
5035 st_type = ELF_ST_TYPE (sym->st_info);
5036 branch_type = ARM_SYM_BRANCH_TYPE (sym);
5037 sym_name
5038 = bfd_elf_string_from_elf_section (input_bfd,
5039 symtab_hdr->sh_link,
5040 sym->st_name);
5041 }
5042 else
5043 {
5044 /* It's an external symbol. */
5045 while (hash->root.root.type == bfd_link_hash_indirect
5046 || hash->root.root.type == bfd_link_hash_warning)
5047 hash = ((struct elf32_arm_link_hash_entry *)
5048 hash->root.root.u.i.link);
5049
5050 if (hash->root.root.type == bfd_link_hash_defined
5051 || hash->root.root.type == bfd_link_hash_defweak)
5052 {
5053 sym_sec = hash->root.root.u.def.section;
5054 sym_value = hash->root.root.u.def.value;
5055
5056 struct elf32_arm_link_hash_table *globals =
5057 elf32_arm_hash_table (info);
5058
5059 /* For a destination in a shared library,
5060 use the PLT stub as target address to
5061 decide whether a branch stub is
5062 needed. */
5063 if (globals != NULL
5064 && globals->root.splt != NULL
5065 && hash != NULL
5066 && hash->root.plt.offset != (bfd_vma) -1)
5067 {
5068 sym_sec = globals->root.splt;
5069 sym_value = hash->root.plt.offset;
5070 if (sym_sec->output_section != NULL)
5071 destination = (sym_value
5072 + sym_sec->output_offset
5073 + sym_sec->output_section->vma);
5074 }
5075 else if (sym_sec->output_section != NULL)
5076 destination = (sym_value + irela->r_addend
5077 + sym_sec->output_offset
5078 + sym_sec->output_section->vma);
5079 }
5080 else if ((hash->root.root.type == bfd_link_hash_undefined)
5081 || (hash->root.root.type == bfd_link_hash_undefweak))
5082 {
5083 /* For a shared library, use the PLT stub as
5084 target address to decide whether a long
5085 branch stub is needed.
5086 For absolute code, they cannot be handled. */
5087 struct elf32_arm_link_hash_table *globals =
5088 elf32_arm_hash_table (info);
5089
5090 if (globals != NULL
5091 && globals->root.splt != NULL
5092 && hash != NULL
5093 && hash->root.plt.offset != (bfd_vma) -1)
5094 {
5095 sym_sec = globals->root.splt;
5096 sym_value = hash->root.plt.offset;
5097 if (sym_sec->output_section != NULL)
5098 destination = (sym_value
5099 + sym_sec->output_offset
5100 + sym_sec->output_section->vma);
5101 }
5102 else
5103 continue;
5104 }
5105 else
5106 {
5107 bfd_set_error (bfd_error_bad_value);
5108 goto error_ret_free_internal;
5109 }
5110 st_type = hash->root.type;
5111 branch_type = hash->root.target_internal;
5112 sym_name = hash->root.root.root.string;
5113 }
5114
5115 do
5116 {
5117 /* Determine what (if any) linker stub is needed. */
5118 stub_type = arm_type_of_stub (info, section, irela,
5119 st_type, &branch_type,
5120 hash, destination, sym_sec,
5121 input_bfd, sym_name);
5122 if (stub_type == arm_stub_none)
5123 break;
5124
5125 /* Support for grouping stub sections. */
5126 id_sec = htab->stub_group[section->id].link_sec;
5127
5128 /* Get the name of this stub. */
5129 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
5130 irela, stub_type);
5131 if (!stub_name)
5132 goto error_ret_free_internal;
5133
5134 /* We've either created a stub for this reloc already,
5135 or we are about to. */
5136 created_stub = TRUE;
5137
5138 stub_entry = arm_stub_hash_lookup
5139 (&htab->stub_hash_table, stub_name,
5140 FALSE, FALSE);
5141 if (stub_entry != NULL)
5142 {
5143 /* The proper stub has already been created. */
5144 free (stub_name);
5145 stub_entry->target_value = sym_value;
5146 break;
5147 }
5148
5149 stub_entry = elf32_arm_add_stub (stub_name, section,
5150 htab);
5151 if (stub_entry == NULL)
5152 {
5153 free (stub_name);
5154 goto error_ret_free_internal;
5155 }
5156
5157 stub_entry->target_value = sym_value;
5158 stub_entry->target_section = sym_sec;
5159 stub_entry->stub_type = stub_type;
5160 stub_entry->h = hash;
5161 stub_entry->branch_type = branch_type;
5162
5163 if (sym_name == NULL)
5164 sym_name = "unnamed";
5165 stub_entry->output_name = (char *)
5166 bfd_alloc (htab->stub_bfd,
5167 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5168 + strlen (sym_name));
5169 if (stub_entry->output_name == NULL)
5170 {
5171 free (stub_name);
5172 goto error_ret_free_internal;
5173 }
5174
5175 /* For historical reasons, use the existing names for
5176 ARM-to-Thumb and Thumb-to-ARM stubs. */
5177 if ((r_type == (unsigned int) R_ARM_THM_CALL
5178 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5179 && branch_type == ST_BRANCH_TO_ARM)
5180 sprintf (stub_entry->output_name,
5181 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5182 else if ((r_type == (unsigned int) R_ARM_CALL
5183 || r_type == (unsigned int) R_ARM_JUMP24)
5184 && branch_type == ST_BRANCH_TO_THUMB)
5185 sprintf (stub_entry->output_name,
5186 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5187 else
5188 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5189 sym_name);
5190
5191 stub_changed = TRUE;
5192 }
5193 while (0);
5194
5195 /* Look for relocations which might trigger Cortex-A8
5196 erratum. */
5197 if (htab->fix_cortex_a8
5198 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5199 || r_type == (unsigned int) R_ARM_THM_JUMP19
5200 || r_type == (unsigned int) R_ARM_THM_CALL
5201 || r_type == (unsigned int) R_ARM_THM_XPC22))
5202 {
5203 bfd_vma from = section->output_section->vma
5204 + section->output_offset
5205 + irela->r_offset;
5206
5207 if ((from & 0xfff) == 0xffe)
5208 {
5209 /* Found a candidate. Note we haven't checked the
5210 destination is within 4K here: if we do so (and
5211 don't create an entry in a8_relocs) we can't tell
5212 that a branch should have been relocated when
5213 scanning later. */
5214 if (num_a8_relocs == a8_reloc_table_size)
5215 {
5216 a8_reloc_table_size *= 2;
5217 a8_relocs = (struct a8_erratum_reloc *)
5218 bfd_realloc (a8_relocs,
5219 sizeof (struct a8_erratum_reloc)
5220 * a8_reloc_table_size);
5221 }
5222
5223 a8_relocs[num_a8_relocs].from = from;
5224 a8_relocs[num_a8_relocs].destination = destination;
5225 a8_relocs[num_a8_relocs].r_type = r_type;
5226 a8_relocs[num_a8_relocs].branch_type = branch_type;
5227 a8_relocs[num_a8_relocs].sym_name = sym_name;
5228 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5229 a8_relocs[num_a8_relocs].hash = hash;
5230
5231 num_a8_relocs++;
5232 }
5233 }
5234 }
5235
5236 /* We're done with the internal relocs, free them. */
5237 if (elf_section_data (section)->relocs == NULL)
5238 free (internal_relocs);
5239 }
5240
5241 if (htab->fix_cortex_a8)
5242 {
5243 /* Sort relocs which might apply to Cortex-A8 erratum. */
5244 qsort (a8_relocs, num_a8_relocs,
5245 sizeof (struct a8_erratum_reloc),
5246 &a8_reloc_compare);
5247
5248 /* Scan for branches which might trigger Cortex-A8 erratum. */
5249 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5250 &num_a8_fixes, &a8_fix_table_size,
5251 a8_relocs, num_a8_relocs,
5252 prev_num_a8_fixes, &stub_changed)
5253 != 0)
5254 goto error_ret_free_local;
5255 }
5256 }
5257
5258 if (prev_num_a8_fixes != num_a8_fixes)
5259 stub_changed = TRUE;
5260
5261 if (!stub_changed)
5262 break;
5263
5264 /* OK, we've added some stubs. Find out the new size of the
5265 stub sections. */
5266 for (stub_sec = htab->stub_bfd->sections;
5267 stub_sec != NULL;
5268 stub_sec = stub_sec->next)
5269 {
5270 /* Ignore non-stub sections. */
5271 if (!strstr (stub_sec->name, STUB_SUFFIX))
5272 continue;
5273
5274 stub_sec->size = 0;
5275 }
5276
5277 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5278
5279 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5280 if (htab->fix_cortex_a8)
5281 for (i = 0; i < num_a8_fixes; i++)
5282 {
5283 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5284 a8_fixes[i].section, htab);
5285
5286 if (stub_sec == NULL)
5287 goto error_ret_free_local;
5288
5289 stub_sec->size
5290 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5291 NULL);
5292 }
5293
5294
5295 /* Ask the linker to do its stuff. */
5296 (*htab->layout_sections_again) ();
5297 }
5298
5299 /* Add stubs for Cortex-A8 erratum fixes now. */
5300 if (htab->fix_cortex_a8)
5301 {
5302 for (i = 0; i < num_a8_fixes; i++)
5303 {
5304 struct elf32_arm_stub_hash_entry *stub_entry;
5305 char *stub_name = a8_fixes[i].stub_name;
5306 asection *section = a8_fixes[i].section;
5307 unsigned int section_id = a8_fixes[i].section->id;
5308 asection *link_sec = htab->stub_group[section_id].link_sec;
5309 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5310 const insn_sequence *template_sequence;
5311 int template_size, size = 0;
5312
5313 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5314 TRUE, FALSE);
5315 if (stub_entry == NULL)
5316 {
5317 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5318 section->owner,
5319 stub_name);
5320 return FALSE;
5321 }
5322
5323 stub_entry->stub_sec = stub_sec;
5324 stub_entry->stub_offset = 0;
5325 stub_entry->id_sec = link_sec;
5326 stub_entry->stub_type = a8_fixes[i].stub_type;
5327 stub_entry->target_section = a8_fixes[i].section;
5328 stub_entry->target_value = a8_fixes[i].offset;
5329 stub_entry->target_addend = a8_fixes[i].addend;
5330 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5331 stub_entry->branch_type = a8_fixes[i].branch_type;
5332
5333 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5334 &template_sequence,
5335 &template_size);
5336
5337 stub_entry->stub_size = size;
5338 stub_entry->stub_template = template_sequence;
5339 stub_entry->stub_template_size = template_size;
5340 }
5341
5342 /* Stash the Cortex-A8 erratum fix array for use later in
5343 elf32_arm_write_section(). */
5344 htab->a8_erratum_fixes = a8_fixes;
5345 htab->num_a8_erratum_fixes = num_a8_fixes;
5346 }
5347 else
5348 {
5349 htab->a8_erratum_fixes = NULL;
5350 htab->num_a8_erratum_fixes = 0;
5351 }
5352 return TRUE;
5353
5354 error_ret_free_local:
5355 return FALSE;
5356 }
5357
5358 /* Build all the stubs associated with the current output file. The
5359 stubs are kept in a hash table attached to the main linker hash
5360 table. We also set up the .plt entries for statically linked PIC
5361 functions here. This function is called via arm_elf_finish in the
5362 linker. */
5363
5364 bfd_boolean
5365 elf32_arm_build_stubs (struct bfd_link_info *info)
5366 {
5367 asection *stub_sec;
5368 struct bfd_hash_table *table;
5369 struct elf32_arm_link_hash_table *htab;
5370
5371 htab = elf32_arm_hash_table (info);
5372 if (htab == NULL)
5373 return FALSE;
5374
5375 for (stub_sec = htab->stub_bfd->sections;
5376 stub_sec != NULL;
5377 stub_sec = stub_sec->next)
5378 {
5379 bfd_size_type size;
5380
5381 /* Ignore non-stub sections. */
5382 if (!strstr (stub_sec->name, STUB_SUFFIX))
5383 continue;
5384
5385 /* Allocate memory to hold the linker stubs. */
5386 size = stub_sec->size;
5387 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5388 if (stub_sec->contents == NULL && size != 0)
5389 return FALSE;
5390 stub_sec->size = 0;
5391 }
5392
5393 /* Build the stubs as directed by the stub hash table. */
5394 table = &htab->stub_hash_table;
5395 bfd_hash_traverse (table, arm_build_one_stub, info);
5396 if (htab->fix_cortex_a8)
5397 {
5398 /* Place the cortex a8 stubs last. */
5399 htab->fix_cortex_a8 = -1;
5400 bfd_hash_traverse (table, arm_build_one_stub, info);
5401 }
5402
5403 return TRUE;
5404 }
5405
5406 /* Locate the Thumb encoded calling stub for NAME. */
5407
5408 static struct elf_link_hash_entry *
5409 find_thumb_glue (struct bfd_link_info *link_info,
5410 const char *name,
5411 char **error_message)
5412 {
5413 char *tmp_name;
5414 struct elf_link_hash_entry *hash;
5415 struct elf32_arm_link_hash_table *hash_table;
5416
5417 /* We need a pointer to the armelf specific hash table. */
5418 hash_table = elf32_arm_hash_table (link_info);
5419 if (hash_table == NULL)
5420 return NULL;
5421
5422 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5423 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5424
5425 BFD_ASSERT (tmp_name);
5426
5427 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5428
5429 hash = elf_link_hash_lookup
5430 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5431
5432 if (hash == NULL
5433 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5434 tmp_name, name) == -1)
5435 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5436
5437 free (tmp_name);
5438
5439 return hash;
5440 }
5441
5442 /* Locate the ARM encoded calling stub for NAME. */
5443
5444 static struct elf_link_hash_entry *
5445 find_arm_glue (struct bfd_link_info *link_info,
5446 const char *name,
5447 char **error_message)
5448 {
5449 char *tmp_name;
5450 struct elf_link_hash_entry *myh;
5451 struct elf32_arm_link_hash_table *hash_table;
5452
5453 /* We need a pointer to the elfarm specific hash table. */
5454 hash_table = elf32_arm_hash_table (link_info);
5455 if (hash_table == NULL)
5456 return NULL;
5457
5458 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5459 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5460
5461 BFD_ASSERT (tmp_name);
5462
5463 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5464
5465 myh = elf_link_hash_lookup
5466 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5467
5468 if (myh == NULL
5469 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5470 tmp_name, name) == -1)
5471 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5472
5473 free (tmp_name);
5474
5475 return myh;
5476 }
5477
5478 /* ARM->Thumb glue (static images):
5479
5480 .arm
5481 __func_from_arm:
5482 ldr r12, __func_addr
5483 bx r12
5484 __func_addr:
5485 .word func @ behave as if you saw a ARM_32 reloc.
5486
5487 (v5t static images)
5488 .arm
5489 __func_from_arm:
5490 ldr pc, __func_addr
5491 __func_addr:
5492 .word func @ behave as if you saw a ARM_32 reloc.
5493
5494 (relocatable images)
5495 .arm
5496 __func_from_arm:
5497 ldr r12, __func_offset
5498 add r12, r12, pc
5499 bx r12
5500 __func_offset:
5501 .word func - . */
5502
5503 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5504 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5505 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5506 static const insn32 a2t3_func_addr_insn = 0x00000001;
5507
5508 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5509 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5510 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5511
5512 #define ARM2THUMB_PIC_GLUE_SIZE 16
5513 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5514 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5515 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5516
5517 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5518
5519 .thumb .thumb
5520 .align 2 .align 2
5521 __func_from_thumb: __func_from_thumb:
5522 bx pc push {r6, lr}
5523 nop ldr r6, __func_addr
5524 .arm mov lr, pc
5525 b func bx r6
5526 .arm
5527 ;; back_to_thumb
5528 ldmia r13! {r6, lr}
5529 bx lr
5530 __func_addr:
5531 .word func */
5532
5533 #define THUMB2ARM_GLUE_SIZE 8
5534 static const insn16 t2a1_bx_pc_insn = 0x4778;
5535 static const insn16 t2a2_noop_insn = 0x46c0;
5536 static const insn32 t2a3_b_insn = 0xea000000;
5537
5538 #define VFP11_ERRATUM_VENEER_SIZE 8
5539
5540 #define ARM_BX_VENEER_SIZE 12
5541 static const insn32 armbx1_tst_insn = 0xe3100001;
5542 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5543 static const insn32 armbx3_bx_insn = 0xe12fff10;
5544
5545 #ifndef ELFARM_NABI_C_INCLUDED
5546 static void
5547 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5548 {
5549 asection * s;
5550 bfd_byte * contents;
5551
5552 if (size == 0)
5553 {
5554 /* Do not include empty glue sections in the output. */
5555 if (abfd != NULL)
5556 {
5557 s = bfd_get_section_by_name (abfd, name);
5558 if (s != NULL)
5559 s->flags |= SEC_EXCLUDE;
5560 }
5561 return;
5562 }
5563
5564 BFD_ASSERT (abfd != NULL);
5565
5566 s = bfd_get_section_by_name (abfd, name);
5567 BFD_ASSERT (s != NULL);
5568
5569 contents = (bfd_byte *) bfd_alloc (abfd, size);
5570
5571 BFD_ASSERT (s->size == size);
5572 s->contents = contents;
5573 }
5574
5575 bfd_boolean
5576 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5577 {
5578 struct elf32_arm_link_hash_table * globals;
5579
5580 globals = elf32_arm_hash_table (info);
5581 BFD_ASSERT (globals != NULL);
5582
5583 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5584 globals->arm_glue_size,
5585 ARM2THUMB_GLUE_SECTION_NAME);
5586
5587 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5588 globals->thumb_glue_size,
5589 THUMB2ARM_GLUE_SECTION_NAME);
5590
5591 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5592 globals->vfp11_erratum_glue_size,
5593 VFP11_ERRATUM_VENEER_SECTION_NAME);
5594
5595 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5596 globals->bx_glue_size,
5597 ARM_BX_GLUE_SECTION_NAME);
5598
5599 return TRUE;
5600 }
5601
5602 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5603 returns the symbol identifying the stub. */
5604
5605 static struct elf_link_hash_entry *
5606 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5607 struct elf_link_hash_entry * h)
5608 {
5609 const char * name = h->root.root.string;
5610 asection * s;
5611 char * tmp_name;
5612 struct elf_link_hash_entry * myh;
5613 struct bfd_link_hash_entry * bh;
5614 struct elf32_arm_link_hash_table * globals;
5615 bfd_vma val;
5616 bfd_size_type size;
5617
5618 globals = elf32_arm_hash_table (link_info);
5619 BFD_ASSERT (globals != NULL);
5620 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5621
5622 s = bfd_get_section_by_name
5623 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5624
5625 BFD_ASSERT (s != NULL);
5626
5627 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5628 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5629
5630 BFD_ASSERT (tmp_name);
5631
5632 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5633
5634 myh = elf_link_hash_lookup
5635 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5636
5637 if (myh != NULL)
5638 {
5639 /* We've already seen this guy. */
5640 free (tmp_name);
5641 return myh;
5642 }
5643
5644 /* The only trick here is using hash_table->arm_glue_size as the value.
5645 Even though the section isn't allocated yet, this is where we will be
5646 putting it. The +1 on the value marks that the stub has not been
5647 output yet - not that it is a Thumb function. */
5648 bh = NULL;
5649 val = globals->arm_glue_size + 1;
5650 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5651 tmp_name, BSF_GLOBAL, s, val,
5652 NULL, TRUE, FALSE, &bh);
5653
5654 myh = (struct elf_link_hash_entry *) bh;
5655 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5656 myh->forced_local = 1;
5657
5658 free (tmp_name);
5659
5660 if (link_info->shared || globals->root.is_relocatable_executable
5661 || globals->pic_veneer)
5662 size = ARM2THUMB_PIC_GLUE_SIZE;
5663 else if (globals->use_blx)
5664 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
5665 else
5666 size = ARM2THUMB_STATIC_GLUE_SIZE;
5667
5668 s->size += size;
5669 globals->arm_glue_size += size;
5670
5671 return myh;
5672 }
5673
5674 /* Allocate space for ARMv4 BX veneers. */
5675
5676 static void
5677 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5678 {
5679 asection * s;
5680 struct elf32_arm_link_hash_table *globals;
5681 char *tmp_name;
5682 struct elf_link_hash_entry *myh;
5683 struct bfd_link_hash_entry *bh;
5684 bfd_vma val;
5685
5686 /* BX PC does not need a veneer. */
5687 if (reg == 15)
5688 return;
5689
5690 globals = elf32_arm_hash_table (link_info);
5691 BFD_ASSERT (globals != NULL);
5692 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5693
5694 /* Check if this veneer has already been allocated. */
5695 if (globals->bx_glue_offset[reg])
5696 return;
5697
5698 s = bfd_get_section_by_name
5699 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5700
5701 BFD_ASSERT (s != NULL);
5702
5703 /* Add symbol for veneer. */
5704 tmp_name = (char *)
5705 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
5706
5707 BFD_ASSERT (tmp_name);
5708
5709 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
5710
5711 myh = elf_link_hash_lookup
5712 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
5713
5714 BFD_ASSERT (myh == NULL);
5715
5716 bh = NULL;
5717 val = globals->bx_glue_size;
5718 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5719 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5720 NULL, TRUE, FALSE, &bh);
5721
5722 myh = (struct elf_link_hash_entry *) bh;
5723 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5724 myh->forced_local = 1;
5725
5726 s->size += ARM_BX_VENEER_SIZE;
5727 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5728 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5729 }
5730
5731
5732 /* Add an entry to the code/data map for section SEC. */
5733
5734 static void
5735 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5736 {
5737 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5738 unsigned int newidx;
5739
5740 if (sec_data->map == NULL)
5741 {
5742 sec_data->map = (elf32_arm_section_map *)
5743 bfd_malloc (sizeof (elf32_arm_section_map));
5744 sec_data->mapcount = 0;
5745 sec_data->mapsize = 1;
5746 }
5747
5748 newidx = sec_data->mapcount++;
5749
5750 if (sec_data->mapcount > sec_data->mapsize)
5751 {
5752 sec_data->mapsize *= 2;
5753 sec_data->map = (elf32_arm_section_map *)
5754 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5755 * sizeof (elf32_arm_section_map));
5756 }
5757
5758 if (sec_data->map)
5759 {
5760 sec_data->map[newidx].vma = vma;
5761 sec_data->map[newidx].type = type;
5762 }
5763 }
5764
5765
5766 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5767 veneers are handled for now. */
5768
5769 static bfd_vma
5770 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5771 elf32_vfp11_erratum_list *branch,
5772 bfd *branch_bfd,
5773 asection *branch_sec,
5774 unsigned int offset)
5775 {
5776 asection *s;
5777 struct elf32_arm_link_hash_table *hash_table;
5778 char *tmp_name;
5779 struct elf_link_hash_entry *myh;
5780 struct bfd_link_hash_entry *bh;
5781 bfd_vma val;
5782 struct _arm_elf_section_data *sec_data;
5783 elf32_vfp11_erratum_list *newerr;
5784
5785 hash_table = elf32_arm_hash_table (link_info);
5786 BFD_ASSERT (hash_table != NULL);
5787 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
5788
5789 s = bfd_get_section_by_name
5790 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
5791
5792 sec_data = elf32_arm_section_data (s);
5793
5794 BFD_ASSERT (s != NULL);
5795
5796 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5797 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
5798
5799 BFD_ASSERT (tmp_name);
5800
5801 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5802 hash_table->num_vfp11_fixes);
5803
5804 myh = elf_link_hash_lookup
5805 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5806
5807 BFD_ASSERT (myh == NULL);
5808
5809 bh = NULL;
5810 val = hash_table->vfp11_erratum_glue_size;
5811 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5812 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5813 NULL, TRUE, FALSE, &bh);
5814
5815 myh = (struct elf_link_hash_entry *) bh;
5816 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5817 myh->forced_local = 1;
5818
5819 /* Link veneer back to calling location. */
5820 sec_data->erratumcount += 1;
5821 newerr = (elf32_vfp11_erratum_list *)
5822 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5823
5824 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5825 newerr->vma = -1;
5826 newerr->u.v.branch = branch;
5827 newerr->u.v.id = hash_table->num_vfp11_fixes;
5828 branch->u.b.veneer = newerr;
5829
5830 newerr->next = sec_data->erratumlist;
5831 sec_data->erratumlist = newerr;
5832
5833 /* A symbol for the return from the veneer. */
5834 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5835 hash_table->num_vfp11_fixes);
5836
5837 myh = elf_link_hash_lookup
5838 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5839
5840 if (myh != NULL)
5841 abort ();
5842
5843 bh = NULL;
5844 val = offset + 4;
5845 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5846 branch_sec, val, NULL, TRUE, FALSE, &bh);
5847
5848 myh = (struct elf_link_hash_entry *) bh;
5849 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5850 myh->forced_local = 1;
5851
5852 free (tmp_name);
5853
5854 /* Generate a mapping symbol for the veneer section, and explicitly add an
5855 entry for that symbol to the code/data map for the section. */
5856 if (hash_table->vfp11_erratum_glue_size == 0)
5857 {
5858 bh = NULL;
5859 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5860 ever requires this erratum fix. */
5861 _bfd_generic_link_add_one_symbol (link_info,
5862 hash_table->bfd_of_glue_owner, "$a",
5863 BSF_LOCAL, s, 0, NULL,
5864 TRUE, FALSE, &bh);
5865
5866 myh = (struct elf_link_hash_entry *) bh;
5867 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5868 myh->forced_local = 1;
5869
5870 /* The elf32_arm_init_maps function only cares about symbols from input
5871 BFDs. We must make a note of this generated mapping symbol
5872 ourselves so that code byteswapping works properly in
5873 elf32_arm_write_section. */
5874 elf32_arm_section_map_add (s, 'a', 0);
5875 }
5876
5877 s->size += VFP11_ERRATUM_VENEER_SIZE;
5878 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5879 hash_table->num_vfp11_fixes++;
5880
5881 /* The offset of the veneer. */
5882 return val;
5883 }
5884
5885 #define ARM_GLUE_SECTION_FLAGS \
5886 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5887 | SEC_READONLY | SEC_LINKER_CREATED)
5888
5889 /* Create a fake section for use by the ARM backend of the linker. */
5890
5891 static bfd_boolean
5892 arm_make_glue_section (bfd * abfd, const char * name)
5893 {
5894 asection * sec;
5895
5896 sec = bfd_get_section_by_name (abfd, name);
5897 if (sec != NULL)
5898 /* Already made. */
5899 return TRUE;
5900
5901 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5902
5903 if (sec == NULL
5904 || !bfd_set_section_alignment (abfd, sec, 2))
5905 return FALSE;
5906
5907 /* Set the gc mark to prevent the section from being removed by garbage
5908 collection, despite the fact that no relocs refer to this section. */
5909 sec->gc_mark = 1;
5910
5911 return TRUE;
5912 }
5913
5914 /* Add the glue sections to ABFD. This function is called from the
5915 linker scripts in ld/emultempl/{armelf}.em. */
5916
5917 bfd_boolean
5918 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5919 struct bfd_link_info *info)
5920 {
5921 /* If we are only performing a partial
5922 link do not bother adding the glue. */
5923 if (info->relocatable)
5924 return TRUE;
5925
5926 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5927 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5928 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5929 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
5930 }
5931
5932 /* Select a BFD to be used to hold the sections used by the glue code.
5933 This function is called from the linker scripts in ld/emultempl/
5934 {armelf/pe}.em. */
5935
5936 bfd_boolean
5937 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
5938 {
5939 struct elf32_arm_link_hash_table *globals;
5940
5941 /* If we are only performing a partial link
5942 do not bother getting a bfd to hold the glue. */
5943 if (info->relocatable)
5944 return TRUE;
5945
5946 /* Make sure we don't attach the glue sections to a dynamic object. */
5947 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5948
5949 globals = elf32_arm_hash_table (info);
5950 BFD_ASSERT (globals != NULL);
5951
5952 if (globals->bfd_of_glue_owner != NULL)
5953 return TRUE;
5954
5955 /* Save the bfd for later use. */
5956 globals->bfd_of_glue_owner = abfd;
5957
5958 return TRUE;
5959 }
5960
5961 static void
5962 check_use_blx (struct elf32_arm_link_hash_table *globals)
5963 {
5964 int cpu_arch;
5965
5966 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5967 Tag_CPU_arch);
5968
5969 if (globals->fix_arm1176)
5970 {
5971 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
5972 globals->use_blx = 1;
5973 }
5974 else
5975 {
5976 if (cpu_arch > TAG_CPU_ARCH_V4T)
5977 globals->use_blx = 1;
5978 }
5979 }
5980
5981 bfd_boolean
5982 bfd_elf32_arm_process_before_allocation (bfd *abfd,
5983 struct bfd_link_info *link_info)
5984 {
5985 Elf_Internal_Shdr *symtab_hdr;
5986 Elf_Internal_Rela *internal_relocs = NULL;
5987 Elf_Internal_Rela *irel, *irelend;
5988 bfd_byte *contents = NULL;
5989
5990 asection *sec;
5991 struct elf32_arm_link_hash_table *globals;
5992
5993 /* If we are only performing a partial link do not bother
5994 to construct any glue. */
5995 if (link_info->relocatable)
5996 return TRUE;
5997
5998 /* Here we have a bfd that is to be included on the link. We have a
5999 hook to do reloc rummaging, before section sizes are nailed down. */
6000 globals = elf32_arm_hash_table (link_info);
6001 BFD_ASSERT (globals != NULL);
6002
6003 check_use_blx (globals);
6004
6005 if (globals->byteswap_code && !bfd_big_endian (abfd))
6006 {
6007 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6008 abfd);
6009 return FALSE;
6010 }
6011
6012 /* PR 5398: If we have not decided to include any loadable sections in
6013 the output then we will not have a glue owner bfd. This is OK, it
6014 just means that there is nothing else for us to do here. */
6015 if (globals->bfd_of_glue_owner == NULL)
6016 return TRUE;
6017
6018 /* Rummage around all the relocs and map the glue vectors. */
6019 sec = abfd->sections;
6020
6021 if (sec == NULL)
6022 return TRUE;
6023
6024 for (; sec != NULL; sec = sec->next)
6025 {
6026 if (sec->reloc_count == 0)
6027 continue;
6028
6029 if ((sec->flags & SEC_EXCLUDE) != 0)
6030 continue;
6031
6032 symtab_hdr = & elf_symtab_hdr (abfd);
6033
6034 /* Load the relocs. */
6035 internal_relocs
6036 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6037
6038 if (internal_relocs == NULL)
6039 goto error_return;
6040
6041 irelend = internal_relocs + sec->reloc_count;
6042 for (irel = internal_relocs; irel < irelend; irel++)
6043 {
6044 long r_type;
6045 unsigned long r_index;
6046
6047 struct elf_link_hash_entry *h;
6048
6049 r_type = ELF32_R_TYPE (irel->r_info);
6050 r_index = ELF32_R_SYM (irel->r_info);
6051
6052 /* These are the only relocation types we care about. */
6053 if ( r_type != R_ARM_PC24
6054 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6055 continue;
6056
6057 /* Get the section contents if we haven't done so already. */
6058 if (contents == NULL)
6059 {
6060 /* Get cached copy if it exists. */
6061 if (elf_section_data (sec)->this_hdr.contents != NULL)
6062 contents = elf_section_data (sec)->this_hdr.contents;
6063 else
6064 {
6065 /* Go get them off disk. */
6066 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6067 goto error_return;
6068 }
6069 }
6070
6071 if (r_type == R_ARM_V4BX)
6072 {
6073 int reg;
6074
6075 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6076 record_arm_bx_glue (link_info, reg);
6077 continue;
6078 }
6079
6080 /* If the relocation is not against a symbol it cannot concern us. */
6081 h = NULL;
6082
6083 /* We don't care about local symbols. */
6084 if (r_index < symtab_hdr->sh_info)
6085 continue;
6086
6087 /* This is an external symbol. */
6088 r_index -= symtab_hdr->sh_info;
6089 h = (struct elf_link_hash_entry *)
6090 elf_sym_hashes (abfd)[r_index];
6091
6092 /* If the relocation is against a static symbol it must be within
6093 the current section and so cannot be a cross ARM/Thumb relocation. */
6094 if (h == NULL)
6095 continue;
6096
6097 /* If the call will go through a PLT entry then we do not need
6098 glue. */
6099 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6100 continue;
6101
6102 switch (r_type)
6103 {
6104 case R_ARM_PC24:
6105 /* This one is a call from arm code. We need to look up
6106 the target of the call. If it is a thumb target, we
6107 insert glue. */
6108 if (h->target_internal == ST_BRANCH_TO_THUMB)
6109 record_arm_to_thumb_glue (link_info, h);
6110 break;
6111
6112 default:
6113 abort ();
6114 }
6115 }
6116
6117 if (contents != NULL
6118 && elf_section_data (sec)->this_hdr.contents != contents)
6119 free (contents);
6120 contents = NULL;
6121
6122 if (internal_relocs != NULL
6123 && elf_section_data (sec)->relocs != internal_relocs)
6124 free (internal_relocs);
6125 internal_relocs = NULL;
6126 }
6127
6128 return TRUE;
6129
6130 error_return:
6131 if (contents != NULL
6132 && elf_section_data (sec)->this_hdr.contents != contents)
6133 free (contents);
6134 if (internal_relocs != NULL
6135 && elf_section_data (sec)->relocs != internal_relocs)
6136 free (internal_relocs);
6137
6138 return FALSE;
6139 }
6140 #endif
6141
6142
6143 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6144
6145 void
6146 bfd_elf32_arm_init_maps (bfd *abfd)
6147 {
6148 Elf_Internal_Sym *isymbuf;
6149 Elf_Internal_Shdr *hdr;
6150 unsigned int i, localsyms;
6151
6152 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6153 if (! is_arm_elf (abfd))
6154 return;
6155
6156 if ((abfd->flags & DYNAMIC) != 0)
6157 return;
6158
6159 hdr = & elf_symtab_hdr (abfd);
6160 localsyms = hdr->sh_info;
6161
6162 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6163 should contain the number of local symbols, which should come before any
6164 global symbols. Mapping symbols are always local. */
6165 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6166 NULL);
6167
6168 /* No internal symbols read? Skip this BFD. */
6169 if (isymbuf == NULL)
6170 return;
6171
6172 for (i = 0; i < localsyms; i++)
6173 {
6174 Elf_Internal_Sym *isym = &isymbuf[i];
6175 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6176 const char *name;
6177
6178 if (sec != NULL
6179 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6180 {
6181 name = bfd_elf_string_from_elf_section (abfd,
6182 hdr->sh_link, isym->st_name);
6183
6184 if (bfd_is_arm_special_symbol_name (name,
6185 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6186 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6187 }
6188 }
6189 }
6190
6191
6192 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6193 say what they wanted. */
6194
6195 void
6196 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6197 {
6198 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6199 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6200
6201 if (globals == NULL)
6202 return;
6203
6204 if (globals->fix_cortex_a8 == -1)
6205 {
6206 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6207 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6208 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6209 || out_attr[Tag_CPU_arch_profile].i == 0))
6210 globals->fix_cortex_a8 = 1;
6211 else
6212 globals->fix_cortex_a8 = 0;
6213 }
6214 }
6215
6216
6217 void
6218 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6219 {
6220 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6221 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6222
6223 if (globals == NULL)
6224 return;
6225 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6226 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6227 {
6228 switch (globals->vfp11_fix)
6229 {
6230 case BFD_ARM_VFP11_FIX_DEFAULT:
6231 case BFD_ARM_VFP11_FIX_NONE:
6232 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6233 break;
6234
6235 default:
6236 /* Give a warning, but do as the user requests anyway. */
6237 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6238 "workaround is not necessary for target architecture"), obfd);
6239 }
6240 }
6241 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6242 /* For earlier architectures, we might need the workaround, but do not
6243 enable it by default. If users is running with broken hardware, they
6244 must enable the erratum fix explicitly. */
6245 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6246 }
6247
6248
6249 enum bfd_arm_vfp11_pipe
6250 {
6251 VFP11_FMAC,
6252 VFP11_LS,
6253 VFP11_DS,
6254 VFP11_BAD
6255 };
6256
6257 /* Return a VFP register number. This is encoded as RX:X for single-precision
6258 registers, or X:RX for double-precision registers, where RX is the group of
6259 four bits in the instruction encoding and X is the single extension bit.
6260 RX and X fields are specified using their lowest (starting) bit. The return
6261 value is:
6262
6263 0...31: single-precision registers s0...s31
6264 32...63: double-precision registers d0...d31.
6265
6266 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6267 encounter VFP3 instructions, so we allow the full range for DP registers. */
6268
6269 static unsigned int
6270 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6271 unsigned int x)
6272 {
6273 if (is_double)
6274 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6275 else
6276 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6277 }
6278
6279 /* Set bits in *WMASK according to a register number REG as encoded by
6280 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6281
6282 static void
6283 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6284 {
6285 if (reg < 32)
6286 *wmask |= 1 << reg;
6287 else if (reg < 48)
6288 *wmask |= 3 << ((reg - 32) * 2);
6289 }
6290
6291 /* Return TRUE if WMASK overwrites anything in REGS. */
6292
6293 static bfd_boolean
6294 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6295 {
6296 int i;
6297
6298 for (i = 0; i < numregs; i++)
6299 {
6300 unsigned int reg = regs[i];
6301
6302 if (reg < 32 && (wmask & (1 << reg)) != 0)
6303 return TRUE;
6304
6305 reg -= 32;
6306
6307 if (reg >= 16)
6308 continue;
6309
6310 if ((wmask & (3 << (reg * 2))) != 0)
6311 return TRUE;
6312 }
6313
6314 return FALSE;
6315 }
6316
6317 /* In this function, we're interested in two things: finding input registers
6318 for VFP data-processing instructions, and finding the set of registers which
6319 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6320 hold the written set, so FLDM etc. are easy to deal with (we're only
6321 interested in 32 SP registers or 16 dp registers, due to the VFP version
6322 implemented by the chip in question). DP registers are marked by setting
6323 both SP registers in the write mask). */
6324
6325 static enum bfd_arm_vfp11_pipe
6326 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6327 int *numregs)
6328 {
6329 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6330 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6331
6332 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6333 {
6334 unsigned int pqrs;
6335 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6336 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6337
6338 pqrs = ((insn & 0x00800000) >> 20)
6339 | ((insn & 0x00300000) >> 19)
6340 | ((insn & 0x00000040) >> 6);
6341
6342 switch (pqrs)
6343 {
6344 case 0: /* fmac[sd]. */
6345 case 1: /* fnmac[sd]. */
6346 case 2: /* fmsc[sd]. */
6347 case 3: /* fnmsc[sd]. */
6348 vpipe = VFP11_FMAC;
6349 bfd_arm_vfp11_write_mask (destmask, fd);
6350 regs[0] = fd;
6351 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6352 regs[2] = fm;
6353 *numregs = 3;
6354 break;
6355
6356 case 4: /* fmul[sd]. */
6357 case 5: /* fnmul[sd]. */
6358 case 6: /* fadd[sd]. */
6359 case 7: /* fsub[sd]. */
6360 vpipe = VFP11_FMAC;
6361 goto vfp_binop;
6362
6363 case 8: /* fdiv[sd]. */
6364 vpipe = VFP11_DS;
6365 vfp_binop:
6366 bfd_arm_vfp11_write_mask (destmask, fd);
6367 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6368 regs[1] = fm;
6369 *numregs = 2;
6370 break;
6371
6372 case 15: /* extended opcode. */
6373 {
6374 unsigned int extn = ((insn >> 15) & 0x1e)
6375 | ((insn >> 7) & 1);
6376
6377 switch (extn)
6378 {
6379 case 0: /* fcpy[sd]. */
6380 case 1: /* fabs[sd]. */
6381 case 2: /* fneg[sd]. */
6382 case 8: /* fcmp[sd]. */
6383 case 9: /* fcmpe[sd]. */
6384 case 10: /* fcmpz[sd]. */
6385 case 11: /* fcmpez[sd]. */
6386 case 16: /* fuito[sd]. */
6387 case 17: /* fsito[sd]. */
6388 case 24: /* ftoui[sd]. */
6389 case 25: /* ftouiz[sd]. */
6390 case 26: /* ftosi[sd]. */
6391 case 27: /* ftosiz[sd]. */
6392 /* These instructions will not bounce due to underflow. */
6393 *numregs = 0;
6394 vpipe = VFP11_FMAC;
6395 break;
6396
6397 case 3: /* fsqrt[sd]. */
6398 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6399 registers to cause the erratum in previous instructions. */
6400 bfd_arm_vfp11_write_mask (destmask, fd);
6401 vpipe = VFP11_DS;
6402 break;
6403
6404 case 15: /* fcvt{ds,sd}. */
6405 {
6406 int rnum = 0;
6407
6408 bfd_arm_vfp11_write_mask (destmask, fd);
6409
6410 /* Only FCVTSD can underflow. */
6411 if ((insn & 0x100) != 0)
6412 regs[rnum++] = fm;
6413
6414 *numregs = rnum;
6415
6416 vpipe = VFP11_FMAC;
6417 }
6418 break;
6419
6420 default:
6421 return VFP11_BAD;
6422 }
6423 }
6424 break;
6425
6426 default:
6427 return VFP11_BAD;
6428 }
6429 }
6430 /* Two-register transfer. */
6431 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6432 {
6433 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6434
6435 if ((insn & 0x100000) == 0)
6436 {
6437 if (is_double)
6438 bfd_arm_vfp11_write_mask (destmask, fm);
6439 else
6440 {
6441 bfd_arm_vfp11_write_mask (destmask, fm);
6442 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6443 }
6444 }
6445
6446 vpipe = VFP11_LS;
6447 }
6448 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6449 {
6450 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6451 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6452
6453 switch (puw)
6454 {
6455 case 0: /* Two-reg transfer. We should catch these above. */
6456 abort ();
6457
6458 case 2: /* fldm[sdx]. */
6459 case 3:
6460 case 5:
6461 {
6462 unsigned int i, offset = insn & 0xff;
6463
6464 if (is_double)
6465 offset >>= 1;
6466
6467 for (i = fd; i < fd + offset; i++)
6468 bfd_arm_vfp11_write_mask (destmask, i);
6469 }
6470 break;
6471
6472 case 4: /* fld[sd]. */
6473 case 6:
6474 bfd_arm_vfp11_write_mask (destmask, fd);
6475 break;
6476
6477 default:
6478 return VFP11_BAD;
6479 }
6480
6481 vpipe = VFP11_LS;
6482 }
6483 /* Single-register transfer. Note L==0. */
6484 else if ((insn & 0x0f100e10) == 0x0e000a10)
6485 {
6486 unsigned int opcode = (insn >> 21) & 7;
6487 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6488
6489 switch (opcode)
6490 {
6491 case 0: /* fmsr/fmdlr. */
6492 case 1: /* fmdhr. */
6493 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6494 destination register. I don't know if this is exactly right,
6495 but it is the conservative choice. */
6496 bfd_arm_vfp11_write_mask (destmask, fn);
6497 break;
6498
6499 case 7: /* fmxr. */
6500 break;
6501 }
6502
6503 vpipe = VFP11_LS;
6504 }
6505
6506 return vpipe;
6507 }
6508
6509
6510 static int elf32_arm_compare_mapping (const void * a, const void * b);
6511
6512
6513 /* Look for potentially-troublesome code sequences which might trigger the
6514 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6515 (available from ARM) for details of the erratum. A short version is
6516 described in ld.texinfo. */
6517
6518 bfd_boolean
6519 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6520 {
6521 asection *sec;
6522 bfd_byte *contents = NULL;
6523 int state = 0;
6524 int regs[3], numregs = 0;
6525 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6526 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
6527
6528 if (globals == NULL)
6529 return FALSE;
6530
6531 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6532 The states transition as follows:
6533
6534 0 -> 1 (vector) or 0 -> 2 (scalar)
6535 A VFP FMAC-pipeline instruction has been seen. Fill
6536 regs[0]..regs[numregs-1] with its input operands. Remember this
6537 instruction in 'first_fmac'.
6538
6539 1 -> 2
6540 Any instruction, except for a VFP instruction which overwrites
6541 regs[*].
6542
6543 1 -> 3 [ -> 0 ] or
6544 2 -> 3 [ -> 0 ]
6545 A VFP instruction has been seen which overwrites any of regs[*].
6546 We must make a veneer! Reset state to 0 before examining next
6547 instruction.
6548
6549 2 -> 0
6550 If we fail to match anything in state 2, reset to state 0 and reset
6551 the instruction pointer to the instruction after 'first_fmac'.
6552
6553 If the VFP11 vector mode is in use, there must be at least two unrelated
6554 instructions between anti-dependent VFP11 instructions to properly avoid
6555 triggering the erratum, hence the use of the extra state 1. */
6556
6557 /* If we are only performing a partial link do not bother
6558 to construct any glue. */
6559 if (link_info->relocatable)
6560 return TRUE;
6561
6562 /* Skip if this bfd does not correspond to an ELF image. */
6563 if (! is_arm_elf (abfd))
6564 return TRUE;
6565
6566 /* We should have chosen a fix type by the time we get here. */
6567 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6568
6569 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6570 return TRUE;
6571
6572 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6573 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6574 return TRUE;
6575
6576 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6577 {
6578 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6579 struct _arm_elf_section_data *sec_data;
6580
6581 /* If we don't have executable progbits, we're not interested in this
6582 section. Also skip if section is to be excluded. */
6583 if (elf_section_type (sec) != SHT_PROGBITS
6584 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6585 || (sec->flags & SEC_EXCLUDE) != 0
6586 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
6587 || sec->output_section == bfd_abs_section_ptr
6588 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6589 continue;
6590
6591 sec_data = elf32_arm_section_data (sec);
6592
6593 if (sec_data->mapcount == 0)
6594 continue;
6595
6596 if (elf_section_data (sec)->this_hdr.contents != NULL)
6597 contents = elf_section_data (sec)->this_hdr.contents;
6598 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6599 goto error_return;
6600
6601 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6602 elf32_arm_compare_mapping);
6603
6604 for (span = 0; span < sec_data->mapcount; span++)
6605 {
6606 unsigned int span_start = sec_data->map[span].vma;
6607 unsigned int span_end = (span == sec_data->mapcount - 1)
6608 ? sec->size : sec_data->map[span + 1].vma;
6609 char span_type = sec_data->map[span].type;
6610
6611 /* FIXME: Only ARM mode is supported at present. We may need to
6612 support Thumb-2 mode also at some point. */
6613 if (span_type != 'a')
6614 continue;
6615
6616 for (i = span_start; i < span_end;)
6617 {
6618 unsigned int next_i = i + 4;
6619 unsigned int insn = bfd_big_endian (abfd)
6620 ? (contents[i] << 24)
6621 | (contents[i + 1] << 16)
6622 | (contents[i + 2] << 8)
6623 | contents[i + 3]
6624 : (contents[i + 3] << 24)
6625 | (contents[i + 2] << 16)
6626 | (contents[i + 1] << 8)
6627 | contents[i];
6628 unsigned int writemask = 0;
6629 enum bfd_arm_vfp11_pipe vpipe;
6630
6631 switch (state)
6632 {
6633 case 0:
6634 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6635 &numregs);
6636 /* I'm assuming the VFP11 erratum can trigger with denorm
6637 operands on either the FMAC or the DS pipeline. This might
6638 lead to slightly overenthusiastic veneer insertion. */
6639 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6640 {
6641 state = use_vector ? 1 : 2;
6642 first_fmac = i;
6643 veneer_of_insn = insn;
6644 }
6645 break;
6646
6647 case 1:
6648 {
6649 int other_regs[3], other_numregs;
6650 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6651 other_regs,
6652 &other_numregs);
6653 if (vpipe != VFP11_BAD
6654 && bfd_arm_vfp11_antidependency (writemask, regs,
6655 numregs))
6656 state = 3;
6657 else
6658 state = 2;
6659 }
6660 break;
6661
6662 case 2:
6663 {
6664 int other_regs[3], other_numregs;
6665 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6666 other_regs,
6667 &other_numregs);
6668 if (vpipe != VFP11_BAD
6669 && bfd_arm_vfp11_antidependency (writemask, regs,
6670 numregs))
6671 state = 3;
6672 else
6673 {
6674 state = 0;
6675 next_i = first_fmac + 4;
6676 }
6677 }
6678 break;
6679
6680 case 3:
6681 abort (); /* Should be unreachable. */
6682 }
6683
6684 if (state == 3)
6685 {
6686 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6687 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6688
6689 elf32_arm_section_data (sec)->erratumcount += 1;
6690
6691 newerr->u.b.vfp_insn = veneer_of_insn;
6692
6693 switch (span_type)
6694 {
6695 case 'a':
6696 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6697 break;
6698
6699 default:
6700 abort ();
6701 }
6702
6703 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6704 first_fmac);
6705
6706 newerr->vma = -1;
6707
6708 newerr->next = sec_data->erratumlist;
6709 sec_data->erratumlist = newerr;
6710
6711 state = 0;
6712 }
6713
6714 i = next_i;
6715 }
6716 }
6717
6718 if (contents != NULL
6719 && elf_section_data (sec)->this_hdr.contents != contents)
6720 free (contents);
6721 contents = NULL;
6722 }
6723
6724 return TRUE;
6725
6726 error_return:
6727 if (contents != NULL
6728 && elf_section_data (sec)->this_hdr.contents != contents)
6729 free (contents);
6730
6731 return FALSE;
6732 }
6733
6734 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6735 after sections have been laid out, using specially-named symbols. */
6736
6737 void
6738 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6739 struct bfd_link_info *link_info)
6740 {
6741 asection *sec;
6742 struct elf32_arm_link_hash_table *globals;
6743 char *tmp_name;
6744
6745 if (link_info->relocatable)
6746 return;
6747
6748 /* Skip if this bfd does not correspond to an ELF image. */
6749 if (! is_arm_elf (abfd))
6750 return;
6751
6752 globals = elf32_arm_hash_table (link_info);
6753 if (globals == NULL)
6754 return;
6755
6756 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6757 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6758
6759 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6760 {
6761 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6762 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
6763
6764 for (; errnode != NULL; errnode = errnode->next)
6765 {
6766 struct elf_link_hash_entry *myh;
6767 bfd_vma vma;
6768
6769 switch (errnode->type)
6770 {
6771 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6772 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6773 /* Find veneer symbol. */
6774 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6775 errnode->u.b.veneer->u.v.id);
6776
6777 myh = elf_link_hash_lookup
6778 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6779
6780 if (myh == NULL)
6781 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6782 "`%s'"), abfd, tmp_name);
6783
6784 vma = myh->root.u.def.section->output_section->vma
6785 + myh->root.u.def.section->output_offset
6786 + myh->root.u.def.value;
6787
6788 errnode->u.b.veneer->vma = vma;
6789 break;
6790
6791 case VFP11_ERRATUM_ARM_VENEER:
6792 case VFP11_ERRATUM_THUMB_VENEER:
6793 /* Find return location. */
6794 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6795 errnode->u.v.id);
6796
6797 myh = elf_link_hash_lookup
6798 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6799
6800 if (myh == NULL)
6801 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6802 "`%s'"), abfd, tmp_name);
6803
6804 vma = myh->root.u.def.section->output_section->vma
6805 + myh->root.u.def.section->output_offset
6806 + myh->root.u.def.value;
6807
6808 errnode->u.v.branch->vma = vma;
6809 break;
6810
6811 default:
6812 abort ();
6813 }
6814 }
6815 }
6816
6817 free (tmp_name);
6818 }
6819
6820
6821 /* Set target relocation values needed during linking. */
6822
6823 void
6824 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6825 struct bfd_link_info *link_info,
6826 int target1_is_rel,
6827 char * target2_type,
6828 int fix_v4bx,
6829 int use_blx,
6830 bfd_arm_vfp11_fix vfp11_fix,
6831 int no_enum_warn, int no_wchar_warn,
6832 int pic_veneer, int fix_cortex_a8,
6833 int fix_arm1176)
6834 {
6835 struct elf32_arm_link_hash_table *globals;
6836
6837 globals = elf32_arm_hash_table (link_info);
6838 if (globals == NULL)
6839 return;
6840
6841 globals->target1_is_rel = target1_is_rel;
6842 if (strcmp (target2_type, "rel") == 0)
6843 globals->target2_reloc = R_ARM_REL32;
6844 else if (strcmp (target2_type, "abs") == 0)
6845 globals->target2_reloc = R_ARM_ABS32;
6846 else if (strcmp (target2_type, "got-rel") == 0)
6847 globals->target2_reloc = R_ARM_GOT_PREL;
6848 else
6849 {
6850 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6851 target2_type);
6852 }
6853 globals->fix_v4bx = fix_v4bx;
6854 globals->use_blx |= use_blx;
6855 globals->vfp11_fix = vfp11_fix;
6856 globals->pic_veneer = pic_veneer;
6857 globals->fix_cortex_a8 = fix_cortex_a8;
6858 globals->fix_arm1176 = fix_arm1176;
6859
6860 BFD_ASSERT (is_arm_elf (output_bfd));
6861 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
6862 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
6863 }
6864
6865 /* Replace the target offset of a Thumb bl or b.w instruction. */
6866
6867 static void
6868 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6869 {
6870 bfd_vma upper;
6871 bfd_vma lower;
6872 int reloc_sign;
6873
6874 BFD_ASSERT ((offset & 1) == 0);
6875
6876 upper = bfd_get_16 (abfd, insn);
6877 lower = bfd_get_16 (abfd, insn + 2);
6878 reloc_sign = (offset < 0) ? 1 : 0;
6879 upper = (upper & ~(bfd_vma) 0x7ff)
6880 | ((offset >> 12) & 0x3ff)
6881 | (reloc_sign << 10);
6882 lower = (lower & ~(bfd_vma) 0x2fff)
6883 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6884 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6885 | ((offset >> 1) & 0x7ff);
6886 bfd_put_16 (abfd, upper, insn);
6887 bfd_put_16 (abfd, lower, insn + 2);
6888 }
6889
6890 /* Thumb code calling an ARM function. */
6891
6892 static int
6893 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6894 const char * name,
6895 bfd * input_bfd,
6896 bfd * output_bfd,
6897 asection * input_section,
6898 bfd_byte * hit_data,
6899 asection * sym_sec,
6900 bfd_vma offset,
6901 bfd_signed_vma addend,
6902 bfd_vma val,
6903 char **error_message)
6904 {
6905 asection * s = 0;
6906 bfd_vma my_offset;
6907 long int ret_offset;
6908 struct elf_link_hash_entry * myh;
6909 struct elf32_arm_link_hash_table * globals;
6910
6911 myh = find_thumb_glue (info, name, error_message);
6912 if (myh == NULL)
6913 return FALSE;
6914
6915 globals = elf32_arm_hash_table (info);
6916 BFD_ASSERT (globals != NULL);
6917 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6918
6919 my_offset = myh->root.u.def.value;
6920
6921 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6922 THUMB2ARM_GLUE_SECTION_NAME);
6923
6924 BFD_ASSERT (s != NULL);
6925 BFD_ASSERT (s->contents != NULL);
6926 BFD_ASSERT (s->output_section != NULL);
6927
6928 if ((my_offset & 0x01) == 0x01)
6929 {
6930 if (sym_sec != NULL
6931 && sym_sec->owner != NULL
6932 && !INTERWORK_FLAG (sym_sec->owner))
6933 {
6934 (*_bfd_error_handler)
6935 (_("%B(%s): warning: interworking not enabled.\n"
6936 " first occurrence: %B: Thumb call to ARM"),
6937 sym_sec->owner, input_bfd, name);
6938
6939 return FALSE;
6940 }
6941
6942 --my_offset;
6943 myh->root.u.def.value = my_offset;
6944
6945 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6946 s->contents + my_offset);
6947
6948 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6949 s->contents + my_offset + 2);
6950
6951 ret_offset =
6952 /* Address of destination of the stub. */
6953 ((bfd_signed_vma) val)
6954 - ((bfd_signed_vma)
6955 /* Offset from the start of the current section
6956 to the start of the stubs. */
6957 (s->output_offset
6958 /* Offset of the start of this stub from the start of the stubs. */
6959 + my_offset
6960 /* Address of the start of the current section. */
6961 + s->output_section->vma)
6962 /* The branch instruction is 4 bytes into the stub. */
6963 + 4
6964 /* ARM branches work from the pc of the instruction + 8. */
6965 + 8);
6966
6967 put_arm_insn (globals, output_bfd,
6968 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6969 s->contents + my_offset + 4);
6970 }
6971
6972 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6973
6974 /* Now go back and fix up the original BL insn to point to here. */
6975 ret_offset =
6976 /* Address of where the stub is located. */
6977 (s->output_section->vma + s->output_offset + my_offset)
6978 /* Address of where the BL is located. */
6979 - (input_section->output_section->vma + input_section->output_offset
6980 + offset)
6981 /* Addend in the relocation. */
6982 - addend
6983 /* Biassing for PC-relative addressing. */
6984 - 8;
6985
6986 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
6987
6988 return TRUE;
6989 }
6990
6991 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
6992
6993 static struct elf_link_hash_entry *
6994 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6995 const char * name,
6996 bfd * input_bfd,
6997 bfd * output_bfd,
6998 asection * sym_sec,
6999 bfd_vma val,
7000 asection * s,
7001 char ** error_message)
7002 {
7003 bfd_vma my_offset;
7004 long int ret_offset;
7005 struct elf_link_hash_entry * myh;
7006 struct elf32_arm_link_hash_table * globals;
7007
7008 myh = find_arm_glue (info, name, error_message);
7009 if (myh == NULL)
7010 return NULL;
7011
7012 globals = elf32_arm_hash_table (info);
7013 BFD_ASSERT (globals != NULL);
7014 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7015
7016 my_offset = myh->root.u.def.value;
7017
7018 if ((my_offset & 0x01) == 0x01)
7019 {
7020 if (sym_sec != NULL
7021 && sym_sec->owner != NULL
7022 && !INTERWORK_FLAG (sym_sec->owner))
7023 {
7024 (*_bfd_error_handler)
7025 (_("%B(%s): warning: interworking not enabled.\n"
7026 " first occurrence: %B: arm call to thumb"),
7027 sym_sec->owner, input_bfd, name);
7028 }
7029
7030 --my_offset;
7031 myh->root.u.def.value = my_offset;
7032
7033 if (info->shared || globals->root.is_relocatable_executable
7034 || globals->pic_veneer)
7035 {
7036 /* For relocatable objects we can't use absolute addresses,
7037 so construct the address from a relative offset. */
7038 /* TODO: If the offset is small it's probably worth
7039 constructing the address with adds. */
7040 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7041 s->contents + my_offset);
7042 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7043 s->contents + my_offset + 4);
7044 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7045 s->contents + my_offset + 8);
7046 /* Adjust the offset by 4 for the position of the add,
7047 and 8 for the pipeline offset. */
7048 ret_offset = (val - (s->output_offset
7049 + s->output_section->vma
7050 + my_offset + 12))
7051 | 1;
7052 bfd_put_32 (output_bfd, ret_offset,
7053 s->contents + my_offset + 12);
7054 }
7055 else if (globals->use_blx)
7056 {
7057 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7058 s->contents + my_offset);
7059
7060 /* It's a thumb address. Add the low order bit. */
7061 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7062 s->contents + my_offset + 4);
7063 }
7064 else
7065 {
7066 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7067 s->contents + my_offset);
7068
7069 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7070 s->contents + my_offset + 4);
7071
7072 /* It's a thumb address. Add the low order bit. */
7073 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7074 s->contents + my_offset + 8);
7075
7076 my_offset += 12;
7077 }
7078 }
7079
7080 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7081
7082 return myh;
7083 }
7084
7085 /* Arm code calling a Thumb function. */
7086
7087 static int
7088 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7089 const char * name,
7090 bfd * input_bfd,
7091 bfd * output_bfd,
7092 asection * input_section,
7093 bfd_byte * hit_data,
7094 asection * sym_sec,
7095 bfd_vma offset,
7096 bfd_signed_vma addend,
7097 bfd_vma val,
7098 char **error_message)
7099 {
7100 unsigned long int tmp;
7101 bfd_vma my_offset;
7102 asection * s;
7103 long int ret_offset;
7104 struct elf_link_hash_entry * myh;
7105 struct elf32_arm_link_hash_table * globals;
7106
7107 globals = elf32_arm_hash_table (info);
7108 BFD_ASSERT (globals != NULL);
7109 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7110
7111 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7112 ARM2THUMB_GLUE_SECTION_NAME);
7113 BFD_ASSERT (s != NULL);
7114 BFD_ASSERT (s->contents != NULL);
7115 BFD_ASSERT (s->output_section != NULL);
7116
7117 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
7118 sym_sec, val, s, error_message);
7119 if (!myh)
7120 return FALSE;
7121
7122 my_offset = myh->root.u.def.value;
7123 tmp = bfd_get_32 (input_bfd, hit_data);
7124 tmp = tmp & 0xFF000000;
7125
7126 /* Somehow these are both 4 too far, so subtract 8. */
7127 ret_offset = (s->output_offset
7128 + my_offset
7129 + s->output_section->vma
7130 - (input_section->output_offset
7131 + input_section->output_section->vma
7132 + offset + addend)
7133 - 8);
7134
7135 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7136
7137 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
7138
7139 return TRUE;
7140 }
7141
7142 /* Populate Arm stub for an exported Thumb function. */
7143
7144 static bfd_boolean
7145 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7146 {
7147 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7148 asection * s;
7149 struct elf_link_hash_entry * myh;
7150 struct elf32_arm_link_hash_entry *eh;
7151 struct elf32_arm_link_hash_table * globals;
7152 asection *sec;
7153 bfd_vma val;
7154 char *error_message;
7155
7156 eh = elf32_arm_hash_entry (h);
7157 /* Allocate stubs for exported Thumb functions on v4t. */
7158 if (eh->export_glue == NULL)
7159 return TRUE;
7160
7161 globals = elf32_arm_hash_table (info);
7162 BFD_ASSERT (globals != NULL);
7163 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7164
7165 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7166 ARM2THUMB_GLUE_SECTION_NAME);
7167 BFD_ASSERT (s != NULL);
7168 BFD_ASSERT (s->contents != NULL);
7169 BFD_ASSERT (s->output_section != NULL);
7170
7171 sec = eh->export_glue->root.u.def.section;
7172
7173 BFD_ASSERT (sec->output_section != NULL);
7174
7175 val = eh->export_glue->root.u.def.value + sec->output_offset
7176 + sec->output_section->vma;
7177
7178 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7179 h->root.u.def.section->owner,
7180 globals->obfd, sec, val, s,
7181 &error_message);
7182 BFD_ASSERT (myh);
7183 return TRUE;
7184 }
7185
7186 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7187
7188 static bfd_vma
7189 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7190 {
7191 bfd_byte *p;
7192 bfd_vma glue_addr;
7193 asection *s;
7194 struct elf32_arm_link_hash_table *globals;
7195
7196 globals = elf32_arm_hash_table (info);
7197 BFD_ASSERT (globals != NULL);
7198 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7199
7200 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7201 ARM_BX_GLUE_SECTION_NAME);
7202 BFD_ASSERT (s != NULL);
7203 BFD_ASSERT (s->contents != NULL);
7204 BFD_ASSERT (s->output_section != NULL);
7205
7206 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7207
7208 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7209
7210 if ((globals->bx_glue_offset[reg] & 1) == 0)
7211 {
7212 p = s->contents + glue_addr;
7213 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7214 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7215 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7216 globals->bx_glue_offset[reg] |= 1;
7217 }
7218
7219 return glue_addr + s->output_section->vma + s->output_offset;
7220 }
7221
7222 /* Generate Arm stubs for exported Thumb symbols. */
7223 static void
7224 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
7225 struct bfd_link_info *link_info)
7226 {
7227 struct elf32_arm_link_hash_table * globals;
7228
7229 if (link_info == NULL)
7230 /* Ignore this if we are not called by the ELF backend linker. */
7231 return;
7232
7233 globals = elf32_arm_hash_table (link_info);
7234 if (globals == NULL)
7235 return;
7236
7237 /* If blx is available then exported Thumb symbols are OK and there is
7238 nothing to do. */
7239 if (globals->use_blx)
7240 return;
7241
7242 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7243 link_info);
7244 }
7245
7246 /* Reserve space for COUNT dynamic relocations in relocation selection
7247 SRELOC. */
7248
7249 static void
7250 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7251 bfd_size_type count)
7252 {
7253 struct elf32_arm_link_hash_table *htab;
7254
7255 htab = elf32_arm_hash_table (info);
7256 BFD_ASSERT (htab->root.dynamic_sections_created);
7257 if (sreloc == NULL)
7258 abort ();
7259 sreloc->size += RELOC_SIZE (htab) * count;
7260 }
7261
7262 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7263 dynamic, the relocations should go in SRELOC, otherwise they should
7264 go in the special .rel.iplt section. */
7265
7266 static void
7267 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7268 bfd_size_type count)
7269 {
7270 struct elf32_arm_link_hash_table *htab;
7271
7272 htab = elf32_arm_hash_table (info);
7273 if (!htab->root.dynamic_sections_created)
7274 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7275 else
7276 {
7277 BFD_ASSERT (sreloc != NULL);
7278 sreloc->size += RELOC_SIZE (htab) * count;
7279 }
7280 }
7281
7282 /* Add relocation REL to the end of relocation section SRELOC. */
7283
7284 static void
7285 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7286 asection *sreloc, Elf_Internal_Rela *rel)
7287 {
7288 bfd_byte *loc;
7289 struct elf32_arm_link_hash_table *htab;
7290
7291 htab = elf32_arm_hash_table (info);
7292 if (!htab->root.dynamic_sections_created
7293 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7294 sreloc = htab->root.irelplt;
7295 if (sreloc == NULL)
7296 abort ();
7297 loc = sreloc->contents;
7298 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7299 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7300 abort ();
7301 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7302 }
7303
7304 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7305 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7306 to .plt. */
7307
7308 static void
7309 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7310 bfd_boolean is_iplt_entry,
7311 union gotplt_union *root_plt,
7312 struct arm_plt_info *arm_plt)
7313 {
7314 struct elf32_arm_link_hash_table *htab;
7315 asection *splt;
7316 asection *sgotplt;
7317
7318 htab = elf32_arm_hash_table (info);
7319
7320 if (is_iplt_entry)
7321 {
7322 splt = htab->root.iplt;
7323 sgotplt = htab->root.igotplt;
7324
7325 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7326 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7327 }
7328 else
7329 {
7330 splt = htab->root.splt;
7331 sgotplt = htab->root.sgotplt;
7332
7333 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7334 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7335
7336 /* If this is the first .plt entry, make room for the special
7337 first entry. */
7338 if (splt->size == 0)
7339 splt->size += htab->plt_header_size;
7340 }
7341
7342 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7343 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7344 splt->size += PLT_THUMB_STUB_SIZE;
7345 root_plt->offset = splt->size;
7346 splt->size += htab->plt_entry_size;
7347
7348 if (!htab->symbian_p)
7349 {
7350 /* We also need to make an entry in the .got.plt section, which
7351 will be placed in the .got section by the linker script. */
7352 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7353 sgotplt->size += 4;
7354 }
7355 }
7356
7357 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7358 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7359 Otherwise, DYNINDX is the index of the symbol in the dynamic
7360 symbol table and SYM_VALUE is undefined.
7361
7362 ROOT_PLT points to the offset of the PLT entry from the start of its
7363 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7364 bookkeeping information. */
7365
7366 static void
7367 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7368 union gotplt_union *root_plt,
7369 struct arm_plt_info *arm_plt,
7370 int dynindx, bfd_vma sym_value)
7371 {
7372 struct elf32_arm_link_hash_table *htab;
7373 asection *sgot;
7374 asection *splt;
7375 asection *srel;
7376 bfd_byte *loc;
7377 bfd_vma plt_index;
7378 Elf_Internal_Rela rel;
7379 bfd_vma plt_header_size;
7380 bfd_vma got_header_size;
7381
7382 htab = elf32_arm_hash_table (info);
7383
7384 /* Pick the appropriate sections and sizes. */
7385 if (dynindx == -1)
7386 {
7387 splt = htab->root.iplt;
7388 sgot = htab->root.igotplt;
7389 srel = htab->root.irelplt;
7390
7391 /* There are no reserved entries in .igot.plt, and no special
7392 first entry in .iplt. */
7393 got_header_size = 0;
7394 plt_header_size = 0;
7395 }
7396 else
7397 {
7398 splt = htab->root.splt;
7399 sgot = htab->root.sgotplt;
7400 srel = htab->root.srelplt;
7401
7402 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7403 plt_header_size = htab->plt_header_size;
7404 }
7405 BFD_ASSERT (splt != NULL && srel != NULL);
7406
7407 /* Fill in the entry in the procedure linkage table. */
7408 if (htab->symbian_p)
7409 {
7410 BFD_ASSERT (dynindx >= 0);
7411 put_arm_insn (htab, output_bfd,
7412 elf32_arm_symbian_plt_entry[0],
7413 splt->contents + root_plt->offset);
7414 bfd_put_32 (output_bfd,
7415 elf32_arm_symbian_plt_entry[1],
7416 splt->contents + root_plt->offset + 4);
7417
7418 /* Fill in the entry in the .rel.plt section. */
7419 rel.r_offset = (splt->output_section->vma
7420 + splt->output_offset
7421 + root_plt->offset + 4);
7422 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7423
7424 /* Get the index in the procedure linkage table which
7425 corresponds to this symbol. This is the index of this symbol
7426 in all the symbols for which we are making plt entries. The
7427 first entry in the procedure linkage table is reserved. */
7428 plt_index = ((root_plt->offset - plt_header_size)
7429 / htab->plt_entry_size);
7430 }
7431 else
7432 {
7433 bfd_vma got_offset, got_address, plt_address;
7434 bfd_vma got_displacement, initial_got_entry;
7435 bfd_byte * ptr;
7436
7437 BFD_ASSERT (sgot != NULL);
7438
7439 /* Get the offset into the .(i)got.plt table of the entry that
7440 corresponds to this function. */
7441 got_offset = (arm_plt->got_offset & -2);
7442
7443 /* Get the index in the procedure linkage table which
7444 corresponds to this symbol. This is the index of this symbol
7445 in all the symbols for which we are making plt entries.
7446 After the reserved .got.plt entries, all symbols appear in
7447 the same order as in .plt. */
7448 plt_index = (got_offset - got_header_size) / 4;
7449
7450 /* Calculate the address of the GOT entry. */
7451 got_address = (sgot->output_section->vma
7452 + sgot->output_offset
7453 + got_offset);
7454
7455 /* ...and the address of the PLT entry. */
7456 plt_address = (splt->output_section->vma
7457 + splt->output_offset
7458 + root_plt->offset);
7459
7460 ptr = splt->contents + root_plt->offset;
7461 if (htab->vxworks_p && info->shared)
7462 {
7463 unsigned int i;
7464 bfd_vma val;
7465
7466 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7467 {
7468 val = elf32_arm_vxworks_shared_plt_entry[i];
7469 if (i == 2)
7470 val |= got_address - sgot->output_section->vma;
7471 if (i == 5)
7472 val |= plt_index * RELOC_SIZE (htab);
7473 if (i == 2 || i == 5)
7474 bfd_put_32 (output_bfd, val, ptr);
7475 else
7476 put_arm_insn (htab, output_bfd, val, ptr);
7477 }
7478 }
7479 else if (htab->vxworks_p)
7480 {
7481 unsigned int i;
7482 bfd_vma val;
7483
7484 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7485 {
7486 val = elf32_arm_vxworks_exec_plt_entry[i];
7487 if (i == 2)
7488 val |= got_address;
7489 if (i == 4)
7490 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7491 if (i == 5)
7492 val |= plt_index * RELOC_SIZE (htab);
7493 if (i == 2 || i == 5)
7494 bfd_put_32 (output_bfd, val, ptr);
7495 else
7496 put_arm_insn (htab, output_bfd, val, ptr);
7497 }
7498
7499 loc = (htab->srelplt2->contents
7500 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7501
7502 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7503 referencing the GOT for this PLT entry. */
7504 rel.r_offset = plt_address + 8;
7505 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7506 rel.r_addend = got_offset;
7507 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7508 loc += RELOC_SIZE (htab);
7509
7510 /* Create the R_ARM_ABS32 relocation referencing the
7511 beginning of the PLT for this GOT entry. */
7512 rel.r_offset = got_address;
7513 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7514 rel.r_addend = 0;
7515 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7516 }
7517 else
7518 {
7519 /* Calculate the displacement between the PLT slot and the
7520 entry in the GOT. The eight-byte offset accounts for the
7521 value produced by adding to pc in the first instruction
7522 of the PLT stub. */
7523 got_displacement = got_address - (plt_address + 8);
7524
7525 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7526
7527 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7528 {
7529 put_thumb_insn (htab, output_bfd,
7530 elf32_arm_plt_thumb_stub[0], ptr - 4);
7531 put_thumb_insn (htab, output_bfd,
7532 elf32_arm_plt_thumb_stub[1], ptr - 2);
7533 }
7534
7535 put_arm_insn (htab, output_bfd,
7536 elf32_arm_plt_entry[0]
7537 | ((got_displacement & 0x0ff00000) >> 20),
7538 ptr + 0);
7539 put_arm_insn (htab, output_bfd,
7540 elf32_arm_plt_entry[1]
7541 | ((got_displacement & 0x000ff000) >> 12),
7542 ptr+ 4);
7543 put_arm_insn (htab, output_bfd,
7544 elf32_arm_plt_entry[2]
7545 | (got_displacement & 0x00000fff),
7546 ptr + 8);
7547 #ifdef FOUR_WORD_PLT
7548 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7549 #endif
7550 }
7551
7552 /* Fill in the entry in the .rel(a).(i)plt section. */
7553 rel.r_offset = got_address;
7554 rel.r_addend = 0;
7555 if (dynindx == -1)
7556 {
7557 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7558 The dynamic linker or static executable then calls SYM_VALUE
7559 to determine the correct run-time value of the .igot.plt entry. */
7560 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7561 initial_got_entry = sym_value;
7562 }
7563 else
7564 {
7565 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7566 initial_got_entry = (splt->output_section->vma
7567 + splt->output_offset);
7568 }
7569
7570 /* Fill in the entry in the global offset table. */
7571 bfd_put_32 (output_bfd, initial_got_entry,
7572 sgot->contents + got_offset);
7573 }
7574
7575 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7576 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7577 }
7578
7579 /* Some relocations map to different relocations depending on the
7580 target. Return the real relocation. */
7581
7582 static int
7583 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7584 int r_type)
7585 {
7586 switch (r_type)
7587 {
7588 case R_ARM_TARGET1:
7589 if (globals->target1_is_rel)
7590 return R_ARM_REL32;
7591 else
7592 return R_ARM_ABS32;
7593
7594 case R_ARM_TARGET2:
7595 return globals->target2_reloc;
7596
7597 default:
7598 return r_type;
7599 }
7600 }
7601
7602 /* Return the base VMA address which should be subtracted from real addresses
7603 when resolving @dtpoff relocation.
7604 This is PT_TLS segment p_vaddr. */
7605
7606 static bfd_vma
7607 dtpoff_base (struct bfd_link_info *info)
7608 {
7609 /* If tls_sec is NULL, we should have signalled an error already. */
7610 if (elf_hash_table (info)->tls_sec == NULL)
7611 return 0;
7612 return elf_hash_table (info)->tls_sec->vma;
7613 }
7614
7615 /* Return the relocation value for @tpoff relocation
7616 if STT_TLS virtual address is ADDRESS. */
7617
7618 static bfd_vma
7619 tpoff (struct bfd_link_info *info, bfd_vma address)
7620 {
7621 struct elf_link_hash_table *htab = elf_hash_table (info);
7622 bfd_vma base;
7623
7624 /* If tls_sec is NULL, we should have signalled an error already. */
7625 if (htab->tls_sec == NULL)
7626 return 0;
7627 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7628 return address - htab->tls_sec->vma + base;
7629 }
7630
7631 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7632 VALUE is the relocation value. */
7633
7634 static bfd_reloc_status_type
7635 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7636 {
7637 if (value > 0xfff)
7638 return bfd_reloc_overflow;
7639
7640 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7641 bfd_put_32 (abfd, value, data);
7642 return bfd_reloc_ok;
7643 }
7644
7645 /* Handle TLS relaxations. Relaxing is possible for symbols that use
7646 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7647 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7648
7649 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7650 is to then call final_link_relocate. Return other values in the
7651 case of error.
7652
7653 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7654 the pre-relaxed code. It would be nice if the relocs were updated
7655 to match the optimization. */
7656
7657 static bfd_reloc_status_type
7658 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7659 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7660 Elf_Internal_Rela *rel, unsigned long is_local)
7661 {
7662 unsigned long insn;
7663
7664 switch (ELF32_R_TYPE (rel->r_info))
7665 {
7666 default:
7667 return bfd_reloc_notsupported;
7668
7669 case R_ARM_TLS_GOTDESC:
7670 if (is_local)
7671 insn = 0;
7672 else
7673 {
7674 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7675 if (insn & 1)
7676 insn -= 5; /* THUMB */
7677 else
7678 insn -= 8; /* ARM */
7679 }
7680 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7681 return bfd_reloc_continue;
7682
7683 case R_ARM_THM_TLS_DESCSEQ:
7684 /* Thumb insn. */
7685 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7686 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7687 {
7688 if (is_local)
7689 /* nop */
7690 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7691 }
7692 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7693 {
7694 if (is_local)
7695 /* nop */
7696 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7697 else
7698 /* ldr rx,[ry] */
7699 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7700 }
7701 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7702 {
7703 if (is_local)
7704 /* nop */
7705 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7706 else
7707 /* mov r0, rx */
7708 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7709 contents + rel->r_offset);
7710 }
7711 else
7712 {
7713 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7714 /* It's a 32 bit instruction, fetch the rest of it for
7715 error generation. */
7716 insn = (insn << 16)
7717 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7718 (*_bfd_error_handler)
7719 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7720 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7721 return bfd_reloc_notsupported;
7722 }
7723 break;
7724
7725 case R_ARM_TLS_DESCSEQ:
7726 /* arm insn. */
7727 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7728 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7729 {
7730 if (is_local)
7731 /* mov rx, ry */
7732 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7733 contents + rel->r_offset);
7734 }
7735 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7736 {
7737 if (is_local)
7738 /* nop */
7739 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7740 else
7741 /* ldr rx,[ry] */
7742 bfd_put_32 (input_bfd, insn & 0xfffff000,
7743 contents + rel->r_offset);
7744 }
7745 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7746 {
7747 if (is_local)
7748 /* nop */
7749 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7750 else
7751 /* mov r0, rx */
7752 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7753 contents + rel->r_offset);
7754 }
7755 else
7756 {
7757 (*_bfd_error_handler)
7758 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7759 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7760 return bfd_reloc_notsupported;
7761 }
7762 break;
7763
7764 case R_ARM_TLS_CALL:
7765 /* GD->IE relaxation, turn the instruction into 'nop' or
7766 'ldr r0, [pc,r0]' */
7767 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7768 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7769 break;
7770
7771 case R_ARM_THM_TLS_CALL:
7772 /* GD->IE relaxation */
7773 if (!is_local)
7774 /* add r0,pc; ldr r0, [r0] */
7775 insn = 0x44786800;
7776 else if (arch_has_thumb2_nop (globals))
7777 /* nop.w */
7778 insn = 0xf3af8000;
7779 else
7780 /* nop; nop */
7781 insn = 0xbf00bf00;
7782
7783 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7784 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7785 break;
7786 }
7787 return bfd_reloc_ok;
7788 }
7789
7790 /* For a given value of n, calculate the value of G_n as required to
7791 deal with group relocations. We return it in the form of an
7792 encoded constant-and-rotation, together with the final residual. If n is
7793 specified as less than zero, then final_residual is filled with the
7794 input value and no further action is performed. */
7795
7796 static bfd_vma
7797 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7798 {
7799 int current_n;
7800 bfd_vma g_n;
7801 bfd_vma encoded_g_n = 0;
7802 bfd_vma residual = value; /* Also known as Y_n. */
7803
7804 for (current_n = 0; current_n <= n; current_n++)
7805 {
7806 int shift;
7807
7808 /* Calculate which part of the value to mask. */
7809 if (residual == 0)
7810 shift = 0;
7811 else
7812 {
7813 int msb;
7814
7815 /* Determine the most significant bit in the residual and
7816 align the resulting value to a 2-bit boundary. */
7817 for (msb = 30; msb >= 0; msb -= 2)
7818 if (residual & (3 << msb))
7819 break;
7820
7821 /* The desired shift is now (msb - 6), or zero, whichever
7822 is the greater. */
7823 shift = msb - 6;
7824 if (shift < 0)
7825 shift = 0;
7826 }
7827
7828 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7829 g_n = residual & (0xff << shift);
7830 encoded_g_n = (g_n >> shift)
7831 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7832
7833 /* Calculate the residual for the next time around. */
7834 residual &= ~g_n;
7835 }
7836
7837 *final_residual = residual;
7838
7839 return encoded_g_n;
7840 }
7841
7842 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
7843 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
7844
7845 static int
7846 identify_add_or_sub (bfd_vma insn)
7847 {
7848 int opcode = insn & 0x1e00000;
7849
7850 if (opcode == 1 << 23) /* ADD */
7851 return 1;
7852
7853 if (opcode == 1 << 22) /* SUB */
7854 return -1;
7855
7856 return 0;
7857 }
7858
7859 /* Perform a relocation as part of a final link. */
7860
7861 static bfd_reloc_status_type
7862 elf32_arm_final_link_relocate (reloc_howto_type * howto,
7863 bfd * input_bfd,
7864 bfd * output_bfd,
7865 asection * input_section,
7866 bfd_byte * contents,
7867 Elf_Internal_Rela * rel,
7868 bfd_vma value,
7869 struct bfd_link_info * info,
7870 asection * sym_sec,
7871 const char * sym_name,
7872 unsigned char st_type,
7873 enum arm_st_branch_type branch_type,
7874 struct elf_link_hash_entry * h,
7875 bfd_boolean * unresolved_reloc_p,
7876 char ** error_message)
7877 {
7878 unsigned long r_type = howto->type;
7879 unsigned long r_symndx;
7880 bfd_byte * hit_data = contents + rel->r_offset;
7881 bfd_vma * local_got_offsets;
7882 bfd_vma * local_tlsdesc_gotents;
7883 asection * sgot;
7884 asection * splt;
7885 asection * sreloc = NULL;
7886 asection * srelgot;
7887 bfd_vma addend;
7888 bfd_signed_vma signed_addend;
7889 unsigned char dynreloc_st_type;
7890 bfd_vma dynreloc_value;
7891 struct elf32_arm_link_hash_table * globals;
7892 struct elf32_arm_link_hash_entry *eh;
7893 union gotplt_union *root_plt;
7894 struct arm_plt_info *arm_plt;
7895 bfd_vma plt_offset;
7896 bfd_vma gotplt_offset;
7897 bfd_boolean has_iplt_entry;
7898
7899 globals = elf32_arm_hash_table (info);
7900 if (globals == NULL)
7901 return bfd_reloc_notsupported;
7902
7903 BFD_ASSERT (is_arm_elf (input_bfd));
7904
7905 /* Some relocation types map to different relocations depending on the
7906 target. We pick the right one here. */
7907 r_type = arm_real_reloc_type (globals, r_type);
7908
7909 /* It is possible to have linker relaxations on some TLS access
7910 models. Update our information here. */
7911 r_type = elf32_arm_tls_transition (info, r_type, h);
7912
7913 if (r_type != howto->type)
7914 howto = elf32_arm_howto_from_type (r_type);
7915
7916 /* If the start address has been set, then set the EF_ARM_HASENTRY
7917 flag. Setting this more than once is redundant, but the cost is
7918 not too high, and it keeps the code simple.
7919
7920 The test is done here, rather than somewhere else, because the
7921 start address is only set just before the final link commences.
7922
7923 Note - if the user deliberately sets a start address of 0, the
7924 flag will not be set. */
7925 if (bfd_get_start_address (output_bfd) != 0)
7926 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
7927
7928 eh = (struct elf32_arm_link_hash_entry *) h;
7929 sgot = globals->root.sgot;
7930 local_got_offsets = elf_local_got_offsets (input_bfd);
7931 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
7932
7933 if (globals->root.dynamic_sections_created)
7934 srelgot = globals->root.srelgot;
7935 else
7936 srelgot = NULL;
7937
7938 r_symndx = ELF32_R_SYM (rel->r_info);
7939
7940 if (globals->use_rel)
7941 {
7942 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
7943
7944 if (addend & ((howto->src_mask + 1) >> 1))
7945 {
7946 signed_addend = -1;
7947 signed_addend &= ~ howto->src_mask;
7948 signed_addend |= addend;
7949 }
7950 else
7951 signed_addend = addend;
7952 }
7953 else
7954 addend = signed_addend = rel->r_addend;
7955
7956 /* Record the symbol information that should be used in dynamic
7957 relocations. */
7958 dynreloc_st_type = st_type;
7959 dynreloc_value = value;
7960 if (branch_type == ST_BRANCH_TO_THUMB)
7961 dynreloc_value |= 1;
7962
7963 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
7964 VALUE appropriately for relocations that we resolve at link time. */
7965 has_iplt_entry = FALSE;
7966 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
7967 && root_plt->offset != (bfd_vma) -1)
7968 {
7969 plt_offset = root_plt->offset;
7970 gotplt_offset = arm_plt->got_offset;
7971
7972 if (h == NULL || eh->is_iplt)
7973 {
7974 has_iplt_entry = TRUE;
7975 splt = globals->root.iplt;
7976
7977 /* Populate .iplt entries here, because not all of them will
7978 be seen by finish_dynamic_symbol. The lower bit is set if
7979 we have already populated the entry. */
7980 if (plt_offset & 1)
7981 plt_offset--;
7982 else
7983 {
7984 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
7985 -1, dynreloc_value);
7986 root_plt->offset |= 1;
7987 }
7988
7989 /* Static relocations always resolve to the .iplt entry. */
7990 st_type = STT_FUNC;
7991 value = (splt->output_section->vma
7992 + splt->output_offset
7993 + plt_offset);
7994 branch_type = ST_BRANCH_TO_ARM;
7995
7996 /* If there are non-call relocations that resolve to the .iplt
7997 entry, then all dynamic ones must too. */
7998 if (arm_plt->noncall_refcount != 0)
7999 {
8000 dynreloc_st_type = st_type;
8001 dynreloc_value = value;
8002 }
8003 }
8004 else
8005 /* We populate the .plt entry in finish_dynamic_symbol. */
8006 splt = globals->root.splt;
8007 }
8008 else
8009 {
8010 splt = NULL;
8011 plt_offset = (bfd_vma) -1;
8012 gotplt_offset = (bfd_vma) -1;
8013 }
8014
8015 switch (r_type)
8016 {
8017 case R_ARM_NONE:
8018 /* We don't need to find a value for this symbol. It's just a
8019 marker. */
8020 *unresolved_reloc_p = FALSE;
8021 return bfd_reloc_ok;
8022
8023 case R_ARM_ABS12:
8024 if (!globals->vxworks_p)
8025 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8026
8027 case R_ARM_PC24:
8028 case R_ARM_ABS32:
8029 case R_ARM_ABS32_NOI:
8030 case R_ARM_REL32:
8031 case R_ARM_REL32_NOI:
8032 case R_ARM_CALL:
8033 case R_ARM_JUMP24:
8034 case R_ARM_XPC25:
8035 case R_ARM_PREL31:
8036 case R_ARM_PLT32:
8037 /* Handle relocations which should use the PLT entry. ABS32/REL32
8038 will use the symbol's value, which may point to a PLT entry, but we
8039 don't need to handle that here. If we created a PLT entry, all
8040 branches in this object should go to it, except if the PLT is too
8041 far away, in which case a long branch stub should be inserted. */
8042 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
8043 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
8044 && r_type != R_ARM_CALL
8045 && r_type != R_ARM_JUMP24
8046 && r_type != R_ARM_PLT32)
8047 && plt_offset != (bfd_vma) -1)
8048 {
8049 /* If we've created a .plt section, and assigned a PLT entry
8050 to this function, it must either be a STT_GNU_IFUNC reference
8051 or not be known to bind locally. In other cases, we should
8052 have cleared the PLT entry by now. */
8053 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
8054
8055 value = (splt->output_section->vma
8056 + splt->output_offset
8057 + plt_offset);
8058 *unresolved_reloc_p = FALSE;
8059 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8060 contents, rel->r_offset, value,
8061 rel->r_addend);
8062 }
8063
8064 /* When generating a shared object or relocatable executable, these
8065 relocations are copied into the output file to be resolved at
8066 run time. */
8067 if ((info->shared || globals->root.is_relocatable_executable)
8068 && (input_section->flags & SEC_ALLOC)
8069 && !(globals->vxworks_p
8070 && strcmp (input_section->output_section->name,
8071 ".tls_vars") == 0)
8072 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
8073 || !SYMBOL_CALLS_LOCAL (info, h))
8074 && (!strstr (input_section->name, STUB_SUFFIX))
8075 && (h == NULL
8076 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8077 || h->root.type != bfd_link_hash_undefweak)
8078 && r_type != R_ARM_PC24
8079 && r_type != R_ARM_CALL
8080 && r_type != R_ARM_JUMP24
8081 && r_type != R_ARM_PREL31
8082 && r_type != R_ARM_PLT32)
8083 {
8084 Elf_Internal_Rela outrel;
8085 bfd_boolean skip, relocate;
8086
8087 *unresolved_reloc_p = FALSE;
8088
8089 if (sreloc == NULL && globals->root.dynamic_sections_created)
8090 {
8091 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8092 ! globals->use_rel);
8093
8094 if (sreloc == NULL)
8095 return bfd_reloc_notsupported;
8096 }
8097
8098 skip = FALSE;
8099 relocate = FALSE;
8100
8101 outrel.r_addend = addend;
8102 outrel.r_offset =
8103 _bfd_elf_section_offset (output_bfd, info, input_section,
8104 rel->r_offset);
8105 if (outrel.r_offset == (bfd_vma) -1)
8106 skip = TRUE;
8107 else if (outrel.r_offset == (bfd_vma) -2)
8108 skip = TRUE, relocate = TRUE;
8109 outrel.r_offset += (input_section->output_section->vma
8110 + input_section->output_offset);
8111
8112 if (skip)
8113 memset (&outrel, 0, sizeof outrel);
8114 else if (h != NULL
8115 && h->dynindx != -1
8116 && (!info->shared
8117 || !info->symbolic
8118 || !h->def_regular))
8119 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
8120 else
8121 {
8122 int symbol;
8123
8124 /* This symbol is local, or marked to become local. */
8125 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
8126 if (globals->symbian_p)
8127 {
8128 asection *osec;
8129
8130 /* On Symbian OS, the data segment and text segement
8131 can be relocated independently. Therefore, we
8132 must indicate the segment to which this
8133 relocation is relative. The BPABI allows us to
8134 use any symbol in the right segment; we just use
8135 the section symbol as it is convenient. (We
8136 cannot use the symbol given by "h" directly as it
8137 will not appear in the dynamic symbol table.)
8138
8139 Note that the dynamic linker ignores the section
8140 symbol value, so we don't subtract osec->vma
8141 from the emitted reloc addend. */
8142 if (sym_sec)
8143 osec = sym_sec->output_section;
8144 else
8145 osec = input_section->output_section;
8146 symbol = elf_section_data (osec)->dynindx;
8147 if (symbol == 0)
8148 {
8149 struct elf_link_hash_table *htab = elf_hash_table (info);
8150
8151 if ((osec->flags & SEC_READONLY) == 0
8152 && htab->data_index_section != NULL)
8153 osec = htab->data_index_section;
8154 else
8155 osec = htab->text_index_section;
8156 symbol = elf_section_data (osec)->dynindx;
8157 }
8158 BFD_ASSERT (symbol != 0);
8159 }
8160 else
8161 /* On SVR4-ish systems, the dynamic loader cannot
8162 relocate the text and data segments independently,
8163 so the symbol does not matter. */
8164 symbol = 0;
8165 if (dynreloc_st_type == STT_GNU_IFUNC)
8166 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8167 to the .iplt entry. Instead, every non-call reference
8168 must use an R_ARM_IRELATIVE relocation to obtain the
8169 correct run-time address. */
8170 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8171 else
8172 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
8173 if (globals->use_rel)
8174 relocate = TRUE;
8175 else
8176 outrel.r_addend += dynreloc_value;
8177 }
8178
8179 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
8180
8181 /* If this reloc is against an external symbol, we do not want to
8182 fiddle with the addend. Otherwise, we need to include the symbol
8183 value so that it becomes an addend for the dynamic reloc. */
8184 if (! relocate)
8185 return bfd_reloc_ok;
8186
8187 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8188 contents, rel->r_offset,
8189 dynreloc_value, (bfd_vma) 0);
8190 }
8191 else switch (r_type)
8192 {
8193 case R_ARM_ABS12:
8194 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8195
8196 case R_ARM_XPC25: /* Arm BLX instruction. */
8197 case R_ARM_CALL:
8198 case R_ARM_JUMP24:
8199 case R_ARM_PC24: /* Arm B/BL instruction. */
8200 case R_ARM_PLT32:
8201 {
8202 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8203
8204 if (r_type == R_ARM_XPC25)
8205 {
8206 /* Check for Arm calling Arm function. */
8207 /* FIXME: Should we translate the instruction into a BL
8208 instruction instead ? */
8209 if (branch_type != ST_BRANCH_TO_THUMB)
8210 (*_bfd_error_handler)
8211 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8212 input_bfd,
8213 h ? h->root.root.string : "(local)");
8214 }
8215 else if (r_type == R_ARM_PC24)
8216 {
8217 /* Check for Arm calling Thumb function. */
8218 if (branch_type == ST_BRANCH_TO_THUMB)
8219 {
8220 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8221 output_bfd, input_section,
8222 hit_data, sym_sec, rel->r_offset,
8223 signed_addend, value,
8224 error_message))
8225 return bfd_reloc_ok;
8226 else
8227 return bfd_reloc_dangerous;
8228 }
8229 }
8230
8231 /* Check if a stub has to be inserted because the
8232 destination is too far or we are changing mode. */
8233 if ( r_type == R_ARM_CALL
8234 || r_type == R_ARM_JUMP24
8235 || r_type == R_ARM_PLT32)
8236 {
8237 enum elf32_arm_stub_type stub_type = arm_stub_none;
8238 struct elf32_arm_link_hash_entry *hash;
8239
8240 hash = (struct elf32_arm_link_hash_entry *) h;
8241 stub_type = arm_type_of_stub (info, input_section, rel,
8242 st_type, &branch_type,
8243 hash, value, sym_sec,
8244 input_bfd, sym_name);
8245
8246 if (stub_type != arm_stub_none)
8247 {
8248 /* The target is out of reach, so redirect the
8249 branch to the local stub for this function. */
8250 stub_entry = elf32_arm_get_stub_entry (input_section,
8251 sym_sec, h,
8252 rel, globals,
8253 stub_type);
8254 {
8255 if (stub_entry != NULL)
8256 value = (stub_entry->stub_offset
8257 + stub_entry->stub_sec->output_offset
8258 + stub_entry->stub_sec->output_section->vma);
8259
8260 if (plt_offset != (bfd_vma) -1)
8261 *unresolved_reloc_p = FALSE;
8262 }
8263 }
8264 else
8265 {
8266 /* If the call goes through a PLT entry, make sure to
8267 check distance to the right destination address. */
8268 if (plt_offset != (bfd_vma) -1)
8269 {
8270 value = (splt->output_section->vma
8271 + splt->output_offset
8272 + plt_offset);
8273 *unresolved_reloc_p = FALSE;
8274 /* The PLT entry is in ARM mode, regardless of the
8275 target function. */
8276 branch_type = ST_BRANCH_TO_ARM;
8277 }
8278 }
8279 }
8280
8281 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8282 where:
8283 S is the address of the symbol in the relocation.
8284 P is address of the instruction being relocated.
8285 A is the addend (extracted from the instruction) in bytes.
8286
8287 S is held in 'value'.
8288 P is the base address of the section containing the
8289 instruction plus the offset of the reloc into that
8290 section, ie:
8291 (input_section->output_section->vma +
8292 input_section->output_offset +
8293 rel->r_offset).
8294 A is the addend, converted into bytes, ie:
8295 (signed_addend * 4)
8296
8297 Note: None of these operations have knowledge of the pipeline
8298 size of the processor, thus it is up to the assembler to
8299 encode this information into the addend. */
8300 value -= (input_section->output_section->vma
8301 + input_section->output_offset);
8302 value -= rel->r_offset;
8303 if (globals->use_rel)
8304 value += (signed_addend << howto->size);
8305 else
8306 /* RELA addends do not have to be adjusted by howto->size. */
8307 value += signed_addend;
8308
8309 signed_addend = value;
8310 signed_addend >>= howto->rightshift;
8311
8312 /* A branch to an undefined weak symbol is turned into a jump to
8313 the next instruction unless a PLT entry will be created.
8314 Do the same for local undefined symbols (but not for STN_UNDEF).
8315 The jump to the next instruction is optimized as a NOP depending
8316 on the architecture. */
8317 if (h ? (h->root.type == bfd_link_hash_undefweak
8318 && plt_offset == (bfd_vma) -1)
8319 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
8320 {
8321 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8322
8323 if (arch_has_arm_nop (globals))
8324 value |= 0x0320f000;
8325 else
8326 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
8327 }
8328 else
8329 {
8330 /* Perform a signed range check. */
8331 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
8332 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8333 return bfd_reloc_overflow;
8334
8335 addend = (value & 2);
8336
8337 value = (signed_addend & howto->dst_mask)
8338 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
8339
8340 if (r_type == R_ARM_CALL)
8341 {
8342 /* Set the H bit in the BLX instruction. */
8343 if (branch_type == ST_BRANCH_TO_THUMB)
8344 {
8345 if (addend)
8346 value |= (1 << 24);
8347 else
8348 value &= ~(bfd_vma)(1 << 24);
8349 }
8350
8351 /* Select the correct instruction (BL or BLX). */
8352 /* Only if we are not handling a BL to a stub. In this
8353 case, mode switching is performed by the stub. */
8354 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
8355 value |= (1 << 28);
8356 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
8357 {
8358 value &= ~(bfd_vma)(1 << 28);
8359 value |= (1 << 24);
8360 }
8361 }
8362 }
8363 }
8364 break;
8365
8366 case R_ARM_ABS32:
8367 value += addend;
8368 if (branch_type == ST_BRANCH_TO_THUMB)
8369 value |= 1;
8370 break;
8371
8372 case R_ARM_ABS32_NOI:
8373 value += addend;
8374 break;
8375
8376 case R_ARM_REL32:
8377 value += addend;
8378 if (branch_type == ST_BRANCH_TO_THUMB)
8379 value |= 1;
8380 value -= (input_section->output_section->vma
8381 + input_section->output_offset + rel->r_offset);
8382 break;
8383
8384 case R_ARM_REL32_NOI:
8385 value += addend;
8386 value -= (input_section->output_section->vma
8387 + input_section->output_offset + rel->r_offset);
8388 break;
8389
8390 case R_ARM_PREL31:
8391 value -= (input_section->output_section->vma
8392 + input_section->output_offset + rel->r_offset);
8393 value += signed_addend;
8394 if (! h || h->root.type != bfd_link_hash_undefweak)
8395 {
8396 /* Check for overflow. */
8397 if ((value ^ (value >> 1)) & (1 << 30))
8398 return bfd_reloc_overflow;
8399 }
8400 value &= 0x7fffffff;
8401 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
8402 if (branch_type == ST_BRANCH_TO_THUMB)
8403 value |= 1;
8404 break;
8405 }
8406
8407 bfd_put_32 (input_bfd, value, hit_data);
8408 return bfd_reloc_ok;
8409
8410 case R_ARM_ABS8:
8411 value += addend;
8412
8413 /* There is no way to tell whether the user intended to use a signed or
8414 unsigned addend. When checking for overflow we accept either,
8415 as specified by the AAELF. */
8416 if ((long) value > 0xff || (long) value < -0x80)
8417 return bfd_reloc_overflow;
8418
8419 bfd_put_8 (input_bfd, value, hit_data);
8420 return bfd_reloc_ok;
8421
8422 case R_ARM_ABS16:
8423 value += addend;
8424
8425 /* See comment for R_ARM_ABS8. */
8426 if ((long) value > 0xffff || (long) value < -0x8000)
8427 return bfd_reloc_overflow;
8428
8429 bfd_put_16 (input_bfd, value, hit_data);
8430 return bfd_reloc_ok;
8431
8432 case R_ARM_THM_ABS5:
8433 /* Support ldr and str instructions for the thumb. */
8434 if (globals->use_rel)
8435 {
8436 /* Need to refetch addend. */
8437 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8438 /* ??? Need to determine shift amount from operand size. */
8439 addend >>= howto->rightshift;
8440 }
8441 value += addend;
8442
8443 /* ??? Isn't value unsigned? */
8444 if ((long) value > 0x1f || (long) value < -0x10)
8445 return bfd_reloc_overflow;
8446
8447 /* ??? Value needs to be properly shifted into place first. */
8448 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8449 bfd_put_16 (input_bfd, value, hit_data);
8450 return bfd_reloc_ok;
8451
8452 case R_ARM_THM_ALU_PREL_11_0:
8453 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8454 {
8455 bfd_vma insn;
8456 bfd_signed_vma relocation;
8457
8458 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8459 | bfd_get_16 (input_bfd, hit_data + 2);
8460
8461 if (globals->use_rel)
8462 {
8463 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8464 | ((insn & (1 << 26)) >> 15);
8465 if (insn & 0xf00000)
8466 signed_addend = -signed_addend;
8467 }
8468
8469 relocation = value + signed_addend;
8470 relocation -= (input_section->output_section->vma
8471 + input_section->output_offset
8472 + rel->r_offset);
8473
8474 value = abs (relocation);
8475
8476 if (value >= 0x1000)
8477 return bfd_reloc_overflow;
8478
8479 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8480 | ((value & 0x700) << 4)
8481 | ((value & 0x800) << 15);
8482 if (relocation < 0)
8483 insn |= 0xa00000;
8484
8485 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8486 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8487
8488 return bfd_reloc_ok;
8489 }
8490
8491 case R_ARM_THM_PC8:
8492 /* PR 10073: This reloc is not generated by the GNU toolchain,
8493 but it is supported for compatibility with third party libraries
8494 generated by other compilers, specifically the ARM/IAR. */
8495 {
8496 bfd_vma insn;
8497 bfd_signed_vma relocation;
8498
8499 insn = bfd_get_16 (input_bfd, hit_data);
8500
8501 if (globals->use_rel)
8502 addend = (insn & 0x00ff) << 2;
8503
8504 relocation = value + addend;
8505 relocation -= (input_section->output_section->vma
8506 + input_section->output_offset
8507 + rel->r_offset);
8508
8509 value = abs (relocation);
8510
8511 /* We do not check for overflow of this reloc. Although strictly
8512 speaking this is incorrect, it appears to be necessary in order
8513 to work with IAR generated relocs. Since GCC and GAS do not
8514 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8515 a problem for them. */
8516 value &= 0x3fc;
8517
8518 insn = (insn & 0xff00) | (value >> 2);
8519
8520 bfd_put_16 (input_bfd, insn, hit_data);
8521
8522 return bfd_reloc_ok;
8523 }
8524
8525 case R_ARM_THM_PC12:
8526 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8527 {
8528 bfd_vma insn;
8529 bfd_signed_vma relocation;
8530
8531 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8532 | bfd_get_16 (input_bfd, hit_data + 2);
8533
8534 if (globals->use_rel)
8535 {
8536 signed_addend = insn & 0xfff;
8537 if (!(insn & (1 << 23)))
8538 signed_addend = -signed_addend;
8539 }
8540
8541 relocation = value + signed_addend;
8542 relocation -= (input_section->output_section->vma
8543 + input_section->output_offset
8544 + rel->r_offset);
8545
8546 value = abs (relocation);
8547
8548 if (value >= 0x1000)
8549 return bfd_reloc_overflow;
8550
8551 insn = (insn & 0xff7ff000) | value;
8552 if (relocation >= 0)
8553 insn |= (1 << 23);
8554
8555 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8556 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8557
8558 return bfd_reloc_ok;
8559 }
8560
8561 case R_ARM_THM_XPC22:
8562 case R_ARM_THM_CALL:
8563 case R_ARM_THM_JUMP24:
8564 /* Thumb BL (branch long instruction). */
8565 {
8566 bfd_vma relocation;
8567 bfd_vma reloc_sign;
8568 bfd_boolean overflow = FALSE;
8569 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8570 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8571 bfd_signed_vma reloc_signed_max;
8572 bfd_signed_vma reloc_signed_min;
8573 bfd_vma check;
8574 bfd_signed_vma signed_check;
8575 int bitsize;
8576 const int thumb2 = using_thumb2 (globals);
8577
8578 /* A branch to an undefined weak symbol is turned into a jump to
8579 the next instruction unless a PLT entry will be created.
8580 The jump to the next instruction is optimized as a NOP.W for
8581 Thumb-2 enabled architectures. */
8582 if (h && h->root.type == bfd_link_hash_undefweak
8583 && plt_offset == (bfd_vma) -1)
8584 {
8585 if (arch_has_thumb2_nop (globals))
8586 {
8587 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8588 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8589 }
8590 else
8591 {
8592 bfd_put_16 (input_bfd, 0xe000, hit_data);
8593 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8594 }
8595 return bfd_reloc_ok;
8596 }
8597
8598 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8599 with Thumb-1) involving the J1 and J2 bits. */
8600 if (globals->use_rel)
8601 {
8602 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8603 bfd_vma upper = upper_insn & 0x3ff;
8604 bfd_vma lower = lower_insn & 0x7ff;
8605 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8606 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8607 bfd_vma i1 = j1 ^ s ? 0 : 1;
8608 bfd_vma i2 = j2 ^ s ? 0 : 1;
8609
8610 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8611 /* Sign extend. */
8612 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8613
8614 signed_addend = addend;
8615 }
8616
8617 if (r_type == R_ARM_THM_XPC22)
8618 {
8619 /* Check for Thumb to Thumb call. */
8620 /* FIXME: Should we translate the instruction into a BL
8621 instruction instead ? */
8622 if (branch_type == ST_BRANCH_TO_THUMB)
8623 (*_bfd_error_handler)
8624 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8625 input_bfd,
8626 h ? h->root.root.string : "(local)");
8627 }
8628 else
8629 {
8630 /* If it is not a call to Thumb, assume call to Arm.
8631 If it is a call relative to a section name, then it is not a
8632 function call at all, but rather a long jump. Calls through
8633 the PLT do not require stubs. */
8634 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
8635 {
8636 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8637 {
8638 /* Convert BL to BLX. */
8639 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8640 }
8641 else if (( r_type != R_ARM_THM_CALL)
8642 && (r_type != R_ARM_THM_JUMP24))
8643 {
8644 if (elf32_thumb_to_arm_stub
8645 (info, sym_name, input_bfd, output_bfd, input_section,
8646 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8647 error_message))
8648 return bfd_reloc_ok;
8649 else
8650 return bfd_reloc_dangerous;
8651 }
8652 }
8653 else if (branch_type == ST_BRANCH_TO_THUMB
8654 && globals->use_blx
8655 && r_type == R_ARM_THM_CALL)
8656 {
8657 /* Make sure this is a BL. */
8658 lower_insn |= 0x1800;
8659 }
8660 }
8661
8662 enum elf32_arm_stub_type stub_type = arm_stub_none;
8663 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
8664 {
8665 /* Check if a stub has to be inserted because the destination
8666 is too far. */
8667 struct elf32_arm_stub_hash_entry *stub_entry;
8668 struct elf32_arm_link_hash_entry *hash;
8669
8670 hash = (struct elf32_arm_link_hash_entry *) h;
8671
8672 stub_type = arm_type_of_stub (info, input_section, rel,
8673 st_type, &branch_type,
8674 hash, value, sym_sec,
8675 input_bfd, sym_name);
8676
8677 if (stub_type != arm_stub_none)
8678 {
8679 /* The target is out of reach or we are changing modes, so
8680 redirect the branch to the local stub for this
8681 function. */
8682 stub_entry = elf32_arm_get_stub_entry (input_section,
8683 sym_sec, h,
8684 rel, globals,
8685 stub_type);
8686 if (stub_entry != NULL)
8687 {
8688 value = (stub_entry->stub_offset
8689 + stub_entry->stub_sec->output_offset
8690 + stub_entry->stub_sec->output_section->vma);
8691
8692 if (plt_offset != (bfd_vma) -1)
8693 *unresolved_reloc_p = FALSE;
8694 }
8695
8696 /* If this call becomes a call to Arm, force BLX. */
8697 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
8698 {
8699 if ((stub_entry
8700 && !arm_stub_is_thumb (stub_entry->stub_type))
8701 || branch_type != ST_BRANCH_TO_THUMB)
8702 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8703 }
8704 }
8705 }
8706
8707 /* Handle calls via the PLT. */
8708 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
8709 {
8710 value = (splt->output_section->vma
8711 + splt->output_offset
8712 + plt_offset);
8713
8714 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8715 {
8716 /* If the Thumb BLX instruction is available, convert
8717 the BL to a BLX instruction to call the ARM-mode
8718 PLT entry. */
8719 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8720 branch_type = ST_BRANCH_TO_ARM;
8721 }
8722 else
8723 {
8724 /* Target the Thumb stub before the ARM PLT entry. */
8725 value -= PLT_THUMB_STUB_SIZE;
8726 branch_type = ST_BRANCH_TO_THUMB;
8727 }
8728 *unresolved_reloc_p = FALSE;
8729 }
8730
8731 relocation = value + signed_addend;
8732
8733 relocation -= (input_section->output_section->vma
8734 + input_section->output_offset
8735 + rel->r_offset);
8736
8737 check = relocation >> howto->rightshift;
8738
8739 /* If this is a signed value, the rightshift just dropped
8740 leading 1 bits (assuming twos complement). */
8741 if ((bfd_signed_vma) relocation >= 0)
8742 signed_check = check;
8743 else
8744 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8745
8746 /* Calculate the permissable maximum and minimum values for
8747 this relocation according to whether we're relocating for
8748 Thumb-2 or not. */
8749 bitsize = howto->bitsize;
8750 if (!thumb2)
8751 bitsize -= 2;
8752 reloc_signed_max = (1 << (bitsize - 1)) - 1;
8753 reloc_signed_min = ~reloc_signed_max;
8754
8755 /* Assumes two's complement. */
8756 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8757 overflow = TRUE;
8758
8759 if ((lower_insn & 0x5000) == 0x4000)
8760 /* For a BLX instruction, make sure that the relocation is rounded up
8761 to a word boundary. This follows the semantics of the instruction
8762 which specifies that bit 1 of the target address will come from bit
8763 1 of the base address. */
8764 relocation = (relocation + 2) & ~ 3;
8765
8766 /* Put RELOCATION back into the insn. Assumes two's complement.
8767 We use the Thumb-2 encoding, which is safe even if dealing with
8768 a Thumb-1 instruction by virtue of our overflow check above. */
8769 reloc_sign = (signed_check < 0) ? 1 : 0;
8770 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8771 | ((relocation >> 12) & 0x3ff)
8772 | (reloc_sign << 10);
8773 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
8774 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8775 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8776 | ((relocation >> 1) & 0x7ff);
8777
8778 /* Put the relocated value back in the object file: */
8779 bfd_put_16 (input_bfd, upper_insn, hit_data);
8780 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8781
8782 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8783 }
8784 break;
8785
8786 case R_ARM_THM_JUMP19:
8787 /* Thumb32 conditional branch instruction. */
8788 {
8789 bfd_vma relocation;
8790 bfd_boolean overflow = FALSE;
8791 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8792 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8793 bfd_signed_vma reloc_signed_max = 0xffffe;
8794 bfd_signed_vma reloc_signed_min = -0x100000;
8795 bfd_signed_vma signed_check;
8796
8797 /* Need to refetch the addend, reconstruct the top three bits,
8798 and squish the two 11 bit pieces together. */
8799 if (globals->use_rel)
8800 {
8801 bfd_vma S = (upper_insn & 0x0400) >> 10;
8802 bfd_vma upper = (upper_insn & 0x003f);
8803 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8804 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8805 bfd_vma lower = (lower_insn & 0x07ff);
8806
8807 upper |= J1 << 6;
8808 upper |= J2 << 7;
8809 upper |= (!S) << 8;
8810 upper -= 0x0100; /* Sign extend. */
8811
8812 addend = (upper << 12) | (lower << 1);
8813 signed_addend = addend;
8814 }
8815
8816 /* Handle calls via the PLT. */
8817 if (plt_offset != (bfd_vma) -1)
8818 {
8819 value = (splt->output_section->vma
8820 + splt->output_offset
8821 + plt_offset);
8822 /* Target the Thumb stub before the ARM PLT entry. */
8823 value -= PLT_THUMB_STUB_SIZE;
8824 *unresolved_reloc_p = FALSE;
8825 }
8826
8827 /* ??? Should handle interworking? GCC might someday try to
8828 use this for tail calls. */
8829
8830 relocation = value + signed_addend;
8831 relocation -= (input_section->output_section->vma
8832 + input_section->output_offset
8833 + rel->r_offset);
8834 signed_check = (bfd_signed_vma) relocation;
8835
8836 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8837 overflow = TRUE;
8838
8839 /* Put RELOCATION back into the insn. */
8840 {
8841 bfd_vma S = (relocation & 0x00100000) >> 20;
8842 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8843 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8844 bfd_vma hi = (relocation & 0x0003f000) >> 12;
8845 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
8846
8847 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
8848 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
8849 }
8850
8851 /* Put the relocated value back in the object file: */
8852 bfd_put_16 (input_bfd, upper_insn, hit_data);
8853 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8854
8855 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8856 }
8857
8858 case R_ARM_THM_JUMP11:
8859 case R_ARM_THM_JUMP8:
8860 case R_ARM_THM_JUMP6:
8861 /* Thumb B (branch) instruction). */
8862 {
8863 bfd_signed_vma relocation;
8864 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
8865 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
8866 bfd_signed_vma signed_check;
8867
8868 /* CZB cannot jump backward. */
8869 if (r_type == R_ARM_THM_JUMP6)
8870 reloc_signed_min = 0;
8871
8872 if (globals->use_rel)
8873 {
8874 /* Need to refetch addend. */
8875 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8876 if (addend & ((howto->src_mask + 1) >> 1))
8877 {
8878 signed_addend = -1;
8879 signed_addend &= ~ howto->src_mask;
8880 signed_addend |= addend;
8881 }
8882 else
8883 signed_addend = addend;
8884 /* The value in the insn has been right shifted. We need to
8885 undo this, so that we can perform the address calculation
8886 in terms of bytes. */
8887 signed_addend <<= howto->rightshift;
8888 }
8889 relocation = value + signed_addend;
8890
8891 relocation -= (input_section->output_section->vma
8892 + input_section->output_offset
8893 + rel->r_offset);
8894
8895 relocation >>= howto->rightshift;
8896 signed_check = relocation;
8897
8898 if (r_type == R_ARM_THM_JUMP6)
8899 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
8900 else
8901 relocation &= howto->dst_mask;
8902 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
8903
8904 bfd_put_16 (input_bfd, relocation, hit_data);
8905
8906 /* Assumes two's complement. */
8907 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8908 return bfd_reloc_overflow;
8909
8910 return bfd_reloc_ok;
8911 }
8912
8913 case R_ARM_ALU_PCREL7_0:
8914 case R_ARM_ALU_PCREL15_8:
8915 case R_ARM_ALU_PCREL23_15:
8916 {
8917 bfd_vma insn;
8918 bfd_vma relocation;
8919
8920 insn = bfd_get_32 (input_bfd, hit_data);
8921 if (globals->use_rel)
8922 {
8923 /* Extract the addend. */
8924 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
8925 signed_addend = addend;
8926 }
8927 relocation = value + signed_addend;
8928
8929 relocation -= (input_section->output_section->vma
8930 + input_section->output_offset
8931 + rel->r_offset);
8932 insn = (insn & ~0xfff)
8933 | ((howto->bitpos << 7) & 0xf00)
8934 | ((relocation >> howto->bitpos) & 0xff);
8935 bfd_put_32 (input_bfd, value, hit_data);
8936 }
8937 return bfd_reloc_ok;
8938
8939 case R_ARM_GNU_VTINHERIT:
8940 case R_ARM_GNU_VTENTRY:
8941 return bfd_reloc_ok;
8942
8943 case R_ARM_GOTOFF32:
8944 /* Relocation is relative to the start of the
8945 global offset table. */
8946
8947 BFD_ASSERT (sgot != NULL);
8948 if (sgot == NULL)
8949 return bfd_reloc_notsupported;
8950
8951 /* If we are addressing a Thumb function, we need to adjust the
8952 address by one, so that attempts to call the function pointer will
8953 correctly interpret it as Thumb code. */
8954 if (branch_type == ST_BRANCH_TO_THUMB)
8955 value += 1;
8956
8957 /* Note that sgot->output_offset is not involved in this
8958 calculation. We always want the start of .got. If we
8959 define _GLOBAL_OFFSET_TABLE in a different way, as is
8960 permitted by the ABI, we might have to change this
8961 calculation. */
8962 value -= sgot->output_section->vma;
8963 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8964 contents, rel->r_offset, value,
8965 rel->r_addend);
8966
8967 case R_ARM_GOTPC:
8968 /* Use global offset table as symbol value. */
8969 BFD_ASSERT (sgot != NULL);
8970
8971 if (sgot == NULL)
8972 return bfd_reloc_notsupported;
8973
8974 *unresolved_reloc_p = FALSE;
8975 value = sgot->output_section->vma;
8976 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8977 contents, rel->r_offset, value,
8978 rel->r_addend);
8979
8980 case R_ARM_GOT32:
8981 case R_ARM_GOT_PREL:
8982 /* Relocation is to the entry for this symbol in the
8983 global offset table. */
8984 if (sgot == NULL)
8985 return bfd_reloc_notsupported;
8986
8987 if (dynreloc_st_type == STT_GNU_IFUNC
8988 && plt_offset != (bfd_vma) -1
8989 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
8990 {
8991 /* We have a relocation against a locally-binding STT_GNU_IFUNC
8992 symbol, and the relocation resolves directly to the runtime
8993 target rather than to the .iplt entry. This means that any
8994 .got entry would be the same value as the .igot.plt entry,
8995 so there's no point creating both. */
8996 sgot = globals->root.igotplt;
8997 value = sgot->output_offset + gotplt_offset;
8998 }
8999 else if (h != NULL)
9000 {
9001 bfd_vma off;
9002
9003 off = h->got.offset;
9004 BFD_ASSERT (off != (bfd_vma) -1);
9005 if ((off & 1) != 0)
9006 {
9007 /* We have already processsed one GOT relocation against
9008 this symbol. */
9009 off &= ~1;
9010 if (globals->root.dynamic_sections_created
9011 && !SYMBOL_REFERENCES_LOCAL (info, h))
9012 *unresolved_reloc_p = FALSE;
9013 }
9014 else
9015 {
9016 Elf_Internal_Rela outrel;
9017
9018 if (!SYMBOL_REFERENCES_LOCAL (info, h))
9019 {
9020 /* If the symbol doesn't resolve locally in a static
9021 object, we have an undefined reference. If the
9022 symbol doesn't resolve locally in a dynamic object,
9023 it should be resolved by the dynamic linker. */
9024 if (globals->root.dynamic_sections_created)
9025 {
9026 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9027 *unresolved_reloc_p = FALSE;
9028 }
9029 else
9030 outrel.r_info = 0;
9031 outrel.r_addend = 0;
9032 }
9033 else
9034 {
9035 if (dynreloc_st_type == STT_GNU_IFUNC)
9036 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9037 else if (info->shared)
9038 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9039 else
9040 outrel.r_info = 0;
9041 outrel.r_addend = dynreloc_value;
9042 }
9043
9044 /* The GOT entry is initialized to zero by default.
9045 See if we should install a different value. */
9046 if (outrel.r_addend != 0
9047 && (outrel.r_info == 0 || globals->use_rel))
9048 {
9049 bfd_put_32 (output_bfd, outrel.r_addend,
9050 sgot->contents + off);
9051 outrel.r_addend = 0;
9052 }
9053
9054 if (outrel.r_info != 0)
9055 {
9056 outrel.r_offset = (sgot->output_section->vma
9057 + sgot->output_offset
9058 + off);
9059 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9060 }
9061 h->got.offset |= 1;
9062 }
9063 value = sgot->output_offset + off;
9064 }
9065 else
9066 {
9067 bfd_vma off;
9068
9069 BFD_ASSERT (local_got_offsets != NULL &&
9070 local_got_offsets[r_symndx] != (bfd_vma) -1);
9071
9072 off = local_got_offsets[r_symndx];
9073
9074 /* The offset must always be a multiple of 4. We use the
9075 least significant bit to record whether we have already
9076 generated the necessary reloc. */
9077 if ((off & 1) != 0)
9078 off &= ~1;
9079 else
9080 {
9081 if (globals->use_rel)
9082 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
9083
9084 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
9085 {
9086 Elf_Internal_Rela outrel;
9087
9088 outrel.r_addend = addend + dynreloc_value;
9089 outrel.r_offset = (sgot->output_section->vma
9090 + sgot->output_offset
9091 + off);
9092 if (dynreloc_st_type == STT_GNU_IFUNC)
9093 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9094 else
9095 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9096 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9097 }
9098
9099 local_got_offsets[r_symndx] |= 1;
9100 }
9101
9102 value = sgot->output_offset + off;
9103 }
9104 if (r_type != R_ARM_GOT32)
9105 value += sgot->output_section->vma;
9106
9107 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9108 contents, rel->r_offset, value,
9109 rel->r_addend);
9110
9111 case R_ARM_TLS_LDO32:
9112 value = value - dtpoff_base (info);
9113
9114 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9115 contents, rel->r_offset, value,
9116 rel->r_addend);
9117
9118 case R_ARM_TLS_LDM32:
9119 {
9120 bfd_vma off;
9121
9122 if (sgot == NULL)
9123 abort ();
9124
9125 off = globals->tls_ldm_got.offset;
9126
9127 if ((off & 1) != 0)
9128 off &= ~1;
9129 else
9130 {
9131 /* If we don't know the module number, create a relocation
9132 for it. */
9133 if (info->shared)
9134 {
9135 Elf_Internal_Rela outrel;
9136
9137 if (srelgot == NULL)
9138 abort ();
9139
9140 outrel.r_addend = 0;
9141 outrel.r_offset = (sgot->output_section->vma
9142 + sgot->output_offset + off);
9143 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9144
9145 if (globals->use_rel)
9146 bfd_put_32 (output_bfd, outrel.r_addend,
9147 sgot->contents + off);
9148
9149 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9150 }
9151 else
9152 bfd_put_32 (output_bfd, 1, sgot->contents + off);
9153
9154 globals->tls_ldm_got.offset |= 1;
9155 }
9156
9157 value = sgot->output_section->vma + sgot->output_offset + off
9158 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9159
9160 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9161 contents, rel->r_offset, value,
9162 rel->r_addend);
9163 }
9164
9165 case R_ARM_TLS_CALL:
9166 case R_ARM_THM_TLS_CALL:
9167 case R_ARM_TLS_GD32:
9168 case R_ARM_TLS_IE32:
9169 case R_ARM_TLS_GOTDESC:
9170 case R_ARM_TLS_DESCSEQ:
9171 case R_ARM_THM_TLS_DESCSEQ:
9172 {
9173 bfd_vma off, offplt;
9174 int indx = 0;
9175 char tls_type;
9176
9177 BFD_ASSERT (sgot != NULL);
9178
9179 if (h != NULL)
9180 {
9181 bfd_boolean dyn;
9182 dyn = globals->root.dynamic_sections_created;
9183 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9184 && (!info->shared
9185 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9186 {
9187 *unresolved_reloc_p = FALSE;
9188 indx = h->dynindx;
9189 }
9190 off = h->got.offset;
9191 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
9192 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9193 }
9194 else
9195 {
9196 BFD_ASSERT (local_got_offsets != NULL);
9197 off = local_got_offsets[r_symndx];
9198 offplt = local_tlsdesc_gotents[r_symndx];
9199 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9200 }
9201
9202 /* Linker relaxations happens from one of the
9203 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
9204 if (ELF32_R_TYPE(rel->r_info) != r_type)
9205 tls_type = GOT_TLS_IE;
9206
9207 BFD_ASSERT (tls_type != GOT_UNKNOWN);
9208
9209 if ((off & 1) != 0)
9210 off &= ~1;
9211 else
9212 {
9213 bfd_boolean need_relocs = FALSE;
9214 Elf_Internal_Rela outrel;
9215 int cur_off = off;
9216
9217 /* The GOT entries have not been initialized yet. Do it
9218 now, and emit any relocations. If both an IE GOT and a
9219 GD GOT are necessary, we emit the GD first. */
9220
9221 if ((info->shared || indx != 0)
9222 && (h == NULL
9223 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9224 || h->root.type != bfd_link_hash_undefweak))
9225 {
9226 need_relocs = TRUE;
9227 BFD_ASSERT (srelgot != NULL);
9228 }
9229
9230 if (tls_type & GOT_TLS_GDESC)
9231 {
9232 bfd_byte *loc;
9233
9234 /* We should have relaxed, unless this is an undefined
9235 weak symbol. */
9236 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9237 || info->shared);
9238 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9239 <= globals->root.sgotplt->size);
9240
9241 outrel.r_addend = 0;
9242 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9243 + globals->root.sgotplt->output_offset
9244 + offplt
9245 + globals->sgotplt_jump_table_size);
9246
9247 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9248 sreloc = globals->root.srelplt;
9249 loc = sreloc->contents;
9250 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9251 BFD_ASSERT (loc + RELOC_SIZE (globals)
9252 <= sreloc->contents + sreloc->size);
9253
9254 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9255
9256 /* For globals, the first word in the relocation gets
9257 the relocation index and the top bit set, or zero,
9258 if we're binding now. For locals, it gets the
9259 symbol's offset in the tls section. */
9260 bfd_put_32 (output_bfd,
9261 !h ? value - elf_hash_table (info)->tls_sec->vma
9262 : info->flags & DF_BIND_NOW ? 0
9263 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
9264 globals->root.sgotplt->contents + offplt +
9265 globals->sgotplt_jump_table_size);
9266
9267 /* Second word in the relocation is always zero. */
9268 bfd_put_32 (output_bfd, 0,
9269 globals->root.sgotplt->contents + offplt +
9270 globals->sgotplt_jump_table_size + 4);
9271 }
9272 if (tls_type & GOT_TLS_GD)
9273 {
9274 if (need_relocs)
9275 {
9276 outrel.r_addend = 0;
9277 outrel.r_offset = (sgot->output_section->vma
9278 + sgot->output_offset
9279 + cur_off);
9280 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
9281
9282 if (globals->use_rel)
9283 bfd_put_32 (output_bfd, outrel.r_addend,
9284 sgot->contents + cur_off);
9285
9286 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9287
9288 if (indx == 0)
9289 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9290 sgot->contents + cur_off + 4);
9291 else
9292 {
9293 outrel.r_addend = 0;
9294 outrel.r_info = ELF32_R_INFO (indx,
9295 R_ARM_TLS_DTPOFF32);
9296 outrel.r_offset += 4;
9297
9298 if (globals->use_rel)
9299 bfd_put_32 (output_bfd, outrel.r_addend,
9300 sgot->contents + cur_off + 4);
9301
9302 elf32_arm_add_dynreloc (output_bfd, info,
9303 srelgot, &outrel);
9304 }
9305 }
9306 else
9307 {
9308 /* If we are not emitting relocations for a
9309 general dynamic reference, then we must be in a
9310 static link or an executable link with the
9311 symbol binding locally. Mark it as belonging
9312 to module 1, the executable. */
9313 bfd_put_32 (output_bfd, 1,
9314 sgot->contents + cur_off);
9315 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9316 sgot->contents + cur_off + 4);
9317 }
9318
9319 cur_off += 8;
9320 }
9321
9322 if (tls_type & GOT_TLS_IE)
9323 {
9324 if (need_relocs)
9325 {
9326 if (indx == 0)
9327 outrel.r_addend = value - dtpoff_base (info);
9328 else
9329 outrel.r_addend = 0;
9330 outrel.r_offset = (sgot->output_section->vma
9331 + sgot->output_offset
9332 + cur_off);
9333 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9334
9335 if (globals->use_rel)
9336 bfd_put_32 (output_bfd, outrel.r_addend,
9337 sgot->contents + cur_off);
9338
9339 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9340 }
9341 else
9342 bfd_put_32 (output_bfd, tpoff (info, value),
9343 sgot->contents + cur_off);
9344 cur_off += 4;
9345 }
9346
9347 if (h != NULL)
9348 h->got.offset |= 1;
9349 else
9350 local_got_offsets[r_symndx] |= 1;
9351 }
9352
9353 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9354 off += 8;
9355 else if (tls_type & GOT_TLS_GDESC)
9356 off = offplt;
9357
9358 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9359 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9360 {
9361 bfd_signed_vma offset;
9362 /* TLS stubs are arm mode. The original symbol is a
9363 data object, so branch_type is bogus. */
9364 branch_type = ST_BRANCH_TO_ARM;
9365 enum elf32_arm_stub_type stub_type
9366 = arm_type_of_stub (info, input_section, rel,
9367 st_type, &branch_type,
9368 (struct elf32_arm_link_hash_entry *)h,
9369 globals->tls_trampoline, globals->root.splt,
9370 input_bfd, sym_name);
9371
9372 if (stub_type != arm_stub_none)
9373 {
9374 struct elf32_arm_stub_hash_entry *stub_entry
9375 = elf32_arm_get_stub_entry
9376 (input_section, globals->root.splt, 0, rel,
9377 globals, stub_type);
9378 offset = (stub_entry->stub_offset
9379 + stub_entry->stub_sec->output_offset
9380 + stub_entry->stub_sec->output_section->vma);
9381 }
9382 else
9383 offset = (globals->root.splt->output_section->vma
9384 + globals->root.splt->output_offset
9385 + globals->tls_trampoline);
9386
9387 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9388 {
9389 unsigned long inst;
9390
9391 offset -= (input_section->output_section->vma +
9392 input_section->output_offset + rel->r_offset + 8);
9393
9394 inst = offset >> 2;
9395 inst &= 0x00ffffff;
9396 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9397 }
9398 else
9399 {
9400 /* Thumb blx encodes the offset in a complicated
9401 fashion. */
9402 unsigned upper_insn, lower_insn;
9403 unsigned neg;
9404
9405 offset -= (input_section->output_section->vma +
9406 input_section->output_offset
9407 + rel->r_offset + 4);
9408
9409 if (stub_type != arm_stub_none
9410 && arm_stub_is_thumb (stub_type))
9411 {
9412 lower_insn = 0xd000;
9413 }
9414 else
9415 {
9416 lower_insn = 0xc000;
9417 /* Round up the offset to a word boundary */
9418 offset = (offset + 2) & ~2;
9419 }
9420
9421 neg = offset < 0;
9422 upper_insn = (0xf000
9423 | ((offset >> 12) & 0x3ff)
9424 | (neg << 10));
9425 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
9426 | (((!((offset >> 22) & 1)) ^ neg) << 11)
9427 | ((offset >> 1) & 0x7ff);
9428 bfd_put_16 (input_bfd, upper_insn, hit_data);
9429 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9430 return bfd_reloc_ok;
9431 }
9432 }
9433 /* These relocations needs special care, as besides the fact
9434 they point somewhere in .gotplt, the addend must be
9435 adjusted accordingly depending on the type of instruction
9436 we refer to */
9437 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9438 {
9439 unsigned long data, insn;
9440 unsigned thumb;
9441
9442 data = bfd_get_32 (input_bfd, hit_data);
9443 thumb = data & 1;
9444 data &= ~1u;
9445
9446 if (thumb)
9447 {
9448 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9449 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9450 insn = (insn << 16)
9451 | bfd_get_16 (input_bfd,
9452 contents + rel->r_offset - data + 2);
9453 if ((insn & 0xf800c000) == 0xf000c000)
9454 /* bl/blx */
9455 value = -6;
9456 else if ((insn & 0xffffff00) == 0x4400)
9457 /* add */
9458 value = -5;
9459 else
9460 {
9461 (*_bfd_error_handler)
9462 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9463 input_bfd, input_section,
9464 (unsigned long)rel->r_offset, insn);
9465 return bfd_reloc_notsupported;
9466 }
9467 }
9468 else
9469 {
9470 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9471
9472 switch (insn >> 24)
9473 {
9474 case 0xeb: /* bl */
9475 case 0xfa: /* blx */
9476 value = -4;
9477 break;
9478
9479 case 0xe0: /* add */
9480 value = -8;
9481 break;
9482
9483 default:
9484 (*_bfd_error_handler)
9485 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9486 input_bfd, input_section,
9487 (unsigned long)rel->r_offset, insn);
9488 return bfd_reloc_notsupported;
9489 }
9490 }
9491
9492 value += ((globals->root.sgotplt->output_section->vma
9493 + globals->root.sgotplt->output_offset + off)
9494 - (input_section->output_section->vma
9495 + input_section->output_offset
9496 + rel->r_offset)
9497 + globals->sgotplt_jump_table_size);
9498 }
9499 else
9500 value = ((globals->root.sgot->output_section->vma
9501 + globals->root.sgot->output_offset + off)
9502 - (input_section->output_section->vma
9503 + input_section->output_offset + rel->r_offset));
9504
9505 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9506 contents, rel->r_offset, value,
9507 rel->r_addend);
9508 }
9509
9510 case R_ARM_TLS_LE32:
9511 if (info->shared && !info->pie)
9512 {
9513 (*_bfd_error_handler)
9514 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9515 input_bfd, input_section,
9516 (long) rel->r_offset, howto->name);
9517 return (bfd_reloc_status_type) FALSE;
9518 }
9519 else
9520 value = tpoff (info, value);
9521
9522 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9523 contents, rel->r_offset, value,
9524 rel->r_addend);
9525
9526 case R_ARM_V4BX:
9527 if (globals->fix_v4bx)
9528 {
9529 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9530
9531 /* Ensure that we have a BX instruction. */
9532 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
9533
9534 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9535 {
9536 /* Branch to veneer. */
9537 bfd_vma glue_addr;
9538 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9539 glue_addr -= input_section->output_section->vma
9540 + input_section->output_offset
9541 + rel->r_offset + 8;
9542 insn = (insn & 0xf0000000) | 0x0a000000
9543 | ((glue_addr >> 2) & 0x00ffffff);
9544 }
9545 else
9546 {
9547 /* Preserve Rm (lowest four bits) and the condition code
9548 (highest four bits). Other bits encode MOV PC,Rm. */
9549 insn = (insn & 0xf000000f) | 0x01a0f000;
9550 }
9551
9552 bfd_put_32 (input_bfd, insn, hit_data);
9553 }
9554 return bfd_reloc_ok;
9555
9556 case R_ARM_MOVW_ABS_NC:
9557 case R_ARM_MOVT_ABS:
9558 case R_ARM_MOVW_PREL_NC:
9559 case R_ARM_MOVT_PREL:
9560 /* Until we properly support segment-base-relative addressing then
9561 we assume the segment base to be zero, as for the group relocations.
9562 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9563 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9564 case R_ARM_MOVW_BREL_NC:
9565 case R_ARM_MOVW_BREL:
9566 case R_ARM_MOVT_BREL:
9567 {
9568 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9569
9570 if (globals->use_rel)
9571 {
9572 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
9573 signed_addend = (addend ^ 0x8000) - 0x8000;
9574 }
9575
9576 value += signed_addend;
9577
9578 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9579 value -= (input_section->output_section->vma
9580 + input_section->output_offset + rel->r_offset);
9581
9582 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9583 return bfd_reloc_overflow;
9584
9585 if (branch_type == ST_BRANCH_TO_THUMB)
9586 value |= 1;
9587
9588 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9589 || r_type == R_ARM_MOVT_BREL)
9590 value >>= 16;
9591
9592 insn &= 0xfff0f000;
9593 insn |= value & 0xfff;
9594 insn |= (value & 0xf000) << 4;
9595 bfd_put_32 (input_bfd, insn, hit_data);
9596 }
9597 return bfd_reloc_ok;
9598
9599 case R_ARM_THM_MOVW_ABS_NC:
9600 case R_ARM_THM_MOVT_ABS:
9601 case R_ARM_THM_MOVW_PREL_NC:
9602 case R_ARM_THM_MOVT_PREL:
9603 /* Until we properly support segment-base-relative addressing then
9604 we assume the segment base to be zero, as for the above relocations.
9605 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9606 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9607 as R_ARM_THM_MOVT_ABS. */
9608 case R_ARM_THM_MOVW_BREL_NC:
9609 case R_ARM_THM_MOVW_BREL:
9610 case R_ARM_THM_MOVT_BREL:
9611 {
9612 bfd_vma insn;
9613
9614 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9615 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9616
9617 if (globals->use_rel)
9618 {
9619 addend = ((insn >> 4) & 0xf000)
9620 | ((insn >> 15) & 0x0800)
9621 | ((insn >> 4) & 0x0700)
9622 | (insn & 0x00ff);
9623 signed_addend = (addend ^ 0x8000) - 0x8000;
9624 }
9625
9626 value += signed_addend;
9627
9628 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9629 value -= (input_section->output_section->vma
9630 + input_section->output_offset + rel->r_offset);
9631
9632 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9633 return bfd_reloc_overflow;
9634
9635 if (branch_type == ST_BRANCH_TO_THUMB)
9636 value |= 1;
9637
9638 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9639 || r_type == R_ARM_THM_MOVT_BREL)
9640 value >>= 16;
9641
9642 insn &= 0xfbf08f00;
9643 insn |= (value & 0xf000) << 4;
9644 insn |= (value & 0x0800) << 15;
9645 insn |= (value & 0x0700) << 4;
9646 insn |= (value & 0x00ff);
9647
9648 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9649 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9650 }
9651 return bfd_reloc_ok;
9652
9653 case R_ARM_ALU_PC_G0_NC:
9654 case R_ARM_ALU_PC_G1_NC:
9655 case R_ARM_ALU_PC_G0:
9656 case R_ARM_ALU_PC_G1:
9657 case R_ARM_ALU_PC_G2:
9658 case R_ARM_ALU_SB_G0_NC:
9659 case R_ARM_ALU_SB_G1_NC:
9660 case R_ARM_ALU_SB_G0:
9661 case R_ARM_ALU_SB_G1:
9662 case R_ARM_ALU_SB_G2:
9663 {
9664 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9665 bfd_vma pc = input_section->output_section->vma
9666 + input_section->output_offset + rel->r_offset;
9667 /* sb should be the origin of the *segment* containing the symbol.
9668 It is not clear how to obtain this OS-dependent value, so we
9669 make an arbitrary choice of zero. */
9670 bfd_vma sb = 0;
9671 bfd_vma residual;
9672 bfd_vma g_n;
9673 bfd_signed_vma signed_value;
9674 int group = 0;
9675
9676 /* Determine which group of bits to select. */
9677 switch (r_type)
9678 {
9679 case R_ARM_ALU_PC_G0_NC:
9680 case R_ARM_ALU_PC_G0:
9681 case R_ARM_ALU_SB_G0_NC:
9682 case R_ARM_ALU_SB_G0:
9683 group = 0;
9684 break;
9685
9686 case R_ARM_ALU_PC_G1_NC:
9687 case R_ARM_ALU_PC_G1:
9688 case R_ARM_ALU_SB_G1_NC:
9689 case R_ARM_ALU_SB_G1:
9690 group = 1;
9691 break;
9692
9693 case R_ARM_ALU_PC_G2:
9694 case R_ARM_ALU_SB_G2:
9695 group = 2;
9696 break;
9697
9698 default:
9699 abort ();
9700 }
9701
9702 /* If REL, extract the addend from the insn. If RELA, it will
9703 have already been fetched for us. */
9704 if (globals->use_rel)
9705 {
9706 int negative;
9707 bfd_vma constant = insn & 0xff;
9708 bfd_vma rotation = (insn & 0xf00) >> 8;
9709
9710 if (rotation == 0)
9711 signed_addend = constant;
9712 else
9713 {
9714 /* Compensate for the fact that in the instruction, the
9715 rotation is stored in multiples of 2 bits. */
9716 rotation *= 2;
9717
9718 /* Rotate "constant" right by "rotation" bits. */
9719 signed_addend = (constant >> rotation) |
9720 (constant << (8 * sizeof (bfd_vma) - rotation));
9721 }
9722
9723 /* Determine if the instruction is an ADD or a SUB.
9724 (For REL, this determines the sign of the addend.) */
9725 negative = identify_add_or_sub (insn);
9726 if (negative == 0)
9727 {
9728 (*_bfd_error_handler)
9729 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9730 input_bfd, input_section,
9731 (long) rel->r_offset, howto->name);
9732 return bfd_reloc_overflow;
9733 }
9734
9735 signed_addend *= negative;
9736 }
9737
9738 /* Compute the value (X) to go in the place. */
9739 if (r_type == R_ARM_ALU_PC_G0_NC
9740 || r_type == R_ARM_ALU_PC_G1_NC
9741 || r_type == R_ARM_ALU_PC_G0
9742 || r_type == R_ARM_ALU_PC_G1
9743 || r_type == R_ARM_ALU_PC_G2)
9744 /* PC relative. */
9745 signed_value = value - pc + signed_addend;
9746 else
9747 /* Section base relative. */
9748 signed_value = value - sb + signed_addend;
9749
9750 /* If the target symbol is a Thumb function, then set the
9751 Thumb bit in the address. */
9752 if (branch_type == ST_BRANCH_TO_THUMB)
9753 signed_value |= 1;
9754
9755 /* Calculate the value of the relevant G_n, in encoded
9756 constant-with-rotation format. */
9757 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9758 &residual);
9759
9760 /* Check for overflow if required. */
9761 if ((r_type == R_ARM_ALU_PC_G0
9762 || r_type == R_ARM_ALU_PC_G1
9763 || r_type == R_ARM_ALU_PC_G2
9764 || r_type == R_ARM_ALU_SB_G0
9765 || r_type == R_ARM_ALU_SB_G1
9766 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9767 {
9768 (*_bfd_error_handler)
9769 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9770 input_bfd, input_section,
9771 (long) rel->r_offset, abs (signed_value), howto->name);
9772 return bfd_reloc_overflow;
9773 }
9774
9775 /* Mask out the value and the ADD/SUB part of the opcode; take care
9776 not to destroy the S bit. */
9777 insn &= 0xff1ff000;
9778
9779 /* Set the opcode according to whether the value to go in the
9780 place is negative. */
9781 if (signed_value < 0)
9782 insn |= 1 << 22;
9783 else
9784 insn |= 1 << 23;
9785
9786 /* Encode the offset. */
9787 insn |= g_n;
9788
9789 bfd_put_32 (input_bfd, insn, hit_data);
9790 }
9791 return bfd_reloc_ok;
9792
9793 case R_ARM_LDR_PC_G0:
9794 case R_ARM_LDR_PC_G1:
9795 case R_ARM_LDR_PC_G2:
9796 case R_ARM_LDR_SB_G0:
9797 case R_ARM_LDR_SB_G1:
9798 case R_ARM_LDR_SB_G2:
9799 {
9800 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9801 bfd_vma pc = input_section->output_section->vma
9802 + input_section->output_offset + rel->r_offset;
9803 bfd_vma sb = 0; /* See note above. */
9804 bfd_vma residual;
9805 bfd_signed_vma signed_value;
9806 int group = 0;
9807
9808 /* Determine which groups of bits to calculate. */
9809 switch (r_type)
9810 {
9811 case R_ARM_LDR_PC_G0:
9812 case R_ARM_LDR_SB_G0:
9813 group = 0;
9814 break;
9815
9816 case R_ARM_LDR_PC_G1:
9817 case R_ARM_LDR_SB_G1:
9818 group = 1;
9819 break;
9820
9821 case R_ARM_LDR_PC_G2:
9822 case R_ARM_LDR_SB_G2:
9823 group = 2;
9824 break;
9825
9826 default:
9827 abort ();
9828 }
9829
9830 /* If REL, extract the addend from the insn. If RELA, it will
9831 have already been fetched for us. */
9832 if (globals->use_rel)
9833 {
9834 int negative = (insn & (1 << 23)) ? 1 : -1;
9835 signed_addend = negative * (insn & 0xfff);
9836 }
9837
9838 /* Compute the value (X) to go in the place. */
9839 if (r_type == R_ARM_LDR_PC_G0
9840 || r_type == R_ARM_LDR_PC_G1
9841 || r_type == R_ARM_LDR_PC_G2)
9842 /* PC relative. */
9843 signed_value = value - pc + signed_addend;
9844 else
9845 /* Section base relative. */
9846 signed_value = value - sb + signed_addend;
9847
9848 /* Calculate the value of the relevant G_{n-1} to obtain
9849 the residual at that stage. */
9850 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9851
9852 /* Check for overflow. */
9853 if (residual >= 0x1000)
9854 {
9855 (*_bfd_error_handler)
9856 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9857 input_bfd, input_section,
9858 (long) rel->r_offset, abs (signed_value), howto->name);
9859 return bfd_reloc_overflow;
9860 }
9861
9862 /* Mask out the value and U bit. */
9863 insn &= 0xff7ff000;
9864
9865 /* Set the U bit if the value to go in the place is non-negative. */
9866 if (signed_value >= 0)
9867 insn |= 1 << 23;
9868
9869 /* Encode the offset. */
9870 insn |= residual;
9871
9872 bfd_put_32 (input_bfd, insn, hit_data);
9873 }
9874 return bfd_reloc_ok;
9875
9876 case R_ARM_LDRS_PC_G0:
9877 case R_ARM_LDRS_PC_G1:
9878 case R_ARM_LDRS_PC_G2:
9879 case R_ARM_LDRS_SB_G0:
9880 case R_ARM_LDRS_SB_G1:
9881 case R_ARM_LDRS_SB_G2:
9882 {
9883 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9884 bfd_vma pc = input_section->output_section->vma
9885 + input_section->output_offset + rel->r_offset;
9886 bfd_vma sb = 0; /* See note above. */
9887 bfd_vma residual;
9888 bfd_signed_vma signed_value;
9889 int group = 0;
9890
9891 /* Determine which groups of bits to calculate. */
9892 switch (r_type)
9893 {
9894 case R_ARM_LDRS_PC_G0:
9895 case R_ARM_LDRS_SB_G0:
9896 group = 0;
9897 break;
9898
9899 case R_ARM_LDRS_PC_G1:
9900 case R_ARM_LDRS_SB_G1:
9901 group = 1;
9902 break;
9903
9904 case R_ARM_LDRS_PC_G2:
9905 case R_ARM_LDRS_SB_G2:
9906 group = 2;
9907 break;
9908
9909 default:
9910 abort ();
9911 }
9912
9913 /* If REL, extract the addend from the insn. If RELA, it will
9914 have already been fetched for us. */
9915 if (globals->use_rel)
9916 {
9917 int negative = (insn & (1 << 23)) ? 1 : -1;
9918 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
9919 }
9920
9921 /* Compute the value (X) to go in the place. */
9922 if (r_type == R_ARM_LDRS_PC_G0
9923 || r_type == R_ARM_LDRS_PC_G1
9924 || r_type == R_ARM_LDRS_PC_G2)
9925 /* PC relative. */
9926 signed_value = value - pc + signed_addend;
9927 else
9928 /* Section base relative. */
9929 signed_value = value - sb + signed_addend;
9930
9931 /* Calculate the value of the relevant G_{n-1} to obtain
9932 the residual at that stage. */
9933 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9934
9935 /* Check for overflow. */
9936 if (residual >= 0x100)
9937 {
9938 (*_bfd_error_handler)
9939 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9940 input_bfd, input_section,
9941 (long) rel->r_offset, abs (signed_value), howto->name);
9942 return bfd_reloc_overflow;
9943 }
9944
9945 /* Mask out the value and U bit. */
9946 insn &= 0xff7ff0f0;
9947
9948 /* Set the U bit if the value to go in the place is non-negative. */
9949 if (signed_value >= 0)
9950 insn |= 1 << 23;
9951
9952 /* Encode the offset. */
9953 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
9954
9955 bfd_put_32 (input_bfd, insn, hit_data);
9956 }
9957 return bfd_reloc_ok;
9958
9959 case R_ARM_LDC_PC_G0:
9960 case R_ARM_LDC_PC_G1:
9961 case R_ARM_LDC_PC_G2:
9962 case R_ARM_LDC_SB_G0:
9963 case R_ARM_LDC_SB_G1:
9964 case R_ARM_LDC_SB_G2:
9965 {
9966 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9967 bfd_vma pc = input_section->output_section->vma
9968 + input_section->output_offset + rel->r_offset;
9969 bfd_vma sb = 0; /* See note above. */
9970 bfd_vma residual;
9971 bfd_signed_vma signed_value;
9972 int group = 0;
9973
9974 /* Determine which groups of bits to calculate. */
9975 switch (r_type)
9976 {
9977 case R_ARM_LDC_PC_G0:
9978 case R_ARM_LDC_SB_G0:
9979 group = 0;
9980 break;
9981
9982 case R_ARM_LDC_PC_G1:
9983 case R_ARM_LDC_SB_G1:
9984 group = 1;
9985 break;
9986
9987 case R_ARM_LDC_PC_G2:
9988 case R_ARM_LDC_SB_G2:
9989 group = 2;
9990 break;
9991
9992 default:
9993 abort ();
9994 }
9995
9996 /* If REL, extract the addend from the insn. If RELA, it will
9997 have already been fetched for us. */
9998 if (globals->use_rel)
9999 {
10000 int negative = (insn & (1 << 23)) ? 1 : -1;
10001 signed_addend = negative * ((insn & 0xff) << 2);
10002 }
10003
10004 /* Compute the value (X) to go in the place. */
10005 if (r_type == R_ARM_LDC_PC_G0
10006 || r_type == R_ARM_LDC_PC_G1
10007 || r_type == R_ARM_LDC_PC_G2)
10008 /* PC relative. */
10009 signed_value = value - pc + signed_addend;
10010 else
10011 /* Section base relative. */
10012 signed_value = value - sb + signed_addend;
10013
10014 /* Calculate the value of the relevant G_{n-1} to obtain
10015 the residual at that stage. */
10016 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10017
10018 /* Check for overflow. (The absolute value to go in the place must be
10019 divisible by four and, after having been divided by four, must
10020 fit in eight bits.) */
10021 if ((residual & 0x3) != 0 || residual >= 0x400)
10022 {
10023 (*_bfd_error_handler)
10024 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10025 input_bfd, input_section,
10026 (long) rel->r_offset, abs (signed_value), howto->name);
10027 return bfd_reloc_overflow;
10028 }
10029
10030 /* Mask out the value and U bit. */
10031 insn &= 0xff7fff00;
10032
10033 /* Set the U bit if the value to go in the place is non-negative. */
10034 if (signed_value >= 0)
10035 insn |= 1 << 23;
10036
10037 /* Encode the offset. */
10038 insn |= residual >> 2;
10039
10040 bfd_put_32 (input_bfd, insn, hit_data);
10041 }
10042 return bfd_reloc_ok;
10043
10044 default:
10045 return bfd_reloc_notsupported;
10046 }
10047 }
10048
10049 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10050 static void
10051 arm_add_to_rel (bfd * abfd,
10052 bfd_byte * address,
10053 reloc_howto_type * howto,
10054 bfd_signed_vma increment)
10055 {
10056 bfd_signed_vma addend;
10057
10058 if (howto->type == R_ARM_THM_CALL
10059 || howto->type == R_ARM_THM_JUMP24)
10060 {
10061 int upper_insn, lower_insn;
10062 int upper, lower;
10063
10064 upper_insn = bfd_get_16 (abfd, address);
10065 lower_insn = bfd_get_16 (abfd, address + 2);
10066 upper = upper_insn & 0x7ff;
10067 lower = lower_insn & 0x7ff;
10068
10069 addend = (upper << 12) | (lower << 1);
10070 addend += increment;
10071 addend >>= 1;
10072
10073 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10074 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10075
10076 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10077 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
10078 }
10079 else
10080 {
10081 bfd_vma contents;
10082
10083 contents = bfd_get_32 (abfd, address);
10084
10085 /* Get the (signed) value from the instruction. */
10086 addend = contents & howto->src_mask;
10087 if (addend & ((howto->src_mask + 1) >> 1))
10088 {
10089 bfd_signed_vma mask;
10090
10091 mask = -1;
10092 mask &= ~ howto->src_mask;
10093 addend |= mask;
10094 }
10095
10096 /* Add in the increment, (which is a byte value). */
10097 switch (howto->type)
10098 {
10099 default:
10100 addend += increment;
10101 break;
10102
10103 case R_ARM_PC24:
10104 case R_ARM_PLT32:
10105 case R_ARM_CALL:
10106 case R_ARM_JUMP24:
10107 addend <<= howto->size;
10108 addend += increment;
10109
10110 /* Should we check for overflow here ? */
10111
10112 /* Drop any undesired bits. */
10113 addend >>= howto->rightshift;
10114 break;
10115 }
10116
10117 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10118
10119 bfd_put_32 (abfd, contents, address);
10120 }
10121 }
10122
10123 #define IS_ARM_TLS_RELOC(R_TYPE) \
10124 ((R_TYPE) == R_ARM_TLS_GD32 \
10125 || (R_TYPE) == R_ARM_TLS_LDO32 \
10126 || (R_TYPE) == R_ARM_TLS_LDM32 \
10127 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10128 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10129 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10130 || (R_TYPE) == R_ARM_TLS_LE32 \
10131 || (R_TYPE) == R_ARM_TLS_IE32 \
10132 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10133
10134 /* Specific set of relocations for the gnu tls dialect. */
10135 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10136 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10137 || (R_TYPE) == R_ARM_TLS_CALL \
10138 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10139 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10140 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
10141
10142 /* Relocate an ARM ELF section. */
10143
10144 static bfd_boolean
10145 elf32_arm_relocate_section (bfd * output_bfd,
10146 struct bfd_link_info * info,
10147 bfd * input_bfd,
10148 asection * input_section,
10149 bfd_byte * contents,
10150 Elf_Internal_Rela * relocs,
10151 Elf_Internal_Sym * local_syms,
10152 asection ** local_sections)
10153 {
10154 Elf_Internal_Shdr *symtab_hdr;
10155 struct elf_link_hash_entry **sym_hashes;
10156 Elf_Internal_Rela *rel;
10157 Elf_Internal_Rela *relend;
10158 const char *name;
10159 struct elf32_arm_link_hash_table * globals;
10160
10161 globals = elf32_arm_hash_table (info);
10162 if (globals == NULL)
10163 return FALSE;
10164
10165 symtab_hdr = & elf_symtab_hdr (input_bfd);
10166 sym_hashes = elf_sym_hashes (input_bfd);
10167
10168 rel = relocs;
10169 relend = relocs + input_section->reloc_count;
10170 for (; rel < relend; rel++)
10171 {
10172 int r_type;
10173 reloc_howto_type * howto;
10174 unsigned long r_symndx;
10175 Elf_Internal_Sym * sym;
10176 asection * sec;
10177 struct elf_link_hash_entry * h;
10178 bfd_vma relocation;
10179 bfd_reloc_status_type r;
10180 arelent bfd_reloc;
10181 char sym_type;
10182 bfd_boolean unresolved_reloc = FALSE;
10183 char *error_message = NULL;
10184
10185 r_symndx = ELF32_R_SYM (rel->r_info);
10186 r_type = ELF32_R_TYPE (rel->r_info);
10187 r_type = arm_real_reloc_type (globals, r_type);
10188
10189 if ( r_type == R_ARM_GNU_VTENTRY
10190 || r_type == R_ARM_GNU_VTINHERIT)
10191 continue;
10192
10193 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
10194 howto = bfd_reloc.howto;
10195
10196 h = NULL;
10197 sym = NULL;
10198 sec = NULL;
10199
10200 if (r_symndx < symtab_hdr->sh_info)
10201 {
10202 sym = local_syms + r_symndx;
10203 sym_type = ELF32_ST_TYPE (sym->st_info);
10204 sec = local_sections[r_symndx];
10205
10206 /* An object file might have a reference to a local
10207 undefined symbol. This is a daft object file, but we
10208 should at least do something about it. V4BX & NONE
10209 relocations do not use the symbol and are explicitly
10210 allowed to use the undefined symbol, so allow those.
10211 Likewise for relocations against STN_UNDEF. */
10212 if (r_type != R_ARM_V4BX
10213 && r_type != R_ARM_NONE
10214 && r_symndx != STN_UNDEF
10215 && bfd_is_und_section (sec)
10216 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10217 {
10218 if (!info->callbacks->undefined_symbol
10219 (info, bfd_elf_string_from_elf_section
10220 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10221 input_bfd, input_section,
10222 rel->r_offset, TRUE))
10223 return FALSE;
10224 }
10225
10226 if (globals->use_rel)
10227 {
10228 relocation = (sec->output_section->vma
10229 + sec->output_offset
10230 + sym->st_value);
10231 if (!info->relocatable
10232 && (sec->flags & SEC_MERGE)
10233 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10234 {
10235 asection *msec;
10236 bfd_vma addend, value;
10237
10238 switch (r_type)
10239 {
10240 case R_ARM_MOVW_ABS_NC:
10241 case R_ARM_MOVT_ABS:
10242 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10243 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10244 addend = (addend ^ 0x8000) - 0x8000;
10245 break;
10246
10247 case R_ARM_THM_MOVW_ABS_NC:
10248 case R_ARM_THM_MOVT_ABS:
10249 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10250 << 16;
10251 value |= bfd_get_16 (input_bfd,
10252 contents + rel->r_offset + 2);
10253 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10254 | ((value & 0x04000000) >> 15);
10255 addend = (addend ^ 0x8000) - 0x8000;
10256 break;
10257
10258 default:
10259 if (howto->rightshift
10260 || (howto->src_mask & (howto->src_mask + 1)))
10261 {
10262 (*_bfd_error_handler)
10263 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10264 input_bfd, input_section,
10265 (long) rel->r_offset, howto->name);
10266 return FALSE;
10267 }
10268
10269 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10270
10271 /* Get the (signed) value from the instruction. */
10272 addend = value & howto->src_mask;
10273 if (addend & ((howto->src_mask + 1) >> 1))
10274 {
10275 bfd_signed_vma mask;
10276
10277 mask = -1;
10278 mask &= ~ howto->src_mask;
10279 addend |= mask;
10280 }
10281 break;
10282 }
10283
10284 msec = sec;
10285 addend =
10286 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10287 - relocation;
10288 addend += msec->output_section->vma + msec->output_offset;
10289
10290 /* Cases here must match those in the preceding
10291 switch statement. */
10292 switch (r_type)
10293 {
10294 case R_ARM_MOVW_ABS_NC:
10295 case R_ARM_MOVT_ABS:
10296 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10297 | (addend & 0xfff);
10298 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10299 break;
10300
10301 case R_ARM_THM_MOVW_ABS_NC:
10302 case R_ARM_THM_MOVT_ABS:
10303 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10304 | (addend & 0xff) | ((addend & 0x0800) << 15);
10305 bfd_put_16 (input_bfd, value >> 16,
10306 contents + rel->r_offset);
10307 bfd_put_16 (input_bfd, value,
10308 contents + rel->r_offset + 2);
10309 break;
10310
10311 default:
10312 value = (value & ~ howto->dst_mask)
10313 | (addend & howto->dst_mask);
10314 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10315 break;
10316 }
10317 }
10318 }
10319 else
10320 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
10321 }
10322 else
10323 {
10324 bfd_boolean warned;
10325
10326 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10327 r_symndx, symtab_hdr, sym_hashes,
10328 h, sec, relocation,
10329 unresolved_reloc, warned);
10330
10331 sym_type = h->type;
10332 }
10333
10334 if (sec != NULL && elf_discarded_section (sec))
10335 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
10336 rel, relend, howto, contents);
10337
10338 if (info->relocatable)
10339 {
10340 /* This is a relocatable link. We don't have to change
10341 anything, unless the reloc is against a section symbol,
10342 in which case we have to adjust according to where the
10343 section symbol winds up in the output section. */
10344 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10345 {
10346 if (globals->use_rel)
10347 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10348 howto, (bfd_signed_vma) sec->output_offset);
10349 else
10350 rel->r_addend += sec->output_offset;
10351 }
10352 continue;
10353 }
10354
10355 if (h != NULL)
10356 name = h->root.root.string;
10357 else
10358 {
10359 name = (bfd_elf_string_from_elf_section
10360 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10361 if (name == NULL || *name == '\0')
10362 name = bfd_section_name (input_bfd, sec);
10363 }
10364
10365 if (r_symndx != STN_UNDEF
10366 && r_type != R_ARM_NONE
10367 && (h == NULL
10368 || h->root.type == bfd_link_hash_defined
10369 || h->root.type == bfd_link_hash_defweak)
10370 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10371 {
10372 (*_bfd_error_handler)
10373 ((sym_type == STT_TLS
10374 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10375 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10376 input_bfd,
10377 input_section,
10378 (long) rel->r_offset,
10379 howto->name,
10380 name);
10381 }
10382
10383 /* We call elf32_arm_final_link_relocate unless we're completely
10384 done, i.e., the relaxation produced the final output we want,
10385 and we won't let anybody mess with it. Also, we have to do
10386 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10387 both in relaxed and non-relaxed cases */
10388 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10389 || (IS_ARM_TLS_GNU_RELOC (r_type)
10390 && !((h ? elf32_arm_hash_entry (h)->tls_type :
10391 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10392 & GOT_TLS_GDESC)))
10393 {
10394 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10395 contents, rel, h == NULL);
10396 /* This may have been marked unresolved because it came from
10397 a shared library. But we've just dealt with that. */
10398 unresolved_reloc = 0;
10399 }
10400 else
10401 r = bfd_reloc_continue;
10402
10403 if (r == bfd_reloc_continue)
10404 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10405 input_section, contents, rel,
10406 relocation, info, sec, name, sym_type,
10407 (h ? h->target_internal
10408 : ARM_SYM_BRANCH_TYPE (sym)), h,
10409 &unresolved_reloc, &error_message);
10410
10411 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10412 because such sections are not SEC_ALLOC and thus ld.so will
10413 not process them. */
10414 if (unresolved_reloc
10415 && !((input_section->flags & SEC_DEBUGGING) != 0
10416 && h->def_dynamic)
10417 && _bfd_elf_section_offset (output_bfd, info, input_section,
10418 rel->r_offset) != (bfd_vma) -1)
10419 {
10420 (*_bfd_error_handler)
10421 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10422 input_bfd,
10423 input_section,
10424 (long) rel->r_offset,
10425 howto->name,
10426 h->root.root.string);
10427 return FALSE;
10428 }
10429
10430 if (r != bfd_reloc_ok)
10431 {
10432 switch (r)
10433 {
10434 case bfd_reloc_overflow:
10435 /* If the overflowing reloc was to an undefined symbol,
10436 we have already printed one error message and there
10437 is no point complaining again. */
10438 if ((! h ||
10439 h->root.type != bfd_link_hash_undefined)
10440 && (!((*info->callbacks->reloc_overflow)
10441 (info, (h ? &h->root : NULL), name, howto->name,
10442 (bfd_vma) 0, input_bfd, input_section,
10443 rel->r_offset))))
10444 return FALSE;
10445 break;
10446
10447 case bfd_reloc_undefined:
10448 if (!((*info->callbacks->undefined_symbol)
10449 (info, name, input_bfd, input_section,
10450 rel->r_offset, TRUE)))
10451 return FALSE;
10452 break;
10453
10454 case bfd_reloc_outofrange:
10455 error_message = _("out of range");
10456 goto common_error;
10457
10458 case bfd_reloc_notsupported:
10459 error_message = _("unsupported relocation");
10460 goto common_error;
10461
10462 case bfd_reloc_dangerous:
10463 /* error_message should already be set. */
10464 goto common_error;
10465
10466 default:
10467 error_message = _("unknown error");
10468 /* Fall through. */
10469
10470 common_error:
10471 BFD_ASSERT (error_message != NULL);
10472 if (!((*info->callbacks->reloc_dangerous)
10473 (info, error_message, input_bfd, input_section,
10474 rel->r_offset)))
10475 return FALSE;
10476 break;
10477 }
10478 }
10479 }
10480
10481 return TRUE;
10482 }
10483
10484 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
10485 adds the edit to the start of the list. (The list must be built in order of
10486 ascending TINDEX: the function's callers are primarily responsible for
10487 maintaining that condition). */
10488
10489 static void
10490 add_unwind_table_edit (arm_unwind_table_edit **head,
10491 arm_unwind_table_edit **tail,
10492 arm_unwind_edit_type type,
10493 asection *linked_section,
10494 unsigned int tindex)
10495 {
10496 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10497 xmalloc (sizeof (arm_unwind_table_edit));
10498
10499 new_edit->type = type;
10500 new_edit->linked_section = linked_section;
10501 new_edit->index = tindex;
10502
10503 if (tindex > 0)
10504 {
10505 new_edit->next = NULL;
10506
10507 if (*tail)
10508 (*tail)->next = new_edit;
10509
10510 (*tail) = new_edit;
10511
10512 if (!*head)
10513 (*head) = new_edit;
10514 }
10515 else
10516 {
10517 new_edit->next = *head;
10518
10519 if (!*tail)
10520 *tail = new_edit;
10521
10522 *head = new_edit;
10523 }
10524 }
10525
10526 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10527
10528 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10529 static void
10530 adjust_exidx_size(asection *exidx_sec, int adjust)
10531 {
10532 asection *out_sec;
10533
10534 if (!exidx_sec->rawsize)
10535 exidx_sec->rawsize = exidx_sec->size;
10536
10537 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10538 out_sec = exidx_sec->output_section;
10539 /* Adjust size of output section. */
10540 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10541 }
10542
10543 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10544 static void
10545 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10546 {
10547 struct _arm_elf_section_data *exidx_arm_data;
10548
10549 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10550 add_unwind_table_edit (
10551 &exidx_arm_data->u.exidx.unwind_edit_list,
10552 &exidx_arm_data->u.exidx.unwind_edit_tail,
10553 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10554
10555 adjust_exidx_size(exidx_sec, 8);
10556 }
10557
10558 /* Scan .ARM.exidx tables, and create a list describing edits which should be
10559 made to those tables, such that:
10560
10561 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10562 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10563 codes which have been inlined into the index).
10564
10565 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10566
10567 The edits are applied when the tables are written
10568 (in elf32_arm_write_section).
10569 */
10570
10571 bfd_boolean
10572 elf32_arm_fix_exidx_coverage (asection **text_section_order,
10573 unsigned int num_text_sections,
10574 struct bfd_link_info *info,
10575 bfd_boolean merge_exidx_entries)
10576 {
10577 bfd *inp;
10578 unsigned int last_second_word = 0, i;
10579 asection *last_exidx_sec = NULL;
10580 asection *last_text_sec = NULL;
10581 int last_unwind_type = -1;
10582
10583 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10584 text sections. */
10585 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10586 {
10587 asection *sec;
10588
10589 for (sec = inp->sections; sec != NULL; sec = sec->next)
10590 {
10591 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10592 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
10593
10594 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
10595 continue;
10596
10597 if (elf_sec->linked_to)
10598 {
10599 Elf_Internal_Shdr *linked_hdr
10600 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10601 struct _arm_elf_section_data *linked_sec_arm_data
10602 = get_arm_elf_section_data (linked_hdr->bfd_section);
10603
10604 if (linked_sec_arm_data == NULL)
10605 continue;
10606
10607 /* Link this .ARM.exidx section back from the text section it
10608 describes. */
10609 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10610 }
10611 }
10612 }
10613
10614 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10615 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
10616 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
10617
10618 for (i = 0; i < num_text_sections; i++)
10619 {
10620 asection *sec = text_section_order[i];
10621 asection *exidx_sec;
10622 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10623 struct _arm_elf_section_data *exidx_arm_data;
10624 bfd_byte *contents = NULL;
10625 int deleted_exidx_bytes = 0;
10626 bfd_vma j;
10627 arm_unwind_table_edit *unwind_edit_head = NULL;
10628 arm_unwind_table_edit *unwind_edit_tail = NULL;
10629 Elf_Internal_Shdr *hdr;
10630 bfd *ibfd;
10631
10632 if (arm_data == NULL)
10633 continue;
10634
10635 exidx_sec = arm_data->u.text.arm_exidx_sec;
10636 if (exidx_sec == NULL)
10637 {
10638 /* Section has no unwind data. */
10639 if (last_unwind_type == 0 || !last_exidx_sec)
10640 continue;
10641
10642 /* Ignore zero sized sections. */
10643 if (sec->size == 0)
10644 continue;
10645
10646 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10647 last_unwind_type = 0;
10648 continue;
10649 }
10650
10651 /* Skip /DISCARD/ sections. */
10652 if (bfd_is_abs_section (exidx_sec->output_section))
10653 continue;
10654
10655 hdr = &elf_section_data (exidx_sec)->this_hdr;
10656 if (hdr->sh_type != SHT_ARM_EXIDX)
10657 continue;
10658
10659 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10660 if (exidx_arm_data == NULL)
10661 continue;
10662
10663 ibfd = exidx_sec->owner;
10664
10665 if (hdr->contents != NULL)
10666 contents = hdr->contents;
10667 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10668 /* An error? */
10669 continue;
10670
10671 for (j = 0; j < hdr->sh_size; j += 8)
10672 {
10673 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10674 int unwind_type;
10675 int elide = 0;
10676
10677 /* An EXIDX_CANTUNWIND entry. */
10678 if (second_word == 1)
10679 {
10680 if (last_unwind_type == 0)
10681 elide = 1;
10682 unwind_type = 0;
10683 }
10684 /* Inlined unwinding data. Merge if equal to previous. */
10685 else if ((second_word & 0x80000000) != 0)
10686 {
10687 if (merge_exidx_entries
10688 && last_second_word == second_word && last_unwind_type == 1)
10689 elide = 1;
10690 unwind_type = 1;
10691 last_second_word = second_word;
10692 }
10693 /* Normal table entry. In theory we could merge these too,
10694 but duplicate entries are likely to be much less common. */
10695 else
10696 unwind_type = 2;
10697
10698 if (elide)
10699 {
10700 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10701 DELETE_EXIDX_ENTRY, NULL, j / 8);
10702
10703 deleted_exidx_bytes += 8;
10704 }
10705
10706 last_unwind_type = unwind_type;
10707 }
10708
10709 /* Free contents if we allocated it ourselves. */
10710 if (contents != hdr->contents)
10711 free (contents);
10712
10713 /* Record edits to be applied later (in elf32_arm_write_section). */
10714 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10715 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
10716
10717 if (deleted_exidx_bytes > 0)
10718 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10719
10720 last_exidx_sec = exidx_sec;
10721 last_text_sec = sec;
10722 }
10723
10724 /* Add terminating CANTUNWIND entry. */
10725 if (last_exidx_sec && last_unwind_type != 0)
10726 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10727
10728 return TRUE;
10729 }
10730
10731 static bfd_boolean
10732 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10733 bfd *ibfd, const char *name)
10734 {
10735 asection *sec, *osec;
10736
10737 sec = bfd_get_section_by_name (ibfd, name);
10738 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10739 return TRUE;
10740
10741 osec = sec->output_section;
10742 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10743 return TRUE;
10744
10745 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10746 sec->output_offset, sec->size))
10747 return FALSE;
10748
10749 return TRUE;
10750 }
10751
10752 static bfd_boolean
10753 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10754 {
10755 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
10756 asection *sec, *osec;
10757
10758 if (globals == NULL)
10759 return FALSE;
10760
10761 /* Invoke the regular ELF backend linker to do all the work. */
10762 if (!bfd_elf_final_link (abfd, info))
10763 return FALSE;
10764
10765 /* Process stub sections (eg BE8 encoding, ...). */
10766 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10767 int i;
10768 for (i=0; i<htab->top_id; i++)
10769 {
10770 sec = htab->stub_group[i].stub_sec;
10771 /* Only process it once, in its link_sec slot. */
10772 if (sec && i == htab->stub_group[i].link_sec->id)
10773 {
10774 osec = sec->output_section;
10775 elf32_arm_write_section (abfd, info, sec, sec->contents);
10776 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10777 sec->output_offset, sec->size))
10778 return FALSE;
10779 }
10780 }
10781
10782 /* Write out any glue sections now that we have created all the
10783 stubs. */
10784 if (globals->bfd_of_glue_owner != NULL)
10785 {
10786 if (! elf32_arm_output_glue_section (info, abfd,
10787 globals->bfd_of_glue_owner,
10788 ARM2THUMB_GLUE_SECTION_NAME))
10789 return FALSE;
10790
10791 if (! elf32_arm_output_glue_section (info, abfd,
10792 globals->bfd_of_glue_owner,
10793 THUMB2ARM_GLUE_SECTION_NAME))
10794 return FALSE;
10795
10796 if (! elf32_arm_output_glue_section (info, abfd,
10797 globals->bfd_of_glue_owner,
10798 VFP11_ERRATUM_VENEER_SECTION_NAME))
10799 return FALSE;
10800
10801 if (! elf32_arm_output_glue_section (info, abfd,
10802 globals->bfd_of_glue_owner,
10803 ARM_BX_GLUE_SECTION_NAME))
10804 return FALSE;
10805 }
10806
10807 return TRUE;
10808 }
10809
10810 /* Set the right machine number. */
10811
10812 static bfd_boolean
10813 elf32_arm_object_p (bfd *abfd)
10814 {
10815 unsigned int mach;
10816
10817 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
10818
10819 if (mach != bfd_mach_arm_unknown)
10820 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
10821
10822 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
10823 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
10824
10825 else
10826 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
10827
10828 return TRUE;
10829 }
10830
10831 /* Function to keep ARM specific flags in the ELF header. */
10832
10833 static bfd_boolean
10834 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
10835 {
10836 if (elf_flags_init (abfd)
10837 && elf_elfheader (abfd)->e_flags != flags)
10838 {
10839 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
10840 {
10841 if (flags & EF_ARM_INTERWORK)
10842 (*_bfd_error_handler)
10843 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
10844 abfd);
10845 else
10846 _bfd_error_handler
10847 (_("Warning: Clearing the interworking flag of %B due to outside request"),
10848 abfd);
10849 }
10850 }
10851 else
10852 {
10853 elf_elfheader (abfd)->e_flags = flags;
10854 elf_flags_init (abfd) = TRUE;
10855 }
10856
10857 return TRUE;
10858 }
10859
10860 /* Copy backend specific data from one object module to another. */
10861
10862 static bfd_boolean
10863 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
10864 {
10865 flagword in_flags;
10866 flagword out_flags;
10867
10868 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
10869 return TRUE;
10870
10871 in_flags = elf_elfheader (ibfd)->e_flags;
10872 out_flags = elf_elfheader (obfd)->e_flags;
10873
10874 if (elf_flags_init (obfd)
10875 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
10876 && in_flags != out_flags)
10877 {
10878 /* Cannot mix APCS26 and APCS32 code. */
10879 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
10880 return FALSE;
10881
10882 /* Cannot mix float APCS and non-float APCS code. */
10883 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
10884 return FALSE;
10885
10886 /* If the src and dest have different interworking flags
10887 then turn off the interworking bit. */
10888 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
10889 {
10890 if (out_flags & EF_ARM_INTERWORK)
10891 _bfd_error_handler
10892 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
10893 obfd, ibfd);
10894
10895 in_flags &= ~EF_ARM_INTERWORK;
10896 }
10897
10898 /* Likewise for PIC, though don't warn for this case. */
10899 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
10900 in_flags &= ~EF_ARM_PIC;
10901 }
10902
10903 elf_elfheader (obfd)->e_flags = in_flags;
10904 elf_flags_init (obfd) = TRUE;
10905
10906 /* Also copy the EI_OSABI field. */
10907 elf_elfheader (obfd)->e_ident[EI_OSABI] =
10908 elf_elfheader (ibfd)->e_ident[EI_OSABI];
10909
10910 /* Copy object attributes. */
10911 _bfd_elf_copy_obj_attributes (ibfd, obfd);
10912
10913 return TRUE;
10914 }
10915
10916 /* Values for Tag_ABI_PCS_R9_use. */
10917 enum
10918 {
10919 AEABI_R9_V6,
10920 AEABI_R9_SB,
10921 AEABI_R9_TLS,
10922 AEABI_R9_unused
10923 };
10924
10925 /* Values for Tag_ABI_PCS_RW_data. */
10926 enum
10927 {
10928 AEABI_PCS_RW_data_absolute,
10929 AEABI_PCS_RW_data_PCrel,
10930 AEABI_PCS_RW_data_SBrel,
10931 AEABI_PCS_RW_data_unused
10932 };
10933
10934 /* Values for Tag_ABI_enum_size. */
10935 enum
10936 {
10937 AEABI_enum_unused,
10938 AEABI_enum_short,
10939 AEABI_enum_wide,
10940 AEABI_enum_forced_wide
10941 };
10942
10943 /* Determine whether an object attribute tag takes an integer, a
10944 string or both. */
10945
10946 static int
10947 elf32_arm_obj_attrs_arg_type (int tag)
10948 {
10949 if (tag == Tag_compatibility)
10950 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
10951 else if (tag == Tag_nodefaults)
10952 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
10953 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
10954 return ATTR_TYPE_FLAG_STR_VAL;
10955 else if (tag < 32)
10956 return ATTR_TYPE_FLAG_INT_VAL;
10957 else
10958 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
10959 }
10960
10961 /* The ABI defines that Tag_conformance should be emitted first, and that
10962 Tag_nodefaults should be second (if either is defined). This sets those
10963 two positions, and bumps up the position of all the remaining tags to
10964 compensate. */
10965 static int
10966 elf32_arm_obj_attrs_order (int num)
10967 {
10968 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
10969 return Tag_conformance;
10970 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
10971 return Tag_nodefaults;
10972 if ((num - 2) < Tag_nodefaults)
10973 return num - 2;
10974 if ((num - 1) < Tag_conformance)
10975 return num - 1;
10976 return num;
10977 }
10978
10979 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10980 static bfd_boolean
10981 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
10982 {
10983 if ((tag & 127) < 64)
10984 {
10985 _bfd_error_handler
10986 (_("%B: Unknown mandatory EABI object attribute %d"),
10987 abfd, tag);
10988 bfd_set_error (bfd_error_bad_value);
10989 return FALSE;
10990 }
10991 else
10992 {
10993 _bfd_error_handler
10994 (_("Warning: %B: Unknown EABI object attribute %d"),
10995 abfd, tag);
10996 return TRUE;
10997 }
10998 }
10999
11000 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
11001 Returns -1 if no architecture could be read. */
11002
11003 static int
11004 get_secondary_compatible_arch (bfd *abfd)
11005 {
11006 obj_attribute *attr =
11007 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11008
11009 /* Note: the tag and its argument below are uleb128 values, though
11010 currently-defined values fit in one byte for each. */
11011 if (attr->s
11012 && attr->s[0] == Tag_CPU_arch
11013 && (attr->s[1] & 128) != 128
11014 && attr->s[2] == 0)
11015 return attr->s[1];
11016
11017 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11018 return -1;
11019 }
11020
11021 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11022 The tag is removed if ARCH is -1. */
11023
11024 static void
11025 set_secondary_compatible_arch (bfd *abfd, int arch)
11026 {
11027 obj_attribute *attr =
11028 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11029
11030 if (arch == -1)
11031 {
11032 attr->s = NULL;
11033 return;
11034 }
11035
11036 /* Note: the tag and its argument below are uleb128 values, though
11037 currently-defined values fit in one byte for each. */
11038 if (!attr->s)
11039 attr->s = (char *) bfd_alloc (abfd, 3);
11040 attr->s[0] = Tag_CPU_arch;
11041 attr->s[1] = arch;
11042 attr->s[2] = '\0';
11043 }
11044
11045 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11046 into account. */
11047
11048 static int
11049 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11050 int newtag, int secondary_compat)
11051 {
11052 #define T(X) TAG_CPU_ARCH_##X
11053 int tagl, tagh, result;
11054 const int v6t2[] =
11055 {
11056 T(V6T2), /* PRE_V4. */
11057 T(V6T2), /* V4. */
11058 T(V6T2), /* V4T. */
11059 T(V6T2), /* V5T. */
11060 T(V6T2), /* V5TE. */
11061 T(V6T2), /* V5TEJ. */
11062 T(V6T2), /* V6. */
11063 T(V7), /* V6KZ. */
11064 T(V6T2) /* V6T2. */
11065 };
11066 const int v6k[] =
11067 {
11068 T(V6K), /* PRE_V4. */
11069 T(V6K), /* V4. */
11070 T(V6K), /* V4T. */
11071 T(V6K), /* V5T. */
11072 T(V6K), /* V5TE. */
11073 T(V6K), /* V5TEJ. */
11074 T(V6K), /* V6. */
11075 T(V6KZ), /* V6KZ. */
11076 T(V7), /* V6T2. */
11077 T(V6K) /* V6K. */
11078 };
11079 const int v7[] =
11080 {
11081 T(V7), /* PRE_V4. */
11082 T(V7), /* V4. */
11083 T(V7), /* V4T. */
11084 T(V7), /* V5T. */
11085 T(V7), /* V5TE. */
11086 T(V7), /* V5TEJ. */
11087 T(V7), /* V6. */
11088 T(V7), /* V6KZ. */
11089 T(V7), /* V6T2. */
11090 T(V7), /* V6K. */
11091 T(V7) /* V7. */
11092 };
11093 const int v6_m[] =
11094 {
11095 -1, /* PRE_V4. */
11096 -1, /* V4. */
11097 T(V6K), /* V4T. */
11098 T(V6K), /* V5T. */
11099 T(V6K), /* V5TE. */
11100 T(V6K), /* V5TEJ. */
11101 T(V6K), /* V6. */
11102 T(V6KZ), /* V6KZ. */
11103 T(V7), /* V6T2. */
11104 T(V6K), /* V6K. */
11105 T(V7), /* V7. */
11106 T(V6_M) /* V6_M. */
11107 };
11108 const int v6s_m[] =
11109 {
11110 -1, /* PRE_V4. */
11111 -1, /* V4. */
11112 T(V6K), /* V4T. */
11113 T(V6K), /* V5T. */
11114 T(V6K), /* V5TE. */
11115 T(V6K), /* V5TEJ. */
11116 T(V6K), /* V6. */
11117 T(V6KZ), /* V6KZ. */
11118 T(V7), /* V6T2. */
11119 T(V6K), /* V6K. */
11120 T(V7), /* V7. */
11121 T(V6S_M), /* V6_M. */
11122 T(V6S_M) /* V6S_M. */
11123 };
11124 const int v7e_m[] =
11125 {
11126 -1, /* PRE_V4. */
11127 -1, /* V4. */
11128 T(V7E_M), /* V4T. */
11129 T(V7E_M), /* V5T. */
11130 T(V7E_M), /* V5TE. */
11131 T(V7E_M), /* V5TEJ. */
11132 T(V7E_M), /* V6. */
11133 T(V7E_M), /* V6KZ. */
11134 T(V7E_M), /* V6T2. */
11135 T(V7E_M), /* V6K. */
11136 T(V7E_M), /* V7. */
11137 T(V7E_M), /* V6_M. */
11138 T(V7E_M), /* V6S_M. */
11139 T(V7E_M) /* V7E_M. */
11140 };
11141 const int v4t_plus_v6_m[] =
11142 {
11143 -1, /* PRE_V4. */
11144 -1, /* V4. */
11145 T(V4T), /* V4T. */
11146 T(V5T), /* V5T. */
11147 T(V5TE), /* V5TE. */
11148 T(V5TEJ), /* V5TEJ. */
11149 T(V6), /* V6. */
11150 T(V6KZ), /* V6KZ. */
11151 T(V6T2), /* V6T2. */
11152 T(V6K), /* V6K. */
11153 T(V7), /* V7. */
11154 T(V6_M), /* V6_M. */
11155 T(V6S_M), /* V6S_M. */
11156 T(V7E_M), /* V7E_M. */
11157 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11158 };
11159 const int *comb[] =
11160 {
11161 v6t2,
11162 v6k,
11163 v7,
11164 v6_m,
11165 v6s_m,
11166 v7e_m,
11167 /* Pseudo-architecture. */
11168 v4t_plus_v6_m
11169 };
11170
11171 /* Check we've not got a higher architecture than we know about. */
11172
11173 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
11174 {
11175 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
11176 return -1;
11177 }
11178
11179 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11180
11181 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11182 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11183 oldtag = T(V4T_PLUS_V6_M);
11184
11185 /* And override the new tag if we have a Tag_also_compatible_with on the
11186 input. */
11187
11188 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11189 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11190 newtag = T(V4T_PLUS_V6_M);
11191
11192 tagl = (oldtag < newtag) ? oldtag : newtag;
11193 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11194
11195 /* Architectures before V6KZ add features monotonically. */
11196 if (tagh <= TAG_CPU_ARCH_V6KZ)
11197 return result;
11198
11199 result = comb[tagh - T(V6T2)][tagl];
11200
11201 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11202 as the canonical version. */
11203 if (result == T(V4T_PLUS_V6_M))
11204 {
11205 result = T(V4T);
11206 *secondary_compat_out = T(V6_M);
11207 }
11208 else
11209 *secondary_compat_out = -1;
11210
11211 if (result == -1)
11212 {
11213 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
11214 ibfd, oldtag, newtag);
11215 return -1;
11216 }
11217
11218 return result;
11219 #undef T
11220 }
11221
11222 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11223 are conflicting attributes. */
11224
11225 static bfd_boolean
11226 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11227 {
11228 obj_attribute *in_attr;
11229 obj_attribute *out_attr;
11230 /* Some tags have 0 = don't care, 1 = strong requirement,
11231 2 = weak requirement. */
11232 static const int order_021[3] = {0, 2, 1};
11233 int i;
11234 bfd_boolean result = TRUE;
11235
11236 /* Skip the linker stubs file. This preserves previous behavior
11237 of accepting unknown attributes in the first input file - but
11238 is that a bug? */
11239 if (ibfd->flags & BFD_LINKER_CREATED)
11240 return TRUE;
11241
11242 if (!elf_known_obj_attributes_proc (obfd)[0].i)
11243 {
11244 /* This is the first object. Copy the attributes. */
11245 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11246
11247 out_attr = elf_known_obj_attributes_proc (obfd);
11248
11249 /* Use the Tag_null value to indicate the attributes have been
11250 initialized. */
11251 out_attr[0].i = 1;
11252
11253 /* We do not output objects with Tag_MPextension_use_legacy - we move
11254 the attribute's value to Tag_MPextension_use. */
11255 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11256 {
11257 if (out_attr[Tag_MPextension_use].i != 0
11258 && out_attr[Tag_MPextension_use_legacy].i
11259 != out_attr[Tag_MPextension_use].i)
11260 {
11261 _bfd_error_handler
11262 (_("Error: %B has both the current and legacy "
11263 "Tag_MPextension_use attributes"), ibfd);
11264 result = FALSE;
11265 }
11266
11267 out_attr[Tag_MPextension_use] =
11268 out_attr[Tag_MPextension_use_legacy];
11269 out_attr[Tag_MPextension_use_legacy].type = 0;
11270 out_attr[Tag_MPextension_use_legacy].i = 0;
11271 }
11272
11273 return result;
11274 }
11275
11276 in_attr = elf_known_obj_attributes_proc (ibfd);
11277 out_attr = elf_known_obj_attributes_proc (obfd);
11278 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11279 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11280 {
11281 /* Ignore mismatches if the object doesn't use floating point. */
11282 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11283 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11284 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11285 {
11286 _bfd_error_handler
11287 (_("error: %B uses VFP register arguments, %B does not"),
11288 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11289 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
11290 result = FALSE;
11291 }
11292 }
11293
11294 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
11295 {
11296 /* Merge this attribute with existing attributes. */
11297 switch (i)
11298 {
11299 case Tag_CPU_raw_name:
11300 case Tag_CPU_name:
11301 /* These are merged after Tag_CPU_arch. */
11302 break;
11303
11304 case Tag_ABI_optimization_goals:
11305 case Tag_ABI_FP_optimization_goals:
11306 /* Use the first value seen. */
11307 break;
11308
11309 case Tag_CPU_arch:
11310 {
11311 int secondary_compat = -1, secondary_compat_out = -1;
11312 unsigned int saved_out_attr = out_attr[i].i;
11313 static const char *name_table[] = {
11314 /* These aren't real CPU names, but we can't guess
11315 that from the architecture version alone. */
11316 "Pre v4",
11317 "ARM v4",
11318 "ARM v4T",
11319 "ARM v5T",
11320 "ARM v5TE",
11321 "ARM v5TEJ",
11322 "ARM v6",
11323 "ARM v6KZ",
11324 "ARM v6T2",
11325 "ARM v6K",
11326 "ARM v7",
11327 "ARM v6-M",
11328 "ARM v6S-M"
11329 };
11330
11331 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11332 secondary_compat = get_secondary_compatible_arch (ibfd);
11333 secondary_compat_out = get_secondary_compatible_arch (obfd);
11334 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11335 &secondary_compat_out,
11336 in_attr[i].i,
11337 secondary_compat);
11338 set_secondary_compatible_arch (obfd, secondary_compat_out);
11339
11340 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11341 if (out_attr[i].i == saved_out_attr)
11342 ; /* Leave the names alone. */
11343 else if (out_attr[i].i == in_attr[i].i)
11344 {
11345 /* The output architecture has been changed to match the
11346 input architecture. Use the input names. */
11347 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11348 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11349 : NULL;
11350 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11351 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11352 : NULL;
11353 }
11354 else
11355 {
11356 out_attr[Tag_CPU_name].s = NULL;
11357 out_attr[Tag_CPU_raw_name].s = NULL;
11358 }
11359
11360 /* If we still don't have a value for Tag_CPU_name,
11361 make one up now. Tag_CPU_raw_name remains blank. */
11362 if (out_attr[Tag_CPU_name].s == NULL
11363 && out_attr[i].i < ARRAY_SIZE (name_table))
11364 out_attr[Tag_CPU_name].s =
11365 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11366 }
11367 break;
11368
11369 case Tag_ARM_ISA_use:
11370 case Tag_THUMB_ISA_use:
11371 case Tag_WMMX_arch:
11372 case Tag_Advanced_SIMD_arch:
11373 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
11374 case Tag_ABI_FP_rounding:
11375 case Tag_ABI_FP_exceptions:
11376 case Tag_ABI_FP_user_exceptions:
11377 case Tag_ABI_FP_number_model:
11378 case Tag_FP_HP_extension:
11379 case Tag_CPU_unaligned_access:
11380 case Tag_T2EE_use:
11381 case Tag_MPextension_use:
11382 /* Use the largest value specified. */
11383 if (in_attr[i].i > out_attr[i].i)
11384 out_attr[i].i = in_attr[i].i;
11385 break;
11386
11387 case Tag_ABI_align_preserved:
11388 case Tag_ABI_PCS_RO_data:
11389 /* Use the smallest value specified. */
11390 if (in_attr[i].i < out_attr[i].i)
11391 out_attr[i].i = in_attr[i].i;
11392 break;
11393
11394 case Tag_ABI_align_needed:
11395 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
11396 && (in_attr[Tag_ABI_align_preserved].i == 0
11397 || out_attr[Tag_ABI_align_preserved].i == 0))
11398 {
11399 /* This error message should be enabled once all non-conformant
11400 binaries in the toolchain have had the attributes set
11401 properly.
11402 _bfd_error_handler
11403 (_("error: %B: 8-byte data alignment conflicts with %B"),
11404 obfd, ibfd);
11405 result = FALSE; */
11406 }
11407 /* Fall through. */
11408 case Tag_ABI_FP_denormal:
11409 case Tag_ABI_PCS_GOT_use:
11410 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11411 value if greater than 2 (for future-proofing). */
11412 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11413 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11414 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
11415 out_attr[i].i = in_attr[i].i;
11416 break;
11417
11418 case Tag_Virtualization_use:
11419 /* The virtualization tag effectively stores two bits of
11420 information: the intended use of TrustZone (in bit 0), and the
11421 intended use of Virtualization (in bit 1). */
11422 if (out_attr[i].i == 0)
11423 out_attr[i].i = in_attr[i].i;
11424 else if (in_attr[i].i != 0
11425 && in_attr[i].i != out_attr[i].i)
11426 {
11427 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11428 out_attr[i].i = 3;
11429 else
11430 {
11431 _bfd_error_handler
11432 (_("error: %B: unable to merge virtualization attributes "
11433 "with %B"),
11434 obfd, ibfd);
11435 result = FALSE;
11436 }
11437 }
11438 break;
11439
11440 case Tag_CPU_arch_profile:
11441 if (out_attr[i].i != in_attr[i].i)
11442 {
11443 /* 0 will merge with anything.
11444 'A' and 'S' merge to 'A'.
11445 'R' and 'S' merge to 'R'.
11446 'M' and 'A|R|S' is an error. */
11447 if (out_attr[i].i == 0
11448 || (out_attr[i].i == 'S'
11449 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11450 out_attr[i].i = in_attr[i].i;
11451 else if (in_attr[i].i == 0
11452 || (in_attr[i].i == 'S'
11453 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11454 ; /* Do nothing. */
11455 else
11456 {
11457 _bfd_error_handler
11458 (_("error: %B: Conflicting architecture profiles %c/%c"),
11459 ibfd,
11460 in_attr[i].i ? in_attr[i].i : '0',
11461 out_attr[i].i ? out_attr[i].i : '0');
11462 result = FALSE;
11463 }
11464 }
11465 break;
11466 case Tag_FP_arch:
11467 {
11468 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11469 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11470 when it's 0. It might mean absence of FP hardware if
11471 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11472
11473 static const struct
11474 {
11475 int ver;
11476 int regs;
11477 } vfp_versions[7] =
11478 {
11479 {0, 0},
11480 {1, 16},
11481 {2, 16},
11482 {3, 32},
11483 {3, 16},
11484 {4, 32},
11485 {4, 16}
11486 };
11487 int ver;
11488 int regs;
11489 int newval;
11490
11491 /* If the output has no requirement about FP hardware,
11492 follow the requirement of the input. */
11493 if (out_attr[i].i == 0)
11494 {
11495 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11496 out_attr[i].i = in_attr[i].i;
11497 out_attr[Tag_ABI_HardFP_use].i
11498 = in_attr[Tag_ABI_HardFP_use].i;
11499 break;
11500 }
11501 /* If the input has no requirement about FP hardware, do
11502 nothing. */
11503 else if (in_attr[i].i == 0)
11504 {
11505 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11506 break;
11507 }
11508
11509 /* Both the input and the output have nonzero Tag_FP_arch.
11510 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11511
11512 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11513 do nothing. */
11514 if (in_attr[Tag_ABI_HardFP_use].i == 0
11515 && out_attr[Tag_ABI_HardFP_use].i == 0)
11516 ;
11517 /* If the input and the output have different Tag_ABI_HardFP_use,
11518 the combination of them is 3 (SP & DP). */
11519 else if (in_attr[Tag_ABI_HardFP_use].i
11520 != out_attr[Tag_ABI_HardFP_use].i)
11521 out_attr[Tag_ABI_HardFP_use].i = 3;
11522
11523 /* Now we can handle Tag_FP_arch. */
11524
11525 /* Values greater than 6 aren't defined, so just pick the
11526 biggest */
11527 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
11528 {
11529 out_attr[i] = in_attr[i];
11530 break;
11531 }
11532 /* The output uses the superset of input features
11533 (ISA version) and registers. */
11534 ver = vfp_versions[in_attr[i].i].ver;
11535 if (ver < vfp_versions[out_attr[i].i].ver)
11536 ver = vfp_versions[out_attr[i].i].ver;
11537 regs = vfp_versions[in_attr[i].i].regs;
11538 if (regs < vfp_versions[out_attr[i].i].regs)
11539 regs = vfp_versions[out_attr[i].i].regs;
11540 /* This assumes all possible supersets are also a valid
11541 options. */
11542 for (newval = 6; newval > 0; newval--)
11543 {
11544 if (regs == vfp_versions[newval].regs
11545 && ver == vfp_versions[newval].ver)
11546 break;
11547 }
11548 out_attr[i].i = newval;
11549 }
11550 break;
11551 case Tag_PCS_config:
11552 if (out_attr[i].i == 0)
11553 out_attr[i].i = in_attr[i].i;
11554 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
11555 {
11556 /* It's sometimes ok to mix different configs, so this is only
11557 a warning. */
11558 _bfd_error_handler
11559 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11560 }
11561 break;
11562 case Tag_ABI_PCS_R9_use:
11563 if (in_attr[i].i != out_attr[i].i
11564 && out_attr[i].i != AEABI_R9_unused
11565 && in_attr[i].i != AEABI_R9_unused)
11566 {
11567 _bfd_error_handler
11568 (_("error: %B: Conflicting use of R9"), ibfd);
11569 result = FALSE;
11570 }
11571 if (out_attr[i].i == AEABI_R9_unused)
11572 out_attr[i].i = in_attr[i].i;
11573 break;
11574 case Tag_ABI_PCS_RW_data:
11575 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11576 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11577 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11578 {
11579 _bfd_error_handler
11580 (_("error: %B: SB relative addressing conflicts with use of R9"),
11581 ibfd);
11582 result = FALSE;
11583 }
11584 /* Use the smallest value specified. */
11585 if (in_attr[i].i < out_attr[i].i)
11586 out_attr[i].i = in_attr[i].i;
11587 break;
11588 case Tag_ABI_PCS_wchar_t:
11589 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11590 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
11591 {
11592 _bfd_error_handler
11593 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11594 ibfd, in_attr[i].i, out_attr[i].i);
11595 }
11596 else if (in_attr[i].i && !out_attr[i].i)
11597 out_attr[i].i = in_attr[i].i;
11598 break;
11599 case Tag_ABI_enum_size:
11600 if (in_attr[i].i != AEABI_enum_unused)
11601 {
11602 if (out_attr[i].i == AEABI_enum_unused
11603 || out_attr[i].i == AEABI_enum_forced_wide)
11604 {
11605 /* The existing object is compatible with anything.
11606 Use whatever requirements the new object has. */
11607 out_attr[i].i = in_attr[i].i;
11608 }
11609 else if (in_attr[i].i != AEABI_enum_forced_wide
11610 && out_attr[i].i != in_attr[i].i
11611 && !elf_arm_tdata (obfd)->no_enum_size_warning)
11612 {
11613 static const char *aeabi_enum_names[] =
11614 { "", "variable-size", "32-bit", "" };
11615 const char *in_name =
11616 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11617 ? aeabi_enum_names[in_attr[i].i]
11618 : "<unknown>";
11619 const char *out_name =
11620 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11621 ? aeabi_enum_names[out_attr[i].i]
11622 : "<unknown>";
11623 _bfd_error_handler
11624 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
11625 ibfd, in_name, out_name);
11626 }
11627 }
11628 break;
11629 case Tag_ABI_VFP_args:
11630 /* Aready done. */
11631 break;
11632 case Tag_ABI_WMMX_args:
11633 if (in_attr[i].i != out_attr[i].i)
11634 {
11635 _bfd_error_handler
11636 (_("error: %B uses iWMMXt register arguments, %B does not"),
11637 ibfd, obfd);
11638 result = FALSE;
11639 }
11640 break;
11641 case Tag_compatibility:
11642 /* Merged in target-independent code. */
11643 break;
11644 case Tag_ABI_HardFP_use:
11645 /* This is handled along with Tag_FP_arch. */
11646 break;
11647 case Tag_ABI_FP_16bit_format:
11648 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11649 {
11650 if (in_attr[i].i != out_attr[i].i)
11651 {
11652 _bfd_error_handler
11653 (_("error: fp16 format mismatch between %B and %B"),
11654 ibfd, obfd);
11655 result = FALSE;
11656 }
11657 }
11658 if (in_attr[i].i != 0)
11659 out_attr[i].i = in_attr[i].i;
11660 break;
11661
11662 case Tag_DIV_use:
11663 /* This tag is set to zero if we can use UDIV and SDIV in Thumb
11664 mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
11665 SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
11666 CPU. We will merge as follows: If the input attribute's value
11667 is one then the output attribute's value remains unchanged. If
11668 the input attribute's value is zero or two then if the output
11669 attribute's value is one the output value is set to the input
11670 value, otherwise the output value must be the same as the
11671 inputs. */
11672 if (in_attr[i].i != 1 && out_attr[i].i != 1)
11673 {
11674 if (in_attr[i].i != out_attr[i].i)
11675 {
11676 _bfd_error_handler
11677 (_("DIV usage mismatch between %B and %B"),
11678 ibfd, obfd);
11679 result = FALSE;
11680 }
11681 }
11682
11683 if (in_attr[i].i != 1)
11684 out_attr[i].i = in_attr[i].i;
11685
11686 break;
11687
11688 case Tag_MPextension_use_legacy:
11689 /* We don't output objects with Tag_MPextension_use_legacy - we
11690 move the value to Tag_MPextension_use. */
11691 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11692 {
11693 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11694 {
11695 _bfd_error_handler
11696 (_("%B has has both the current and legacy "
11697 "Tag_MPextension_use attributes"),
11698 ibfd);
11699 result = FALSE;
11700 }
11701 }
11702
11703 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
11704 out_attr[Tag_MPextension_use] = in_attr[i];
11705
11706 break;
11707
11708 case Tag_nodefaults:
11709 /* This tag is set if it exists, but the value is unused (and is
11710 typically zero). We don't actually need to do anything here -
11711 the merge happens automatically when the type flags are merged
11712 below. */
11713 break;
11714 case Tag_also_compatible_with:
11715 /* Already done in Tag_CPU_arch. */
11716 break;
11717 case Tag_conformance:
11718 /* Keep the attribute if it matches. Throw it away otherwise.
11719 No attribute means no claim to conform. */
11720 if (!in_attr[i].s || !out_attr[i].s
11721 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
11722 out_attr[i].s = NULL;
11723 break;
11724
11725 default:
11726 result
11727 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
11728 }
11729
11730 /* If out_attr was copied from in_attr then it won't have a type yet. */
11731 if (in_attr[i].type && !out_attr[i].type)
11732 out_attr[i].type = in_attr[i].type;
11733 }
11734
11735 /* Merge Tag_compatibility attributes and any common GNU ones. */
11736 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
11737 return FALSE;
11738
11739 /* Check for any attributes not known on ARM. */
11740 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
11741
11742 return result;
11743 }
11744
11745
11746 /* Return TRUE if the two EABI versions are incompatible. */
11747
11748 static bfd_boolean
11749 elf32_arm_versions_compatible (unsigned iver, unsigned over)
11750 {
11751 /* v4 and v5 are the same spec before and after it was released,
11752 so allow mixing them. */
11753 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
11754 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
11755 return TRUE;
11756
11757 return (iver == over);
11758 }
11759
11760 /* Merge backend specific data from an object file to the output
11761 object file when linking. */
11762
11763 static bfd_boolean
11764 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
11765
11766 /* Display the flags field. */
11767
11768 static bfd_boolean
11769 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
11770 {
11771 FILE * file = (FILE *) ptr;
11772 unsigned long flags;
11773
11774 BFD_ASSERT (abfd != NULL && ptr != NULL);
11775
11776 /* Print normal ELF private data. */
11777 _bfd_elf_print_private_bfd_data (abfd, ptr);
11778
11779 flags = elf_elfheader (abfd)->e_flags;
11780 /* Ignore init flag - it may not be set, despite the flags field
11781 containing valid data. */
11782
11783 /* xgettext:c-format */
11784 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
11785
11786 switch (EF_ARM_EABI_VERSION (flags))
11787 {
11788 case EF_ARM_EABI_UNKNOWN:
11789 /* The following flag bits are GNU extensions and not part of the
11790 official ARM ELF extended ABI. Hence they are only decoded if
11791 the EABI version is not set. */
11792 if (flags & EF_ARM_INTERWORK)
11793 fprintf (file, _(" [interworking enabled]"));
11794
11795 if (flags & EF_ARM_APCS_26)
11796 fprintf (file, " [APCS-26]");
11797 else
11798 fprintf (file, " [APCS-32]");
11799
11800 if (flags & EF_ARM_VFP_FLOAT)
11801 fprintf (file, _(" [VFP float format]"));
11802 else if (flags & EF_ARM_MAVERICK_FLOAT)
11803 fprintf (file, _(" [Maverick float format]"));
11804 else
11805 fprintf (file, _(" [FPA float format]"));
11806
11807 if (flags & EF_ARM_APCS_FLOAT)
11808 fprintf (file, _(" [floats passed in float registers]"));
11809
11810 if (flags & EF_ARM_PIC)
11811 fprintf (file, _(" [position independent]"));
11812
11813 if (flags & EF_ARM_NEW_ABI)
11814 fprintf (file, _(" [new ABI]"));
11815
11816 if (flags & EF_ARM_OLD_ABI)
11817 fprintf (file, _(" [old ABI]"));
11818
11819 if (flags & EF_ARM_SOFT_FLOAT)
11820 fprintf (file, _(" [software FP]"));
11821
11822 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
11823 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
11824 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
11825 | EF_ARM_MAVERICK_FLOAT);
11826 break;
11827
11828 case EF_ARM_EABI_VER1:
11829 fprintf (file, _(" [Version1 EABI]"));
11830
11831 if (flags & EF_ARM_SYMSARESORTED)
11832 fprintf (file, _(" [sorted symbol table]"));
11833 else
11834 fprintf (file, _(" [unsorted symbol table]"));
11835
11836 flags &= ~ EF_ARM_SYMSARESORTED;
11837 break;
11838
11839 case EF_ARM_EABI_VER2:
11840 fprintf (file, _(" [Version2 EABI]"));
11841
11842 if (flags & EF_ARM_SYMSARESORTED)
11843 fprintf (file, _(" [sorted symbol table]"));
11844 else
11845 fprintf (file, _(" [unsorted symbol table]"));
11846
11847 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
11848 fprintf (file, _(" [dynamic symbols use segment index]"));
11849
11850 if (flags & EF_ARM_MAPSYMSFIRST)
11851 fprintf (file, _(" [mapping symbols precede others]"));
11852
11853 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
11854 | EF_ARM_MAPSYMSFIRST);
11855 break;
11856
11857 case EF_ARM_EABI_VER3:
11858 fprintf (file, _(" [Version3 EABI]"));
11859 break;
11860
11861 case EF_ARM_EABI_VER4:
11862 fprintf (file, _(" [Version4 EABI]"));
11863 goto eabi;
11864
11865 case EF_ARM_EABI_VER5:
11866 fprintf (file, _(" [Version5 EABI]"));
11867 eabi:
11868 if (flags & EF_ARM_BE8)
11869 fprintf (file, _(" [BE8]"));
11870
11871 if (flags & EF_ARM_LE8)
11872 fprintf (file, _(" [LE8]"));
11873
11874 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
11875 break;
11876
11877 default:
11878 fprintf (file, _(" <EABI version unrecognised>"));
11879 break;
11880 }
11881
11882 flags &= ~ EF_ARM_EABIMASK;
11883
11884 if (flags & EF_ARM_RELEXEC)
11885 fprintf (file, _(" [relocatable executable]"));
11886
11887 if (flags & EF_ARM_HASENTRY)
11888 fprintf (file, _(" [has entry point]"));
11889
11890 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
11891
11892 if (flags)
11893 fprintf (file, _("<Unrecognised flag bits set>"));
11894
11895 fputc ('\n', file);
11896
11897 return TRUE;
11898 }
11899
11900 static int
11901 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
11902 {
11903 switch (ELF_ST_TYPE (elf_sym->st_info))
11904 {
11905 case STT_ARM_TFUNC:
11906 return ELF_ST_TYPE (elf_sym->st_info);
11907
11908 case STT_ARM_16BIT:
11909 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
11910 This allows us to distinguish between data used by Thumb instructions
11911 and non-data (which is probably code) inside Thumb regions of an
11912 executable. */
11913 if (type != STT_OBJECT && type != STT_TLS)
11914 return ELF_ST_TYPE (elf_sym->st_info);
11915 break;
11916
11917 default:
11918 break;
11919 }
11920
11921 return type;
11922 }
11923
11924 static asection *
11925 elf32_arm_gc_mark_hook (asection *sec,
11926 struct bfd_link_info *info,
11927 Elf_Internal_Rela *rel,
11928 struct elf_link_hash_entry *h,
11929 Elf_Internal_Sym *sym)
11930 {
11931 if (h != NULL)
11932 switch (ELF32_R_TYPE (rel->r_info))
11933 {
11934 case R_ARM_GNU_VTINHERIT:
11935 case R_ARM_GNU_VTENTRY:
11936 return NULL;
11937 }
11938
11939 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
11940 }
11941
11942 /* Update the got entry reference counts for the section being removed. */
11943
11944 static bfd_boolean
11945 elf32_arm_gc_sweep_hook (bfd * abfd,
11946 struct bfd_link_info * info,
11947 asection * sec,
11948 const Elf_Internal_Rela * relocs)
11949 {
11950 Elf_Internal_Shdr *symtab_hdr;
11951 struct elf_link_hash_entry **sym_hashes;
11952 bfd_signed_vma *local_got_refcounts;
11953 const Elf_Internal_Rela *rel, *relend;
11954 struct elf32_arm_link_hash_table * globals;
11955
11956 if (info->relocatable)
11957 return TRUE;
11958
11959 globals = elf32_arm_hash_table (info);
11960 if (globals == NULL)
11961 return FALSE;
11962
11963 elf_section_data (sec)->local_dynrel = NULL;
11964
11965 symtab_hdr = & elf_symtab_hdr (abfd);
11966 sym_hashes = elf_sym_hashes (abfd);
11967 local_got_refcounts = elf_local_got_refcounts (abfd);
11968
11969 check_use_blx (globals);
11970
11971 relend = relocs + sec->reloc_count;
11972 for (rel = relocs; rel < relend; rel++)
11973 {
11974 unsigned long r_symndx;
11975 struct elf_link_hash_entry *h = NULL;
11976 struct elf32_arm_link_hash_entry *eh;
11977 int r_type;
11978 bfd_boolean call_reloc_p;
11979 bfd_boolean may_become_dynamic_p;
11980 bfd_boolean may_need_local_target_p;
11981 union gotplt_union *root_plt;
11982 struct arm_plt_info *arm_plt;
11983
11984 r_symndx = ELF32_R_SYM (rel->r_info);
11985 if (r_symndx >= symtab_hdr->sh_info)
11986 {
11987 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
11988 while (h->root.type == bfd_link_hash_indirect
11989 || h->root.type == bfd_link_hash_warning)
11990 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11991 }
11992 eh = (struct elf32_arm_link_hash_entry *) h;
11993
11994 call_reloc_p = FALSE;
11995 may_become_dynamic_p = FALSE;
11996 may_need_local_target_p = FALSE;
11997
11998 r_type = ELF32_R_TYPE (rel->r_info);
11999 r_type = arm_real_reloc_type (globals, r_type);
12000 switch (r_type)
12001 {
12002 case R_ARM_GOT32:
12003 case R_ARM_GOT_PREL:
12004 case R_ARM_TLS_GD32:
12005 case R_ARM_TLS_IE32:
12006 if (h != NULL)
12007 {
12008 if (h->got.refcount > 0)
12009 h->got.refcount -= 1;
12010 }
12011 else if (local_got_refcounts != NULL)
12012 {
12013 if (local_got_refcounts[r_symndx] > 0)
12014 local_got_refcounts[r_symndx] -= 1;
12015 }
12016 break;
12017
12018 case R_ARM_TLS_LDM32:
12019 globals->tls_ldm_got.refcount -= 1;
12020 break;
12021
12022 case R_ARM_PC24:
12023 case R_ARM_PLT32:
12024 case R_ARM_CALL:
12025 case R_ARM_JUMP24:
12026 case R_ARM_PREL31:
12027 case R_ARM_THM_CALL:
12028 case R_ARM_THM_JUMP24:
12029 case R_ARM_THM_JUMP19:
12030 call_reloc_p = TRUE;
12031 may_need_local_target_p = TRUE;
12032 break;
12033
12034 case R_ARM_ABS12:
12035 if (!globals->vxworks_p)
12036 {
12037 may_need_local_target_p = TRUE;
12038 break;
12039 }
12040 /* Fall through. */
12041 case R_ARM_ABS32:
12042 case R_ARM_ABS32_NOI:
12043 case R_ARM_REL32:
12044 case R_ARM_REL32_NOI:
12045 case R_ARM_MOVW_ABS_NC:
12046 case R_ARM_MOVT_ABS:
12047 case R_ARM_MOVW_PREL_NC:
12048 case R_ARM_MOVT_PREL:
12049 case R_ARM_THM_MOVW_ABS_NC:
12050 case R_ARM_THM_MOVT_ABS:
12051 case R_ARM_THM_MOVW_PREL_NC:
12052 case R_ARM_THM_MOVT_PREL:
12053 /* Should the interworking branches be here also? */
12054 if ((info->shared || globals->root.is_relocatable_executable)
12055 && (sec->flags & SEC_ALLOC) != 0)
12056 {
12057 if (h == NULL
12058 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12059 {
12060 call_reloc_p = TRUE;
12061 may_need_local_target_p = TRUE;
12062 }
12063 else
12064 may_become_dynamic_p = TRUE;
12065 }
12066 else
12067 may_need_local_target_p = TRUE;
12068 break;
12069
12070 default:
12071 break;
12072 }
12073
12074 if (may_need_local_target_p
12075 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
12076 {
12077 BFD_ASSERT (root_plt->refcount > 0);
12078 root_plt->refcount -= 1;
12079
12080 if (!call_reloc_p)
12081 arm_plt->noncall_refcount--;
12082
12083 if (r_type == R_ARM_THM_CALL)
12084 arm_plt->maybe_thumb_refcount--;
12085
12086 if (r_type == R_ARM_THM_JUMP24
12087 || r_type == R_ARM_THM_JUMP19)
12088 arm_plt->thumb_refcount--;
12089 }
12090
12091 if (may_become_dynamic_p)
12092 {
12093 struct elf_dyn_relocs **pp;
12094 struct elf_dyn_relocs *p;
12095
12096 if (h != NULL)
12097 pp = &(eh->dyn_relocs);
12098 else
12099 {
12100 Elf_Internal_Sym *isym;
12101
12102 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12103 abfd, r_symndx);
12104 if (isym == NULL)
12105 return FALSE;
12106 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12107 if (pp == NULL)
12108 return FALSE;
12109 }
12110 for (; (p = *pp) != NULL; pp = &p->next)
12111 if (p->sec == sec)
12112 {
12113 /* Everything must go for SEC. */
12114 *pp = p->next;
12115 break;
12116 }
12117 }
12118 }
12119
12120 return TRUE;
12121 }
12122
12123 /* Look through the relocs for a section during the first phase. */
12124
12125 static bfd_boolean
12126 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12127 asection *sec, const Elf_Internal_Rela *relocs)
12128 {
12129 Elf_Internal_Shdr *symtab_hdr;
12130 struct elf_link_hash_entry **sym_hashes;
12131 const Elf_Internal_Rela *rel;
12132 const Elf_Internal_Rela *rel_end;
12133 bfd *dynobj;
12134 asection *sreloc;
12135 struct elf32_arm_link_hash_table *htab;
12136 bfd_boolean call_reloc_p;
12137 bfd_boolean may_become_dynamic_p;
12138 bfd_boolean may_need_local_target_p;
12139 unsigned long nsyms;
12140
12141 if (info->relocatable)
12142 return TRUE;
12143
12144 BFD_ASSERT (is_arm_elf (abfd));
12145
12146 htab = elf32_arm_hash_table (info);
12147 if (htab == NULL)
12148 return FALSE;
12149
12150 sreloc = NULL;
12151
12152 /* Create dynamic sections for relocatable executables so that we can
12153 copy relocations. */
12154 if (htab->root.is_relocatable_executable
12155 && ! htab->root.dynamic_sections_created)
12156 {
12157 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12158 return FALSE;
12159 }
12160
12161 if (htab->root.dynobj == NULL)
12162 htab->root.dynobj = abfd;
12163 if (!create_ifunc_sections (info))
12164 return FALSE;
12165
12166 dynobj = htab->root.dynobj;
12167
12168 symtab_hdr = & elf_symtab_hdr (abfd);
12169 sym_hashes = elf_sym_hashes (abfd);
12170 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
12171
12172 rel_end = relocs + sec->reloc_count;
12173 for (rel = relocs; rel < rel_end; rel++)
12174 {
12175 Elf_Internal_Sym *isym;
12176 struct elf_link_hash_entry *h;
12177 struct elf32_arm_link_hash_entry *eh;
12178 unsigned long r_symndx;
12179 int r_type;
12180
12181 r_symndx = ELF32_R_SYM (rel->r_info);
12182 r_type = ELF32_R_TYPE (rel->r_info);
12183 r_type = arm_real_reloc_type (htab, r_type);
12184
12185 if (r_symndx >= nsyms
12186 /* PR 9934: It is possible to have relocations that do not
12187 refer to symbols, thus it is also possible to have an
12188 object file containing relocations but no symbol table. */
12189 && (r_symndx > STN_UNDEF || nsyms > 0))
12190 {
12191 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
12192 r_symndx);
12193 return FALSE;
12194 }
12195
12196 h = NULL;
12197 isym = NULL;
12198 if (nsyms > 0)
12199 {
12200 if (r_symndx < symtab_hdr->sh_info)
12201 {
12202 /* A local symbol. */
12203 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12204 abfd, r_symndx);
12205 if (isym == NULL)
12206 return FALSE;
12207 }
12208 else
12209 {
12210 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12211 while (h->root.type == bfd_link_hash_indirect
12212 || h->root.type == bfd_link_hash_warning)
12213 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12214 }
12215 }
12216
12217 eh = (struct elf32_arm_link_hash_entry *) h;
12218
12219 call_reloc_p = FALSE;
12220 may_become_dynamic_p = FALSE;
12221 may_need_local_target_p = FALSE;
12222
12223 /* Could be done earlier, if h were already available. */
12224 r_type = elf32_arm_tls_transition (info, r_type, h);
12225 switch (r_type)
12226 {
12227 case R_ARM_GOT32:
12228 case R_ARM_GOT_PREL:
12229 case R_ARM_TLS_GD32:
12230 case R_ARM_TLS_IE32:
12231 case R_ARM_TLS_GOTDESC:
12232 case R_ARM_TLS_DESCSEQ:
12233 case R_ARM_THM_TLS_DESCSEQ:
12234 case R_ARM_TLS_CALL:
12235 case R_ARM_THM_TLS_CALL:
12236 /* This symbol requires a global offset table entry. */
12237 {
12238 int tls_type, old_tls_type;
12239
12240 switch (r_type)
12241 {
12242 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
12243
12244 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
12245
12246 case R_ARM_TLS_GOTDESC:
12247 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12248 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12249 tls_type = GOT_TLS_GDESC; break;
12250
12251 default: tls_type = GOT_NORMAL; break;
12252 }
12253
12254 if (h != NULL)
12255 {
12256 h->got.refcount++;
12257 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12258 }
12259 else
12260 {
12261 /* This is a global offset table entry for a local symbol. */
12262 if (!elf32_arm_allocate_local_sym_info (abfd))
12263 return FALSE;
12264 elf_local_got_refcounts (abfd)[r_symndx] += 1;
12265 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12266 }
12267
12268 /* If a variable is accessed with both tls methods, two
12269 slots may be created. */
12270 if (GOT_TLS_GD_ANY_P (old_tls_type)
12271 && GOT_TLS_GD_ANY_P (tls_type))
12272 tls_type |= old_tls_type;
12273
12274 /* We will already have issued an error message if there
12275 is a TLS/non-TLS mismatch, based on the symbol
12276 type. So just combine any TLS types needed. */
12277 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12278 && tls_type != GOT_NORMAL)
12279 tls_type |= old_tls_type;
12280
12281 /* If the symbol is accessed in both IE and GDESC
12282 method, we're able to relax. Turn off the GDESC flag,
12283 without messing up with any other kind of tls types
12284 that may be involved */
12285 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12286 tls_type &= ~GOT_TLS_GDESC;
12287
12288 if (old_tls_type != tls_type)
12289 {
12290 if (h != NULL)
12291 elf32_arm_hash_entry (h)->tls_type = tls_type;
12292 else
12293 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12294 }
12295 }
12296 /* Fall through. */
12297
12298 case R_ARM_TLS_LDM32:
12299 if (r_type == R_ARM_TLS_LDM32)
12300 htab->tls_ldm_got.refcount++;
12301 /* Fall through. */
12302
12303 case R_ARM_GOTOFF32:
12304 case R_ARM_GOTPC:
12305 if (htab->root.sgot == NULL
12306 && !create_got_section (htab->root.dynobj, info))
12307 return FALSE;
12308 break;
12309
12310 case R_ARM_PC24:
12311 case R_ARM_PLT32:
12312 case R_ARM_CALL:
12313 case R_ARM_JUMP24:
12314 case R_ARM_PREL31:
12315 case R_ARM_THM_CALL:
12316 case R_ARM_THM_JUMP24:
12317 case R_ARM_THM_JUMP19:
12318 call_reloc_p = TRUE;
12319 may_need_local_target_p = TRUE;
12320 break;
12321
12322 case R_ARM_ABS12:
12323 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12324 ldr __GOTT_INDEX__ offsets. */
12325 if (!htab->vxworks_p)
12326 {
12327 may_need_local_target_p = TRUE;
12328 break;
12329 }
12330 /* Fall through. */
12331
12332 case R_ARM_MOVW_ABS_NC:
12333 case R_ARM_MOVT_ABS:
12334 case R_ARM_THM_MOVW_ABS_NC:
12335 case R_ARM_THM_MOVT_ABS:
12336 if (info->shared)
12337 {
12338 (*_bfd_error_handler)
12339 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12340 abfd, elf32_arm_howto_table_1[r_type].name,
12341 (h) ? h->root.root.string : "a local symbol");
12342 bfd_set_error (bfd_error_bad_value);
12343 return FALSE;
12344 }
12345
12346 /* Fall through. */
12347 case R_ARM_ABS32:
12348 case R_ARM_ABS32_NOI:
12349 case R_ARM_REL32:
12350 case R_ARM_REL32_NOI:
12351 case R_ARM_MOVW_PREL_NC:
12352 case R_ARM_MOVT_PREL:
12353 case R_ARM_THM_MOVW_PREL_NC:
12354 case R_ARM_THM_MOVT_PREL:
12355
12356 /* Should the interworking branches be listed here? */
12357 if ((info->shared || htab->root.is_relocatable_executable)
12358 && (sec->flags & SEC_ALLOC) != 0)
12359 {
12360 if (h == NULL
12361 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12362 {
12363 /* In shared libraries and relocatable executables,
12364 we treat local relative references as calls;
12365 see the related SYMBOL_CALLS_LOCAL code in
12366 allocate_dynrelocs. */
12367 call_reloc_p = TRUE;
12368 may_need_local_target_p = TRUE;
12369 }
12370 else
12371 /* We are creating a shared library or relocatable
12372 executable, and this is a reloc against a global symbol,
12373 or a non-PC-relative reloc against a local symbol.
12374 We may need to copy the reloc into the output. */
12375 may_become_dynamic_p = TRUE;
12376 }
12377 else
12378 may_need_local_target_p = TRUE;
12379 break;
12380
12381 /* This relocation describes the C++ object vtable hierarchy.
12382 Reconstruct it for later use during GC. */
12383 case R_ARM_GNU_VTINHERIT:
12384 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12385 return FALSE;
12386 break;
12387
12388 /* This relocation describes which C++ vtable entries are actually
12389 used. Record for later use during GC. */
12390 case R_ARM_GNU_VTENTRY:
12391 BFD_ASSERT (h != NULL);
12392 if (h != NULL
12393 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12394 return FALSE;
12395 break;
12396 }
12397
12398 if (h != NULL)
12399 {
12400 if (call_reloc_p)
12401 /* We may need a .plt entry if the function this reloc
12402 refers to is in a different object, regardless of the
12403 symbol's type. We can't tell for sure yet, because
12404 something later might force the symbol local. */
12405 h->needs_plt = 1;
12406 else if (may_need_local_target_p)
12407 /* If this reloc is in a read-only section, we might
12408 need a copy reloc. We can't check reliably at this
12409 stage whether the section is read-only, as input
12410 sections have not yet been mapped to output sections.
12411 Tentatively set the flag for now, and correct in
12412 adjust_dynamic_symbol. */
12413 h->non_got_ref = 1;
12414 }
12415
12416 if (may_need_local_target_p
12417 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
12418 {
12419 union gotplt_union *root_plt;
12420 struct arm_plt_info *arm_plt;
12421 struct arm_local_iplt_info *local_iplt;
12422
12423 if (h != NULL)
12424 {
12425 root_plt = &h->plt;
12426 arm_plt = &eh->plt;
12427 }
12428 else
12429 {
12430 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12431 if (local_iplt == NULL)
12432 return FALSE;
12433 root_plt = &local_iplt->root;
12434 arm_plt = &local_iplt->arm;
12435 }
12436
12437 /* If the symbol is a function that doesn't bind locally,
12438 this relocation will need a PLT entry. */
12439 root_plt->refcount += 1;
12440
12441 if (!call_reloc_p)
12442 arm_plt->noncall_refcount++;
12443
12444 /* It's too early to use htab->use_blx here, so we have to
12445 record possible blx references separately from
12446 relocs that definitely need a thumb stub. */
12447
12448 if (r_type == R_ARM_THM_CALL)
12449 arm_plt->maybe_thumb_refcount += 1;
12450
12451 if (r_type == R_ARM_THM_JUMP24
12452 || r_type == R_ARM_THM_JUMP19)
12453 arm_plt->thumb_refcount += 1;
12454 }
12455
12456 if (may_become_dynamic_p)
12457 {
12458 struct elf_dyn_relocs *p, **head;
12459
12460 /* Create a reloc section in dynobj. */
12461 if (sreloc == NULL)
12462 {
12463 sreloc = _bfd_elf_make_dynamic_reloc_section
12464 (sec, dynobj, 2, abfd, ! htab->use_rel);
12465
12466 if (sreloc == NULL)
12467 return FALSE;
12468
12469 /* BPABI objects never have dynamic relocations mapped. */
12470 if (htab->symbian_p)
12471 {
12472 flagword flags;
12473
12474 flags = bfd_get_section_flags (dynobj, sreloc);
12475 flags &= ~(SEC_LOAD | SEC_ALLOC);
12476 bfd_set_section_flags (dynobj, sreloc, flags);
12477 }
12478 }
12479
12480 /* If this is a global symbol, count the number of
12481 relocations we need for this symbol. */
12482 if (h != NULL)
12483 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12484 else
12485 {
12486 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12487 if (head == NULL)
12488 return FALSE;
12489 }
12490
12491 p = *head;
12492 if (p == NULL || p->sec != sec)
12493 {
12494 bfd_size_type amt = sizeof *p;
12495
12496 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12497 if (p == NULL)
12498 return FALSE;
12499 p->next = *head;
12500 *head = p;
12501 p->sec = sec;
12502 p->count = 0;
12503 p->pc_count = 0;
12504 }
12505
12506 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12507 p->pc_count += 1;
12508 p->count += 1;
12509 }
12510 }
12511
12512 return TRUE;
12513 }
12514
12515 /* Unwinding tables are not referenced directly. This pass marks them as
12516 required if the corresponding code section is marked. */
12517
12518 static bfd_boolean
12519 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12520 elf_gc_mark_hook_fn gc_mark_hook)
12521 {
12522 bfd *sub;
12523 Elf_Internal_Shdr **elf_shdrp;
12524 bfd_boolean again;
12525
12526 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12527
12528 /* Marking EH data may cause additional code sections to be marked,
12529 requiring multiple passes. */
12530 again = TRUE;
12531 while (again)
12532 {
12533 again = FALSE;
12534 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12535 {
12536 asection *o;
12537
12538 if (! is_arm_elf (sub))
12539 continue;
12540
12541 elf_shdrp = elf_elfsections (sub);
12542 for (o = sub->sections; o != NULL; o = o->next)
12543 {
12544 Elf_Internal_Shdr *hdr;
12545
12546 hdr = &elf_section_data (o)->this_hdr;
12547 if (hdr->sh_type == SHT_ARM_EXIDX
12548 && hdr->sh_link
12549 && hdr->sh_link < elf_numsections (sub)
12550 && !o->gc_mark
12551 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12552 {
12553 again = TRUE;
12554 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12555 return FALSE;
12556 }
12557 }
12558 }
12559 }
12560
12561 return TRUE;
12562 }
12563
12564 /* Treat mapping symbols as special target symbols. */
12565
12566 static bfd_boolean
12567 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12568 {
12569 return bfd_is_arm_special_symbol_name (sym->name,
12570 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
12571 }
12572
12573 /* This is a copy of elf_find_function() from elf.c except that
12574 ARM mapping symbols are ignored when looking for function names
12575 and STT_ARM_TFUNC is considered to a function type. */
12576
12577 static bfd_boolean
12578 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12579 asection * section,
12580 asymbol ** symbols,
12581 bfd_vma offset,
12582 const char ** filename_ptr,
12583 const char ** functionname_ptr)
12584 {
12585 const char * filename = NULL;
12586 asymbol * func = NULL;
12587 bfd_vma low_func = 0;
12588 asymbol ** p;
12589
12590 for (p = symbols; *p != NULL; p++)
12591 {
12592 elf_symbol_type *q;
12593
12594 q = (elf_symbol_type *) *p;
12595
12596 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12597 {
12598 default:
12599 break;
12600 case STT_FILE:
12601 filename = bfd_asymbol_name (&q->symbol);
12602 break;
12603 case STT_FUNC:
12604 case STT_ARM_TFUNC:
12605 case STT_NOTYPE:
12606 /* Skip mapping symbols. */
12607 if ((q->symbol.flags & BSF_LOCAL)
12608 && bfd_is_arm_special_symbol_name (q->symbol.name,
12609 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
12610 continue;
12611 /* Fall through. */
12612 if (bfd_get_section (&q->symbol) == section
12613 && q->symbol.value >= low_func
12614 && q->symbol.value <= offset)
12615 {
12616 func = (asymbol *) q;
12617 low_func = q->symbol.value;
12618 }
12619 break;
12620 }
12621 }
12622
12623 if (func == NULL)
12624 return FALSE;
12625
12626 if (filename_ptr)
12627 *filename_ptr = filename;
12628 if (functionname_ptr)
12629 *functionname_ptr = bfd_asymbol_name (func);
12630
12631 return TRUE;
12632 }
12633
12634
12635 /* Find the nearest line to a particular section and offset, for error
12636 reporting. This code is a duplicate of the code in elf.c, except
12637 that it uses arm_elf_find_function. */
12638
12639 static bfd_boolean
12640 elf32_arm_find_nearest_line (bfd * abfd,
12641 asection * section,
12642 asymbol ** symbols,
12643 bfd_vma offset,
12644 const char ** filename_ptr,
12645 const char ** functionname_ptr,
12646 unsigned int * line_ptr)
12647 {
12648 bfd_boolean found = FALSE;
12649
12650 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12651
12652 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
12653 section, symbols, offset,
12654 filename_ptr, functionname_ptr,
12655 line_ptr, 0,
12656 & elf_tdata (abfd)->dwarf2_find_line_info))
12657 {
12658 if (!*functionname_ptr)
12659 arm_elf_find_function (abfd, section, symbols, offset,
12660 *filename_ptr ? NULL : filename_ptr,
12661 functionname_ptr);
12662
12663 return TRUE;
12664 }
12665
12666 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12667 & found, filename_ptr,
12668 functionname_ptr, line_ptr,
12669 & elf_tdata (abfd)->line_info))
12670 return FALSE;
12671
12672 if (found && (*functionname_ptr || *line_ptr))
12673 return TRUE;
12674
12675 if (symbols == NULL)
12676 return FALSE;
12677
12678 if (! arm_elf_find_function (abfd, section, symbols, offset,
12679 filename_ptr, functionname_ptr))
12680 return FALSE;
12681
12682 *line_ptr = 0;
12683 return TRUE;
12684 }
12685
12686 static bfd_boolean
12687 elf32_arm_find_inliner_info (bfd * abfd,
12688 const char ** filename_ptr,
12689 const char ** functionname_ptr,
12690 unsigned int * line_ptr)
12691 {
12692 bfd_boolean found;
12693 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
12694 functionname_ptr, line_ptr,
12695 & elf_tdata (abfd)->dwarf2_find_line_info);
12696 return found;
12697 }
12698
12699 /* Adjust a symbol defined by a dynamic object and referenced by a
12700 regular object. The current definition is in some section of the
12701 dynamic object, but we're not including those sections. We have to
12702 change the definition to something the rest of the link can
12703 understand. */
12704
12705 static bfd_boolean
12706 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
12707 struct elf_link_hash_entry * h)
12708 {
12709 bfd * dynobj;
12710 asection * s;
12711 struct elf32_arm_link_hash_entry * eh;
12712 struct elf32_arm_link_hash_table *globals;
12713
12714 globals = elf32_arm_hash_table (info);
12715 if (globals == NULL)
12716 return FALSE;
12717
12718 dynobj = elf_hash_table (info)->dynobj;
12719
12720 /* Make sure we know what is going on here. */
12721 BFD_ASSERT (dynobj != NULL
12722 && (h->needs_plt
12723 || h->type == STT_GNU_IFUNC
12724 || h->u.weakdef != NULL
12725 || (h->def_dynamic
12726 && h->ref_regular
12727 && !h->def_regular)));
12728
12729 eh = (struct elf32_arm_link_hash_entry *) h;
12730
12731 /* If this is a function, put it in the procedure linkage table. We
12732 will fill in the contents of the procedure linkage table later,
12733 when we know the address of the .got section. */
12734 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
12735 {
12736 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
12737 symbol binds locally. */
12738 if (h->plt.refcount <= 0
12739 || (h->type != STT_GNU_IFUNC
12740 && (SYMBOL_CALLS_LOCAL (info, h)
12741 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
12742 && h->root.type == bfd_link_hash_undefweak))))
12743 {
12744 /* This case can occur if we saw a PLT32 reloc in an input
12745 file, but the symbol was never referred to by a dynamic
12746 object, or if all references were garbage collected. In
12747 such a case, we don't actually need to build a procedure
12748 linkage table, and we can just do a PC24 reloc instead. */
12749 h->plt.offset = (bfd_vma) -1;
12750 eh->plt.thumb_refcount = 0;
12751 eh->plt.maybe_thumb_refcount = 0;
12752 eh->plt.noncall_refcount = 0;
12753 h->needs_plt = 0;
12754 }
12755
12756 return TRUE;
12757 }
12758 else
12759 {
12760 /* It's possible that we incorrectly decided a .plt reloc was
12761 needed for an R_ARM_PC24 or similar reloc to a non-function sym
12762 in check_relocs. We can't decide accurately between function
12763 and non-function syms in check-relocs; Objects loaded later in
12764 the link may change h->type. So fix it now. */
12765 h->plt.offset = (bfd_vma) -1;
12766 eh->plt.thumb_refcount = 0;
12767 eh->plt.maybe_thumb_refcount = 0;
12768 eh->plt.noncall_refcount = 0;
12769 }
12770
12771 /* If this is a weak symbol, and there is a real definition, the
12772 processor independent code will have arranged for us to see the
12773 real definition first, and we can just use the same value. */
12774 if (h->u.weakdef != NULL)
12775 {
12776 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
12777 || h->u.weakdef->root.type == bfd_link_hash_defweak);
12778 h->root.u.def.section = h->u.weakdef->root.u.def.section;
12779 h->root.u.def.value = h->u.weakdef->root.u.def.value;
12780 return TRUE;
12781 }
12782
12783 /* If there are no non-GOT references, we do not need a copy
12784 relocation. */
12785 if (!h->non_got_ref)
12786 return TRUE;
12787
12788 /* This is a reference to a symbol defined by a dynamic object which
12789 is not a function. */
12790
12791 /* If we are creating a shared library, we must presume that the
12792 only references to the symbol are via the global offset table.
12793 For such cases we need not do anything here; the relocations will
12794 be handled correctly by relocate_section. Relocatable executables
12795 can reference data in shared objects directly, so we don't need to
12796 do anything here. */
12797 if (info->shared || globals->root.is_relocatable_executable)
12798 return TRUE;
12799
12800 if (h->size == 0)
12801 {
12802 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
12803 h->root.root.string);
12804 return TRUE;
12805 }
12806
12807 /* We must allocate the symbol in our .dynbss section, which will
12808 become part of the .bss section of the executable. There will be
12809 an entry for this symbol in the .dynsym section. The dynamic
12810 object will contain position independent code, so all references
12811 from the dynamic object to this symbol will go through the global
12812 offset table. The dynamic linker will use the .dynsym entry to
12813 determine the address it must put in the global offset table, so
12814 both the dynamic object and the regular object will refer to the
12815 same memory location for the variable. */
12816 s = bfd_get_section_by_name (dynobj, ".dynbss");
12817 BFD_ASSERT (s != NULL);
12818
12819 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
12820 copy the initial value out of the dynamic object and into the
12821 runtime process image. We need to remember the offset into the
12822 .rel(a).bss section we are going to use. */
12823 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
12824 {
12825 asection *srel;
12826
12827 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
12828 elf32_arm_allocate_dynrelocs (info, srel, 1);
12829 h->needs_copy = 1;
12830 }
12831
12832 return _bfd_elf_adjust_dynamic_copy (h, s);
12833 }
12834
12835 /* Allocate space in .plt, .got and associated reloc sections for
12836 dynamic relocs. */
12837
12838 static bfd_boolean
12839 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
12840 {
12841 struct bfd_link_info *info;
12842 struct elf32_arm_link_hash_table *htab;
12843 struct elf32_arm_link_hash_entry *eh;
12844 struct elf_dyn_relocs *p;
12845
12846 if (h->root.type == bfd_link_hash_indirect)
12847 return TRUE;
12848
12849 eh = (struct elf32_arm_link_hash_entry *) h;
12850
12851 info = (struct bfd_link_info *) inf;
12852 htab = elf32_arm_hash_table (info);
12853 if (htab == NULL)
12854 return FALSE;
12855
12856 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
12857 && h->plt.refcount > 0)
12858 {
12859 /* Make sure this symbol is output as a dynamic symbol.
12860 Undefined weak syms won't yet be marked as dynamic. */
12861 if (h->dynindx == -1
12862 && !h->forced_local)
12863 {
12864 if (! bfd_elf_link_record_dynamic_symbol (info, h))
12865 return FALSE;
12866 }
12867
12868 /* If the call in the PLT entry binds locally, the associated
12869 GOT entry should use an R_ARM_IRELATIVE relocation instead of
12870 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
12871 than the .plt section. */
12872 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
12873 {
12874 eh->is_iplt = 1;
12875 if (eh->plt.noncall_refcount == 0
12876 && SYMBOL_REFERENCES_LOCAL (info, h))
12877 /* All non-call references can be resolved directly.
12878 This means that they can (and in some cases, must)
12879 resolve directly to the run-time target, rather than
12880 to the PLT. That in turns means that any .got entry
12881 would be equal to the .igot.plt entry, so there's
12882 no point having both. */
12883 h->got.refcount = 0;
12884 }
12885
12886 if (info->shared
12887 || eh->is_iplt
12888 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
12889 {
12890 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
12891
12892 /* If this symbol is not defined in a regular file, and we are
12893 not generating a shared library, then set the symbol to this
12894 location in the .plt. This is required to make function
12895 pointers compare as equal between the normal executable and
12896 the shared library. */
12897 if (! info->shared
12898 && !h->def_regular)
12899 {
12900 h->root.u.def.section = htab->root.splt;
12901 h->root.u.def.value = h->plt.offset;
12902
12903 /* Make sure the function is not marked as Thumb, in case
12904 it is the target of an ABS32 relocation, which will
12905 point to the PLT entry. */
12906 h->target_internal = ST_BRANCH_TO_ARM;
12907 }
12908
12909 htab->next_tls_desc_index++;
12910
12911 /* VxWorks executables have a second set of relocations for
12912 each PLT entry. They go in a separate relocation section,
12913 which is processed by the kernel loader. */
12914 if (htab->vxworks_p && !info->shared)
12915 {
12916 /* There is a relocation for the initial PLT entry:
12917 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
12918 if (h->plt.offset == htab->plt_header_size)
12919 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
12920
12921 /* There are two extra relocations for each subsequent
12922 PLT entry: an R_ARM_32 relocation for the GOT entry,
12923 and an R_ARM_32 relocation for the PLT entry. */
12924 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
12925 }
12926 }
12927 else
12928 {
12929 h->plt.offset = (bfd_vma) -1;
12930 h->needs_plt = 0;
12931 }
12932 }
12933 else
12934 {
12935 h->plt.offset = (bfd_vma) -1;
12936 h->needs_plt = 0;
12937 }
12938
12939 eh = (struct elf32_arm_link_hash_entry *) h;
12940 eh->tlsdesc_got = (bfd_vma) -1;
12941
12942 if (h->got.refcount > 0)
12943 {
12944 asection *s;
12945 bfd_boolean dyn;
12946 int tls_type = elf32_arm_hash_entry (h)->tls_type;
12947 int indx;
12948
12949 /* Make sure this symbol is output as a dynamic symbol.
12950 Undefined weak syms won't yet be marked as dynamic. */
12951 if (h->dynindx == -1
12952 && !h->forced_local)
12953 {
12954 if (! bfd_elf_link_record_dynamic_symbol (info, h))
12955 return FALSE;
12956 }
12957
12958 if (!htab->symbian_p)
12959 {
12960 s = htab->root.sgot;
12961 h->got.offset = s->size;
12962
12963 if (tls_type == GOT_UNKNOWN)
12964 abort ();
12965
12966 if (tls_type == GOT_NORMAL)
12967 /* Non-TLS symbols need one GOT slot. */
12968 s->size += 4;
12969 else
12970 {
12971 if (tls_type & GOT_TLS_GDESC)
12972 {
12973 /* R_ARM_TLS_DESC needs 2 GOT slots. */
12974 eh->tlsdesc_got
12975 = (htab->root.sgotplt->size
12976 - elf32_arm_compute_jump_table_size (htab));
12977 htab->root.sgotplt->size += 8;
12978 h->got.offset = (bfd_vma) -2;
12979 /* plt.got_offset needs to know there's a TLS_DESC
12980 reloc in the middle of .got.plt. */
12981 htab->num_tls_desc++;
12982 }
12983
12984 if (tls_type & GOT_TLS_GD)
12985 {
12986 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
12987 the symbol is both GD and GDESC, got.offset may
12988 have been overwritten. */
12989 h->got.offset = s->size;
12990 s->size += 8;
12991 }
12992
12993 if (tls_type & GOT_TLS_IE)
12994 /* R_ARM_TLS_IE32 needs one GOT slot. */
12995 s->size += 4;
12996 }
12997
12998 dyn = htab->root.dynamic_sections_created;
12999
13000 indx = 0;
13001 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13002 && (!info->shared
13003 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13004 indx = h->dynindx;
13005
13006 if (tls_type != GOT_NORMAL
13007 && (info->shared || indx != 0)
13008 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13009 || h->root.type != bfd_link_hash_undefweak))
13010 {
13011 if (tls_type & GOT_TLS_IE)
13012 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13013
13014 if (tls_type & GOT_TLS_GD)
13015 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13016
13017 if (tls_type & GOT_TLS_GDESC)
13018 {
13019 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13020 /* GDESC needs a trampoline to jump to. */
13021 htab->tls_trampoline = -1;
13022 }
13023
13024 /* Only GD needs it. GDESC just emits one relocation per
13025 2 entries. */
13026 if ((tls_type & GOT_TLS_GD) && indx != 0)
13027 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13028 }
13029 else if (!SYMBOL_REFERENCES_LOCAL (info, h))
13030 {
13031 if (htab->root.dynamic_sections_created)
13032 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13033 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13034 }
13035 else if (h->type == STT_GNU_IFUNC
13036 && eh->plt.noncall_refcount == 0)
13037 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13038 they all resolve dynamically instead. Reserve room for the
13039 GOT entry's R_ARM_IRELATIVE relocation. */
13040 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
13041 else if (info->shared)
13042 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
13043 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13044 }
13045 }
13046 else
13047 h->got.offset = (bfd_vma) -1;
13048
13049 /* Allocate stubs for exported Thumb functions on v4t. */
13050 if (!htab->use_blx && h->dynindx != -1
13051 && h->def_regular
13052 && h->target_internal == ST_BRANCH_TO_THUMB
13053 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13054 {
13055 struct elf_link_hash_entry * th;
13056 struct bfd_link_hash_entry * bh;
13057 struct elf_link_hash_entry * myh;
13058 char name[1024];
13059 asection *s;
13060 bh = NULL;
13061 /* Create a new symbol to regist the real location of the function. */
13062 s = h->root.u.def.section;
13063 sprintf (name, "__real_%s", h->root.root.string);
13064 _bfd_generic_link_add_one_symbol (info, s->owner,
13065 name, BSF_GLOBAL, s,
13066 h->root.u.def.value,
13067 NULL, TRUE, FALSE, &bh);
13068
13069 myh = (struct elf_link_hash_entry *) bh;
13070 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13071 myh->forced_local = 1;
13072 myh->target_internal = ST_BRANCH_TO_THUMB;
13073 eh->export_glue = myh;
13074 th = record_arm_to_thumb_glue (info, h);
13075 /* Point the symbol at the stub. */
13076 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
13077 h->target_internal = ST_BRANCH_TO_ARM;
13078 h->root.u.def.section = th->root.u.def.section;
13079 h->root.u.def.value = th->root.u.def.value & ~1;
13080 }
13081
13082 if (eh->dyn_relocs == NULL)
13083 return TRUE;
13084
13085 /* In the shared -Bsymbolic case, discard space allocated for
13086 dynamic pc-relative relocs against symbols which turn out to be
13087 defined in regular objects. For the normal shared case, discard
13088 space for pc-relative relocs that have become local due to symbol
13089 visibility changes. */
13090
13091 if (info->shared || htab->root.is_relocatable_executable)
13092 {
13093 /* The only relocs that use pc_count are R_ARM_REL32 and
13094 R_ARM_REL32_NOI, which will appear on something like
13095 ".long foo - .". We want calls to protected symbols to resolve
13096 directly to the function rather than going via the plt. If people
13097 want function pointer comparisons to work as expected then they
13098 should avoid writing assembly like ".long foo - .". */
13099 if (SYMBOL_CALLS_LOCAL (info, h))
13100 {
13101 struct elf_dyn_relocs **pp;
13102
13103 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13104 {
13105 p->count -= p->pc_count;
13106 p->pc_count = 0;
13107 if (p->count == 0)
13108 *pp = p->next;
13109 else
13110 pp = &p->next;
13111 }
13112 }
13113
13114 if (htab->vxworks_p)
13115 {
13116 struct elf_dyn_relocs **pp;
13117
13118 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13119 {
13120 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
13121 *pp = p->next;
13122 else
13123 pp = &p->next;
13124 }
13125 }
13126
13127 /* Also discard relocs on undefined weak syms with non-default
13128 visibility. */
13129 if (eh->dyn_relocs != NULL
13130 && h->root.type == bfd_link_hash_undefweak)
13131 {
13132 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
13133 eh->dyn_relocs = NULL;
13134
13135 /* Make sure undefined weak symbols are output as a dynamic
13136 symbol in PIEs. */
13137 else if (h->dynindx == -1
13138 && !h->forced_local)
13139 {
13140 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13141 return FALSE;
13142 }
13143 }
13144
13145 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13146 && h->root.type == bfd_link_hash_new)
13147 {
13148 /* Output absolute symbols so that we can create relocations
13149 against them. For normal symbols we output a relocation
13150 against the section that contains them. */
13151 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13152 return FALSE;
13153 }
13154
13155 }
13156 else
13157 {
13158 /* For the non-shared case, discard space for relocs against
13159 symbols which turn out to need copy relocs or are not
13160 dynamic. */
13161
13162 if (!h->non_got_ref
13163 && ((h->def_dynamic
13164 && !h->def_regular)
13165 || (htab->root.dynamic_sections_created
13166 && (h->root.type == bfd_link_hash_undefweak
13167 || h->root.type == bfd_link_hash_undefined))))
13168 {
13169 /* Make sure this symbol is output as a dynamic symbol.
13170 Undefined weak syms won't yet be marked as dynamic. */
13171 if (h->dynindx == -1
13172 && !h->forced_local)
13173 {
13174 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13175 return FALSE;
13176 }
13177
13178 /* If that succeeded, we know we'll be keeping all the
13179 relocs. */
13180 if (h->dynindx != -1)
13181 goto keep;
13182 }
13183
13184 eh->dyn_relocs = NULL;
13185
13186 keep: ;
13187 }
13188
13189 /* Finally, allocate space. */
13190 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13191 {
13192 asection *sreloc = elf_section_data (p->sec)->sreloc;
13193 if (h->type == STT_GNU_IFUNC
13194 && eh->plt.noncall_refcount == 0
13195 && SYMBOL_REFERENCES_LOCAL (info, h))
13196 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13197 else
13198 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
13199 }
13200
13201 return TRUE;
13202 }
13203
13204 /* Find any dynamic relocs that apply to read-only sections. */
13205
13206 static bfd_boolean
13207 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
13208 {
13209 struct elf32_arm_link_hash_entry * eh;
13210 struct elf_dyn_relocs * p;
13211
13212 eh = (struct elf32_arm_link_hash_entry *) h;
13213 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13214 {
13215 asection *s = p->sec;
13216
13217 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13218 {
13219 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13220
13221 info->flags |= DF_TEXTREL;
13222
13223 /* Not an error, just cut short the traversal. */
13224 return FALSE;
13225 }
13226 }
13227 return TRUE;
13228 }
13229
13230 void
13231 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13232 int byteswap_code)
13233 {
13234 struct elf32_arm_link_hash_table *globals;
13235
13236 globals = elf32_arm_hash_table (info);
13237 if (globals == NULL)
13238 return;
13239
13240 globals->byteswap_code = byteswap_code;
13241 }
13242
13243 /* Set the sizes of the dynamic sections. */
13244
13245 static bfd_boolean
13246 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13247 struct bfd_link_info * info)
13248 {
13249 bfd * dynobj;
13250 asection * s;
13251 bfd_boolean plt;
13252 bfd_boolean relocs;
13253 bfd *ibfd;
13254 struct elf32_arm_link_hash_table *htab;
13255
13256 htab = elf32_arm_hash_table (info);
13257 if (htab == NULL)
13258 return FALSE;
13259
13260 dynobj = elf_hash_table (info)->dynobj;
13261 BFD_ASSERT (dynobj != NULL);
13262 check_use_blx (htab);
13263
13264 if (elf_hash_table (info)->dynamic_sections_created)
13265 {
13266 /* Set the contents of the .interp section to the interpreter. */
13267 if (info->executable)
13268 {
13269 s = bfd_get_section_by_name (dynobj, ".interp");
13270 BFD_ASSERT (s != NULL);
13271 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
13272 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13273 }
13274 }
13275
13276 /* Set up .got offsets for local syms, and space for local dynamic
13277 relocs. */
13278 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13279 {
13280 bfd_signed_vma *local_got;
13281 bfd_signed_vma *end_local_got;
13282 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
13283 char *local_tls_type;
13284 bfd_vma *local_tlsdesc_gotent;
13285 bfd_size_type locsymcount;
13286 Elf_Internal_Shdr *symtab_hdr;
13287 asection *srel;
13288 bfd_boolean is_vxworks = htab->vxworks_p;
13289 unsigned int symndx;
13290
13291 if (! is_arm_elf (ibfd))
13292 continue;
13293
13294 for (s = ibfd->sections; s != NULL; s = s->next)
13295 {
13296 struct elf_dyn_relocs *p;
13297
13298 for (p = (struct elf_dyn_relocs *)
13299 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
13300 {
13301 if (!bfd_is_abs_section (p->sec)
13302 && bfd_is_abs_section (p->sec->output_section))
13303 {
13304 /* Input section has been discarded, either because
13305 it is a copy of a linkonce section or due to
13306 linker script /DISCARD/, so we'll be discarding
13307 the relocs too. */
13308 }
13309 else if (is_vxworks
13310 && strcmp (p->sec->output_section->name,
13311 ".tls_vars") == 0)
13312 {
13313 /* Relocations in vxworks .tls_vars sections are
13314 handled specially by the loader. */
13315 }
13316 else if (p->count != 0)
13317 {
13318 srel = elf_section_data (p->sec)->sreloc;
13319 elf32_arm_allocate_dynrelocs (info, srel, p->count);
13320 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
13321 info->flags |= DF_TEXTREL;
13322 }
13323 }
13324 }
13325
13326 local_got = elf_local_got_refcounts (ibfd);
13327 if (!local_got)
13328 continue;
13329
13330 symtab_hdr = & elf_symtab_hdr (ibfd);
13331 locsymcount = symtab_hdr->sh_info;
13332 end_local_got = local_got + locsymcount;
13333 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
13334 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
13335 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
13336 symndx = 0;
13337 s = htab->root.sgot;
13338 srel = htab->root.srelgot;
13339 for (; local_got < end_local_got;
13340 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13341 ++local_tlsdesc_gotent, ++symndx)
13342 {
13343 *local_tlsdesc_gotent = (bfd_vma) -1;
13344 local_iplt = *local_iplt_ptr;
13345 if (local_iplt != NULL)
13346 {
13347 struct elf_dyn_relocs *p;
13348
13349 if (local_iplt->root.refcount > 0)
13350 {
13351 elf32_arm_allocate_plt_entry (info, TRUE,
13352 &local_iplt->root,
13353 &local_iplt->arm);
13354 if (local_iplt->arm.noncall_refcount == 0)
13355 /* All references to the PLT are calls, so all
13356 non-call references can resolve directly to the
13357 run-time target. This means that the .got entry
13358 would be the same as the .igot.plt entry, so there's
13359 no point creating both. */
13360 *local_got = 0;
13361 }
13362 else
13363 {
13364 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13365 local_iplt->root.offset = (bfd_vma) -1;
13366 }
13367
13368 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13369 {
13370 asection *psrel;
13371
13372 psrel = elf_section_data (p->sec)->sreloc;
13373 if (local_iplt->arm.noncall_refcount == 0)
13374 elf32_arm_allocate_irelocs (info, psrel, p->count);
13375 else
13376 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13377 }
13378 }
13379 if (*local_got > 0)
13380 {
13381 Elf_Internal_Sym *isym;
13382
13383 *local_got = s->size;
13384 if (*local_tls_type & GOT_TLS_GD)
13385 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13386 s->size += 8;
13387 if (*local_tls_type & GOT_TLS_GDESC)
13388 {
13389 *local_tlsdesc_gotent = htab->root.sgotplt->size
13390 - elf32_arm_compute_jump_table_size (htab);
13391 htab->root.sgotplt->size += 8;
13392 *local_got = (bfd_vma) -2;
13393 /* plt.got_offset needs to know there's a TLS_DESC
13394 reloc in the middle of .got.plt. */
13395 htab->num_tls_desc++;
13396 }
13397 if (*local_tls_type & GOT_TLS_IE)
13398 s->size += 4;
13399
13400 if (*local_tls_type & GOT_NORMAL)
13401 {
13402 /* If the symbol is both GD and GDESC, *local_got
13403 may have been overwritten. */
13404 *local_got = s->size;
13405 s->size += 4;
13406 }
13407
13408 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13409 if (isym == NULL)
13410 return FALSE;
13411
13412 /* If all references to an STT_GNU_IFUNC PLT are calls,
13413 then all non-call references, including this GOT entry,
13414 resolve directly to the run-time target. */
13415 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13416 && (local_iplt == NULL
13417 || local_iplt->arm.noncall_refcount == 0))
13418 elf32_arm_allocate_irelocs (info, srel, 1);
13419 else if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13420 || *local_tls_type & GOT_TLS_GD)
13421 elf32_arm_allocate_dynrelocs (info, srel, 1);
13422
13423 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13424 {
13425 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13426 htab->tls_trampoline = -1;
13427 }
13428 }
13429 else
13430 *local_got = (bfd_vma) -1;
13431 }
13432 }
13433
13434 if (htab->tls_ldm_got.refcount > 0)
13435 {
13436 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13437 for R_ARM_TLS_LDM32 relocations. */
13438 htab->tls_ldm_got.offset = htab->root.sgot->size;
13439 htab->root.sgot->size += 8;
13440 if (info->shared)
13441 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13442 }
13443 else
13444 htab->tls_ldm_got.offset = -1;
13445
13446 /* Allocate global sym .plt and .got entries, and space for global
13447 sym dynamic relocs. */
13448 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
13449
13450 /* Here we rummage through the found bfds to collect glue information. */
13451 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13452 {
13453 if (! is_arm_elf (ibfd))
13454 continue;
13455
13456 /* Initialise mapping tables for code/data. */
13457 bfd_elf32_arm_init_maps (ibfd);
13458
13459 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13460 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13461 /* xgettext:c-format */
13462 _bfd_error_handler (_("Errors encountered processing file %s"),
13463 ibfd->filename);
13464 }
13465
13466 /* Allocate space for the glue sections now that we've sized them. */
13467 bfd_elf32_arm_allocate_interworking_sections (info);
13468
13469 /* For every jump slot reserved in the sgotplt, reloc_count is
13470 incremented. However, when we reserve space for TLS descriptors,
13471 it's not incremented, so in order to compute the space reserved
13472 for them, it suffices to multiply the reloc count by the jump
13473 slot size. */
13474 if (htab->root.srelplt)
13475 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13476
13477 if (htab->tls_trampoline)
13478 {
13479 if (htab->root.splt->size == 0)
13480 htab->root.splt->size += htab->plt_header_size;
13481
13482 htab->tls_trampoline = htab->root.splt->size;
13483 htab->root.splt->size += htab->plt_entry_size;
13484
13485 /* If we're not using lazy TLS relocations, don't generate the
13486 PLT and GOT entries they require. */
13487 if (!(info->flags & DF_BIND_NOW))
13488 {
13489 htab->dt_tlsdesc_got = htab->root.sgot->size;
13490 htab->root.sgot->size += 4;
13491
13492 htab->dt_tlsdesc_plt = htab->root.splt->size;
13493 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13494 }
13495 }
13496
13497 /* The check_relocs and adjust_dynamic_symbol entry points have
13498 determined the sizes of the various dynamic sections. Allocate
13499 memory for them. */
13500 plt = FALSE;
13501 relocs = FALSE;
13502 for (s = dynobj->sections; s != NULL; s = s->next)
13503 {
13504 const char * name;
13505
13506 if ((s->flags & SEC_LINKER_CREATED) == 0)
13507 continue;
13508
13509 /* It's OK to base decisions on the section name, because none
13510 of the dynobj section names depend upon the input files. */
13511 name = bfd_get_section_name (dynobj, s);
13512
13513 if (s == htab->root.splt)
13514 {
13515 /* Remember whether there is a PLT. */
13516 plt = s->size != 0;
13517 }
13518 else if (CONST_STRNEQ (name, ".rel"))
13519 {
13520 if (s->size != 0)
13521 {
13522 /* Remember whether there are any reloc sections other
13523 than .rel(a).plt and .rela.plt.unloaded. */
13524 if (s != htab->root.srelplt && s != htab->srelplt2)
13525 relocs = TRUE;
13526
13527 /* We use the reloc_count field as a counter if we need
13528 to copy relocs into the output file. */
13529 s->reloc_count = 0;
13530 }
13531 }
13532 else if (s != htab->root.sgot
13533 && s != htab->root.sgotplt
13534 && s != htab->root.iplt
13535 && s != htab->root.igotplt
13536 && s != htab->sdynbss)
13537 {
13538 /* It's not one of our sections, so don't allocate space. */
13539 continue;
13540 }
13541
13542 if (s->size == 0)
13543 {
13544 /* If we don't need this section, strip it from the
13545 output file. This is mostly to handle .rel(a).bss and
13546 .rel(a).plt. We must create both sections in
13547 create_dynamic_sections, because they must be created
13548 before the linker maps input sections to output
13549 sections. The linker does that before
13550 adjust_dynamic_symbol is called, and it is that
13551 function which decides whether anything needs to go
13552 into these sections. */
13553 s->flags |= SEC_EXCLUDE;
13554 continue;
13555 }
13556
13557 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13558 continue;
13559
13560 /* Allocate memory for the section contents. */
13561 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
13562 if (s->contents == NULL)
13563 return FALSE;
13564 }
13565
13566 if (elf_hash_table (info)->dynamic_sections_created)
13567 {
13568 /* Add some entries to the .dynamic section. We fill in the
13569 values later, in elf32_arm_finish_dynamic_sections, but we
13570 must add the entries now so that we get the correct size for
13571 the .dynamic section. The DT_DEBUG entry is filled in by the
13572 dynamic linker and used by the debugger. */
13573 #define add_dynamic_entry(TAG, VAL) \
13574 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
13575
13576 if (info->executable)
13577 {
13578 if (!add_dynamic_entry (DT_DEBUG, 0))
13579 return FALSE;
13580 }
13581
13582 if (plt)
13583 {
13584 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13585 || !add_dynamic_entry (DT_PLTRELSZ, 0)
13586 || !add_dynamic_entry (DT_PLTREL,
13587 htab->use_rel ? DT_REL : DT_RELA)
13588 || !add_dynamic_entry (DT_JMPREL, 0))
13589 return FALSE;
13590
13591 if (htab->dt_tlsdesc_plt &&
13592 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
13593 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
13594 return FALSE;
13595 }
13596
13597 if (relocs)
13598 {
13599 if (htab->use_rel)
13600 {
13601 if (!add_dynamic_entry (DT_REL, 0)
13602 || !add_dynamic_entry (DT_RELSZ, 0)
13603 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13604 return FALSE;
13605 }
13606 else
13607 {
13608 if (!add_dynamic_entry (DT_RELA, 0)
13609 || !add_dynamic_entry (DT_RELASZ, 0)
13610 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13611 return FALSE;
13612 }
13613 }
13614
13615 /* If any dynamic relocs apply to a read-only section,
13616 then we need a DT_TEXTREL entry. */
13617 if ((info->flags & DF_TEXTREL) == 0)
13618 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13619 info);
13620
13621 if ((info->flags & DF_TEXTREL) != 0)
13622 {
13623 if (!add_dynamic_entry (DT_TEXTREL, 0))
13624 return FALSE;
13625 }
13626 if (htab->vxworks_p
13627 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13628 return FALSE;
13629 }
13630 #undef add_dynamic_entry
13631
13632 return TRUE;
13633 }
13634
13635 /* Size sections even though they're not dynamic. We use it to setup
13636 _TLS_MODULE_BASE_, if needed. */
13637
13638 static bfd_boolean
13639 elf32_arm_always_size_sections (bfd *output_bfd,
13640 struct bfd_link_info *info)
13641 {
13642 asection *tls_sec;
13643
13644 if (info->relocatable)
13645 return TRUE;
13646
13647 tls_sec = elf_hash_table (info)->tls_sec;
13648
13649 if (tls_sec)
13650 {
13651 struct elf_link_hash_entry *tlsbase;
13652
13653 tlsbase = elf_link_hash_lookup
13654 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13655
13656 if (tlsbase)
13657 {
13658 struct bfd_link_hash_entry *bh = NULL;
13659 const struct elf_backend_data *bed
13660 = get_elf_backend_data (output_bfd);
13661
13662 if (!(_bfd_generic_link_add_one_symbol
13663 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13664 tls_sec, 0, NULL, FALSE,
13665 bed->collect, &bh)))
13666 return FALSE;
13667
13668 tlsbase->type = STT_TLS;
13669 tlsbase = (struct elf_link_hash_entry *)bh;
13670 tlsbase->def_regular = 1;
13671 tlsbase->other = STV_HIDDEN;
13672 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
13673 }
13674 }
13675 return TRUE;
13676 }
13677
13678 /* Finish up dynamic symbol handling. We set the contents of various
13679 dynamic sections here. */
13680
13681 static bfd_boolean
13682 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
13683 struct bfd_link_info * info,
13684 struct elf_link_hash_entry * h,
13685 Elf_Internal_Sym * sym)
13686 {
13687 struct elf32_arm_link_hash_table *htab;
13688 struct elf32_arm_link_hash_entry *eh;
13689
13690 htab = elf32_arm_hash_table (info);
13691 if (htab == NULL)
13692 return FALSE;
13693
13694 eh = (struct elf32_arm_link_hash_entry *) h;
13695
13696 if (h->plt.offset != (bfd_vma) -1)
13697 {
13698 if (!eh->is_iplt)
13699 {
13700 BFD_ASSERT (h->dynindx != -1);
13701 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
13702 h->dynindx, 0);
13703 }
13704
13705 if (!h->def_regular)
13706 {
13707 /* Mark the symbol as undefined, rather than as defined in
13708 the .plt section. Leave the value alone. */
13709 sym->st_shndx = SHN_UNDEF;
13710 /* If the symbol is weak, we do need to clear the value.
13711 Otherwise, the PLT entry would provide a definition for
13712 the symbol even if the symbol wasn't defined anywhere,
13713 and so the symbol would never be NULL. */
13714 if (!h->ref_regular_nonweak)
13715 sym->st_value = 0;
13716 }
13717 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
13718 {
13719 /* At least one non-call relocation references this .iplt entry,
13720 so the .iplt entry is the function's canonical address. */
13721 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
13722 sym->st_target_internal = ST_BRANCH_TO_ARM;
13723 sym->st_shndx = (_bfd_elf_section_from_bfd_section
13724 (output_bfd, htab->root.iplt->output_section));
13725 sym->st_value = (h->plt.offset
13726 + htab->root.iplt->output_section->vma
13727 + htab->root.iplt->output_offset);
13728 }
13729 }
13730
13731 if (h->needs_copy)
13732 {
13733 asection * s;
13734 Elf_Internal_Rela rel;
13735
13736 /* This symbol needs a copy reloc. Set it up. */
13737 BFD_ASSERT (h->dynindx != -1
13738 && (h->root.type == bfd_link_hash_defined
13739 || h->root.type == bfd_link_hash_defweak));
13740
13741 s = htab->srelbss;
13742 BFD_ASSERT (s != NULL);
13743
13744 rel.r_addend = 0;
13745 rel.r_offset = (h->root.u.def.value
13746 + h->root.u.def.section->output_section->vma
13747 + h->root.u.def.section->output_offset);
13748 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
13749 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
13750 }
13751
13752 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
13753 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
13754 to the ".got" section. */
13755 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
13756 || (!htab->vxworks_p && h == htab->root.hgot))
13757 sym->st_shndx = SHN_ABS;
13758
13759 return TRUE;
13760 }
13761
13762 static void
13763 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
13764 void *contents,
13765 const unsigned long *template, unsigned count)
13766 {
13767 unsigned ix;
13768
13769 for (ix = 0; ix != count; ix++)
13770 {
13771 unsigned long insn = template[ix];
13772
13773 /* Emit mov pc,rx if bx is not permitted. */
13774 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
13775 insn = (insn & 0xf000000f) | 0x01a0f000;
13776 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
13777 }
13778 }
13779
13780 /* Finish up the dynamic sections. */
13781
13782 static bfd_boolean
13783 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
13784 {
13785 bfd * dynobj;
13786 asection * sgot;
13787 asection * sdyn;
13788 struct elf32_arm_link_hash_table *htab;
13789
13790 htab = elf32_arm_hash_table (info);
13791 if (htab == NULL)
13792 return FALSE;
13793
13794 dynobj = elf_hash_table (info)->dynobj;
13795
13796 sgot = htab->root.sgotplt;
13797 /* A broken linker script might have discarded the dynamic sections.
13798 Catch this here so that we do not seg-fault later on. */
13799 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
13800 return FALSE;
13801 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
13802
13803 if (elf_hash_table (info)->dynamic_sections_created)
13804 {
13805 asection *splt;
13806 Elf32_External_Dyn *dyncon, *dynconend;
13807
13808 splt = htab->root.splt;
13809 BFD_ASSERT (splt != NULL && sdyn != NULL);
13810 BFD_ASSERT (htab->symbian_p || sgot != NULL);
13811
13812 dyncon = (Elf32_External_Dyn *) sdyn->contents;
13813 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
13814
13815 for (; dyncon < dynconend; dyncon++)
13816 {
13817 Elf_Internal_Dyn dyn;
13818 const char * name;
13819 asection * s;
13820
13821 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
13822
13823 switch (dyn.d_tag)
13824 {
13825 unsigned int type;
13826
13827 default:
13828 if (htab->vxworks_p
13829 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
13830 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13831 break;
13832
13833 case DT_HASH:
13834 name = ".hash";
13835 goto get_vma_if_bpabi;
13836 case DT_STRTAB:
13837 name = ".dynstr";
13838 goto get_vma_if_bpabi;
13839 case DT_SYMTAB:
13840 name = ".dynsym";
13841 goto get_vma_if_bpabi;
13842 case DT_VERSYM:
13843 name = ".gnu.version";
13844 goto get_vma_if_bpabi;
13845 case DT_VERDEF:
13846 name = ".gnu.version_d";
13847 goto get_vma_if_bpabi;
13848 case DT_VERNEED:
13849 name = ".gnu.version_r";
13850 goto get_vma_if_bpabi;
13851
13852 case DT_PLTGOT:
13853 name = ".got";
13854 goto get_vma;
13855 case DT_JMPREL:
13856 name = RELOC_SECTION (htab, ".plt");
13857 get_vma:
13858 s = bfd_get_section_by_name (output_bfd, name);
13859 BFD_ASSERT (s != NULL);
13860 if (!htab->symbian_p)
13861 dyn.d_un.d_ptr = s->vma;
13862 else
13863 /* In the BPABI, tags in the PT_DYNAMIC section point
13864 at the file offset, not the memory address, for the
13865 convenience of the post linker. */
13866 dyn.d_un.d_ptr = s->filepos;
13867 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13868 break;
13869
13870 get_vma_if_bpabi:
13871 if (htab->symbian_p)
13872 goto get_vma;
13873 break;
13874
13875 case DT_PLTRELSZ:
13876 s = htab->root.srelplt;
13877 BFD_ASSERT (s != NULL);
13878 dyn.d_un.d_val = s->size;
13879 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13880 break;
13881
13882 case DT_RELSZ:
13883 case DT_RELASZ:
13884 if (!htab->symbian_p)
13885 {
13886 /* My reading of the SVR4 ABI indicates that the
13887 procedure linkage table relocs (DT_JMPREL) should be
13888 included in the overall relocs (DT_REL). This is
13889 what Solaris does. However, UnixWare can not handle
13890 that case. Therefore, we override the DT_RELSZ entry
13891 here to make it not include the JMPREL relocs. Since
13892 the linker script arranges for .rel(a).plt to follow all
13893 other relocation sections, we don't have to worry
13894 about changing the DT_REL entry. */
13895 s = htab->root.srelplt;
13896 if (s != NULL)
13897 dyn.d_un.d_val -= s->size;
13898 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13899 break;
13900 }
13901 /* Fall through. */
13902
13903 case DT_REL:
13904 case DT_RELA:
13905 /* In the BPABI, the DT_REL tag must point at the file
13906 offset, not the VMA, of the first relocation
13907 section. So, we use code similar to that in
13908 elflink.c, but do not check for SHF_ALLOC on the
13909 relcoation section, since relocations sections are
13910 never allocated under the BPABI. The comments above
13911 about Unixware notwithstanding, we include all of the
13912 relocations here. */
13913 if (htab->symbian_p)
13914 {
13915 unsigned int i;
13916 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
13917 ? SHT_REL : SHT_RELA);
13918 dyn.d_un.d_val = 0;
13919 for (i = 1; i < elf_numsections (output_bfd); i++)
13920 {
13921 Elf_Internal_Shdr *hdr
13922 = elf_elfsections (output_bfd)[i];
13923 if (hdr->sh_type == type)
13924 {
13925 if (dyn.d_tag == DT_RELSZ
13926 || dyn.d_tag == DT_RELASZ)
13927 dyn.d_un.d_val += hdr->sh_size;
13928 else if ((ufile_ptr) hdr->sh_offset
13929 <= dyn.d_un.d_val - 1)
13930 dyn.d_un.d_val = hdr->sh_offset;
13931 }
13932 }
13933 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13934 }
13935 break;
13936
13937 case DT_TLSDESC_PLT:
13938 s = htab->root.splt;
13939 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
13940 + htab->dt_tlsdesc_plt);
13941 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13942 break;
13943
13944 case DT_TLSDESC_GOT:
13945 s = htab->root.sgot;
13946 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
13947 + htab->dt_tlsdesc_got);
13948 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13949 break;
13950
13951 /* Set the bottom bit of DT_INIT/FINI if the
13952 corresponding function is Thumb. */
13953 case DT_INIT:
13954 name = info->init_function;
13955 goto get_sym;
13956 case DT_FINI:
13957 name = info->fini_function;
13958 get_sym:
13959 /* If it wasn't set by elf_bfd_final_link
13960 then there is nothing to adjust. */
13961 if (dyn.d_un.d_val != 0)
13962 {
13963 struct elf_link_hash_entry * eh;
13964
13965 eh = elf_link_hash_lookup (elf_hash_table (info), name,
13966 FALSE, FALSE, TRUE);
13967 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
13968 {
13969 dyn.d_un.d_val |= 1;
13970 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13971 }
13972 }
13973 break;
13974 }
13975 }
13976
13977 /* Fill in the first entry in the procedure linkage table. */
13978 if (splt->size > 0 && htab->plt_header_size)
13979 {
13980 const bfd_vma *plt0_entry;
13981 bfd_vma got_address, plt_address, got_displacement;
13982
13983 /* Calculate the addresses of the GOT and PLT. */
13984 got_address = sgot->output_section->vma + sgot->output_offset;
13985 plt_address = splt->output_section->vma + splt->output_offset;
13986
13987 if (htab->vxworks_p)
13988 {
13989 /* The VxWorks GOT is relocated by the dynamic linker.
13990 Therefore, we must emit relocations rather than simply
13991 computing the values now. */
13992 Elf_Internal_Rela rel;
13993
13994 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
13995 put_arm_insn (htab, output_bfd, plt0_entry[0],
13996 splt->contents + 0);
13997 put_arm_insn (htab, output_bfd, plt0_entry[1],
13998 splt->contents + 4);
13999 put_arm_insn (htab, output_bfd, plt0_entry[2],
14000 splt->contents + 8);
14001 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14002
14003 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
14004 rel.r_offset = plt_address + 12;
14005 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14006 rel.r_addend = 0;
14007 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14008 htab->srelplt2->contents);
14009 }
14010 else
14011 {
14012 got_displacement = got_address - (plt_address + 16);
14013
14014 plt0_entry = elf32_arm_plt0_entry;
14015 put_arm_insn (htab, output_bfd, plt0_entry[0],
14016 splt->contents + 0);
14017 put_arm_insn (htab, output_bfd, plt0_entry[1],
14018 splt->contents + 4);
14019 put_arm_insn (htab, output_bfd, plt0_entry[2],
14020 splt->contents + 8);
14021 put_arm_insn (htab, output_bfd, plt0_entry[3],
14022 splt->contents + 12);
14023
14024 #ifdef FOUR_WORD_PLT
14025 /* The displacement value goes in the otherwise-unused
14026 last word of the second entry. */
14027 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
14028 #else
14029 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
14030 #endif
14031 }
14032 }
14033
14034 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14035 really seem like the right value. */
14036 if (splt->output_section->owner == output_bfd)
14037 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
14038
14039 if (htab->dt_tlsdesc_plt)
14040 {
14041 bfd_vma got_address
14042 = sgot->output_section->vma + sgot->output_offset;
14043 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14044 + htab->root.sgot->output_offset);
14045 bfd_vma plt_address
14046 = splt->output_section->vma + splt->output_offset;
14047
14048 arm_put_trampoline (htab, output_bfd,
14049 splt->contents + htab->dt_tlsdesc_plt,
14050 dl_tlsdesc_lazy_trampoline, 6);
14051
14052 bfd_put_32 (output_bfd,
14053 gotplt_address + htab->dt_tlsdesc_got
14054 - (plt_address + htab->dt_tlsdesc_plt)
14055 - dl_tlsdesc_lazy_trampoline[6],
14056 splt->contents + htab->dt_tlsdesc_plt + 24);
14057 bfd_put_32 (output_bfd,
14058 got_address - (plt_address + htab->dt_tlsdesc_plt)
14059 - dl_tlsdesc_lazy_trampoline[7],
14060 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14061 }
14062
14063 if (htab->tls_trampoline)
14064 {
14065 arm_put_trampoline (htab, output_bfd,
14066 splt->contents + htab->tls_trampoline,
14067 tls_trampoline, 3);
14068 #ifdef FOUR_WORD_PLT
14069 bfd_put_32 (output_bfd, 0x00000000,
14070 splt->contents + htab->tls_trampoline + 12);
14071 #endif
14072 }
14073
14074 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
14075 {
14076 /* Correct the .rel(a).plt.unloaded relocations. They will have
14077 incorrect symbol indexes. */
14078 int num_plts;
14079 unsigned char *p;
14080
14081 num_plts = ((htab->root.splt->size - htab->plt_header_size)
14082 / htab->plt_entry_size);
14083 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14084
14085 for (; num_plts; num_plts--)
14086 {
14087 Elf_Internal_Rela rel;
14088
14089 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14090 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14091 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14092 p += RELOC_SIZE (htab);
14093
14094 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14095 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14096 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14097 p += RELOC_SIZE (htab);
14098 }
14099 }
14100 }
14101
14102 /* Fill in the first three entries in the global offset table. */
14103 if (sgot)
14104 {
14105 if (sgot->size > 0)
14106 {
14107 if (sdyn == NULL)
14108 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14109 else
14110 bfd_put_32 (output_bfd,
14111 sdyn->output_section->vma + sdyn->output_offset,
14112 sgot->contents);
14113 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14114 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14115 }
14116
14117 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14118 }
14119
14120 return TRUE;
14121 }
14122
14123 static void
14124 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
14125 {
14126 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
14127 struct elf32_arm_link_hash_table *globals;
14128
14129 i_ehdrp = elf_elfheader (abfd);
14130
14131 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14132 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14133 else
14134 i_ehdrp->e_ident[EI_OSABI] = 0;
14135 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
14136
14137 if (link_info)
14138 {
14139 globals = elf32_arm_hash_table (link_info);
14140 if (globals != NULL && globals->byteswap_code)
14141 i_ehdrp->e_flags |= EF_ARM_BE8;
14142 }
14143 }
14144
14145 static enum elf_reloc_type_class
14146 elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
14147 {
14148 switch ((int) ELF32_R_TYPE (rela->r_info))
14149 {
14150 case R_ARM_RELATIVE:
14151 return reloc_class_relative;
14152 case R_ARM_JUMP_SLOT:
14153 return reloc_class_plt;
14154 case R_ARM_COPY:
14155 return reloc_class_copy;
14156 default:
14157 return reloc_class_normal;
14158 }
14159 }
14160
14161 static void
14162 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
14163 {
14164 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
14165 }
14166
14167 /* Return TRUE if this is an unwinding table entry. */
14168
14169 static bfd_boolean
14170 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14171 {
14172 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14173 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
14174 }
14175
14176
14177 /* Set the type and flags for an ARM section. We do this by
14178 the section name, which is a hack, but ought to work. */
14179
14180 static bfd_boolean
14181 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14182 {
14183 const char * name;
14184
14185 name = bfd_get_section_name (abfd, sec);
14186
14187 if (is_arm_elf_unwind_section_name (abfd, name))
14188 {
14189 hdr->sh_type = SHT_ARM_EXIDX;
14190 hdr->sh_flags |= SHF_LINK_ORDER;
14191 }
14192 return TRUE;
14193 }
14194
14195 /* Handle an ARM specific section when reading an object file. This is
14196 called when bfd_section_from_shdr finds a section with an unknown
14197 type. */
14198
14199 static bfd_boolean
14200 elf32_arm_section_from_shdr (bfd *abfd,
14201 Elf_Internal_Shdr * hdr,
14202 const char *name,
14203 int shindex)
14204 {
14205 /* There ought to be a place to keep ELF backend specific flags, but
14206 at the moment there isn't one. We just keep track of the
14207 sections by their name, instead. Fortunately, the ABI gives
14208 names for all the ARM specific sections, so we will probably get
14209 away with this. */
14210 switch (hdr->sh_type)
14211 {
14212 case SHT_ARM_EXIDX:
14213 case SHT_ARM_PREEMPTMAP:
14214 case SHT_ARM_ATTRIBUTES:
14215 break;
14216
14217 default:
14218 return FALSE;
14219 }
14220
14221 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
14222 return FALSE;
14223
14224 return TRUE;
14225 }
14226
14227 static _arm_elf_section_data *
14228 get_arm_elf_section_data (asection * sec)
14229 {
14230 if (sec && sec->owner && is_arm_elf (sec->owner))
14231 return elf32_arm_section_data (sec);
14232 else
14233 return NULL;
14234 }
14235
14236 typedef struct
14237 {
14238 void *finfo;
14239 struct bfd_link_info *info;
14240 asection *sec;
14241 int sec_shndx;
14242 int (*func) (void *, const char *, Elf_Internal_Sym *,
14243 asection *, struct elf_link_hash_entry *);
14244 } output_arch_syminfo;
14245
14246 enum map_symbol_type
14247 {
14248 ARM_MAP_ARM,
14249 ARM_MAP_THUMB,
14250 ARM_MAP_DATA
14251 };
14252
14253
14254 /* Output a single mapping symbol. */
14255
14256 static bfd_boolean
14257 elf32_arm_output_map_sym (output_arch_syminfo *osi,
14258 enum map_symbol_type type,
14259 bfd_vma offset)
14260 {
14261 static const char *names[3] = {"$a", "$t", "$d"};
14262 Elf_Internal_Sym sym;
14263
14264 sym.st_value = osi->sec->output_section->vma
14265 + osi->sec->output_offset
14266 + offset;
14267 sym.st_size = 0;
14268 sym.st_other = 0;
14269 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
14270 sym.st_shndx = osi->sec_shndx;
14271 sym.st_target_internal = 0;
14272 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
14273 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
14274 }
14275
14276 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14277 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
14278
14279 static bfd_boolean
14280 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14281 bfd_boolean is_iplt_entry_p,
14282 union gotplt_union *root_plt,
14283 struct arm_plt_info *arm_plt)
14284 {
14285 struct elf32_arm_link_hash_table *htab;
14286 bfd_vma addr, plt_header_size;
14287
14288 if (root_plt->offset == (bfd_vma) -1)
14289 return TRUE;
14290
14291 htab = elf32_arm_hash_table (osi->info);
14292 if (htab == NULL)
14293 return FALSE;
14294
14295 if (is_iplt_entry_p)
14296 {
14297 osi->sec = htab->root.iplt;
14298 plt_header_size = 0;
14299 }
14300 else
14301 {
14302 osi->sec = htab->root.splt;
14303 plt_header_size = htab->plt_header_size;
14304 }
14305 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14306 (osi->info->output_bfd, osi->sec->output_section));
14307
14308 addr = root_plt->offset & -2;
14309 if (htab->symbian_p)
14310 {
14311 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14312 return FALSE;
14313 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
14314 return FALSE;
14315 }
14316 else if (htab->vxworks_p)
14317 {
14318 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14319 return FALSE;
14320 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
14321 return FALSE;
14322 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
14323 return FALSE;
14324 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
14325 return FALSE;
14326 }
14327 else
14328 {
14329 bfd_boolean thumb_stub_p;
14330
14331 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14332 if (thumb_stub_p)
14333 {
14334 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
14335 return FALSE;
14336 }
14337 #ifdef FOUR_WORD_PLT
14338 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14339 return FALSE;
14340 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
14341 return FALSE;
14342 #else
14343 /* A three-word PLT with no Thumb thunk contains only Arm code,
14344 so only need to output a mapping symbol for the first PLT entry and
14345 entries with thumb thunks. */
14346 if (thumb_stub_p || addr == plt_header_size)
14347 {
14348 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14349 return FALSE;
14350 }
14351 #endif
14352 }
14353
14354 return TRUE;
14355 }
14356
14357 /* Output mapping symbols for PLT entries associated with H. */
14358
14359 static bfd_boolean
14360 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14361 {
14362 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14363 struct elf32_arm_link_hash_entry *eh;
14364
14365 if (h->root.type == bfd_link_hash_indirect)
14366 return TRUE;
14367
14368 if (h->root.type == bfd_link_hash_warning)
14369 /* When warning symbols are created, they **replace** the "real"
14370 entry in the hash table, thus we never get to see the real
14371 symbol in a hash traversal. So look at it now. */
14372 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14373
14374 eh = (struct elf32_arm_link_hash_entry *) h;
14375 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14376 &h->plt, &eh->plt);
14377 }
14378
14379 /* Output a single local symbol for a generated stub. */
14380
14381 static bfd_boolean
14382 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14383 bfd_vma offset, bfd_vma size)
14384 {
14385 Elf_Internal_Sym sym;
14386
14387 sym.st_value = osi->sec->output_section->vma
14388 + osi->sec->output_offset
14389 + offset;
14390 sym.st_size = size;
14391 sym.st_other = 0;
14392 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14393 sym.st_shndx = osi->sec_shndx;
14394 sym.st_target_internal = 0;
14395 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
14396 }
14397
14398 static bfd_boolean
14399 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14400 void * in_arg)
14401 {
14402 struct elf32_arm_stub_hash_entry *stub_entry;
14403 asection *stub_sec;
14404 bfd_vma addr;
14405 char *stub_name;
14406 output_arch_syminfo *osi;
14407 const insn_sequence *template_sequence;
14408 enum stub_insn_type prev_type;
14409 int size;
14410 int i;
14411 enum map_symbol_type sym_type;
14412
14413 /* Massage our args to the form they really have. */
14414 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14415 osi = (output_arch_syminfo *) in_arg;
14416
14417 stub_sec = stub_entry->stub_sec;
14418
14419 /* Ensure this stub is attached to the current section being
14420 processed. */
14421 if (stub_sec != osi->sec)
14422 return TRUE;
14423
14424 addr = (bfd_vma) stub_entry->stub_offset;
14425 stub_name = stub_entry->output_name;
14426
14427 template_sequence = stub_entry->stub_template;
14428 switch (template_sequence[0].type)
14429 {
14430 case ARM_TYPE:
14431 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
14432 return FALSE;
14433 break;
14434 case THUMB16_TYPE:
14435 case THUMB32_TYPE:
14436 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14437 stub_entry->stub_size))
14438 return FALSE;
14439 break;
14440 default:
14441 BFD_FAIL ();
14442 return 0;
14443 }
14444
14445 prev_type = DATA_TYPE;
14446 size = 0;
14447 for (i = 0; i < stub_entry->stub_template_size; i++)
14448 {
14449 switch (template_sequence[i].type)
14450 {
14451 case ARM_TYPE:
14452 sym_type = ARM_MAP_ARM;
14453 break;
14454
14455 case THUMB16_TYPE:
14456 case THUMB32_TYPE:
14457 sym_type = ARM_MAP_THUMB;
14458 break;
14459
14460 case DATA_TYPE:
14461 sym_type = ARM_MAP_DATA;
14462 break;
14463
14464 default:
14465 BFD_FAIL ();
14466 return FALSE;
14467 }
14468
14469 if (template_sequence[i].type != prev_type)
14470 {
14471 prev_type = template_sequence[i].type;
14472 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14473 return FALSE;
14474 }
14475
14476 switch (template_sequence[i].type)
14477 {
14478 case ARM_TYPE:
14479 case THUMB32_TYPE:
14480 size += 4;
14481 break;
14482
14483 case THUMB16_TYPE:
14484 size += 2;
14485 break;
14486
14487 case DATA_TYPE:
14488 size += 4;
14489 break;
14490
14491 default:
14492 BFD_FAIL ();
14493 return FALSE;
14494 }
14495 }
14496
14497 return TRUE;
14498 }
14499
14500 /* Output mapping symbols for linker generated sections,
14501 and for those data-only sections that do not have a
14502 $d. */
14503
14504 static bfd_boolean
14505 elf32_arm_output_arch_local_syms (bfd *output_bfd,
14506 struct bfd_link_info *info,
14507 void *finfo,
14508 int (*func) (void *, const char *,
14509 Elf_Internal_Sym *,
14510 asection *,
14511 struct elf_link_hash_entry *))
14512 {
14513 output_arch_syminfo osi;
14514 struct elf32_arm_link_hash_table *htab;
14515 bfd_vma offset;
14516 bfd_size_type size;
14517 bfd *input_bfd;
14518
14519 htab = elf32_arm_hash_table (info);
14520 if (htab == NULL)
14521 return FALSE;
14522
14523 check_use_blx (htab);
14524
14525 osi.finfo = finfo;
14526 osi.info = info;
14527 osi.func = func;
14528
14529 /* Add a $d mapping symbol to data-only sections that
14530 don't have any mapping symbol. This may result in (harmless) redundant
14531 mapping symbols. */
14532 for (input_bfd = info->input_bfds;
14533 input_bfd != NULL;
14534 input_bfd = input_bfd->link_next)
14535 {
14536 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14537 for (osi.sec = input_bfd->sections;
14538 osi.sec != NULL;
14539 osi.sec = osi.sec->next)
14540 {
14541 if (osi.sec->output_section != NULL
14542 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14543 != 0)
14544 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14545 == SEC_HAS_CONTENTS
14546 && get_arm_elf_section_data (osi.sec) != NULL
14547 && get_arm_elf_section_data (osi.sec)->mapcount == 0
14548 && osi.sec->size > 0
14549 && (osi.sec->flags & SEC_EXCLUDE) == 0)
14550 {
14551 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14552 (output_bfd, osi.sec->output_section);
14553 if (osi.sec_shndx != (int)SHN_BAD)
14554 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14555 }
14556 }
14557 }
14558
14559 /* ARM->Thumb glue. */
14560 if (htab->arm_glue_size > 0)
14561 {
14562 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14563 ARM2THUMB_GLUE_SECTION_NAME);
14564
14565 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14566 (output_bfd, osi.sec->output_section);
14567 if (info->shared || htab->root.is_relocatable_executable
14568 || htab->pic_veneer)
14569 size = ARM2THUMB_PIC_GLUE_SIZE;
14570 else if (htab->use_blx)
14571 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14572 else
14573 size = ARM2THUMB_STATIC_GLUE_SIZE;
14574
14575 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14576 {
14577 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14578 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
14579 }
14580 }
14581
14582 /* Thumb->ARM glue. */
14583 if (htab->thumb_glue_size > 0)
14584 {
14585 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14586 THUMB2ARM_GLUE_SECTION_NAME);
14587
14588 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14589 (output_bfd, osi.sec->output_section);
14590 size = THUMB2ARM_GLUE_SIZE;
14591
14592 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14593 {
14594 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14595 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
14596 }
14597 }
14598
14599 /* ARMv4 BX veneers. */
14600 if (htab->bx_glue_size > 0)
14601 {
14602 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14603 ARM_BX_GLUE_SECTION_NAME);
14604
14605 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14606 (output_bfd, osi.sec->output_section);
14607
14608 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
14609 }
14610
14611 /* Long calls stubs. */
14612 if (htab->stub_bfd && htab->stub_bfd->sections)
14613 {
14614 asection* stub_sec;
14615
14616 for (stub_sec = htab->stub_bfd->sections;
14617 stub_sec != NULL;
14618 stub_sec = stub_sec->next)
14619 {
14620 /* Ignore non-stub sections. */
14621 if (!strstr (stub_sec->name, STUB_SUFFIX))
14622 continue;
14623
14624 osi.sec = stub_sec;
14625
14626 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14627 (output_bfd, osi.sec->output_section);
14628
14629 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
14630 }
14631 }
14632
14633 /* Finally, output mapping symbols for the PLT. */
14634 if (htab->root.splt && htab->root.splt->size > 0)
14635 {
14636 osi.sec = htab->root.splt;
14637 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
14638 (output_bfd, osi.sec->output_section));
14639
14640 /* Output mapping symbols for the plt header. SymbianOS does not have a
14641 plt header. */
14642 if (htab->vxworks_p)
14643 {
14644 /* VxWorks shared libraries have no PLT header. */
14645 if (!info->shared)
14646 {
14647 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14648 return FALSE;
14649 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
14650 return FALSE;
14651 }
14652 }
14653 else if (!htab->symbian_p)
14654 {
14655 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14656 return FALSE;
14657 #ifndef FOUR_WORD_PLT
14658 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
14659 return FALSE;
14660 #endif
14661 }
14662 }
14663 if ((htab->root.splt && htab->root.splt->size > 0)
14664 || (htab->root.iplt && htab->root.iplt->size > 0))
14665 {
14666 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
14667 for (input_bfd = info->input_bfds;
14668 input_bfd != NULL;
14669 input_bfd = input_bfd->link_next)
14670 {
14671 struct arm_local_iplt_info **local_iplt;
14672 unsigned int i, num_syms;
14673
14674 local_iplt = elf32_arm_local_iplt (input_bfd);
14675 if (local_iplt != NULL)
14676 {
14677 num_syms = elf_symtab_hdr (input_bfd).sh_info;
14678 for (i = 0; i < num_syms; i++)
14679 if (local_iplt[i] != NULL
14680 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
14681 &local_iplt[i]->root,
14682 &local_iplt[i]->arm))
14683 return FALSE;
14684 }
14685 }
14686 }
14687 if (htab->dt_tlsdesc_plt != 0)
14688 {
14689 /* Mapping symbols for the lazy tls trampoline. */
14690 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
14691 return FALSE;
14692
14693 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14694 htab->dt_tlsdesc_plt + 24))
14695 return FALSE;
14696 }
14697 if (htab->tls_trampoline != 0)
14698 {
14699 /* Mapping symbols for the tls trampoline. */
14700 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
14701 return FALSE;
14702 #ifdef FOUR_WORD_PLT
14703 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14704 htab->tls_trampoline + 12))
14705 return FALSE;
14706 #endif
14707 }
14708
14709 return TRUE;
14710 }
14711
14712 /* Allocate target specific section data. */
14713
14714 static bfd_boolean
14715 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
14716 {
14717 if (!sec->used_by_bfd)
14718 {
14719 _arm_elf_section_data *sdata;
14720 bfd_size_type amt = sizeof (*sdata);
14721
14722 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
14723 if (sdata == NULL)
14724 return FALSE;
14725 sec->used_by_bfd = sdata;
14726 }
14727
14728 return _bfd_elf_new_section_hook (abfd, sec);
14729 }
14730
14731
14732 /* Used to order a list of mapping symbols by address. */
14733
14734 static int
14735 elf32_arm_compare_mapping (const void * a, const void * b)
14736 {
14737 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
14738 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
14739
14740 if (amap->vma > bmap->vma)
14741 return 1;
14742 else if (amap->vma < bmap->vma)
14743 return -1;
14744 else if (amap->type > bmap->type)
14745 /* Ensure results do not depend on the host qsort for objects with
14746 multiple mapping symbols at the same address by sorting on type
14747 after vma. */
14748 return 1;
14749 else if (amap->type < bmap->type)
14750 return -1;
14751 else
14752 return 0;
14753 }
14754
14755 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
14756
14757 static unsigned long
14758 offset_prel31 (unsigned long addr, bfd_vma offset)
14759 {
14760 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
14761 }
14762
14763 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
14764 relocations. */
14765
14766 static void
14767 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
14768 {
14769 unsigned long first_word = bfd_get_32 (output_bfd, from);
14770 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
14771
14772 /* High bit of first word is supposed to be zero. */
14773 if ((first_word & 0x80000000ul) == 0)
14774 first_word = offset_prel31 (first_word, offset);
14775
14776 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
14777 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
14778 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
14779 second_word = offset_prel31 (second_word, offset);
14780
14781 bfd_put_32 (output_bfd, first_word, to);
14782 bfd_put_32 (output_bfd, second_word, to + 4);
14783 }
14784
14785 /* Data for make_branch_to_a8_stub(). */
14786
14787 struct a8_branch_to_stub_data {
14788 asection *writing_section;
14789 bfd_byte *contents;
14790 };
14791
14792
14793 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
14794 places for a particular section. */
14795
14796 static bfd_boolean
14797 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
14798 void *in_arg)
14799 {
14800 struct elf32_arm_stub_hash_entry *stub_entry;
14801 struct a8_branch_to_stub_data *data;
14802 bfd_byte *contents;
14803 unsigned long branch_insn;
14804 bfd_vma veneered_insn_loc, veneer_entry_loc;
14805 bfd_signed_vma branch_offset;
14806 bfd *abfd;
14807 unsigned int target;
14808
14809 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14810 data = (struct a8_branch_to_stub_data *) in_arg;
14811
14812 if (stub_entry->target_section != data->writing_section
14813 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
14814 return TRUE;
14815
14816 contents = data->contents;
14817
14818 veneered_insn_loc = stub_entry->target_section->output_section->vma
14819 + stub_entry->target_section->output_offset
14820 + stub_entry->target_value;
14821
14822 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
14823 + stub_entry->stub_sec->output_offset
14824 + stub_entry->stub_offset;
14825
14826 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
14827 veneered_insn_loc &= ~3u;
14828
14829 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
14830
14831 abfd = stub_entry->target_section->owner;
14832 target = stub_entry->target_value;
14833
14834 /* We attempt to avoid this condition by setting stubs_always_after_branch
14835 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
14836 This check is just to be on the safe side... */
14837 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
14838 {
14839 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
14840 "allocated in unsafe location"), abfd);
14841 return FALSE;
14842 }
14843
14844 switch (stub_entry->stub_type)
14845 {
14846 case arm_stub_a8_veneer_b:
14847 case arm_stub_a8_veneer_b_cond:
14848 branch_insn = 0xf0009000;
14849 goto jump24;
14850
14851 case arm_stub_a8_veneer_blx:
14852 branch_insn = 0xf000e800;
14853 goto jump24;
14854
14855 case arm_stub_a8_veneer_bl:
14856 {
14857 unsigned int i1, j1, i2, j2, s;
14858
14859 branch_insn = 0xf000d000;
14860
14861 jump24:
14862 if (branch_offset < -16777216 || branch_offset > 16777214)
14863 {
14864 /* There's not much we can do apart from complain if this
14865 happens. */
14866 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
14867 "of range (input file too large)"), abfd);
14868 return FALSE;
14869 }
14870
14871 /* i1 = not(j1 eor s), so:
14872 not i1 = j1 eor s
14873 j1 = (not i1) eor s. */
14874
14875 branch_insn |= (branch_offset >> 1) & 0x7ff;
14876 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
14877 i2 = (branch_offset >> 22) & 1;
14878 i1 = (branch_offset >> 23) & 1;
14879 s = (branch_offset >> 24) & 1;
14880 j1 = (!i1) ^ s;
14881 j2 = (!i2) ^ s;
14882 branch_insn |= j2 << 11;
14883 branch_insn |= j1 << 13;
14884 branch_insn |= s << 26;
14885 }
14886 break;
14887
14888 default:
14889 BFD_FAIL ();
14890 return FALSE;
14891 }
14892
14893 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
14894 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
14895
14896 return TRUE;
14897 }
14898
14899 /* Do code byteswapping. Return FALSE afterwards so that the section is
14900 written out as normal. */
14901
14902 static bfd_boolean
14903 elf32_arm_write_section (bfd *output_bfd,
14904 struct bfd_link_info *link_info,
14905 asection *sec,
14906 bfd_byte *contents)
14907 {
14908 unsigned int mapcount, errcount;
14909 _arm_elf_section_data *arm_data;
14910 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
14911 elf32_arm_section_map *map;
14912 elf32_vfp11_erratum_list *errnode;
14913 bfd_vma ptr;
14914 bfd_vma end;
14915 bfd_vma offset = sec->output_section->vma + sec->output_offset;
14916 bfd_byte tmp;
14917 unsigned int i;
14918
14919 if (globals == NULL)
14920 return FALSE;
14921
14922 /* If this section has not been allocated an _arm_elf_section_data
14923 structure then we cannot record anything. */
14924 arm_data = get_arm_elf_section_data (sec);
14925 if (arm_data == NULL)
14926 return FALSE;
14927
14928 mapcount = arm_data->mapcount;
14929 map = arm_data->map;
14930 errcount = arm_data->erratumcount;
14931
14932 if (errcount != 0)
14933 {
14934 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
14935
14936 for (errnode = arm_data->erratumlist; errnode != 0;
14937 errnode = errnode->next)
14938 {
14939 bfd_vma target = errnode->vma - offset;
14940
14941 switch (errnode->type)
14942 {
14943 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
14944 {
14945 bfd_vma branch_to_veneer;
14946 /* Original condition code of instruction, plus bit mask for
14947 ARM B instruction. */
14948 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
14949 | 0x0a000000;
14950
14951 /* The instruction is before the label. */
14952 target -= 4;
14953
14954 /* Above offset included in -4 below. */
14955 branch_to_veneer = errnode->u.b.veneer->vma
14956 - errnode->vma - 4;
14957
14958 if ((signed) branch_to_veneer < -(1 << 25)
14959 || (signed) branch_to_veneer >= (1 << 25))
14960 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
14961 "range"), output_bfd);
14962
14963 insn |= (branch_to_veneer >> 2) & 0xffffff;
14964 contents[endianflip ^ target] = insn & 0xff;
14965 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
14966 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
14967 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
14968 }
14969 break;
14970
14971 case VFP11_ERRATUM_ARM_VENEER:
14972 {
14973 bfd_vma branch_from_veneer;
14974 unsigned int insn;
14975
14976 /* Take size of veneer into account. */
14977 branch_from_veneer = errnode->u.v.branch->vma
14978 - errnode->vma - 12;
14979
14980 if ((signed) branch_from_veneer < -(1 << 25)
14981 || (signed) branch_from_veneer >= (1 << 25))
14982 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
14983 "range"), output_bfd);
14984
14985 /* Original instruction. */
14986 insn = errnode->u.v.branch->u.b.vfp_insn;
14987 contents[endianflip ^ target] = insn & 0xff;
14988 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
14989 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
14990 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
14991
14992 /* Branch back to insn after original insn. */
14993 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
14994 contents[endianflip ^ (target + 4)] = insn & 0xff;
14995 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
14996 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
14997 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
14998 }
14999 break;
15000
15001 default:
15002 abort ();
15003 }
15004 }
15005 }
15006
15007 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15008 {
15009 arm_unwind_table_edit *edit_node
15010 = arm_data->u.exidx.unwind_edit_list;
15011 /* Now, sec->size is the size of the section we will write. The original
15012 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15013 markers) was sec->rawsize. (This isn't the case if we perform no
15014 edits, then rawsize will be zero and we should use size). */
15015 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
15016 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15017 unsigned int in_index, out_index;
15018 bfd_vma add_to_offsets = 0;
15019
15020 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15021 {
15022 if (edit_node)
15023 {
15024 unsigned int edit_index = edit_node->index;
15025
15026 if (in_index < edit_index && in_index * 8 < input_size)
15027 {
15028 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15029 contents + in_index * 8, add_to_offsets);
15030 out_index++;
15031 in_index++;
15032 }
15033 else if (in_index == edit_index
15034 || (in_index * 8 >= input_size
15035 && edit_index == UINT_MAX))
15036 {
15037 switch (edit_node->type)
15038 {
15039 case DELETE_EXIDX_ENTRY:
15040 in_index++;
15041 add_to_offsets += 8;
15042 break;
15043
15044 case INSERT_EXIDX_CANTUNWIND_AT_END:
15045 {
15046 asection *text_sec = edit_node->linked_section;
15047 bfd_vma text_offset = text_sec->output_section->vma
15048 + text_sec->output_offset
15049 + text_sec->size;
15050 bfd_vma exidx_offset = offset + out_index * 8;
15051 unsigned long prel31_offset;
15052
15053 /* Note: this is meant to be equivalent to an
15054 R_ARM_PREL31 relocation. These synthetic
15055 EXIDX_CANTUNWIND markers are not relocated by the
15056 usual BFD method. */
15057 prel31_offset = (text_offset - exidx_offset)
15058 & 0x7ffffffful;
15059
15060 /* First address we can't unwind. */
15061 bfd_put_32 (output_bfd, prel31_offset,
15062 &edited_contents[out_index * 8]);
15063
15064 /* Code for EXIDX_CANTUNWIND. */
15065 bfd_put_32 (output_bfd, 0x1,
15066 &edited_contents[out_index * 8 + 4]);
15067
15068 out_index++;
15069 add_to_offsets -= 8;
15070 }
15071 break;
15072 }
15073
15074 edit_node = edit_node->next;
15075 }
15076 }
15077 else
15078 {
15079 /* No more edits, copy remaining entries verbatim. */
15080 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15081 contents + in_index * 8, add_to_offsets);
15082 out_index++;
15083 in_index++;
15084 }
15085 }
15086
15087 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15088 bfd_set_section_contents (output_bfd, sec->output_section,
15089 edited_contents,
15090 (file_ptr) sec->output_offset, sec->size);
15091
15092 return TRUE;
15093 }
15094
15095 /* Fix code to point to Cortex-A8 erratum stubs. */
15096 if (globals->fix_cortex_a8)
15097 {
15098 struct a8_branch_to_stub_data data;
15099
15100 data.writing_section = sec;
15101 data.contents = contents;
15102
15103 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15104 &data);
15105 }
15106
15107 if (mapcount == 0)
15108 return FALSE;
15109
15110 if (globals->byteswap_code)
15111 {
15112 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
15113
15114 ptr = map[0].vma;
15115 for (i = 0; i < mapcount; i++)
15116 {
15117 if (i == mapcount - 1)
15118 end = sec->size;
15119 else
15120 end = map[i + 1].vma;
15121
15122 switch (map[i].type)
15123 {
15124 case 'a':
15125 /* Byte swap code words. */
15126 while (ptr + 3 < end)
15127 {
15128 tmp = contents[ptr];
15129 contents[ptr] = contents[ptr + 3];
15130 contents[ptr + 3] = tmp;
15131 tmp = contents[ptr + 1];
15132 contents[ptr + 1] = contents[ptr + 2];
15133 contents[ptr + 2] = tmp;
15134 ptr += 4;
15135 }
15136 break;
15137
15138 case 't':
15139 /* Byte swap code halfwords. */
15140 while (ptr + 1 < end)
15141 {
15142 tmp = contents[ptr];
15143 contents[ptr] = contents[ptr + 1];
15144 contents[ptr + 1] = tmp;
15145 ptr += 2;
15146 }
15147 break;
15148
15149 case 'd':
15150 /* Leave data alone. */
15151 break;
15152 }
15153 ptr = end;
15154 }
15155 }
15156
15157 free (map);
15158 arm_data->mapcount = -1;
15159 arm_data->mapsize = 0;
15160 arm_data->map = NULL;
15161
15162 return FALSE;
15163 }
15164
15165 /* Mangle thumb function symbols as we read them in. */
15166
15167 static bfd_boolean
15168 elf32_arm_swap_symbol_in (bfd * abfd,
15169 const void *psrc,
15170 const void *pshn,
15171 Elf_Internal_Sym *dst)
15172 {
15173 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15174 return FALSE;
15175
15176 /* New EABI objects mark thumb function symbols by setting the low bit of
15177 the address. */
15178 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15179 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
15180 {
15181 if (dst->st_value & 1)
15182 {
15183 dst->st_value &= ~(bfd_vma) 1;
15184 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15185 }
15186 else
15187 dst->st_target_internal = ST_BRANCH_TO_ARM;
15188 }
15189 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15190 {
15191 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15192 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15193 }
15194 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15195 dst->st_target_internal = ST_BRANCH_LONG;
15196 else
15197 dst->st_target_internal = ST_BRANCH_UNKNOWN;
15198
15199 return TRUE;
15200 }
15201
15202
15203 /* Mangle thumb function symbols as we write them out. */
15204
15205 static void
15206 elf32_arm_swap_symbol_out (bfd *abfd,
15207 const Elf_Internal_Sym *src,
15208 void *cdst,
15209 void *shndx)
15210 {
15211 Elf_Internal_Sym newsym;
15212
15213 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15214 of the address set, as per the new EABI. We do this unconditionally
15215 because objcopy does not set the elf header flags until after
15216 it writes out the symbol table. */
15217 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
15218 {
15219 newsym = *src;
15220 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15221 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
15222 if (newsym.st_shndx != SHN_UNDEF)
15223 {
15224 /* Do this only for defined symbols. At link type, the static
15225 linker will simulate the work of dynamic linker of resolving
15226 symbols and will carry over the thumbness of found symbols to
15227 the output symbol table. It's not clear how it happens, but
15228 the thumbness of undefined symbols can well be different at
15229 runtime, and writing '1' for them will be confusing for users
15230 and possibly for dynamic linker itself.
15231 */
15232 newsym.st_value |= 1;
15233 }
15234
15235 src = &newsym;
15236 }
15237 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15238 }
15239
15240 /* Add the PT_ARM_EXIDX program header. */
15241
15242 static bfd_boolean
15243 elf32_arm_modify_segment_map (bfd *abfd,
15244 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15245 {
15246 struct elf_segment_map *m;
15247 asection *sec;
15248
15249 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15250 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15251 {
15252 /* If there is already a PT_ARM_EXIDX header, then we do not
15253 want to add another one. This situation arises when running
15254 "strip"; the input binary already has the header. */
15255 m = elf_tdata (abfd)->segment_map;
15256 while (m && m->p_type != PT_ARM_EXIDX)
15257 m = m->next;
15258 if (!m)
15259 {
15260 m = (struct elf_segment_map *)
15261 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
15262 if (m == NULL)
15263 return FALSE;
15264 m->p_type = PT_ARM_EXIDX;
15265 m->count = 1;
15266 m->sections[0] = sec;
15267
15268 m->next = elf_tdata (abfd)->segment_map;
15269 elf_tdata (abfd)->segment_map = m;
15270 }
15271 }
15272
15273 return TRUE;
15274 }
15275
15276 /* We may add a PT_ARM_EXIDX program header. */
15277
15278 static int
15279 elf32_arm_additional_program_headers (bfd *abfd,
15280 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15281 {
15282 asection *sec;
15283
15284 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15285 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15286 return 1;
15287 else
15288 return 0;
15289 }
15290
15291 /* Hook called by the linker routine which adds symbols from an object
15292 file. */
15293
15294 static bfd_boolean
15295 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15296 Elf_Internal_Sym *sym, const char **namep,
15297 flagword *flagsp, asection **secp, bfd_vma *valp)
15298 {
15299 if ((abfd->flags & DYNAMIC) == 0
15300 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15301 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15302 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
15303
15304 if (elf32_arm_hash_table (info)->vxworks_p
15305 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15306 flagsp, secp, valp))
15307 return FALSE;
15308
15309 return TRUE;
15310 }
15311
15312 /* We use this to override swap_symbol_in and swap_symbol_out. */
15313 const struct elf_size_info elf32_arm_size_info =
15314 {
15315 sizeof (Elf32_External_Ehdr),
15316 sizeof (Elf32_External_Phdr),
15317 sizeof (Elf32_External_Shdr),
15318 sizeof (Elf32_External_Rel),
15319 sizeof (Elf32_External_Rela),
15320 sizeof (Elf32_External_Sym),
15321 sizeof (Elf32_External_Dyn),
15322 sizeof (Elf_External_Note),
15323 4,
15324 1,
15325 32, 2,
15326 ELFCLASS32, EV_CURRENT,
15327 bfd_elf32_write_out_phdrs,
15328 bfd_elf32_write_shdrs_and_ehdr,
15329 bfd_elf32_checksum_contents,
15330 bfd_elf32_write_relocs,
15331 elf32_arm_swap_symbol_in,
15332 elf32_arm_swap_symbol_out,
15333 bfd_elf32_slurp_reloc_table,
15334 bfd_elf32_slurp_symbol_table,
15335 bfd_elf32_swap_dyn_in,
15336 bfd_elf32_swap_dyn_out,
15337 bfd_elf32_swap_reloc_in,
15338 bfd_elf32_swap_reloc_out,
15339 bfd_elf32_swap_reloca_in,
15340 bfd_elf32_swap_reloca_out
15341 };
15342
15343 #define ELF_ARCH bfd_arch_arm
15344 #define ELF_TARGET_ID ARM_ELF_DATA
15345 #define ELF_MACHINE_CODE EM_ARM
15346 #ifdef __QNXTARGET__
15347 #define ELF_MAXPAGESIZE 0x1000
15348 #else
15349 #define ELF_MAXPAGESIZE 0x8000
15350 #endif
15351 #define ELF_MINPAGESIZE 0x1000
15352 #define ELF_COMMONPAGESIZE 0x1000
15353
15354 #define bfd_elf32_mkobject elf32_arm_mkobject
15355
15356 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15357 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
15358 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15359 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15360 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
15361 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
15362 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
15363 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
15364 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
15365 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
15366 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
15367 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
15368 #define bfd_elf32_bfd_final_link elf32_arm_final_link
15369
15370 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15371 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
15372 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
15373 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15374 #define elf_backend_check_relocs elf32_arm_check_relocs
15375 #define elf_backend_relocate_section elf32_arm_relocate_section
15376 #define elf_backend_write_section elf32_arm_write_section
15377 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
15378 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
15379 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15380 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15381 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
15382 #define elf_backend_always_size_sections elf32_arm_always_size_sections
15383 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
15384 #define elf_backend_post_process_headers elf32_arm_post_process_headers
15385 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
15386 #define elf_backend_object_p elf32_arm_object_p
15387 #define elf_backend_fake_sections elf32_arm_fake_sections
15388 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
15389 #define elf_backend_final_write_processing elf32_arm_final_write_processing
15390 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
15391 #define elf_backend_size_info elf32_arm_size_info
15392 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15393 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15394 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15395 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
15396 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
15397
15398 #define elf_backend_can_refcount 1
15399 #define elf_backend_can_gc_sections 1
15400 #define elf_backend_plt_readonly 1
15401 #define elf_backend_want_got_plt 1
15402 #define elf_backend_want_plt_sym 0
15403 #define elf_backend_may_use_rel_p 1
15404 #define elf_backend_may_use_rela_p 0
15405 #define elf_backend_default_use_rela_p 0
15406
15407 #define elf_backend_got_header_size 12
15408
15409 #undef elf_backend_obj_attrs_vendor
15410 #define elf_backend_obj_attrs_vendor "aeabi"
15411 #undef elf_backend_obj_attrs_section
15412 #define elf_backend_obj_attrs_section ".ARM.attributes"
15413 #undef elf_backend_obj_attrs_arg_type
15414 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15415 #undef elf_backend_obj_attrs_section_type
15416 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
15417 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15418 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
15419
15420 #include "elf32-target.h"
15421
15422 /* VxWorks Targets. */
15423
15424 #undef TARGET_LITTLE_SYM
15425 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
15426 #undef TARGET_LITTLE_NAME
15427 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
15428 #undef TARGET_BIG_SYM
15429 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
15430 #undef TARGET_BIG_NAME
15431 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15432
15433 /* Like elf32_arm_link_hash_table_create -- but overrides
15434 appropriately for VxWorks. */
15435
15436 static struct bfd_link_hash_table *
15437 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15438 {
15439 struct bfd_link_hash_table *ret;
15440
15441 ret = elf32_arm_link_hash_table_create (abfd);
15442 if (ret)
15443 {
15444 struct elf32_arm_link_hash_table *htab
15445 = (struct elf32_arm_link_hash_table *) ret;
15446 htab->use_rel = 0;
15447 htab->vxworks_p = 1;
15448 }
15449 return ret;
15450 }
15451
15452 static void
15453 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15454 {
15455 elf32_arm_final_write_processing (abfd, linker);
15456 elf_vxworks_final_write_processing (abfd, linker);
15457 }
15458
15459 #undef elf32_bed
15460 #define elf32_bed elf32_arm_vxworks_bed
15461
15462 #undef bfd_elf32_bfd_link_hash_table_create
15463 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
15464 #undef elf_backend_final_write_processing
15465 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15466 #undef elf_backend_emit_relocs
15467 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
15468
15469 #undef elf_backend_may_use_rel_p
15470 #define elf_backend_may_use_rel_p 0
15471 #undef elf_backend_may_use_rela_p
15472 #define elf_backend_may_use_rela_p 1
15473 #undef elf_backend_default_use_rela_p
15474 #define elf_backend_default_use_rela_p 1
15475 #undef elf_backend_want_plt_sym
15476 #define elf_backend_want_plt_sym 1
15477 #undef ELF_MAXPAGESIZE
15478 #define ELF_MAXPAGESIZE 0x1000
15479
15480 #include "elf32-target.h"
15481
15482
15483 /* Merge backend specific data from an object file to the output
15484 object file when linking. */
15485
15486 static bfd_boolean
15487 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15488 {
15489 flagword out_flags;
15490 flagword in_flags;
15491 bfd_boolean flags_compatible = TRUE;
15492 asection *sec;
15493
15494 /* Check if we have the same endianness. */
15495 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15496 return FALSE;
15497
15498 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15499 return TRUE;
15500
15501 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15502 return FALSE;
15503
15504 /* The input BFD must have had its flags initialised. */
15505 /* The following seems bogus to me -- The flags are initialized in
15506 the assembler but I don't think an elf_flags_init field is
15507 written into the object. */
15508 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15509
15510 in_flags = elf_elfheader (ibfd)->e_flags;
15511 out_flags = elf_elfheader (obfd)->e_flags;
15512
15513 /* In theory there is no reason why we couldn't handle this. However
15514 in practice it isn't even close to working and there is no real
15515 reason to want it. */
15516 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15517 && !(ibfd->flags & DYNAMIC)
15518 && (in_flags & EF_ARM_BE8))
15519 {
15520 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15521 ibfd);
15522 return FALSE;
15523 }
15524
15525 if (!elf_flags_init (obfd))
15526 {
15527 /* If the input is the default architecture and had the default
15528 flags then do not bother setting the flags for the output
15529 architecture, instead allow future merges to do this. If no
15530 future merges ever set these flags then they will retain their
15531 uninitialised values, which surprise surprise, correspond
15532 to the default values. */
15533 if (bfd_get_arch_info (ibfd)->the_default
15534 && elf_elfheader (ibfd)->e_flags == 0)
15535 return TRUE;
15536
15537 elf_flags_init (obfd) = TRUE;
15538 elf_elfheader (obfd)->e_flags = in_flags;
15539
15540 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
15541 && bfd_get_arch_info (obfd)->the_default)
15542 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
15543
15544 return TRUE;
15545 }
15546
15547 /* Determine what should happen if the input ARM architecture
15548 does not match the output ARM architecture. */
15549 if (! bfd_arm_merge_machines (ibfd, obfd))
15550 return FALSE;
15551
15552 /* Identical flags must be compatible. */
15553 if (in_flags == out_flags)
15554 return TRUE;
15555
15556 /* Check to see if the input BFD actually contains any sections. If
15557 not, its flags may not have been initialised either, but it
15558 cannot actually cause any incompatiblity. Do not short-circuit
15559 dynamic objects; their section list may be emptied by
15560 elf_link_add_object_symbols.
15561
15562 Also check to see if there are no code sections in the input.
15563 In this case there is no need to check for code specific flags.
15564 XXX - do we need to worry about floating-point format compatability
15565 in data sections ? */
15566 if (!(ibfd->flags & DYNAMIC))
15567 {
15568 bfd_boolean null_input_bfd = TRUE;
15569 bfd_boolean only_data_sections = TRUE;
15570
15571 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
15572 {
15573 /* Ignore synthetic glue sections. */
15574 if (strcmp (sec->name, ".glue_7")
15575 && strcmp (sec->name, ".glue_7t"))
15576 {
15577 if ((bfd_get_section_flags (ibfd, sec)
15578 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15579 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15580 only_data_sections = FALSE;
15581
15582 null_input_bfd = FALSE;
15583 break;
15584 }
15585 }
15586
15587 if (null_input_bfd || only_data_sections)
15588 return TRUE;
15589 }
15590
15591 /* Complain about various flag mismatches. */
15592 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
15593 EF_ARM_EABI_VERSION (out_flags)))
15594 {
15595 _bfd_error_handler
15596 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
15597 ibfd, obfd,
15598 (in_flags & EF_ARM_EABIMASK) >> 24,
15599 (out_flags & EF_ARM_EABIMASK) >> 24);
15600 return FALSE;
15601 }
15602
15603 /* Not sure what needs to be checked for EABI versions >= 1. */
15604 /* VxWorks libraries do not use these flags. */
15605 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
15606 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
15607 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
15608 {
15609 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
15610 {
15611 _bfd_error_handler
15612 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
15613 ibfd, obfd,
15614 in_flags & EF_ARM_APCS_26 ? 26 : 32,
15615 out_flags & EF_ARM_APCS_26 ? 26 : 32);
15616 flags_compatible = FALSE;
15617 }
15618
15619 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
15620 {
15621 if (in_flags & EF_ARM_APCS_FLOAT)
15622 _bfd_error_handler
15623 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
15624 ibfd, obfd);
15625 else
15626 _bfd_error_handler
15627 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
15628 ibfd, obfd);
15629
15630 flags_compatible = FALSE;
15631 }
15632
15633 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
15634 {
15635 if (in_flags & EF_ARM_VFP_FLOAT)
15636 _bfd_error_handler
15637 (_("error: %B uses VFP instructions, whereas %B does not"),
15638 ibfd, obfd);
15639 else
15640 _bfd_error_handler
15641 (_("error: %B uses FPA instructions, whereas %B does not"),
15642 ibfd, obfd);
15643
15644 flags_compatible = FALSE;
15645 }
15646
15647 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
15648 {
15649 if (in_flags & EF_ARM_MAVERICK_FLOAT)
15650 _bfd_error_handler
15651 (_("error: %B uses Maverick instructions, whereas %B does not"),
15652 ibfd, obfd);
15653 else
15654 _bfd_error_handler
15655 (_("error: %B does not use Maverick instructions, whereas %B does"),
15656 ibfd, obfd);
15657
15658 flags_compatible = FALSE;
15659 }
15660
15661 #ifdef EF_ARM_SOFT_FLOAT
15662 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
15663 {
15664 /* We can allow interworking between code that is VFP format
15665 layout, and uses either soft float or integer regs for
15666 passing floating point arguments and results. We already
15667 know that the APCS_FLOAT flags match; similarly for VFP
15668 flags. */
15669 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
15670 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
15671 {
15672 if (in_flags & EF_ARM_SOFT_FLOAT)
15673 _bfd_error_handler
15674 (_("error: %B uses software FP, whereas %B uses hardware FP"),
15675 ibfd, obfd);
15676 else
15677 _bfd_error_handler
15678 (_("error: %B uses hardware FP, whereas %B uses software FP"),
15679 ibfd, obfd);
15680
15681 flags_compatible = FALSE;
15682 }
15683 }
15684 #endif
15685
15686 /* Interworking mismatch is only a warning. */
15687 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
15688 {
15689 if (in_flags & EF_ARM_INTERWORK)
15690 {
15691 _bfd_error_handler
15692 (_("Warning: %B supports interworking, whereas %B does not"),
15693 ibfd, obfd);
15694 }
15695 else
15696 {
15697 _bfd_error_handler
15698 (_("Warning: %B does not support interworking, whereas %B does"),
15699 ibfd, obfd);
15700 }
15701 }
15702 }
15703
15704 return flags_compatible;
15705 }
15706
15707
15708 /* Symbian OS Targets. */
15709
15710 #undef TARGET_LITTLE_SYM
15711 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
15712 #undef TARGET_LITTLE_NAME
15713 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
15714 #undef TARGET_BIG_SYM
15715 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
15716 #undef TARGET_BIG_NAME
15717 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
15718
15719 /* Like elf32_arm_link_hash_table_create -- but overrides
15720 appropriately for Symbian OS. */
15721
15722 static struct bfd_link_hash_table *
15723 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
15724 {
15725 struct bfd_link_hash_table *ret;
15726
15727 ret = elf32_arm_link_hash_table_create (abfd);
15728 if (ret)
15729 {
15730 struct elf32_arm_link_hash_table *htab
15731 = (struct elf32_arm_link_hash_table *)ret;
15732 /* There is no PLT header for Symbian OS. */
15733 htab->plt_header_size = 0;
15734 /* The PLT entries are each one instruction and one word. */
15735 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
15736 htab->symbian_p = 1;
15737 /* Symbian uses armv5t or above, so use_blx is always true. */
15738 htab->use_blx = 1;
15739 htab->root.is_relocatable_executable = 1;
15740 }
15741 return ret;
15742 }
15743
15744 static const struct bfd_elf_special_section
15745 elf32_arm_symbian_special_sections[] =
15746 {
15747 /* In a BPABI executable, the dynamic linking sections do not go in
15748 the loadable read-only segment. The post-linker may wish to
15749 refer to these sections, but they are not part of the final
15750 program image. */
15751 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
15752 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
15753 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
15754 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
15755 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
15756 /* These sections do not need to be writable as the SymbianOS
15757 postlinker will arrange things so that no dynamic relocation is
15758 required. */
15759 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
15760 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
15761 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
15762 { NULL, 0, 0, 0, 0 }
15763 };
15764
15765 static void
15766 elf32_arm_symbian_begin_write_processing (bfd *abfd,
15767 struct bfd_link_info *link_info)
15768 {
15769 /* BPABI objects are never loaded directly by an OS kernel; they are
15770 processed by a postlinker first, into an OS-specific format. If
15771 the D_PAGED bit is set on the file, BFD will align segments on
15772 page boundaries, so that an OS can directly map the file. With
15773 BPABI objects, that just results in wasted space. In addition,
15774 because we clear the D_PAGED bit, map_sections_to_segments will
15775 recognize that the program headers should not be mapped into any
15776 loadable segment. */
15777 abfd->flags &= ~D_PAGED;
15778 elf32_arm_begin_write_processing (abfd, link_info);
15779 }
15780
15781 static bfd_boolean
15782 elf32_arm_symbian_modify_segment_map (bfd *abfd,
15783 struct bfd_link_info *info)
15784 {
15785 struct elf_segment_map *m;
15786 asection *dynsec;
15787
15788 /* BPABI shared libraries and executables should have a PT_DYNAMIC
15789 segment. However, because the .dynamic section is not marked
15790 with SEC_LOAD, the generic ELF code will not create such a
15791 segment. */
15792 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
15793 if (dynsec)
15794 {
15795 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
15796 if (m->p_type == PT_DYNAMIC)
15797 break;
15798
15799 if (m == NULL)
15800 {
15801 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
15802 m->next = elf_tdata (abfd)->segment_map;
15803 elf_tdata (abfd)->segment_map = m;
15804 }
15805 }
15806
15807 /* Also call the generic arm routine. */
15808 return elf32_arm_modify_segment_map (abfd, info);
15809 }
15810
15811 /* Return address for Ith PLT stub in section PLT, for relocation REL
15812 or (bfd_vma) -1 if it should not be included. */
15813
15814 static bfd_vma
15815 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
15816 const arelent *rel ATTRIBUTE_UNUSED)
15817 {
15818 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
15819 }
15820
15821
15822 #undef elf32_bed
15823 #define elf32_bed elf32_arm_symbian_bed
15824
15825 /* The dynamic sections are not allocated on SymbianOS; the postlinker
15826 will process them and then discard them. */
15827 #undef ELF_DYNAMIC_SEC_FLAGS
15828 #define ELF_DYNAMIC_SEC_FLAGS \
15829 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
15830
15831 #undef elf_backend_emit_relocs
15832
15833 #undef bfd_elf32_bfd_link_hash_table_create
15834 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
15835 #undef elf_backend_special_sections
15836 #define elf_backend_special_sections elf32_arm_symbian_special_sections
15837 #undef elf_backend_begin_write_processing
15838 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
15839 #undef elf_backend_final_write_processing
15840 #define elf_backend_final_write_processing elf32_arm_final_write_processing
15841
15842 #undef elf_backend_modify_segment_map
15843 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
15844
15845 /* There is no .got section for BPABI objects, and hence no header. */
15846 #undef elf_backend_got_header_size
15847 #define elf_backend_got_header_size 0
15848
15849 /* Similarly, there is no .got.plt section. */
15850 #undef elf_backend_want_got_plt
15851 #define elf_backend_want_got_plt 0
15852
15853 #undef elf_backend_plt_sym_val
15854 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
15855
15856 #undef elf_backend_may_use_rel_p
15857 #define elf_backend_may_use_rel_p 1
15858 #undef elf_backend_may_use_rela_p
15859 #define elf_backend_may_use_rela_p 0
15860 #undef elf_backend_default_use_rela_p
15861 #define elf_backend_default_use_rela_p 0
15862 #undef elf_backend_want_plt_sym
15863 #define elf_backend_want_plt_sym 0
15864 #undef ELF_MAXPAGESIZE
15865 #define ELF_MAXPAGESIZE 0x8000
15866
15867 #include "elf32-target.h"