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* elf32-arm.c (elf32_arm_stub_long_branch_arm_nacl): New variable.
[binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright 1998-2013 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-nacl.h"
30 #include "elf-vxworks.h"
31 #include "elf/arm.h"
32
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
67
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
77 static reloc_howto_type elf32_arm_howto_table_1[] =
78 {
79 /* No relocation. */
80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 0, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
142 32, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
226 HOWTO (R_ARM_THM_CALL, /* type */
227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
229 24, /* bitsize */
230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
254 HOWTO (R_ARM_BREL_ADJ, /* type */
255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
257 32, /* bitsize */
258 FALSE, /* pc_relative */
259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
267
268 HOWTO (R_ARM_TLS_DESC, /* type */
269 0, /* rightshift */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
272 FALSE, /* pc_relative */
273 0, /* bitpos */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
300 24, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 24, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* Dynamic TLS relocations. */
327
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
341
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
355
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
413
414 HOWTO (R_ARM_RELATIVE, /* type */
415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
427
428 HOWTO (R_ARM_GOTOFF32, /* type */
429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
441
442 HOWTO (R_ARM_GOTPC, /* type */
443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
455
456 HOWTO (R_ARM_GOT32, /* type */
457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
469
470 HOWTO (R_ARM_PLT32, /* type */
471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
517 0, /* bitpos */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
525
526 HOWTO (R_ARM_BASE_ABS, /* type */
527 0, /* rightshift */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
892
893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
1274
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1544
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1573
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1587
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 bfd_elf_generic_reloc, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1615
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
1621 0, /* bitpos */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1629
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
1635 0, /* bitpos */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1643
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
1649 0, /* bitpos */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1657
1658 /* 112-127 private relocations. */
1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
1675
1676 /* R_ARM_ME_TOO, obsolete. */
1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1692 };
1693
1694 /* 160 onwards: */
1695 static reloc_howto_type elf32_arm_howto_table_2[1] =
1696 {
1697 HOWTO (R_ARM_IRELATIVE, /* type */
1698 0, /* rightshift */
1699 2, /* size (0 = byte, 1 = short, 2 = long) */
1700 32, /* bitsize */
1701 FALSE, /* pc_relative */
1702 0, /* bitpos */
1703 complain_overflow_bitfield,/* complain_on_overflow */
1704 bfd_elf_generic_reloc, /* special_function */
1705 "R_ARM_IRELATIVE", /* name */
1706 TRUE, /* partial_inplace */
1707 0xffffffff, /* src_mask */
1708 0xffffffff, /* dst_mask */
1709 FALSE) /* pcrel_offset */
1710 };
1711
1712 /* 249-255 extended, currently unused, relocations: */
1713 static reloc_howto_type elf32_arm_howto_table_3[4] =
1714 {
1715 HOWTO (R_ARM_RREL32, /* type */
1716 0, /* rightshift */
1717 0, /* size (0 = byte, 1 = short, 2 = long) */
1718 0, /* bitsize */
1719 FALSE, /* pc_relative */
1720 0, /* bitpos */
1721 complain_overflow_dont,/* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 "R_ARM_RREL32", /* name */
1724 FALSE, /* partial_inplace */
1725 0, /* src_mask */
1726 0, /* dst_mask */
1727 FALSE), /* pcrel_offset */
1728
1729 HOWTO (R_ARM_RABS32, /* type */
1730 0, /* rightshift */
1731 0, /* size (0 = byte, 1 = short, 2 = long) */
1732 0, /* bitsize */
1733 FALSE, /* pc_relative */
1734 0, /* bitpos */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_ARM_RABS32", /* name */
1738 FALSE, /* partial_inplace */
1739 0, /* src_mask */
1740 0, /* dst_mask */
1741 FALSE), /* pcrel_offset */
1742
1743 HOWTO (R_ARM_RPC24, /* type */
1744 0, /* rightshift */
1745 0, /* size (0 = byte, 1 = short, 2 = long) */
1746 0, /* bitsize */
1747 FALSE, /* pc_relative */
1748 0, /* bitpos */
1749 complain_overflow_dont,/* complain_on_overflow */
1750 bfd_elf_generic_reloc, /* special_function */
1751 "R_ARM_RPC24", /* name */
1752 FALSE, /* partial_inplace */
1753 0, /* src_mask */
1754 0, /* dst_mask */
1755 FALSE), /* pcrel_offset */
1756
1757 HOWTO (R_ARM_RBASE, /* type */
1758 0, /* rightshift */
1759 0, /* size (0 = byte, 1 = short, 2 = long) */
1760 0, /* bitsize */
1761 FALSE, /* pc_relative */
1762 0, /* bitpos */
1763 complain_overflow_dont,/* complain_on_overflow */
1764 bfd_elf_generic_reloc, /* special_function */
1765 "R_ARM_RBASE", /* name */
1766 FALSE, /* partial_inplace */
1767 0, /* src_mask */
1768 0, /* dst_mask */
1769 FALSE) /* pcrel_offset */
1770 };
1771
1772 static reloc_howto_type *
1773 elf32_arm_howto_from_type (unsigned int r_type)
1774 {
1775 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1776 return &elf32_arm_howto_table_1[r_type];
1777
1778 if (r_type == R_ARM_IRELATIVE)
1779 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1780
1781 if (r_type >= R_ARM_RREL32
1782 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1783 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1784
1785 return NULL;
1786 }
1787
1788 static void
1789 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1790 Elf_Internal_Rela * elf_reloc)
1791 {
1792 unsigned int r_type;
1793
1794 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1795 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1796 }
1797
1798 struct elf32_arm_reloc_map
1799 {
1800 bfd_reloc_code_real_type bfd_reloc_val;
1801 unsigned char elf_reloc_val;
1802 };
1803
1804 /* All entries in this list must also be present in elf32_arm_howto_table. */
1805 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1806 {
1807 {BFD_RELOC_NONE, R_ARM_NONE},
1808 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1809 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1810 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1811 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1812 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1813 {BFD_RELOC_32, R_ARM_ABS32},
1814 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1815 {BFD_RELOC_8, R_ARM_ABS8},
1816 {BFD_RELOC_16, R_ARM_ABS16},
1817 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1818 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1823 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1824 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1825 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1826 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1827 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1828 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1829 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1830 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1831 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1832 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1833 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1834 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1835 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1836 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1837 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1838 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1839 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1840 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1841 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1842 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1843 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1844 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1845 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1846 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1847 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1848 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1849 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1850 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1851 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1852 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1853 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1854 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1855 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1856 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1858 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1860 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1861 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1862 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1863 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1864 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1865 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1866 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1867 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1868 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1869 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1870 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1871 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1872 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1873 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1874 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1875 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1876 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1877 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1878 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1879 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1880 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1881 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1882 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1883 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1884 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1885 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1886 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1887 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1888 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1889 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1890 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1891 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1892 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
1893 };
1894
1895 static reloc_howto_type *
1896 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1897 bfd_reloc_code_real_type code)
1898 {
1899 unsigned int i;
1900
1901 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1902 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1903 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1904
1905 return NULL;
1906 }
1907
1908 static reloc_howto_type *
1909 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1910 const char *r_name)
1911 {
1912 unsigned int i;
1913
1914 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1915 if (elf32_arm_howto_table_1[i].name != NULL
1916 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1917 return &elf32_arm_howto_table_1[i];
1918
1919 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1920 if (elf32_arm_howto_table_2[i].name != NULL
1921 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1922 return &elf32_arm_howto_table_2[i];
1923
1924 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1925 if (elf32_arm_howto_table_3[i].name != NULL
1926 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1927 return &elf32_arm_howto_table_3[i];
1928
1929 return NULL;
1930 }
1931
1932 /* Support for core dump NOTE sections. */
1933
1934 static bfd_boolean
1935 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1936 {
1937 int offset;
1938 size_t size;
1939
1940 switch (note->descsz)
1941 {
1942 default:
1943 return FALSE;
1944
1945 case 148: /* Linux/ARM 32-bit. */
1946 /* pr_cursig */
1947 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
1948
1949 /* pr_pid */
1950 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
1951
1952 /* pr_reg */
1953 offset = 72;
1954 size = 72;
1955
1956 break;
1957 }
1958
1959 /* Make a ".reg/999" section. */
1960 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1961 size, note->descpos + offset);
1962 }
1963
1964 static bfd_boolean
1965 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
1966 {
1967 switch (note->descsz)
1968 {
1969 default:
1970 return FALSE;
1971
1972 case 124: /* Linux/ARM elf_prpsinfo. */
1973 elf_tdata (abfd)->core->pid
1974 = bfd_get_32 (abfd, note->descdata + 12);
1975 elf_tdata (abfd)->core->program
1976 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1977 elf_tdata (abfd)->core->command
1978 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1979 }
1980
1981 /* Note that for some reason, a spurious space is tacked
1982 onto the end of the args in some (at least one anyway)
1983 implementations, so strip it off if it exists. */
1984 {
1985 char *command = elf_tdata (abfd)->core->command;
1986 int n = strlen (command);
1987
1988 if (0 < n && command[n - 1] == ' ')
1989 command[n - 1] = '\0';
1990 }
1991
1992 return TRUE;
1993 }
1994
1995 static char *
1996 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1997 int note_type, ...)
1998 {
1999 switch (note_type)
2000 {
2001 default:
2002 return NULL;
2003
2004 case NT_PRPSINFO:
2005 {
2006 char data[124];
2007 va_list ap;
2008
2009 va_start (ap, note_type);
2010 memset (data, 0, sizeof (data));
2011 strncpy (data + 28, va_arg (ap, const char *), 16);
2012 strncpy (data + 44, va_arg (ap, const char *), 80);
2013 va_end (ap);
2014
2015 return elfcore_write_note (abfd, buf, bufsiz,
2016 "CORE", note_type, data, sizeof (data));
2017 }
2018
2019 case NT_PRSTATUS:
2020 {
2021 char data[148];
2022 va_list ap;
2023 long pid;
2024 int cursig;
2025 const void *greg;
2026
2027 va_start (ap, note_type);
2028 memset (data, 0, sizeof (data));
2029 pid = va_arg (ap, long);
2030 bfd_put_32 (abfd, pid, data + 24);
2031 cursig = va_arg (ap, int);
2032 bfd_put_16 (abfd, cursig, data + 12);
2033 greg = va_arg (ap, const void *);
2034 memcpy (data + 72, greg, 72);
2035 va_end (ap);
2036
2037 return elfcore_write_note (abfd, buf, bufsiz,
2038 "CORE", note_type, data, sizeof (data));
2039 }
2040 }
2041 }
2042
2043 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2044 #define TARGET_LITTLE_NAME "elf32-littlearm"
2045 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2046 #define TARGET_BIG_NAME "elf32-bigarm"
2047
2048 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2049 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2050 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2051
2052 typedef unsigned long int insn32;
2053 typedef unsigned short int insn16;
2054
2055 /* In lieu of proper flags, assume all EABIv4 or later objects are
2056 interworkable. */
2057 #define INTERWORK_FLAG(abfd) \
2058 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2059 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2060 || ((abfd)->flags & BFD_LINKER_CREATED))
2061
2062 /* The linker script knows the section names for placement.
2063 The entry_names are used to do simple name mangling on the stubs.
2064 Given a function name, and its type, the stub can be found. The
2065 name can be changed. The only requirement is the %s be present. */
2066 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2067 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2068
2069 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2070 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2071
2072 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2073 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2074
2075 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2076 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2077
2078 #define STUB_ENTRY_NAME "__%s_veneer"
2079
2080 /* The name of the dynamic interpreter. This is put in the .interp
2081 section. */
2082 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2083
2084 static const unsigned long tls_trampoline [] =
2085 {
2086 0xe08e0000, /* add r0, lr, r0 */
2087 0xe5901004, /* ldr r1, [r0,#4] */
2088 0xe12fff11, /* bx r1 */
2089 };
2090
2091 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2092 {
2093 0xe52d2004, /* push {r2} */
2094 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2095 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2096 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2097 0xe081100f, /* 2: add r1, pc */
2098 0xe12fff12, /* bx r2 */
2099 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2100 + dl_tlsdesc_lazy_resolver(GOT) */
2101 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2102 };
2103
2104 #ifdef FOUR_WORD_PLT
2105
2106 /* The first entry in a procedure linkage table looks like
2107 this. It is set up so that any shared library function that is
2108 called before the relocation has been set up calls the dynamic
2109 linker first. */
2110 static const bfd_vma elf32_arm_plt0_entry [] =
2111 {
2112 0xe52de004, /* str lr, [sp, #-4]! */
2113 0xe59fe010, /* ldr lr, [pc, #16] */
2114 0xe08fe00e, /* add lr, pc, lr */
2115 0xe5bef008, /* ldr pc, [lr, #8]! */
2116 };
2117
2118 /* Subsequent entries in a procedure linkage table look like
2119 this. */
2120 static const bfd_vma elf32_arm_plt_entry [] =
2121 {
2122 0xe28fc600, /* add ip, pc, #NN */
2123 0xe28cca00, /* add ip, ip, #NN */
2124 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2125 0x00000000, /* unused */
2126 };
2127
2128 #else
2129
2130 /* The first entry in a procedure linkage table looks like
2131 this. It is set up so that any shared library function that is
2132 called before the relocation has been set up calls the dynamic
2133 linker first. */
2134 static const bfd_vma elf32_arm_plt0_entry [] =
2135 {
2136 0xe52de004, /* str lr, [sp, #-4]! */
2137 0xe59fe004, /* ldr lr, [pc, #4] */
2138 0xe08fe00e, /* add lr, pc, lr */
2139 0xe5bef008, /* ldr pc, [lr, #8]! */
2140 0x00000000, /* &GOT[0] - . */
2141 };
2142
2143 /* Subsequent entries in a procedure linkage table look like
2144 this. */
2145 static const bfd_vma elf32_arm_plt_entry [] =
2146 {
2147 0xe28fc600, /* add ip, pc, #0xNN00000 */
2148 0xe28cca00, /* add ip, ip, #0xNN000 */
2149 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2150 };
2151
2152 #endif
2153
2154 /* The format of the first entry in the procedure linkage table
2155 for a VxWorks executable. */
2156 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2157 {
2158 0xe52dc008, /* str ip,[sp,#-8]! */
2159 0xe59fc000, /* ldr ip,[pc] */
2160 0xe59cf008, /* ldr pc,[ip,#8] */
2161 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2162 };
2163
2164 /* The format of subsequent entries in a VxWorks executable. */
2165 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2166 {
2167 0xe59fc000, /* ldr ip,[pc] */
2168 0xe59cf000, /* ldr pc,[ip] */
2169 0x00000000, /* .long @got */
2170 0xe59fc000, /* ldr ip,[pc] */
2171 0xea000000, /* b _PLT */
2172 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2173 };
2174
2175 /* The format of entries in a VxWorks shared library. */
2176 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2177 {
2178 0xe59fc000, /* ldr ip,[pc] */
2179 0xe79cf009, /* ldr pc,[ip,r9] */
2180 0x00000000, /* .long @got */
2181 0xe59fc000, /* ldr ip,[pc] */
2182 0xe599f008, /* ldr pc,[r9,#8] */
2183 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2184 };
2185
2186 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2187 #define PLT_THUMB_STUB_SIZE 4
2188 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2189 {
2190 0x4778, /* bx pc */
2191 0x46c0 /* nop */
2192 };
2193
2194 /* The entries in a PLT when using a DLL-based target with multiple
2195 address spaces. */
2196 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2197 {
2198 0xe51ff004, /* ldr pc, [pc, #-4] */
2199 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2200 };
2201
2202 /* The first entry in a procedure linkage table looks like
2203 this. It is set up so that any shared library function that is
2204 called before the relocation has been set up calls the dynamic
2205 linker first. */
2206 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2207 {
2208 /* First bundle: */
2209 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2210 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2211 0xe08cc00f, /* add ip, ip, pc */
2212 0xe52dc008, /* str ip, [sp, #-8]! */
2213 /* Second bundle: */
2214 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2215 0xe59cc000, /* ldr ip, [ip] */
2216 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2217 0xe12fff1c, /* bx ip */
2218 /* Third bundle: */
2219 0xe320f000, /* nop */
2220 0xe320f000, /* nop */
2221 0xe320f000, /* nop */
2222 /* .Lplt_tail: */
2223 0xe50dc004, /* str ip, [sp, #-4] */
2224 /* Fourth bundle: */
2225 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2226 0xe59cc000, /* ldr ip, [ip] */
2227 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2228 0xe12fff1c, /* bx ip */
2229 };
2230 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2231
2232 /* Subsequent entries in a procedure linkage table look like this. */
2233 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2234 {
2235 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2236 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2237 0xe08cc00f, /* add ip, ip, pc */
2238 0xea000000, /* b .Lplt_tail */
2239 };
2240
2241 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2242 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2243 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2244 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2245 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2246 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2247
2248 enum stub_insn_type
2249 {
2250 THUMB16_TYPE = 1,
2251 THUMB32_TYPE,
2252 ARM_TYPE,
2253 DATA_TYPE
2254 };
2255
2256 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2257 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2258 is inserted in arm_build_one_stub(). */
2259 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2260 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2261 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2262 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2263 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2264 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2265
2266 typedef struct
2267 {
2268 bfd_vma data;
2269 enum stub_insn_type type;
2270 unsigned int r_type;
2271 int reloc_addend;
2272 } insn_sequence;
2273
2274 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2275 to reach the stub if necessary. */
2276 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2277 {
2278 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2279 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2280 };
2281
2282 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2283 available. */
2284 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2285 {
2286 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2287 ARM_INSN (0xe12fff1c), /* bx ip */
2288 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2289 };
2290
2291 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2292 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2293 {
2294 THUMB16_INSN (0xb401), /* push {r0} */
2295 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2296 THUMB16_INSN (0x4684), /* mov ip, r0 */
2297 THUMB16_INSN (0xbc01), /* pop {r0} */
2298 THUMB16_INSN (0x4760), /* bx ip */
2299 THUMB16_INSN (0xbf00), /* nop */
2300 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2301 };
2302
2303 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2304 allowed. */
2305 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2306 {
2307 THUMB16_INSN (0x4778), /* bx pc */
2308 THUMB16_INSN (0x46c0), /* nop */
2309 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2310 ARM_INSN (0xe12fff1c), /* bx ip */
2311 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2312 };
2313
2314 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2315 available. */
2316 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2317 {
2318 THUMB16_INSN (0x4778), /* bx pc */
2319 THUMB16_INSN (0x46c0), /* nop */
2320 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2321 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2322 };
2323
2324 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2325 one, when the destination is close enough. */
2326 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2327 {
2328 THUMB16_INSN (0x4778), /* bx pc */
2329 THUMB16_INSN (0x46c0), /* nop */
2330 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2331 };
2332
2333 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2334 blx to reach the stub if necessary. */
2335 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2336 {
2337 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2338 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2339 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2340 };
2341
2342 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2343 blx to reach the stub if necessary. We can not add into pc;
2344 it is not guaranteed to mode switch (different in ARMv6 and
2345 ARMv7). */
2346 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2347 {
2348 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2349 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2350 ARM_INSN (0xe12fff1c), /* bx ip */
2351 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2352 };
2353
2354 /* V4T ARM -> ARM long branch stub, PIC. */
2355 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2356 {
2357 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2358 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2359 ARM_INSN (0xe12fff1c), /* bx ip */
2360 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2361 };
2362
2363 /* V4T Thumb -> ARM long branch stub, PIC. */
2364 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2365 {
2366 THUMB16_INSN (0x4778), /* bx pc */
2367 THUMB16_INSN (0x46c0), /* nop */
2368 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2369 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2370 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2371 };
2372
2373 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2374 architectures. */
2375 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2376 {
2377 THUMB16_INSN (0xb401), /* push {r0} */
2378 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2379 THUMB16_INSN (0x46fc), /* mov ip, pc */
2380 THUMB16_INSN (0x4484), /* add ip, r0 */
2381 THUMB16_INSN (0xbc01), /* pop {r0} */
2382 THUMB16_INSN (0x4760), /* bx ip */
2383 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2384 };
2385
2386 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2387 allowed. */
2388 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2389 {
2390 THUMB16_INSN (0x4778), /* bx pc */
2391 THUMB16_INSN (0x46c0), /* nop */
2392 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2393 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2394 ARM_INSN (0xe12fff1c), /* bx ip */
2395 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2396 };
2397
2398 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2399 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2400 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2401 {
2402 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2403 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2404 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2405 };
2406
2407 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2408 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2409 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2410 {
2411 THUMB16_INSN (0x4778), /* bx pc */
2412 THUMB16_INSN (0x46c0), /* nop */
2413 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2414 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2415 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2416 };
2417
2418 /* NaCl ARM -> ARM long branch stub. */
2419 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2420 {
2421 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2422 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2423 ARM_INSN (0xe12fff1c), /* bx ip */
2424 ARM_INSN (0xe320f000), /* nop */
2425 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2426 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2427 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2428 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2429 };
2430
2431 /* NaCl ARM -> ARM long branch stub, PIC. */
2432 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2433 {
2434 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2435 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2436 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2437 ARM_INSN (0xe12fff1c), /* bx ip */
2438 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2439 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2440 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2441 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2442 };
2443
2444
2445 /* Cortex-A8 erratum-workaround stubs. */
2446
2447 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2448 can't use a conditional branch to reach this stub). */
2449
2450 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2451 {
2452 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2453 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2454 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2455 };
2456
2457 /* Stub used for b.w and bl.w instructions. */
2458
2459 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2460 {
2461 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2462 };
2463
2464 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2465 {
2466 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2467 };
2468
2469 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2470 instruction (which switches to ARM mode) to point to this stub. Jump to the
2471 real destination using an ARM-mode branch. */
2472
2473 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2474 {
2475 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2476 };
2477
2478 /* For each section group there can be a specially created linker section
2479 to hold the stubs for that group. The name of the stub section is based
2480 upon the name of another section within that group with the suffix below
2481 applied.
2482
2483 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2484 create what appeared to be a linker stub section when it actually
2485 contained user code/data. For example, consider this fragment:
2486
2487 const char * stubborn_problems[] = { "np" };
2488
2489 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2490 section called:
2491
2492 .data.rel.local.stubborn_problems
2493
2494 This then causes problems in arm32_arm_build_stubs() as it triggers:
2495
2496 // Ignore non-stub sections.
2497 if (!strstr (stub_sec->name, STUB_SUFFIX))
2498 continue;
2499
2500 And so the section would be ignored instead of being processed. Hence
2501 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2502 C identifier. */
2503 #define STUB_SUFFIX ".__stub"
2504
2505 /* One entry per long/short branch stub defined above. */
2506 #define DEF_STUBS \
2507 DEF_STUB(long_branch_any_any) \
2508 DEF_STUB(long_branch_v4t_arm_thumb) \
2509 DEF_STUB(long_branch_thumb_only) \
2510 DEF_STUB(long_branch_v4t_thumb_thumb) \
2511 DEF_STUB(long_branch_v4t_thumb_arm) \
2512 DEF_STUB(short_branch_v4t_thumb_arm) \
2513 DEF_STUB(long_branch_any_arm_pic) \
2514 DEF_STUB(long_branch_any_thumb_pic) \
2515 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2516 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2517 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2518 DEF_STUB(long_branch_thumb_only_pic) \
2519 DEF_STUB(long_branch_any_tls_pic) \
2520 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2521 DEF_STUB(long_branch_arm_nacl) \
2522 DEF_STUB(long_branch_arm_nacl_pic) \
2523 DEF_STUB(a8_veneer_b_cond) \
2524 DEF_STUB(a8_veneer_b) \
2525 DEF_STUB(a8_veneer_bl) \
2526 DEF_STUB(a8_veneer_blx)
2527
2528 #define DEF_STUB(x) arm_stub_##x,
2529 enum elf32_arm_stub_type
2530 {
2531 arm_stub_none,
2532 DEF_STUBS
2533 /* Note the first a8_veneer type */
2534 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
2535 };
2536 #undef DEF_STUB
2537
2538 typedef struct
2539 {
2540 const insn_sequence* template_sequence;
2541 int template_size;
2542 } stub_def;
2543
2544 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2545 static const stub_def stub_definitions[] =
2546 {
2547 {NULL, 0},
2548 DEF_STUBS
2549 };
2550
2551 struct elf32_arm_stub_hash_entry
2552 {
2553 /* Base hash table entry structure. */
2554 struct bfd_hash_entry root;
2555
2556 /* The stub section. */
2557 asection *stub_sec;
2558
2559 /* Offset within stub_sec of the beginning of this stub. */
2560 bfd_vma stub_offset;
2561
2562 /* Given the symbol's value and its section we can determine its final
2563 value when building the stubs (so the stub knows where to jump). */
2564 bfd_vma target_value;
2565 asection *target_section;
2566
2567 /* Offset to apply to relocation referencing target_value. */
2568 bfd_vma target_addend;
2569
2570 /* The instruction which caused this stub to be generated (only valid for
2571 Cortex-A8 erratum workaround stubs at present). */
2572 unsigned long orig_insn;
2573
2574 /* The stub type. */
2575 enum elf32_arm_stub_type stub_type;
2576 /* Its encoding size in bytes. */
2577 int stub_size;
2578 /* Its template. */
2579 const insn_sequence *stub_template;
2580 /* The size of the template (number of entries). */
2581 int stub_template_size;
2582
2583 /* The symbol table entry, if any, that this was derived from. */
2584 struct elf32_arm_link_hash_entry *h;
2585
2586 /* Type of branch. */
2587 enum arm_st_branch_type branch_type;
2588
2589 /* Where this stub is being called from, or, in the case of combined
2590 stub sections, the first input section in the group. */
2591 asection *id_sec;
2592
2593 /* The name for the local symbol at the start of this stub. The
2594 stub name in the hash table has to be unique; this does not, so
2595 it can be friendlier. */
2596 char *output_name;
2597 };
2598
2599 /* Used to build a map of a section. This is required for mixed-endian
2600 code/data. */
2601
2602 typedef struct elf32_elf_section_map
2603 {
2604 bfd_vma vma;
2605 char type;
2606 }
2607 elf32_arm_section_map;
2608
2609 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2610
2611 typedef enum
2612 {
2613 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2614 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2615 VFP11_ERRATUM_ARM_VENEER,
2616 VFP11_ERRATUM_THUMB_VENEER
2617 }
2618 elf32_vfp11_erratum_type;
2619
2620 typedef struct elf32_vfp11_erratum_list
2621 {
2622 struct elf32_vfp11_erratum_list *next;
2623 bfd_vma vma;
2624 union
2625 {
2626 struct
2627 {
2628 struct elf32_vfp11_erratum_list *veneer;
2629 unsigned int vfp_insn;
2630 } b;
2631 struct
2632 {
2633 struct elf32_vfp11_erratum_list *branch;
2634 unsigned int id;
2635 } v;
2636 } u;
2637 elf32_vfp11_erratum_type type;
2638 }
2639 elf32_vfp11_erratum_list;
2640
2641 typedef enum
2642 {
2643 DELETE_EXIDX_ENTRY,
2644 INSERT_EXIDX_CANTUNWIND_AT_END
2645 }
2646 arm_unwind_edit_type;
2647
2648 /* A (sorted) list of edits to apply to an unwind table. */
2649 typedef struct arm_unwind_table_edit
2650 {
2651 arm_unwind_edit_type type;
2652 /* Note: we sometimes want to insert an unwind entry corresponding to a
2653 section different from the one we're currently writing out, so record the
2654 (text) section this edit relates to here. */
2655 asection *linked_section;
2656 unsigned int index;
2657 struct arm_unwind_table_edit *next;
2658 }
2659 arm_unwind_table_edit;
2660
2661 typedef struct _arm_elf_section_data
2662 {
2663 /* Information about mapping symbols. */
2664 struct bfd_elf_section_data elf;
2665 unsigned int mapcount;
2666 unsigned int mapsize;
2667 elf32_arm_section_map *map;
2668 /* Information about CPU errata. */
2669 unsigned int erratumcount;
2670 elf32_vfp11_erratum_list *erratumlist;
2671 /* Information about unwind tables. */
2672 union
2673 {
2674 /* Unwind info attached to a text section. */
2675 struct
2676 {
2677 asection *arm_exidx_sec;
2678 } text;
2679
2680 /* Unwind info attached to an .ARM.exidx section. */
2681 struct
2682 {
2683 arm_unwind_table_edit *unwind_edit_list;
2684 arm_unwind_table_edit *unwind_edit_tail;
2685 } exidx;
2686 } u;
2687 }
2688 _arm_elf_section_data;
2689
2690 #define elf32_arm_section_data(sec) \
2691 ((_arm_elf_section_data *) elf_section_data (sec))
2692
2693 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2694 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2695 so may be created multiple times: we use an array of these entries whilst
2696 relaxing which we can refresh easily, then create stubs for each potentially
2697 erratum-triggering instruction once we've settled on a solution. */
2698
2699 struct a8_erratum_fix
2700 {
2701 bfd *input_bfd;
2702 asection *section;
2703 bfd_vma offset;
2704 bfd_vma addend;
2705 unsigned long orig_insn;
2706 char *stub_name;
2707 enum elf32_arm_stub_type stub_type;
2708 enum arm_st_branch_type branch_type;
2709 };
2710
2711 /* A table of relocs applied to branches which might trigger Cortex-A8
2712 erratum. */
2713
2714 struct a8_erratum_reloc
2715 {
2716 bfd_vma from;
2717 bfd_vma destination;
2718 struct elf32_arm_link_hash_entry *hash;
2719 const char *sym_name;
2720 unsigned int r_type;
2721 enum arm_st_branch_type branch_type;
2722 bfd_boolean non_a8_stub;
2723 };
2724
2725 /* The size of the thread control block. */
2726 #define TCB_SIZE 8
2727
2728 /* ARM-specific information about a PLT entry, over and above the usual
2729 gotplt_union. */
2730 struct arm_plt_info
2731 {
2732 /* We reference count Thumb references to a PLT entry separately,
2733 so that we can emit the Thumb trampoline only if needed. */
2734 bfd_signed_vma thumb_refcount;
2735
2736 /* Some references from Thumb code may be eliminated by BL->BLX
2737 conversion, so record them separately. */
2738 bfd_signed_vma maybe_thumb_refcount;
2739
2740 /* How many of the recorded PLT accesses were from non-call relocations.
2741 This information is useful when deciding whether anything takes the
2742 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2743 non-call references to the function should resolve directly to the
2744 real runtime target. */
2745 unsigned int noncall_refcount;
2746
2747 /* Since PLT entries have variable size if the Thumb prologue is
2748 used, we need to record the index into .got.plt instead of
2749 recomputing it from the PLT offset. */
2750 bfd_signed_vma got_offset;
2751 };
2752
2753 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2754 struct arm_local_iplt_info
2755 {
2756 /* The information that is usually found in the generic ELF part of
2757 the hash table entry. */
2758 union gotplt_union root;
2759
2760 /* The information that is usually found in the ARM-specific part of
2761 the hash table entry. */
2762 struct arm_plt_info arm;
2763
2764 /* A list of all potential dynamic relocations against this symbol. */
2765 struct elf_dyn_relocs *dyn_relocs;
2766 };
2767
2768 struct elf_arm_obj_tdata
2769 {
2770 struct elf_obj_tdata root;
2771
2772 /* tls_type for each local got entry. */
2773 char *local_got_tls_type;
2774
2775 /* GOTPLT entries for TLS descriptors. */
2776 bfd_vma *local_tlsdesc_gotent;
2777
2778 /* Information for local symbols that need entries in .iplt. */
2779 struct arm_local_iplt_info **local_iplt;
2780
2781 /* Zero to warn when linking objects with incompatible enum sizes. */
2782 int no_enum_size_warning;
2783
2784 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2785 int no_wchar_size_warning;
2786 };
2787
2788 #define elf_arm_tdata(bfd) \
2789 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2790
2791 #define elf32_arm_local_got_tls_type(bfd) \
2792 (elf_arm_tdata (bfd)->local_got_tls_type)
2793
2794 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2795 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2796
2797 #define elf32_arm_local_iplt(bfd) \
2798 (elf_arm_tdata (bfd)->local_iplt)
2799
2800 #define is_arm_elf(bfd) \
2801 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2802 && elf_tdata (bfd) != NULL \
2803 && elf_object_id (bfd) == ARM_ELF_DATA)
2804
2805 static bfd_boolean
2806 elf32_arm_mkobject (bfd *abfd)
2807 {
2808 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2809 ARM_ELF_DATA);
2810 }
2811
2812 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2813
2814 /* Arm ELF linker hash entry. */
2815 struct elf32_arm_link_hash_entry
2816 {
2817 struct elf_link_hash_entry root;
2818
2819 /* Track dynamic relocs copied for this symbol. */
2820 struct elf_dyn_relocs *dyn_relocs;
2821
2822 /* ARM-specific PLT information. */
2823 struct arm_plt_info plt;
2824
2825 #define GOT_UNKNOWN 0
2826 #define GOT_NORMAL 1
2827 #define GOT_TLS_GD 2
2828 #define GOT_TLS_IE 4
2829 #define GOT_TLS_GDESC 8
2830 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2831 unsigned int tls_type : 8;
2832
2833 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2834 unsigned int is_iplt : 1;
2835
2836 unsigned int unused : 23;
2837
2838 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2839 starting at the end of the jump table. */
2840 bfd_vma tlsdesc_got;
2841
2842 /* The symbol marking the real symbol location for exported thumb
2843 symbols with Arm stubs. */
2844 struct elf_link_hash_entry *export_glue;
2845
2846 /* A pointer to the most recently used stub hash entry against this
2847 symbol. */
2848 struct elf32_arm_stub_hash_entry *stub_cache;
2849 };
2850
2851 /* Traverse an arm ELF linker hash table. */
2852 #define elf32_arm_link_hash_traverse(table, func, info) \
2853 (elf_link_hash_traverse \
2854 (&(table)->root, \
2855 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2856 (info)))
2857
2858 /* Get the ARM elf linker hash table from a link_info structure. */
2859 #define elf32_arm_hash_table(info) \
2860 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2861 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2862
2863 #define arm_stub_hash_lookup(table, string, create, copy) \
2864 ((struct elf32_arm_stub_hash_entry *) \
2865 bfd_hash_lookup ((table), (string), (create), (copy)))
2866
2867 /* Array to keep track of which stub sections have been created, and
2868 information on stub grouping. */
2869 struct map_stub
2870 {
2871 /* This is the section to which stubs in the group will be
2872 attached. */
2873 asection *link_sec;
2874 /* The stub section. */
2875 asection *stub_sec;
2876 };
2877
2878 #define elf32_arm_compute_jump_table_size(htab) \
2879 ((htab)->next_tls_desc_index * 4)
2880
2881 /* ARM ELF linker hash table. */
2882 struct elf32_arm_link_hash_table
2883 {
2884 /* The main hash table. */
2885 struct elf_link_hash_table root;
2886
2887 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2888 bfd_size_type thumb_glue_size;
2889
2890 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2891 bfd_size_type arm_glue_size;
2892
2893 /* The size in bytes of section containing the ARMv4 BX veneers. */
2894 bfd_size_type bx_glue_size;
2895
2896 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2897 veneer has been populated. */
2898 bfd_vma bx_glue_offset[15];
2899
2900 /* The size in bytes of the section containing glue for VFP11 erratum
2901 veneers. */
2902 bfd_size_type vfp11_erratum_glue_size;
2903
2904 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2905 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2906 elf32_arm_write_section(). */
2907 struct a8_erratum_fix *a8_erratum_fixes;
2908 unsigned int num_a8_erratum_fixes;
2909
2910 /* An arbitrary input BFD chosen to hold the glue sections. */
2911 bfd * bfd_of_glue_owner;
2912
2913 /* Nonzero to output a BE8 image. */
2914 int byteswap_code;
2915
2916 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2917 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2918 int target1_is_rel;
2919
2920 /* The relocation to use for R_ARM_TARGET2 relocations. */
2921 int target2_reloc;
2922
2923 /* 0 = Ignore R_ARM_V4BX.
2924 1 = Convert BX to MOV PC.
2925 2 = Generate v4 interworing stubs. */
2926 int fix_v4bx;
2927
2928 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2929 int fix_cortex_a8;
2930
2931 /* Whether we should fix the ARM1176 BLX immediate issue. */
2932 int fix_arm1176;
2933
2934 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2935 int use_blx;
2936
2937 /* What sort of code sequences we should look for which may trigger the
2938 VFP11 denorm erratum. */
2939 bfd_arm_vfp11_fix vfp11_fix;
2940
2941 /* Global counter for the number of fixes we have emitted. */
2942 int num_vfp11_fixes;
2943
2944 /* Nonzero to force PIC branch veneers. */
2945 int pic_veneer;
2946
2947 /* The number of bytes in the initial entry in the PLT. */
2948 bfd_size_type plt_header_size;
2949
2950 /* The number of bytes in the subsequent PLT etries. */
2951 bfd_size_type plt_entry_size;
2952
2953 /* True if the target system is VxWorks. */
2954 int vxworks_p;
2955
2956 /* True if the target system is Symbian OS. */
2957 int symbian_p;
2958
2959 /* True if the target system is Native Client. */
2960 int nacl_p;
2961
2962 /* True if the target uses REL relocations. */
2963 int use_rel;
2964
2965 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2966 bfd_vma next_tls_desc_index;
2967
2968 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2969 bfd_vma num_tls_desc;
2970
2971 /* Short-cuts to get to dynamic linker sections. */
2972 asection *sdynbss;
2973 asection *srelbss;
2974
2975 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2976 asection *srelplt2;
2977
2978 /* The offset into splt of the PLT entry for the TLS descriptor
2979 resolver. Special values are 0, if not necessary (or not found
2980 to be necessary yet), and -1 if needed but not determined
2981 yet. */
2982 bfd_vma dt_tlsdesc_plt;
2983
2984 /* The offset into sgot of the GOT entry used by the PLT entry
2985 above. */
2986 bfd_vma dt_tlsdesc_got;
2987
2988 /* Offset in .plt section of tls_arm_trampoline. */
2989 bfd_vma tls_trampoline;
2990
2991 /* Data for R_ARM_TLS_LDM32 relocations. */
2992 union
2993 {
2994 bfd_signed_vma refcount;
2995 bfd_vma offset;
2996 } tls_ldm_got;
2997
2998 /* Small local sym cache. */
2999 struct sym_cache sym_cache;
3000
3001 /* For convenience in allocate_dynrelocs. */
3002 bfd * obfd;
3003
3004 /* The amount of space used by the reserved portion of the sgotplt
3005 section, plus whatever space is used by the jump slots. */
3006 bfd_vma sgotplt_jump_table_size;
3007
3008 /* The stub hash table. */
3009 struct bfd_hash_table stub_hash_table;
3010
3011 /* Linker stub bfd. */
3012 bfd *stub_bfd;
3013
3014 /* Linker call-backs. */
3015 asection * (*add_stub_section) (const char *, asection *, unsigned int);
3016 void (*layout_sections_again) (void);
3017
3018 /* Array to keep track of which stub sections have been created, and
3019 information on stub grouping. */
3020 struct map_stub *stub_group;
3021
3022 /* Number of elements in stub_group. */
3023 int top_id;
3024
3025 /* Assorted information used by elf32_arm_size_stubs. */
3026 unsigned int bfd_count;
3027 int top_index;
3028 asection **input_list;
3029 };
3030
3031 /* Create an entry in an ARM ELF linker hash table. */
3032
3033 static struct bfd_hash_entry *
3034 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3035 struct bfd_hash_table * table,
3036 const char * string)
3037 {
3038 struct elf32_arm_link_hash_entry * ret =
3039 (struct elf32_arm_link_hash_entry *) entry;
3040
3041 /* Allocate the structure if it has not already been allocated by a
3042 subclass. */
3043 if (ret == NULL)
3044 ret = (struct elf32_arm_link_hash_entry *)
3045 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3046 if (ret == NULL)
3047 return (struct bfd_hash_entry *) ret;
3048
3049 /* Call the allocation method of the superclass. */
3050 ret = ((struct elf32_arm_link_hash_entry *)
3051 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3052 table, string));
3053 if (ret != NULL)
3054 {
3055 ret->dyn_relocs = NULL;
3056 ret->tls_type = GOT_UNKNOWN;
3057 ret->tlsdesc_got = (bfd_vma) -1;
3058 ret->plt.thumb_refcount = 0;
3059 ret->plt.maybe_thumb_refcount = 0;
3060 ret->plt.noncall_refcount = 0;
3061 ret->plt.got_offset = -1;
3062 ret->is_iplt = FALSE;
3063 ret->export_glue = NULL;
3064
3065 ret->stub_cache = NULL;
3066 }
3067
3068 return (struct bfd_hash_entry *) ret;
3069 }
3070
3071 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3072 symbols. */
3073
3074 static bfd_boolean
3075 elf32_arm_allocate_local_sym_info (bfd *abfd)
3076 {
3077 if (elf_local_got_refcounts (abfd) == NULL)
3078 {
3079 bfd_size_type num_syms;
3080 bfd_size_type size;
3081 char *data;
3082
3083 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3084 size = num_syms * (sizeof (bfd_signed_vma)
3085 + sizeof (struct arm_local_iplt_info *)
3086 + sizeof (bfd_vma)
3087 + sizeof (char));
3088 data = bfd_zalloc (abfd, size);
3089 if (data == NULL)
3090 return FALSE;
3091
3092 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3093 data += num_syms * sizeof (bfd_signed_vma);
3094
3095 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3096 data += num_syms * sizeof (struct arm_local_iplt_info *);
3097
3098 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3099 data += num_syms * sizeof (bfd_vma);
3100
3101 elf32_arm_local_got_tls_type (abfd) = data;
3102 }
3103 return TRUE;
3104 }
3105
3106 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3107 to input bfd ABFD. Create the information if it doesn't already exist.
3108 Return null if an allocation fails. */
3109
3110 static struct arm_local_iplt_info *
3111 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3112 {
3113 struct arm_local_iplt_info **ptr;
3114
3115 if (!elf32_arm_allocate_local_sym_info (abfd))
3116 return NULL;
3117
3118 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3119 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3120 if (*ptr == NULL)
3121 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3122 return *ptr;
3123 }
3124
3125 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3126 in ABFD's symbol table. If the symbol is global, H points to its
3127 hash table entry, otherwise H is null.
3128
3129 Return true if the symbol does have PLT information. When returning
3130 true, point *ROOT_PLT at the target-independent reference count/offset
3131 union and *ARM_PLT at the ARM-specific information. */
3132
3133 static bfd_boolean
3134 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3135 unsigned long r_symndx, union gotplt_union **root_plt,
3136 struct arm_plt_info **arm_plt)
3137 {
3138 struct arm_local_iplt_info *local_iplt;
3139
3140 if (h != NULL)
3141 {
3142 *root_plt = &h->root.plt;
3143 *arm_plt = &h->plt;
3144 return TRUE;
3145 }
3146
3147 if (elf32_arm_local_iplt (abfd) == NULL)
3148 return FALSE;
3149
3150 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3151 if (local_iplt == NULL)
3152 return FALSE;
3153
3154 *root_plt = &local_iplt->root;
3155 *arm_plt = &local_iplt->arm;
3156 return TRUE;
3157 }
3158
3159 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3160 before it. */
3161
3162 static bfd_boolean
3163 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3164 struct arm_plt_info *arm_plt)
3165 {
3166 struct elf32_arm_link_hash_table *htab;
3167
3168 htab = elf32_arm_hash_table (info);
3169 return (arm_plt->thumb_refcount != 0
3170 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3171 }
3172
3173 /* Return a pointer to the head of the dynamic reloc list that should
3174 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3175 ABFD's symbol table. Return null if an error occurs. */
3176
3177 static struct elf_dyn_relocs **
3178 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3179 Elf_Internal_Sym *isym)
3180 {
3181 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3182 {
3183 struct arm_local_iplt_info *local_iplt;
3184
3185 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3186 if (local_iplt == NULL)
3187 return NULL;
3188 return &local_iplt->dyn_relocs;
3189 }
3190 else
3191 {
3192 /* Track dynamic relocs needed for local syms too.
3193 We really need local syms available to do this
3194 easily. Oh well. */
3195 asection *s;
3196 void *vpp;
3197
3198 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3199 if (s == NULL)
3200 abort ();
3201
3202 vpp = &elf_section_data (s)->local_dynrel;
3203 return (struct elf_dyn_relocs **) vpp;
3204 }
3205 }
3206
3207 /* Initialize an entry in the stub hash table. */
3208
3209 static struct bfd_hash_entry *
3210 stub_hash_newfunc (struct bfd_hash_entry *entry,
3211 struct bfd_hash_table *table,
3212 const char *string)
3213 {
3214 /* Allocate the structure if it has not already been allocated by a
3215 subclass. */
3216 if (entry == NULL)
3217 {
3218 entry = (struct bfd_hash_entry *)
3219 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3220 if (entry == NULL)
3221 return entry;
3222 }
3223
3224 /* Call the allocation method of the superclass. */
3225 entry = bfd_hash_newfunc (entry, table, string);
3226 if (entry != NULL)
3227 {
3228 struct elf32_arm_stub_hash_entry *eh;
3229
3230 /* Initialize the local fields. */
3231 eh = (struct elf32_arm_stub_hash_entry *) entry;
3232 eh->stub_sec = NULL;
3233 eh->stub_offset = 0;
3234 eh->target_value = 0;
3235 eh->target_section = NULL;
3236 eh->target_addend = 0;
3237 eh->orig_insn = 0;
3238 eh->stub_type = arm_stub_none;
3239 eh->stub_size = 0;
3240 eh->stub_template = NULL;
3241 eh->stub_template_size = 0;
3242 eh->h = NULL;
3243 eh->id_sec = NULL;
3244 eh->output_name = NULL;
3245 }
3246
3247 return entry;
3248 }
3249
3250 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3251 shortcuts to them in our hash table. */
3252
3253 static bfd_boolean
3254 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3255 {
3256 struct elf32_arm_link_hash_table *htab;
3257
3258 htab = elf32_arm_hash_table (info);
3259 if (htab == NULL)
3260 return FALSE;
3261
3262 /* BPABI objects never have a GOT, or associated sections. */
3263 if (htab->symbian_p)
3264 return TRUE;
3265
3266 if (! _bfd_elf_create_got_section (dynobj, info))
3267 return FALSE;
3268
3269 return TRUE;
3270 }
3271
3272 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3273
3274 static bfd_boolean
3275 create_ifunc_sections (struct bfd_link_info *info)
3276 {
3277 struct elf32_arm_link_hash_table *htab;
3278 const struct elf_backend_data *bed;
3279 bfd *dynobj;
3280 asection *s;
3281 flagword flags;
3282
3283 htab = elf32_arm_hash_table (info);
3284 dynobj = htab->root.dynobj;
3285 bed = get_elf_backend_data (dynobj);
3286 flags = bed->dynamic_sec_flags;
3287
3288 if (htab->root.iplt == NULL)
3289 {
3290 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3291 flags | SEC_READONLY | SEC_CODE);
3292 if (s == NULL
3293 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3294 return FALSE;
3295 htab->root.iplt = s;
3296 }
3297
3298 if (htab->root.irelplt == NULL)
3299 {
3300 s = bfd_make_section_anyway_with_flags (dynobj,
3301 RELOC_SECTION (htab, ".iplt"),
3302 flags | SEC_READONLY);
3303 if (s == NULL
3304 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3305 return FALSE;
3306 htab->root.irelplt = s;
3307 }
3308
3309 if (htab->root.igotplt == NULL)
3310 {
3311 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3312 if (s == NULL
3313 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3314 return FALSE;
3315 htab->root.igotplt = s;
3316 }
3317 return TRUE;
3318 }
3319
3320 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3321 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3322 hash table. */
3323
3324 static bfd_boolean
3325 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3326 {
3327 struct elf32_arm_link_hash_table *htab;
3328
3329 htab = elf32_arm_hash_table (info);
3330 if (htab == NULL)
3331 return FALSE;
3332
3333 if (!htab->root.sgot && !create_got_section (dynobj, info))
3334 return FALSE;
3335
3336 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3337 return FALSE;
3338
3339 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3340 if (!info->shared)
3341 htab->srelbss = bfd_get_linker_section (dynobj,
3342 RELOC_SECTION (htab, ".bss"));
3343
3344 if (htab->vxworks_p)
3345 {
3346 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3347 return FALSE;
3348
3349 if (info->shared)
3350 {
3351 htab->plt_header_size = 0;
3352 htab->plt_entry_size
3353 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3354 }
3355 else
3356 {
3357 htab->plt_header_size
3358 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3359 htab->plt_entry_size
3360 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3361 }
3362 }
3363
3364 if (!htab->root.splt
3365 || !htab->root.srelplt
3366 || !htab->sdynbss
3367 || (!info->shared && !htab->srelbss))
3368 abort ();
3369
3370 return TRUE;
3371 }
3372
3373 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3374
3375 static void
3376 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3377 struct elf_link_hash_entry *dir,
3378 struct elf_link_hash_entry *ind)
3379 {
3380 struct elf32_arm_link_hash_entry *edir, *eind;
3381
3382 edir = (struct elf32_arm_link_hash_entry *) dir;
3383 eind = (struct elf32_arm_link_hash_entry *) ind;
3384
3385 if (eind->dyn_relocs != NULL)
3386 {
3387 if (edir->dyn_relocs != NULL)
3388 {
3389 struct elf_dyn_relocs **pp;
3390 struct elf_dyn_relocs *p;
3391
3392 /* Add reloc counts against the indirect sym to the direct sym
3393 list. Merge any entries against the same section. */
3394 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3395 {
3396 struct elf_dyn_relocs *q;
3397
3398 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3399 if (q->sec == p->sec)
3400 {
3401 q->pc_count += p->pc_count;
3402 q->count += p->count;
3403 *pp = p->next;
3404 break;
3405 }
3406 if (q == NULL)
3407 pp = &p->next;
3408 }
3409 *pp = edir->dyn_relocs;
3410 }
3411
3412 edir->dyn_relocs = eind->dyn_relocs;
3413 eind->dyn_relocs = NULL;
3414 }
3415
3416 if (ind->root.type == bfd_link_hash_indirect)
3417 {
3418 /* Copy over PLT info. */
3419 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3420 eind->plt.thumb_refcount = 0;
3421 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3422 eind->plt.maybe_thumb_refcount = 0;
3423 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3424 eind->plt.noncall_refcount = 0;
3425
3426 /* We should only allocate a function to .iplt once the final
3427 symbol information is known. */
3428 BFD_ASSERT (!eind->is_iplt);
3429
3430 if (dir->got.refcount <= 0)
3431 {
3432 edir->tls_type = eind->tls_type;
3433 eind->tls_type = GOT_UNKNOWN;
3434 }
3435 }
3436
3437 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3438 }
3439
3440 /* Create an ARM elf linker hash table. */
3441
3442 static struct bfd_link_hash_table *
3443 elf32_arm_link_hash_table_create (bfd *abfd)
3444 {
3445 struct elf32_arm_link_hash_table *ret;
3446 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3447
3448 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3449 if (ret == NULL)
3450 return NULL;
3451
3452 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3453 elf32_arm_link_hash_newfunc,
3454 sizeof (struct elf32_arm_link_hash_entry),
3455 ARM_ELF_DATA))
3456 {
3457 free (ret);
3458 return NULL;
3459 }
3460
3461 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3462 #ifdef FOUR_WORD_PLT
3463 ret->plt_header_size = 16;
3464 ret->plt_entry_size = 16;
3465 #else
3466 ret->plt_header_size = 20;
3467 ret->plt_entry_size = 12;
3468 #endif
3469 ret->use_rel = 1;
3470 ret->obfd = abfd;
3471
3472 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3473 sizeof (struct elf32_arm_stub_hash_entry)))
3474 {
3475 free (ret);
3476 return NULL;
3477 }
3478
3479 return &ret->root.root;
3480 }
3481
3482 /* Free the derived linker hash table. */
3483
3484 static void
3485 elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3486 {
3487 struct elf32_arm_link_hash_table *ret
3488 = (struct elf32_arm_link_hash_table *) hash;
3489
3490 bfd_hash_table_free (&ret->stub_hash_table);
3491 _bfd_elf_link_hash_table_free (hash);
3492 }
3493
3494 /* Determine if we're dealing with a Thumb only architecture. */
3495
3496 static bfd_boolean
3497 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3498 {
3499 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3500 Tag_CPU_arch);
3501 int profile;
3502
3503 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3504 return TRUE;
3505
3506 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3507 return FALSE;
3508
3509 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3510 Tag_CPU_arch_profile);
3511
3512 return profile == 'M';
3513 }
3514
3515 /* Determine if we're dealing with a Thumb-2 object. */
3516
3517 static bfd_boolean
3518 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3519 {
3520 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3521 Tag_CPU_arch);
3522 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3523 }
3524
3525 /* Determine what kind of NOPs are available. */
3526
3527 static bfd_boolean
3528 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3529 {
3530 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3531 Tag_CPU_arch);
3532 return arch == TAG_CPU_ARCH_V6T2
3533 || arch == TAG_CPU_ARCH_V6K
3534 || arch == TAG_CPU_ARCH_V7
3535 || arch == TAG_CPU_ARCH_V7E_M;
3536 }
3537
3538 static bfd_boolean
3539 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3540 {
3541 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3542 Tag_CPU_arch);
3543 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3544 || arch == TAG_CPU_ARCH_V7E_M);
3545 }
3546
3547 static bfd_boolean
3548 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3549 {
3550 switch (stub_type)
3551 {
3552 case arm_stub_long_branch_thumb_only:
3553 case arm_stub_long_branch_v4t_thumb_arm:
3554 case arm_stub_short_branch_v4t_thumb_arm:
3555 case arm_stub_long_branch_v4t_thumb_arm_pic:
3556 case arm_stub_long_branch_v4t_thumb_tls_pic:
3557 case arm_stub_long_branch_thumb_only_pic:
3558 return TRUE;
3559 case arm_stub_none:
3560 BFD_FAIL ();
3561 return FALSE;
3562 break;
3563 default:
3564 return FALSE;
3565 }
3566 }
3567
3568 /* Determine the type of stub needed, if any, for a call. */
3569
3570 static enum elf32_arm_stub_type
3571 arm_type_of_stub (struct bfd_link_info *info,
3572 asection *input_sec,
3573 const Elf_Internal_Rela *rel,
3574 unsigned char st_type,
3575 enum arm_st_branch_type *actual_branch_type,
3576 struct elf32_arm_link_hash_entry *hash,
3577 bfd_vma destination,
3578 asection *sym_sec,
3579 bfd *input_bfd,
3580 const char *name)
3581 {
3582 bfd_vma location;
3583 bfd_signed_vma branch_offset;
3584 unsigned int r_type;
3585 struct elf32_arm_link_hash_table * globals;
3586 int thumb2;
3587 int thumb_only;
3588 enum elf32_arm_stub_type stub_type = arm_stub_none;
3589 int use_plt = 0;
3590 enum arm_st_branch_type branch_type = *actual_branch_type;
3591 union gotplt_union *root_plt;
3592 struct arm_plt_info *arm_plt;
3593
3594 if (branch_type == ST_BRANCH_LONG)
3595 return stub_type;
3596
3597 globals = elf32_arm_hash_table (info);
3598 if (globals == NULL)
3599 return stub_type;
3600
3601 thumb_only = using_thumb_only (globals);
3602
3603 thumb2 = using_thumb2 (globals);
3604
3605 /* Determine where the call point is. */
3606 location = (input_sec->output_offset
3607 + input_sec->output_section->vma
3608 + rel->r_offset);
3609
3610 r_type = ELF32_R_TYPE (rel->r_info);
3611
3612 /* For TLS call relocs, it is the caller's responsibility to provide
3613 the address of the appropriate trampoline. */
3614 if (r_type != R_ARM_TLS_CALL
3615 && r_type != R_ARM_THM_TLS_CALL
3616 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3617 &root_plt, &arm_plt)
3618 && root_plt->offset != (bfd_vma) -1)
3619 {
3620 asection *splt;
3621
3622 if (hash == NULL || hash->is_iplt)
3623 splt = globals->root.iplt;
3624 else
3625 splt = globals->root.splt;
3626 if (splt != NULL)
3627 {
3628 use_plt = 1;
3629
3630 /* Note when dealing with PLT entries: the main PLT stub is in
3631 ARM mode, so if the branch is in Thumb mode, another
3632 Thumb->ARM stub will be inserted later just before the ARM
3633 PLT stub. We don't take this extra distance into account
3634 here, because if a long branch stub is needed, we'll add a
3635 Thumb->Arm one and branch directly to the ARM PLT entry
3636 because it avoids spreading offset corrections in several
3637 places. */
3638
3639 destination = (splt->output_section->vma
3640 + splt->output_offset
3641 + root_plt->offset);
3642 st_type = STT_FUNC;
3643 branch_type = ST_BRANCH_TO_ARM;
3644 }
3645 }
3646 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3647 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3648
3649 branch_offset = (bfd_signed_vma)(destination - location);
3650
3651 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3652 || r_type == R_ARM_THM_TLS_CALL)
3653 {
3654 /* Handle cases where:
3655 - this call goes too far (different Thumb/Thumb2 max
3656 distance)
3657 - it's a Thumb->Arm call and blx is not available, or it's a
3658 Thumb->Arm branch (not bl). A stub is needed in this case,
3659 but only if this call is not through a PLT entry. Indeed,
3660 PLT stubs handle mode switching already.
3661 */
3662 if ((!thumb2
3663 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3664 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3665 || (thumb2
3666 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3667 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3668 || (branch_type == ST_BRANCH_TO_ARM
3669 && (((r_type == R_ARM_THM_CALL
3670 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3671 || (r_type == R_ARM_THM_JUMP24))
3672 && !use_plt))
3673 {
3674 if (branch_type == ST_BRANCH_TO_THUMB)
3675 {
3676 /* Thumb to thumb. */
3677 if (!thumb_only)
3678 {
3679 stub_type = (info->shared | globals->pic_veneer)
3680 /* PIC stubs. */
3681 ? ((globals->use_blx
3682 && (r_type == R_ARM_THM_CALL))
3683 /* V5T and above. Stub starts with ARM code, so
3684 we must be able to switch mode before
3685 reaching it, which is only possible for 'bl'
3686 (ie R_ARM_THM_CALL relocation). */
3687 ? arm_stub_long_branch_any_thumb_pic
3688 /* On V4T, use Thumb code only. */
3689 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3690
3691 /* non-PIC stubs. */
3692 : ((globals->use_blx
3693 && (r_type == R_ARM_THM_CALL))
3694 /* V5T and above. */
3695 ? arm_stub_long_branch_any_any
3696 /* V4T. */
3697 : arm_stub_long_branch_v4t_thumb_thumb);
3698 }
3699 else
3700 {
3701 stub_type = (info->shared | globals->pic_veneer)
3702 /* PIC stub. */
3703 ? arm_stub_long_branch_thumb_only_pic
3704 /* non-PIC stub. */
3705 : arm_stub_long_branch_thumb_only;
3706 }
3707 }
3708 else
3709 {
3710 /* Thumb to arm. */
3711 if (sym_sec != NULL
3712 && sym_sec->owner != NULL
3713 && !INTERWORK_FLAG (sym_sec->owner))
3714 {
3715 (*_bfd_error_handler)
3716 (_("%B(%s): warning: interworking not enabled.\n"
3717 " first occurrence: %B: Thumb call to ARM"),
3718 sym_sec->owner, input_bfd, name);
3719 }
3720
3721 stub_type =
3722 (info->shared | globals->pic_veneer)
3723 /* PIC stubs. */
3724 ? (r_type == R_ARM_THM_TLS_CALL
3725 /* TLS PIC stubs */
3726 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3727 : arm_stub_long_branch_v4t_thumb_tls_pic)
3728 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3729 /* V5T PIC and above. */
3730 ? arm_stub_long_branch_any_arm_pic
3731 /* V4T PIC stub. */
3732 : arm_stub_long_branch_v4t_thumb_arm_pic))
3733
3734 /* non-PIC stubs. */
3735 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3736 /* V5T and above. */
3737 ? arm_stub_long_branch_any_any
3738 /* V4T. */
3739 : arm_stub_long_branch_v4t_thumb_arm);
3740
3741 /* Handle v4t short branches. */
3742 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3743 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3744 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3745 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3746 }
3747 }
3748 }
3749 else if (r_type == R_ARM_CALL
3750 || r_type == R_ARM_JUMP24
3751 || r_type == R_ARM_PLT32
3752 || r_type == R_ARM_TLS_CALL)
3753 {
3754 if (branch_type == ST_BRANCH_TO_THUMB)
3755 {
3756 /* Arm to thumb. */
3757
3758 if (sym_sec != NULL
3759 && sym_sec->owner != NULL
3760 && !INTERWORK_FLAG (sym_sec->owner))
3761 {
3762 (*_bfd_error_handler)
3763 (_("%B(%s): warning: interworking not enabled.\n"
3764 " first occurrence: %B: ARM call to Thumb"),
3765 sym_sec->owner, input_bfd, name);
3766 }
3767
3768 /* We have an extra 2-bytes reach because of
3769 the mode change (bit 24 (H) of BLX encoding). */
3770 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3771 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3772 || (r_type == R_ARM_CALL && !globals->use_blx)
3773 || (r_type == R_ARM_JUMP24)
3774 || (r_type == R_ARM_PLT32))
3775 {
3776 stub_type = (info->shared | globals->pic_veneer)
3777 /* PIC stubs. */
3778 ? ((globals->use_blx)
3779 /* V5T and above. */
3780 ? arm_stub_long_branch_any_thumb_pic
3781 /* V4T stub. */
3782 : arm_stub_long_branch_v4t_arm_thumb_pic)
3783
3784 /* non-PIC stubs. */
3785 : ((globals->use_blx)
3786 /* V5T and above. */
3787 ? arm_stub_long_branch_any_any
3788 /* V4T. */
3789 : arm_stub_long_branch_v4t_arm_thumb);
3790 }
3791 }
3792 else
3793 {
3794 /* Arm to arm. */
3795 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3796 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3797 {
3798 stub_type =
3799 (info->shared | globals->pic_veneer)
3800 /* PIC stubs. */
3801 ? (r_type == R_ARM_TLS_CALL
3802 /* TLS PIC Stub */
3803 ? arm_stub_long_branch_any_tls_pic
3804 : (globals->nacl_p
3805 ? arm_stub_long_branch_arm_nacl_pic
3806 : arm_stub_long_branch_any_arm_pic))
3807 /* non-PIC stubs. */
3808 : (globals->nacl_p
3809 ? arm_stub_long_branch_arm_nacl
3810 : arm_stub_long_branch_any_any);
3811 }
3812 }
3813 }
3814
3815 /* If a stub is needed, record the actual destination type. */
3816 if (stub_type != arm_stub_none)
3817 *actual_branch_type = branch_type;
3818
3819 return stub_type;
3820 }
3821
3822 /* Build a name for an entry in the stub hash table. */
3823
3824 static char *
3825 elf32_arm_stub_name (const asection *input_section,
3826 const asection *sym_sec,
3827 const struct elf32_arm_link_hash_entry *hash,
3828 const Elf_Internal_Rela *rel,
3829 enum elf32_arm_stub_type stub_type)
3830 {
3831 char *stub_name;
3832 bfd_size_type len;
3833
3834 if (hash)
3835 {
3836 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
3837 stub_name = (char *) bfd_malloc (len);
3838 if (stub_name != NULL)
3839 sprintf (stub_name, "%08x_%s+%x_%d",
3840 input_section->id & 0xffffffff,
3841 hash->root.root.root.string,
3842 (int) rel->r_addend & 0xffffffff,
3843 (int) stub_type);
3844 }
3845 else
3846 {
3847 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
3848 stub_name = (char *) bfd_malloc (len);
3849 if (stub_name != NULL)
3850 sprintf (stub_name, "%08x_%x:%x+%x_%d",
3851 input_section->id & 0xffffffff,
3852 sym_sec->id & 0xffffffff,
3853 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3854 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3855 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3856 (int) rel->r_addend & 0xffffffff,
3857 (int) stub_type);
3858 }
3859
3860 return stub_name;
3861 }
3862
3863 /* Look up an entry in the stub hash. Stub entries are cached because
3864 creating the stub name takes a bit of time. */
3865
3866 static struct elf32_arm_stub_hash_entry *
3867 elf32_arm_get_stub_entry (const asection *input_section,
3868 const asection *sym_sec,
3869 struct elf_link_hash_entry *hash,
3870 const Elf_Internal_Rela *rel,
3871 struct elf32_arm_link_hash_table *htab,
3872 enum elf32_arm_stub_type stub_type)
3873 {
3874 struct elf32_arm_stub_hash_entry *stub_entry;
3875 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3876 const asection *id_sec;
3877
3878 if ((input_section->flags & SEC_CODE) == 0)
3879 return NULL;
3880
3881 /* If this input section is part of a group of sections sharing one
3882 stub section, then use the id of the first section in the group.
3883 Stub names need to include a section id, as there may well be
3884 more than one stub used to reach say, printf, and we need to
3885 distinguish between them. */
3886 id_sec = htab->stub_group[input_section->id].link_sec;
3887
3888 if (h != NULL && h->stub_cache != NULL
3889 && h->stub_cache->h == h
3890 && h->stub_cache->id_sec == id_sec
3891 && h->stub_cache->stub_type == stub_type)
3892 {
3893 stub_entry = h->stub_cache;
3894 }
3895 else
3896 {
3897 char *stub_name;
3898
3899 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
3900 if (stub_name == NULL)
3901 return NULL;
3902
3903 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3904 stub_name, FALSE, FALSE);
3905 if (h != NULL)
3906 h->stub_cache = stub_entry;
3907
3908 free (stub_name);
3909 }
3910
3911 return stub_entry;
3912 }
3913
3914 /* Find or create a stub section. Returns a pointer to the stub section, and
3915 the section to which the stub section will be attached (in *LINK_SEC_P).
3916 LINK_SEC_P may be NULL. */
3917
3918 static asection *
3919 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3920 struct elf32_arm_link_hash_table *htab)
3921 {
3922 asection *link_sec;
3923 asection *stub_sec;
3924
3925 link_sec = htab->stub_group[section->id].link_sec;
3926 BFD_ASSERT (link_sec != NULL);
3927 stub_sec = htab->stub_group[section->id].stub_sec;
3928
3929 if (stub_sec == NULL)
3930 {
3931 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3932 if (stub_sec == NULL)
3933 {
3934 size_t namelen;
3935 bfd_size_type len;
3936 char *s_name;
3937
3938 namelen = strlen (link_sec->name);
3939 len = namelen + sizeof (STUB_SUFFIX);
3940 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
3941 if (s_name == NULL)
3942 return NULL;
3943
3944 memcpy (s_name, link_sec->name, namelen);
3945 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3946 stub_sec = (*htab->add_stub_section) (s_name, link_sec,
3947 htab->nacl_p ? 4 : 3);
3948 if (stub_sec == NULL)
3949 return NULL;
3950 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3951 }
3952 htab->stub_group[section->id].stub_sec = stub_sec;
3953 }
3954
3955 if (link_sec_p)
3956 *link_sec_p = link_sec;
3957
3958 return stub_sec;
3959 }
3960
3961 /* Add a new stub entry to the stub hash. Not all fields of the new
3962 stub entry are initialised. */
3963
3964 static struct elf32_arm_stub_hash_entry *
3965 elf32_arm_add_stub (const char *stub_name,
3966 asection *section,
3967 struct elf32_arm_link_hash_table *htab)
3968 {
3969 asection *link_sec;
3970 asection *stub_sec;
3971 struct elf32_arm_stub_hash_entry *stub_entry;
3972
3973 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3974 if (stub_sec == NULL)
3975 return NULL;
3976
3977 /* Enter this entry into the linker stub hash table. */
3978 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3979 TRUE, FALSE);
3980 if (stub_entry == NULL)
3981 {
3982 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3983 section->owner,
3984 stub_name);
3985 return NULL;
3986 }
3987
3988 stub_entry->stub_sec = stub_sec;
3989 stub_entry->stub_offset = 0;
3990 stub_entry->id_sec = link_sec;
3991
3992 return stub_entry;
3993 }
3994
3995 /* Store an Arm insn into an output section not processed by
3996 elf32_arm_write_section. */
3997
3998 static void
3999 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4000 bfd * output_bfd, bfd_vma val, void * ptr)
4001 {
4002 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4003 bfd_putl32 (val, ptr);
4004 else
4005 bfd_putb32 (val, ptr);
4006 }
4007
4008 /* Store a 16-bit Thumb insn into an output section not processed by
4009 elf32_arm_write_section. */
4010
4011 static void
4012 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4013 bfd * output_bfd, bfd_vma val, void * ptr)
4014 {
4015 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4016 bfd_putl16 (val, ptr);
4017 else
4018 bfd_putb16 (val, ptr);
4019 }
4020
4021 /* If it's possible to change R_TYPE to a more efficient access
4022 model, return the new reloc type. */
4023
4024 static unsigned
4025 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4026 struct elf_link_hash_entry *h)
4027 {
4028 int is_local = (h == NULL);
4029
4030 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4031 return r_type;
4032
4033 /* We do not support relaxations for Old TLS models. */
4034 switch (r_type)
4035 {
4036 case R_ARM_TLS_GOTDESC:
4037 case R_ARM_TLS_CALL:
4038 case R_ARM_THM_TLS_CALL:
4039 case R_ARM_TLS_DESCSEQ:
4040 case R_ARM_THM_TLS_DESCSEQ:
4041 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4042 }
4043
4044 return r_type;
4045 }
4046
4047 static bfd_reloc_status_type elf32_arm_final_link_relocate
4048 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4049 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4050 const char *, unsigned char, enum arm_st_branch_type,
4051 struct elf_link_hash_entry *, bfd_boolean *, char **);
4052
4053 static unsigned int
4054 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4055 {
4056 switch (stub_type)
4057 {
4058 case arm_stub_a8_veneer_b_cond:
4059 case arm_stub_a8_veneer_b:
4060 case arm_stub_a8_veneer_bl:
4061 return 2;
4062
4063 case arm_stub_long_branch_any_any:
4064 case arm_stub_long_branch_v4t_arm_thumb:
4065 case arm_stub_long_branch_thumb_only:
4066 case arm_stub_long_branch_v4t_thumb_thumb:
4067 case arm_stub_long_branch_v4t_thumb_arm:
4068 case arm_stub_short_branch_v4t_thumb_arm:
4069 case arm_stub_long_branch_any_arm_pic:
4070 case arm_stub_long_branch_any_thumb_pic:
4071 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4072 case arm_stub_long_branch_v4t_arm_thumb_pic:
4073 case arm_stub_long_branch_v4t_thumb_arm_pic:
4074 case arm_stub_long_branch_thumb_only_pic:
4075 case arm_stub_long_branch_any_tls_pic:
4076 case arm_stub_long_branch_v4t_thumb_tls_pic:
4077 case arm_stub_a8_veneer_blx:
4078 return 4;
4079
4080 case arm_stub_long_branch_arm_nacl:
4081 case arm_stub_long_branch_arm_nacl_pic:
4082 return 16;
4083
4084 default:
4085 abort (); /* Should be unreachable. */
4086 }
4087 }
4088
4089 static bfd_boolean
4090 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4091 void * in_arg)
4092 {
4093 #define MAXRELOCS 3
4094 struct elf32_arm_stub_hash_entry *stub_entry;
4095 struct elf32_arm_link_hash_table *globals;
4096 struct bfd_link_info *info;
4097 asection *stub_sec;
4098 bfd *stub_bfd;
4099 bfd_byte *loc;
4100 bfd_vma sym_value;
4101 int template_size;
4102 int size;
4103 const insn_sequence *template_sequence;
4104 int i;
4105 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4106 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4107 int nrelocs = 0;
4108
4109 /* Massage our args to the form they really have. */
4110 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4111 info = (struct bfd_link_info *) in_arg;
4112
4113 globals = elf32_arm_hash_table (info);
4114 if (globals == NULL)
4115 return FALSE;
4116
4117 stub_sec = stub_entry->stub_sec;
4118
4119 if ((globals->fix_cortex_a8 < 0)
4120 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4121 /* We have to do less-strictly-aligned fixes last. */
4122 return TRUE;
4123
4124 /* Make a note of the offset within the stubs for this entry. */
4125 stub_entry->stub_offset = stub_sec->size;
4126 loc = stub_sec->contents + stub_entry->stub_offset;
4127
4128 stub_bfd = stub_sec->owner;
4129
4130 /* This is the address of the stub destination. */
4131 sym_value = (stub_entry->target_value
4132 + stub_entry->target_section->output_offset
4133 + stub_entry->target_section->output_section->vma);
4134
4135 template_sequence = stub_entry->stub_template;
4136 template_size = stub_entry->stub_template_size;
4137
4138 size = 0;
4139 for (i = 0; i < template_size; i++)
4140 {
4141 switch (template_sequence[i].type)
4142 {
4143 case THUMB16_TYPE:
4144 {
4145 bfd_vma data = (bfd_vma) template_sequence[i].data;
4146 if (template_sequence[i].reloc_addend != 0)
4147 {
4148 /* We've borrowed the reloc_addend field to mean we should
4149 insert a condition code into this (Thumb-1 branch)
4150 instruction. See THUMB16_BCOND_INSN. */
4151 BFD_ASSERT ((data & 0xff00) == 0xd000);
4152 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4153 }
4154 bfd_put_16 (stub_bfd, data, loc + size);
4155 size += 2;
4156 }
4157 break;
4158
4159 case THUMB32_TYPE:
4160 bfd_put_16 (stub_bfd,
4161 (template_sequence[i].data >> 16) & 0xffff,
4162 loc + size);
4163 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4164 loc + size + 2);
4165 if (template_sequence[i].r_type != R_ARM_NONE)
4166 {
4167 stub_reloc_idx[nrelocs] = i;
4168 stub_reloc_offset[nrelocs++] = size;
4169 }
4170 size += 4;
4171 break;
4172
4173 case ARM_TYPE:
4174 bfd_put_32 (stub_bfd, template_sequence[i].data,
4175 loc + size);
4176 /* Handle cases where the target is encoded within the
4177 instruction. */
4178 if (template_sequence[i].r_type == R_ARM_JUMP24)
4179 {
4180 stub_reloc_idx[nrelocs] = i;
4181 stub_reloc_offset[nrelocs++] = size;
4182 }
4183 size += 4;
4184 break;
4185
4186 case DATA_TYPE:
4187 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4188 stub_reloc_idx[nrelocs] = i;
4189 stub_reloc_offset[nrelocs++] = size;
4190 size += 4;
4191 break;
4192
4193 default:
4194 BFD_FAIL ();
4195 return FALSE;
4196 }
4197 }
4198
4199 stub_sec->size += size;
4200
4201 /* Stub size has already been computed in arm_size_one_stub. Check
4202 consistency. */
4203 BFD_ASSERT (size == stub_entry->stub_size);
4204
4205 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4206 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4207 sym_value |= 1;
4208
4209 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4210 in each stub. */
4211 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4212
4213 for (i = 0; i < nrelocs; i++)
4214 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4215 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4216 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4217 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
4218 {
4219 Elf_Internal_Rela rel;
4220 bfd_boolean unresolved_reloc;
4221 char *error_message;
4222 enum arm_st_branch_type branch_type
4223 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4224 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
4225 bfd_vma points_to = sym_value + stub_entry->target_addend;
4226
4227 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4228 rel.r_info = ELF32_R_INFO (0,
4229 template_sequence[stub_reloc_idx[i]].r_type);
4230 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
4231
4232 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4233 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4234 template should refer back to the instruction after the original
4235 branch. */
4236 points_to = sym_value;
4237
4238 /* There may be unintended consequences if this is not true. */
4239 BFD_ASSERT (stub_entry->h == NULL);
4240
4241 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4242 properly. We should probably use this function unconditionally,
4243 rather than only for certain relocations listed in the enclosing
4244 conditional, for the sake of consistency. */
4245 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4246 (template_sequence[stub_reloc_idx[i]].r_type),
4247 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4248 points_to, info, stub_entry->target_section, "", STT_FUNC,
4249 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4250 &unresolved_reloc, &error_message);
4251 }
4252 else
4253 {
4254 Elf_Internal_Rela rel;
4255 bfd_boolean unresolved_reloc;
4256 char *error_message;
4257 bfd_vma points_to = sym_value + stub_entry->target_addend
4258 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4259
4260 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4261 rel.r_info = ELF32_R_INFO (0,
4262 template_sequence[stub_reloc_idx[i]].r_type);
4263 rel.r_addend = 0;
4264
4265 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4266 (template_sequence[stub_reloc_idx[i]].r_type),
4267 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4268 points_to, info, stub_entry->target_section, "", STT_FUNC,
4269 stub_entry->branch_type,
4270 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4271 &error_message);
4272 }
4273
4274 return TRUE;
4275 #undef MAXRELOCS
4276 }
4277
4278 /* Calculate the template, template size and instruction size for a stub.
4279 Return value is the instruction size. */
4280
4281 static unsigned int
4282 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4283 const insn_sequence **stub_template,
4284 int *stub_template_size)
4285 {
4286 const insn_sequence *template_sequence = NULL;
4287 int template_size = 0, i;
4288 unsigned int size;
4289
4290 template_sequence = stub_definitions[stub_type].template_sequence;
4291 if (stub_template)
4292 *stub_template = template_sequence;
4293
4294 template_size = stub_definitions[stub_type].template_size;
4295 if (stub_template_size)
4296 *stub_template_size = template_size;
4297
4298 size = 0;
4299 for (i = 0; i < template_size; i++)
4300 {
4301 switch (template_sequence[i].type)
4302 {
4303 case THUMB16_TYPE:
4304 size += 2;
4305 break;
4306
4307 case ARM_TYPE:
4308 case THUMB32_TYPE:
4309 case DATA_TYPE:
4310 size += 4;
4311 break;
4312
4313 default:
4314 BFD_FAIL ();
4315 return 0;
4316 }
4317 }
4318
4319 return size;
4320 }
4321
4322 /* As above, but don't actually build the stub. Just bump offset so
4323 we know stub section sizes. */
4324
4325 static bfd_boolean
4326 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4327 void *in_arg ATTRIBUTE_UNUSED)
4328 {
4329 struct elf32_arm_stub_hash_entry *stub_entry;
4330 const insn_sequence *template_sequence;
4331 int template_size, size;
4332
4333 /* Massage our args to the form they really have. */
4334 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4335
4336 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4337 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4338
4339 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4340 &template_size);
4341
4342 stub_entry->stub_size = size;
4343 stub_entry->stub_template = template_sequence;
4344 stub_entry->stub_template_size = template_size;
4345
4346 size = (size + 7) & ~7;
4347 stub_entry->stub_sec->size += size;
4348
4349 return TRUE;
4350 }
4351
4352 /* External entry points for sizing and building linker stubs. */
4353
4354 /* Set up various things so that we can make a list of input sections
4355 for each output section included in the link. Returns -1 on error,
4356 0 when no stubs will be needed, and 1 on success. */
4357
4358 int
4359 elf32_arm_setup_section_lists (bfd *output_bfd,
4360 struct bfd_link_info *info)
4361 {
4362 bfd *input_bfd;
4363 unsigned int bfd_count;
4364 int top_id, top_index;
4365 asection *section;
4366 asection **input_list, **list;
4367 bfd_size_type amt;
4368 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4369
4370 if (htab == NULL)
4371 return 0;
4372 if (! is_elf_hash_table (htab))
4373 return 0;
4374
4375 /* Count the number of input BFDs and find the top input section id. */
4376 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4377 input_bfd != NULL;
4378 input_bfd = input_bfd->link_next)
4379 {
4380 bfd_count += 1;
4381 for (section = input_bfd->sections;
4382 section != NULL;
4383 section = section->next)
4384 {
4385 if (top_id < section->id)
4386 top_id = section->id;
4387 }
4388 }
4389 htab->bfd_count = bfd_count;
4390
4391 amt = sizeof (struct map_stub) * (top_id + 1);
4392 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4393 if (htab->stub_group == NULL)
4394 return -1;
4395 htab->top_id = top_id;
4396
4397 /* We can't use output_bfd->section_count here to find the top output
4398 section index as some sections may have been removed, and
4399 _bfd_strip_section_from_output doesn't renumber the indices. */
4400 for (section = output_bfd->sections, top_index = 0;
4401 section != NULL;
4402 section = section->next)
4403 {
4404 if (top_index < section->index)
4405 top_index = section->index;
4406 }
4407
4408 htab->top_index = top_index;
4409 amt = sizeof (asection *) * (top_index + 1);
4410 input_list = (asection **) bfd_malloc (amt);
4411 htab->input_list = input_list;
4412 if (input_list == NULL)
4413 return -1;
4414
4415 /* For sections we aren't interested in, mark their entries with a
4416 value we can check later. */
4417 list = input_list + top_index;
4418 do
4419 *list = bfd_abs_section_ptr;
4420 while (list-- != input_list);
4421
4422 for (section = output_bfd->sections;
4423 section != NULL;
4424 section = section->next)
4425 {
4426 if ((section->flags & SEC_CODE) != 0)
4427 input_list[section->index] = NULL;
4428 }
4429
4430 return 1;
4431 }
4432
4433 /* The linker repeatedly calls this function for each input section,
4434 in the order that input sections are linked into output sections.
4435 Build lists of input sections to determine groupings between which
4436 we may insert linker stubs. */
4437
4438 void
4439 elf32_arm_next_input_section (struct bfd_link_info *info,
4440 asection *isec)
4441 {
4442 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4443
4444 if (htab == NULL)
4445 return;
4446
4447 if (isec->output_section->index <= htab->top_index)
4448 {
4449 asection **list = htab->input_list + isec->output_section->index;
4450
4451 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4452 {
4453 /* Steal the link_sec pointer for our list. */
4454 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4455 /* This happens to make the list in reverse order,
4456 which we reverse later. */
4457 PREV_SEC (isec) = *list;
4458 *list = isec;
4459 }
4460 }
4461 }
4462
4463 /* See whether we can group stub sections together. Grouping stub
4464 sections may result in fewer stubs. More importantly, we need to
4465 put all .init* and .fini* stubs at the end of the .init or
4466 .fini output sections respectively, because glibc splits the
4467 _init and _fini functions into multiple parts. Putting a stub in
4468 the middle of a function is not a good idea. */
4469
4470 static void
4471 group_sections (struct elf32_arm_link_hash_table *htab,
4472 bfd_size_type stub_group_size,
4473 bfd_boolean stubs_always_after_branch)
4474 {
4475 asection **list = htab->input_list;
4476
4477 do
4478 {
4479 asection *tail = *list;
4480 asection *head;
4481
4482 if (tail == bfd_abs_section_ptr)
4483 continue;
4484
4485 /* Reverse the list: we must avoid placing stubs at the
4486 beginning of the section because the beginning of the text
4487 section may be required for an interrupt vector in bare metal
4488 code. */
4489 #define NEXT_SEC PREV_SEC
4490 head = NULL;
4491 while (tail != NULL)
4492 {
4493 /* Pop from tail. */
4494 asection *item = tail;
4495 tail = PREV_SEC (item);
4496
4497 /* Push on head. */
4498 NEXT_SEC (item) = head;
4499 head = item;
4500 }
4501
4502 while (head != NULL)
4503 {
4504 asection *curr;
4505 asection *next;
4506 bfd_vma stub_group_start = head->output_offset;
4507 bfd_vma end_of_next;
4508
4509 curr = head;
4510 while (NEXT_SEC (curr) != NULL)
4511 {
4512 next = NEXT_SEC (curr);
4513 end_of_next = next->output_offset + next->size;
4514 if (end_of_next - stub_group_start >= stub_group_size)
4515 /* End of NEXT is too far from start, so stop. */
4516 break;
4517 /* Add NEXT to the group. */
4518 curr = next;
4519 }
4520
4521 /* OK, the size from the start to the start of CURR is less
4522 than stub_group_size and thus can be handled by one stub
4523 section. (Or the head section is itself larger than
4524 stub_group_size, in which case we may be toast.)
4525 We should really be keeping track of the total size of
4526 stubs added here, as stubs contribute to the final output
4527 section size. */
4528 do
4529 {
4530 next = NEXT_SEC (head);
4531 /* Set up this stub group. */
4532 htab->stub_group[head->id].link_sec = curr;
4533 }
4534 while (head != curr && (head = next) != NULL);
4535
4536 /* But wait, there's more! Input sections up to stub_group_size
4537 bytes after the stub section can be handled by it too. */
4538 if (!stubs_always_after_branch)
4539 {
4540 stub_group_start = curr->output_offset + curr->size;
4541
4542 while (next != NULL)
4543 {
4544 end_of_next = next->output_offset + next->size;
4545 if (end_of_next - stub_group_start >= stub_group_size)
4546 /* End of NEXT is too far from stubs, so stop. */
4547 break;
4548 /* Add NEXT to the stub group. */
4549 head = next;
4550 next = NEXT_SEC (head);
4551 htab->stub_group[head->id].link_sec = curr;
4552 }
4553 }
4554 head = next;
4555 }
4556 }
4557 while (list++ != htab->input_list + htab->top_index);
4558
4559 free (htab->input_list);
4560 #undef PREV_SEC
4561 #undef NEXT_SEC
4562 }
4563
4564 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4565 erratum fix. */
4566
4567 static int
4568 a8_reloc_compare (const void *a, const void *b)
4569 {
4570 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4571 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4572
4573 if (ra->from < rb->from)
4574 return -1;
4575 else if (ra->from > rb->from)
4576 return 1;
4577 else
4578 return 0;
4579 }
4580
4581 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4582 const char *, char **);
4583
4584 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4585 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4586 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4587 otherwise. */
4588
4589 static bfd_boolean
4590 cortex_a8_erratum_scan (bfd *input_bfd,
4591 struct bfd_link_info *info,
4592 struct a8_erratum_fix **a8_fixes_p,
4593 unsigned int *num_a8_fixes_p,
4594 unsigned int *a8_fix_table_size_p,
4595 struct a8_erratum_reloc *a8_relocs,
4596 unsigned int num_a8_relocs,
4597 unsigned prev_num_a8_fixes,
4598 bfd_boolean *stub_changed_p)
4599 {
4600 asection *section;
4601 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4602 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4603 unsigned int num_a8_fixes = *num_a8_fixes_p;
4604 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4605
4606 if (htab == NULL)
4607 return FALSE;
4608
4609 for (section = input_bfd->sections;
4610 section != NULL;
4611 section = section->next)
4612 {
4613 bfd_byte *contents = NULL;
4614 struct _arm_elf_section_data *sec_data;
4615 unsigned int span;
4616 bfd_vma base_vma;
4617
4618 if (elf_section_type (section) != SHT_PROGBITS
4619 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4620 || (section->flags & SEC_EXCLUDE) != 0
4621 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4622 || (section->output_section == bfd_abs_section_ptr))
4623 continue;
4624
4625 base_vma = section->output_section->vma + section->output_offset;
4626
4627 if (elf_section_data (section)->this_hdr.contents != NULL)
4628 contents = elf_section_data (section)->this_hdr.contents;
4629 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4630 return TRUE;
4631
4632 sec_data = elf32_arm_section_data (section);
4633
4634 for (span = 0; span < sec_data->mapcount; span++)
4635 {
4636 unsigned int span_start = sec_data->map[span].vma;
4637 unsigned int span_end = (span == sec_data->mapcount - 1)
4638 ? section->size : sec_data->map[span + 1].vma;
4639 unsigned int i;
4640 char span_type = sec_data->map[span].type;
4641 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4642
4643 if (span_type != 't')
4644 continue;
4645
4646 /* Span is entirely within a single 4KB region: skip scanning. */
4647 if (((base_vma + span_start) & ~0xfff)
4648 == ((base_vma + span_end) & ~0xfff))
4649 continue;
4650
4651 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4652
4653 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4654 * The branch target is in the same 4KB region as the
4655 first half of the branch.
4656 * The instruction before the branch is a 32-bit
4657 length non-branch instruction. */
4658 for (i = span_start; i < span_end;)
4659 {
4660 unsigned int insn = bfd_getl16 (&contents[i]);
4661 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4662 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4663
4664 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4665 insn_32bit = TRUE;
4666
4667 if (insn_32bit)
4668 {
4669 /* Load the rest of the insn (in manual-friendly order). */
4670 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4671
4672 /* Encoding T4: B<c>.W. */
4673 is_b = (insn & 0xf800d000) == 0xf0009000;
4674 /* Encoding T1: BL<c>.W. */
4675 is_bl = (insn & 0xf800d000) == 0xf000d000;
4676 /* Encoding T2: BLX<c>.W. */
4677 is_blx = (insn & 0xf800d000) == 0xf000c000;
4678 /* Encoding T3: B<c>.W (not permitted in IT block). */
4679 is_bcc = (insn & 0xf800d000) == 0xf0008000
4680 && (insn & 0x07f00000) != 0x03800000;
4681 }
4682
4683 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4684
4685 if (((base_vma + i) & 0xfff) == 0xffe
4686 && insn_32bit
4687 && is_32bit_branch
4688 && last_was_32bit
4689 && ! last_was_branch)
4690 {
4691 bfd_signed_vma offset = 0;
4692 bfd_boolean force_target_arm = FALSE;
4693 bfd_boolean force_target_thumb = FALSE;
4694 bfd_vma target;
4695 enum elf32_arm_stub_type stub_type = arm_stub_none;
4696 struct a8_erratum_reloc key, *found;
4697 bfd_boolean use_plt = FALSE;
4698
4699 key.from = base_vma + i;
4700 found = (struct a8_erratum_reloc *)
4701 bsearch (&key, a8_relocs, num_a8_relocs,
4702 sizeof (struct a8_erratum_reloc),
4703 &a8_reloc_compare);
4704
4705 if (found)
4706 {
4707 char *error_message = NULL;
4708 struct elf_link_hash_entry *entry;
4709
4710 /* We don't care about the error returned from this
4711 function, only if there is glue or not. */
4712 entry = find_thumb_glue (info, found->sym_name,
4713 &error_message);
4714
4715 if (entry)
4716 found->non_a8_stub = TRUE;
4717
4718 /* Keep a simpler condition, for the sake of clarity. */
4719 if (htab->root.splt != NULL && found->hash != NULL
4720 && found->hash->root.plt.offset != (bfd_vma) -1)
4721 use_plt = TRUE;
4722
4723 if (found->r_type == R_ARM_THM_CALL)
4724 {
4725 if (found->branch_type == ST_BRANCH_TO_ARM
4726 || use_plt)
4727 force_target_arm = TRUE;
4728 else
4729 force_target_thumb = TRUE;
4730 }
4731 }
4732
4733 /* Check if we have an offending branch instruction. */
4734
4735 if (found && found->non_a8_stub)
4736 /* We've already made a stub for this instruction, e.g.
4737 it's a long branch or a Thumb->ARM stub. Assume that
4738 stub will suffice to work around the A8 erratum (see
4739 setting of always_after_branch above). */
4740 ;
4741 else if (is_bcc)
4742 {
4743 offset = (insn & 0x7ff) << 1;
4744 offset |= (insn & 0x3f0000) >> 4;
4745 offset |= (insn & 0x2000) ? 0x40000 : 0;
4746 offset |= (insn & 0x800) ? 0x80000 : 0;
4747 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4748 if (offset & 0x100000)
4749 offset |= ~ ((bfd_signed_vma) 0xfffff);
4750 stub_type = arm_stub_a8_veneer_b_cond;
4751 }
4752 else if (is_b || is_bl || is_blx)
4753 {
4754 int s = (insn & 0x4000000) != 0;
4755 int j1 = (insn & 0x2000) != 0;
4756 int j2 = (insn & 0x800) != 0;
4757 int i1 = !(j1 ^ s);
4758 int i2 = !(j2 ^ s);
4759
4760 offset = (insn & 0x7ff) << 1;
4761 offset |= (insn & 0x3ff0000) >> 4;
4762 offset |= i2 << 22;
4763 offset |= i1 << 23;
4764 offset |= s << 24;
4765 if (offset & 0x1000000)
4766 offset |= ~ ((bfd_signed_vma) 0xffffff);
4767
4768 if (is_blx)
4769 offset &= ~ ((bfd_signed_vma) 3);
4770
4771 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4772 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4773 }
4774
4775 if (stub_type != arm_stub_none)
4776 {
4777 bfd_vma pc_for_insn = base_vma + i + 4;
4778
4779 /* The original instruction is a BL, but the target is
4780 an ARM instruction. If we were not making a stub,
4781 the BL would have been converted to a BLX. Use the
4782 BLX stub instead in that case. */
4783 if (htab->use_blx && force_target_arm
4784 && stub_type == arm_stub_a8_veneer_bl)
4785 {
4786 stub_type = arm_stub_a8_veneer_blx;
4787 is_blx = TRUE;
4788 is_bl = FALSE;
4789 }
4790 /* Conversely, if the original instruction was
4791 BLX but the target is Thumb mode, use the BL
4792 stub. */
4793 else if (force_target_thumb
4794 && stub_type == arm_stub_a8_veneer_blx)
4795 {
4796 stub_type = arm_stub_a8_veneer_bl;
4797 is_blx = FALSE;
4798 is_bl = TRUE;
4799 }
4800
4801 if (is_blx)
4802 pc_for_insn &= ~ ((bfd_vma) 3);
4803
4804 /* If we found a relocation, use the proper destination,
4805 not the offset in the (unrelocated) instruction.
4806 Note this is always done if we switched the stub type
4807 above. */
4808 if (found)
4809 offset =
4810 (bfd_signed_vma) (found->destination - pc_for_insn);
4811
4812 /* If the stub will use a Thumb-mode branch to a
4813 PLT target, redirect it to the preceding Thumb
4814 entry point. */
4815 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4816 offset -= PLT_THUMB_STUB_SIZE;
4817
4818 target = pc_for_insn + offset;
4819
4820 /* The BLX stub is ARM-mode code. Adjust the offset to
4821 take the different PC value (+8 instead of +4) into
4822 account. */
4823 if (stub_type == arm_stub_a8_veneer_blx)
4824 offset += 4;
4825
4826 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4827 {
4828 char *stub_name = NULL;
4829
4830 if (num_a8_fixes == a8_fix_table_size)
4831 {
4832 a8_fix_table_size *= 2;
4833 a8_fixes = (struct a8_erratum_fix *)
4834 bfd_realloc (a8_fixes,
4835 sizeof (struct a8_erratum_fix)
4836 * a8_fix_table_size);
4837 }
4838
4839 if (num_a8_fixes < prev_num_a8_fixes)
4840 {
4841 /* If we're doing a subsequent scan,
4842 check if we've found the same fix as
4843 before, and try and reuse the stub
4844 name. */
4845 stub_name = a8_fixes[num_a8_fixes].stub_name;
4846 if ((a8_fixes[num_a8_fixes].section != section)
4847 || (a8_fixes[num_a8_fixes].offset != i))
4848 {
4849 free (stub_name);
4850 stub_name = NULL;
4851 *stub_changed_p = TRUE;
4852 }
4853 }
4854
4855 if (!stub_name)
4856 {
4857 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
4858 if (stub_name != NULL)
4859 sprintf (stub_name, "%x:%x", section->id, i);
4860 }
4861
4862 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4863 a8_fixes[num_a8_fixes].section = section;
4864 a8_fixes[num_a8_fixes].offset = i;
4865 a8_fixes[num_a8_fixes].addend = offset;
4866 a8_fixes[num_a8_fixes].orig_insn = insn;
4867 a8_fixes[num_a8_fixes].stub_name = stub_name;
4868 a8_fixes[num_a8_fixes].stub_type = stub_type;
4869 a8_fixes[num_a8_fixes].branch_type =
4870 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
4871
4872 num_a8_fixes++;
4873 }
4874 }
4875 }
4876
4877 i += insn_32bit ? 4 : 2;
4878 last_was_32bit = insn_32bit;
4879 last_was_branch = is_32bit_branch;
4880 }
4881 }
4882
4883 if (elf_section_data (section)->this_hdr.contents == NULL)
4884 free (contents);
4885 }
4886
4887 *a8_fixes_p = a8_fixes;
4888 *num_a8_fixes_p = num_a8_fixes;
4889 *a8_fix_table_size_p = a8_fix_table_size;
4890
4891 return FALSE;
4892 }
4893
4894 /* Determine and set the size of the stub section for a final link.
4895
4896 The basic idea here is to examine all the relocations looking for
4897 PC-relative calls to a target that is unreachable with a "bl"
4898 instruction. */
4899
4900 bfd_boolean
4901 elf32_arm_size_stubs (bfd *output_bfd,
4902 bfd *stub_bfd,
4903 struct bfd_link_info *info,
4904 bfd_signed_vma group_size,
4905 asection * (*add_stub_section) (const char *, asection *,
4906 unsigned int),
4907 void (*layout_sections_again) (void))
4908 {
4909 bfd_size_type stub_group_size;
4910 bfd_boolean stubs_always_after_branch;
4911 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4912 struct a8_erratum_fix *a8_fixes = NULL;
4913 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
4914 struct a8_erratum_reloc *a8_relocs = NULL;
4915 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4916
4917 if (htab == NULL)
4918 return FALSE;
4919
4920 if (htab->fix_cortex_a8)
4921 {
4922 a8_fixes = (struct a8_erratum_fix *)
4923 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4924 a8_relocs = (struct a8_erratum_reloc *)
4925 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
4926 }
4927
4928 /* Propagate mach to stub bfd, because it may not have been
4929 finalized when we created stub_bfd. */
4930 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4931 bfd_get_mach (output_bfd));
4932
4933 /* Stash our params away. */
4934 htab->stub_bfd = stub_bfd;
4935 htab->add_stub_section = add_stub_section;
4936 htab->layout_sections_again = layout_sections_again;
4937 stubs_always_after_branch = group_size < 0;
4938
4939 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4940 as the first half of a 32-bit branch straddling two 4K pages. This is a
4941 crude way of enforcing that. */
4942 if (htab->fix_cortex_a8)
4943 stubs_always_after_branch = 1;
4944
4945 if (group_size < 0)
4946 stub_group_size = -group_size;
4947 else
4948 stub_group_size = group_size;
4949
4950 if (stub_group_size == 1)
4951 {
4952 /* Default values. */
4953 /* Thumb branch range is +-4MB has to be used as the default
4954 maximum size (a given section can contain both ARM and Thumb
4955 code, so the worst case has to be taken into account).
4956
4957 This value is 24K less than that, which allows for 2025
4958 12-byte stubs. If we exceed that, then we will fail to link.
4959 The user will have to relink with an explicit group size
4960 option. */
4961 stub_group_size = 4170000;
4962 }
4963
4964 group_sections (htab, stub_group_size, stubs_always_after_branch);
4965
4966 /* If we're applying the cortex A8 fix, we need to determine the
4967 program header size now, because we cannot change it later --
4968 that could alter section placements. Notice the A8 erratum fix
4969 ends up requiring the section addresses to remain unchanged
4970 modulo the page size. That's something we cannot represent
4971 inside BFD, and we don't want to force the section alignment to
4972 be the page size. */
4973 if (htab->fix_cortex_a8)
4974 (*htab->layout_sections_again) ();
4975
4976 while (1)
4977 {
4978 bfd *input_bfd;
4979 unsigned int bfd_indx;
4980 asection *stub_sec;
4981 bfd_boolean stub_changed = FALSE;
4982 unsigned prev_num_a8_fixes = num_a8_fixes;
4983
4984 num_a8_fixes = 0;
4985 for (input_bfd = info->input_bfds, bfd_indx = 0;
4986 input_bfd != NULL;
4987 input_bfd = input_bfd->link_next, bfd_indx++)
4988 {
4989 Elf_Internal_Shdr *symtab_hdr;
4990 asection *section;
4991 Elf_Internal_Sym *local_syms = NULL;
4992
4993 if (!is_arm_elf (input_bfd))
4994 continue;
4995
4996 num_a8_relocs = 0;
4997
4998 /* We'll need the symbol table in a second. */
4999 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5000 if (symtab_hdr->sh_info == 0)
5001 continue;
5002
5003 /* Walk over each section attached to the input bfd. */
5004 for (section = input_bfd->sections;
5005 section != NULL;
5006 section = section->next)
5007 {
5008 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5009
5010 /* If there aren't any relocs, then there's nothing more
5011 to do. */
5012 if ((section->flags & SEC_RELOC) == 0
5013 || section->reloc_count == 0
5014 || (section->flags & SEC_CODE) == 0)
5015 continue;
5016
5017 /* If this section is a link-once section that will be
5018 discarded, then don't create any stubs. */
5019 if (section->output_section == NULL
5020 || section->output_section->owner != output_bfd)
5021 continue;
5022
5023 /* Get the relocs. */
5024 internal_relocs
5025 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5026 NULL, info->keep_memory);
5027 if (internal_relocs == NULL)
5028 goto error_ret_free_local;
5029
5030 /* Now examine each relocation. */
5031 irela = internal_relocs;
5032 irelaend = irela + section->reloc_count;
5033 for (; irela < irelaend; irela++)
5034 {
5035 unsigned int r_type, r_indx;
5036 enum elf32_arm_stub_type stub_type;
5037 struct elf32_arm_stub_hash_entry *stub_entry;
5038 asection *sym_sec;
5039 bfd_vma sym_value;
5040 bfd_vma destination;
5041 struct elf32_arm_link_hash_entry *hash;
5042 const char *sym_name;
5043 char *stub_name;
5044 const asection *id_sec;
5045 unsigned char st_type;
5046 enum arm_st_branch_type branch_type;
5047 bfd_boolean created_stub = FALSE;
5048
5049 r_type = ELF32_R_TYPE (irela->r_info);
5050 r_indx = ELF32_R_SYM (irela->r_info);
5051
5052 if (r_type >= (unsigned int) R_ARM_max)
5053 {
5054 bfd_set_error (bfd_error_bad_value);
5055 error_ret_free_internal:
5056 if (elf_section_data (section)->relocs == NULL)
5057 free (internal_relocs);
5058 goto error_ret_free_local;
5059 }
5060
5061 hash = NULL;
5062 if (r_indx >= symtab_hdr->sh_info)
5063 hash = elf32_arm_hash_entry
5064 (elf_sym_hashes (input_bfd)
5065 [r_indx - symtab_hdr->sh_info]);
5066
5067 /* Only look for stubs on branch instructions, or
5068 non-relaxed TLSCALL */
5069 if ((r_type != (unsigned int) R_ARM_CALL)
5070 && (r_type != (unsigned int) R_ARM_THM_CALL)
5071 && (r_type != (unsigned int) R_ARM_JUMP24)
5072 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5073 && (r_type != (unsigned int) R_ARM_THM_XPC22)
5074 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
5075 && (r_type != (unsigned int) R_ARM_PLT32)
5076 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5077 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5078 && r_type == elf32_arm_tls_transition
5079 (info, r_type, &hash->root)
5080 && ((hash ? hash->tls_type
5081 : (elf32_arm_local_got_tls_type
5082 (input_bfd)[r_indx]))
5083 & GOT_TLS_GDESC) != 0))
5084 continue;
5085
5086 /* Now determine the call target, its name, value,
5087 section. */
5088 sym_sec = NULL;
5089 sym_value = 0;
5090 destination = 0;
5091 sym_name = NULL;
5092
5093 if (r_type == (unsigned int) R_ARM_TLS_CALL
5094 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5095 {
5096 /* A non-relaxed TLS call. The target is the
5097 plt-resident trampoline and nothing to do
5098 with the symbol. */
5099 BFD_ASSERT (htab->tls_trampoline > 0);
5100 sym_sec = htab->root.splt;
5101 sym_value = htab->tls_trampoline;
5102 hash = 0;
5103 st_type = STT_FUNC;
5104 branch_type = ST_BRANCH_TO_ARM;
5105 }
5106 else if (!hash)
5107 {
5108 /* It's a local symbol. */
5109 Elf_Internal_Sym *sym;
5110
5111 if (local_syms == NULL)
5112 {
5113 local_syms
5114 = (Elf_Internal_Sym *) symtab_hdr->contents;
5115 if (local_syms == NULL)
5116 local_syms
5117 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5118 symtab_hdr->sh_info, 0,
5119 NULL, NULL, NULL);
5120 if (local_syms == NULL)
5121 goto error_ret_free_internal;
5122 }
5123
5124 sym = local_syms + r_indx;
5125 if (sym->st_shndx == SHN_UNDEF)
5126 sym_sec = bfd_und_section_ptr;
5127 else if (sym->st_shndx == SHN_ABS)
5128 sym_sec = bfd_abs_section_ptr;
5129 else if (sym->st_shndx == SHN_COMMON)
5130 sym_sec = bfd_com_section_ptr;
5131 else
5132 sym_sec =
5133 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5134
5135 if (!sym_sec)
5136 /* This is an undefined symbol. It can never
5137 be resolved. */
5138 continue;
5139
5140 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5141 sym_value = sym->st_value;
5142 destination = (sym_value + irela->r_addend
5143 + sym_sec->output_offset
5144 + sym_sec->output_section->vma);
5145 st_type = ELF_ST_TYPE (sym->st_info);
5146 branch_type = ARM_SYM_BRANCH_TYPE (sym);
5147 sym_name
5148 = bfd_elf_string_from_elf_section (input_bfd,
5149 symtab_hdr->sh_link,
5150 sym->st_name);
5151 }
5152 else
5153 {
5154 /* It's an external symbol. */
5155 while (hash->root.root.type == bfd_link_hash_indirect
5156 || hash->root.root.type == bfd_link_hash_warning)
5157 hash = ((struct elf32_arm_link_hash_entry *)
5158 hash->root.root.u.i.link);
5159
5160 if (hash->root.root.type == bfd_link_hash_defined
5161 || hash->root.root.type == bfd_link_hash_defweak)
5162 {
5163 sym_sec = hash->root.root.u.def.section;
5164 sym_value = hash->root.root.u.def.value;
5165
5166 struct elf32_arm_link_hash_table *globals =
5167 elf32_arm_hash_table (info);
5168
5169 /* For a destination in a shared library,
5170 use the PLT stub as target address to
5171 decide whether a branch stub is
5172 needed. */
5173 if (globals != NULL
5174 && globals->root.splt != NULL
5175 && hash != NULL
5176 && hash->root.plt.offset != (bfd_vma) -1)
5177 {
5178 sym_sec = globals->root.splt;
5179 sym_value = hash->root.plt.offset;
5180 if (sym_sec->output_section != NULL)
5181 destination = (sym_value
5182 + sym_sec->output_offset
5183 + sym_sec->output_section->vma);
5184 }
5185 else if (sym_sec->output_section != NULL)
5186 destination = (sym_value + irela->r_addend
5187 + sym_sec->output_offset
5188 + sym_sec->output_section->vma);
5189 }
5190 else if ((hash->root.root.type == bfd_link_hash_undefined)
5191 || (hash->root.root.type == bfd_link_hash_undefweak))
5192 {
5193 /* For a shared library, use the PLT stub as
5194 target address to decide whether a long
5195 branch stub is needed.
5196 For absolute code, they cannot be handled. */
5197 struct elf32_arm_link_hash_table *globals =
5198 elf32_arm_hash_table (info);
5199
5200 if (globals != NULL
5201 && globals->root.splt != NULL
5202 && hash != NULL
5203 && hash->root.plt.offset != (bfd_vma) -1)
5204 {
5205 sym_sec = globals->root.splt;
5206 sym_value = hash->root.plt.offset;
5207 if (sym_sec->output_section != NULL)
5208 destination = (sym_value
5209 + sym_sec->output_offset
5210 + sym_sec->output_section->vma);
5211 }
5212 else
5213 continue;
5214 }
5215 else
5216 {
5217 bfd_set_error (bfd_error_bad_value);
5218 goto error_ret_free_internal;
5219 }
5220 st_type = hash->root.type;
5221 branch_type = hash->root.target_internal;
5222 sym_name = hash->root.root.root.string;
5223 }
5224
5225 do
5226 {
5227 /* Determine what (if any) linker stub is needed. */
5228 stub_type = arm_type_of_stub (info, section, irela,
5229 st_type, &branch_type,
5230 hash, destination, sym_sec,
5231 input_bfd, sym_name);
5232 if (stub_type == arm_stub_none)
5233 break;
5234
5235 /* Support for grouping stub sections. */
5236 id_sec = htab->stub_group[section->id].link_sec;
5237
5238 /* Get the name of this stub. */
5239 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
5240 irela, stub_type);
5241 if (!stub_name)
5242 goto error_ret_free_internal;
5243
5244 /* We've either created a stub for this reloc already,
5245 or we are about to. */
5246 created_stub = TRUE;
5247
5248 stub_entry = arm_stub_hash_lookup
5249 (&htab->stub_hash_table, stub_name,
5250 FALSE, FALSE);
5251 if (stub_entry != NULL)
5252 {
5253 /* The proper stub has already been created. */
5254 free (stub_name);
5255 stub_entry->target_value = sym_value;
5256 break;
5257 }
5258
5259 stub_entry = elf32_arm_add_stub (stub_name, section,
5260 htab);
5261 if (stub_entry == NULL)
5262 {
5263 free (stub_name);
5264 goto error_ret_free_internal;
5265 }
5266
5267 stub_entry->target_value = sym_value;
5268 stub_entry->target_section = sym_sec;
5269 stub_entry->stub_type = stub_type;
5270 stub_entry->h = hash;
5271 stub_entry->branch_type = branch_type;
5272
5273 if (sym_name == NULL)
5274 sym_name = "unnamed";
5275 stub_entry->output_name = (char *)
5276 bfd_alloc (htab->stub_bfd,
5277 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5278 + strlen (sym_name));
5279 if (stub_entry->output_name == NULL)
5280 {
5281 free (stub_name);
5282 goto error_ret_free_internal;
5283 }
5284
5285 /* For historical reasons, use the existing names for
5286 ARM-to-Thumb and Thumb-to-ARM stubs. */
5287 if ((r_type == (unsigned int) R_ARM_THM_CALL
5288 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5289 && branch_type == ST_BRANCH_TO_ARM)
5290 sprintf (stub_entry->output_name,
5291 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5292 else if ((r_type == (unsigned int) R_ARM_CALL
5293 || r_type == (unsigned int) R_ARM_JUMP24)
5294 && branch_type == ST_BRANCH_TO_THUMB)
5295 sprintf (stub_entry->output_name,
5296 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5297 else
5298 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5299 sym_name);
5300
5301 stub_changed = TRUE;
5302 }
5303 while (0);
5304
5305 /* Look for relocations which might trigger Cortex-A8
5306 erratum. */
5307 if (htab->fix_cortex_a8
5308 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5309 || r_type == (unsigned int) R_ARM_THM_JUMP19
5310 || r_type == (unsigned int) R_ARM_THM_CALL
5311 || r_type == (unsigned int) R_ARM_THM_XPC22))
5312 {
5313 bfd_vma from = section->output_section->vma
5314 + section->output_offset
5315 + irela->r_offset;
5316
5317 if ((from & 0xfff) == 0xffe)
5318 {
5319 /* Found a candidate. Note we haven't checked the
5320 destination is within 4K here: if we do so (and
5321 don't create an entry in a8_relocs) we can't tell
5322 that a branch should have been relocated when
5323 scanning later. */
5324 if (num_a8_relocs == a8_reloc_table_size)
5325 {
5326 a8_reloc_table_size *= 2;
5327 a8_relocs = (struct a8_erratum_reloc *)
5328 bfd_realloc (a8_relocs,
5329 sizeof (struct a8_erratum_reloc)
5330 * a8_reloc_table_size);
5331 }
5332
5333 a8_relocs[num_a8_relocs].from = from;
5334 a8_relocs[num_a8_relocs].destination = destination;
5335 a8_relocs[num_a8_relocs].r_type = r_type;
5336 a8_relocs[num_a8_relocs].branch_type = branch_type;
5337 a8_relocs[num_a8_relocs].sym_name = sym_name;
5338 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5339 a8_relocs[num_a8_relocs].hash = hash;
5340
5341 num_a8_relocs++;
5342 }
5343 }
5344 }
5345
5346 /* We're done with the internal relocs, free them. */
5347 if (elf_section_data (section)->relocs == NULL)
5348 free (internal_relocs);
5349 }
5350
5351 if (htab->fix_cortex_a8)
5352 {
5353 /* Sort relocs which might apply to Cortex-A8 erratum. */
5354 qsort (a8_relocs, num_a8_relocs,
5355 sizeof (struct a8_erratum_reloc),
5356 &a8_reloc_compare);
5357
5358 /* Scan for branches which might trigger Cortex-A8 erratum. */
5359 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5360 &num_a8_fixes, &a8_fix_table_size,
5361 a8_relocs, num_a8_relocs,
5362 prev_num_a8_fixes, &stub_changed)
5363 != 0)
5364 goto error_ret_free_local;
5365 }
5366 }
5367
5368 if (prev_num_a8_fixes != num_a8_fixes)
5369 stub_changed = TRUE;
5370
5371 if (!stub_changed)
5372 break;
5373
5374 /* OK, we've added some stubs. Find out the new size of the
5375 stub sections. */
5376 for (stub_sec = htab->stub_bfd->sections;
5377 stub_sec != NULL;
5378 stub_sec = stub_sec->next)
5379 {
5380 /* Ignore non-stub sections. */
5381 if (!strstr (stub_sec->name, STUB_SUFFIX))
5382 continue;
5383
5384 stub_sec->size = 0;
5385 }
5386
5387 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5388
5389 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5390 if (htab->fix_cortex_a8)
5391 for (i = 0; i < num_a8_fixes; i++)
5392 {
5393 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5394 a8_fixes[i].section, htab);
5395
5396 if (stub_sec == NULL)
5397 goto error_ret_free_local;
5398
5399 stub_sec->size
5400 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5401 NULL);
5402 }
5403
5404
5405 /* Ask the linker to do its stuff. */
5406 (*htab->layout_sections_again) ();
5407 }
5408
5409 /* Add stubs for Cortex-A8 erratum fixes now. */
5410 if (htab->fix_cortex_a8)
5411 {
5412 for (i = 0; i < num_a8_fixes; i++)
5413 {
5414 struct elf32_arm_stub_hash_entry *stub_entry;
5415 char *stub_name = a8_fixes[i].stub_name;
5416 asection *section = a8_fixes[i].section;
5417 unsigned int section_id = a8_fixes[i].section->id;
5418 asection *link_sec = htab->stub_group[section_id].link_sec;
5419 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5420 const insn_sequence *template_sequence;
5421 int template_size, size = 0;
5422
5423 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5424 TRUE, FALSE);
5425 if (stub_entry == NULL)
5426 {
5427 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5428 section->owner,
5429 stub_name);
5430 return FALSE;
5431 }
5432
5433 stub_entry->stub_sec = stub_sec;
5434 stub_entry->stub_offset = 0;
5435 stub_entry->id_sec = link_sec;
5436 stub_entry->stub_type = a8_fixes[i].stub_type;
5437 stub_entry->target_section = a8_fixes[i].section;
5438 stub_entry->target_value = a8_fixes[i].offset;
5439 stub_entry->target_addend = a8_fixes[i].addend;
5440 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5441 stub_entry->branch_type = a8_fixes[i].branch_type;
5442
5443 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5444 &template_sequence,
5445 &template_size);
5446
5447 stub_entry->stub_size = size;
5448 stub_entry->stub_template = template_sequence;
5449 stub_entry->stub_template_size = template_size;
5450 }
5451
5452 /* Stash the Cortex-A8 erratum fix array for use later in
5453 elf32_arm_write_section(). */
5454 htab->a8_erratum_fixes = a8_fixes;
5455 htab->num_a8_erratum_fixes = num_a8_fixes;
5456 }
5457 else
5458 {
5459 htab->a8_erratum_fixes = NULL;
5460 htab->num_a8_erratum_fixes = 0;
5461 }
5462 return TRUE;
5463
5464 error_ret_free_local:
5465 return FALSE;
5466 }
5467
5468 /* Build all the stubs associated with the current output file. The
5469 stubs are kept in a hash table attached to the main linker hash
5470 table. We also set up the .plt entries for statically linked PIC
5471 functions here. This function is called via arm_elf_finish in the
5472 linker. */
5473
5474 bfd_boolean
5475 elf32_arm_build_stubs (struct bfd_link_info *info)
5476 {
5477 asection *stub_sec;
5478 struct bfd_hash_table *table;
5479 struct elf32_arm_link_hash_table *htab;
5480
5481 htab = elf32_arm_hash_table (info);
5482 if (htab == NULL)
5483 return FALSE;
5484
5485 for (stub_sec = htab->stub_bfd->sections;
5486 stub_sec != NULL;
5487 stub_sec = stub_sec->next)
5488 {
5489 bfd_size_type size;
5490
5491 /* Ignore non-stub sections. */
5492 if (!strstr (stub_sec->name, STUB_SUFFIX))
5493 continue;
5494
5495 /* Allocate memory to hold the linker stubs. */
5496 size = stub_sec->size;
5497 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5498 if (stub_sec->contents == NULL && size != 0)
5499 return FALSE;
5500 stub_sec->size = 0;
5501 }
5502
5503 /* Build the stubs as directed by the stub hash table. */
5504 table = &htab->stub_hash_table;
5505 bfd_hash_traverse (table, arm_build_one_stub, info);
5506 if (htab->fix_cortex_a8)
5507 {
5508 /* Place the cortex a8 stubs last. */
5509 htab->fix_cortex_a8 = -1;
5510 bfd_hash_traverse (table, arm_build_one_stub, info);
5511 }
5512
5513 return TRUE;
5514 }
5515
5516 /* Locate the Thumb encoded calling stub for NAME. */
5517
5518 static struct elf_link_hash_entry *
5519 find_thumb_glue (struct bfd_link_info *link_info,
5520 const char *name,
5521 char **error_message)
5522 {
5523 char *tmp_name;
5524 struct elf_link_hash_entry *hash;
5525 struct elf32_arm_link_hash_table *hash_table;
5526
5527 /* We need a pointer to the armelf specific hash table. */
5528 hash_table = elf32_arm_hash_table (link_info);
5529 if (hash_table == NULL)
5530 return NULL;
5531
5532 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5533 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5534
5535 BFD_ASSERT (tmp_name);
5536
5537 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5538
5539 hash = elf_link_hash_lookup
5540 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5541
5542 if (hash == NULL
5543 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5544 tmp_name, name) == -1)
5545 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5546
5547 free (tmp_name);
5548
5549 return hash;
5550 }
5551
5552 /* Locate the ARM encoded calling stub for NAME. */
5553
5554 static struct elf_link_hash_entry *
5555 find_arm_glue (struct bfd_link_info *link_info,
5556 const char *name,
5557 char **error_message)
5558 {
5559 char *tmp_name;
5560 struct elf_link_hash_entry *myh;
5561 struct elf32_arm_link_hash_table *hash_table;
5562
5563 /* We need a pointer to the elfarm specific hash table. */
5564 hash_table = elf32_arm_hash_table (link_info);
5565 if (hash_table == NULL)
5566 return NULL;
5567
5568 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5569 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5570
5571 BFD_ASSERT (tmp_name);
5572
5573 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5574
5575 myh = elf_link_hash_lookup
5576 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5577
5578 if (myh == NULL
5579 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5580 tmp_name, name) == -1)
5581 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5582
5583 free (tmp_name);
5584
5585 return myh;
5586 }
5587
5588 /* ARM->Thumb glue (static images):
5589
5590 .arm
5591 __func_from_arm:
5592 ldr r12, __func_addr
5593 bx r12
5594 __func_addr:
5595 .word func @ behave as if you saw a ARM_32 reloc.
5596
5597 (v5t static images)
5598 .arm
5599 __func_from_arm:
5600 ldr pc, __func_addr
5601 __func_addr:
5602 .word func @ behave as if you saw a ARM_32 reloc.
5603
5604 (relocatable images)
5605 .arm
5606 __func_from_arm:
5607 ldr r12, __func_offset
5608 add r12, r12, pc
5609 bx r12
5610 __func_offset:
5611 .word func - . */
5612
5613 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5614 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5615 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5616 static const insn32 a2t3_func_addr_insn = 0x00000001;
5617
5618 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5619 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5620 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5621
5622 #define ARM2THUMB_PIC_GLUE_SIZE 16
5623 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5624 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5625 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5626
5627 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5628
5629 .thumb .thumb
5630 .align 2 .align 2
5631 __func_from_thumb: __func_from_thumb:
5632 bx pc push {r6, lr}
5633 nop ldr r6, __func_addr
5634 .arm mov lr, pc
5635 b func bx r6
5636 .arm
5637 ;; back_to_thumb
5638 ldmia r13! {r6, lr}
5639 bx lr
5640 __func_addr:
5641 .word func */
5642
5643 #define THUMB2ARM_GLUE_SIZE 8
5644 static const insn16 t2a1_bx_pc_insn = 0x4778;
5645 static const insn16 t2a2_noop_insn = 0x46c0;
5646 static const insn32 t2a3_b_insn = 0xea000000;
5647
5648 #define VFP11_ERRATUM_VENEER_SIZE 8
5649
5650 #define ARM_BX_VENEER_SIZE 12
5651 static const insn32 armbx1_tst_insn = 0xe3100001;
5652 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5653 static const insn32 armbx3_bx_insn = 0xe12fff10;
5654
5655 #ifndef ELFARM_NABI_C_INCLUDED
5656 static void
5657 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5658 {
5659 asection * s;
5660 bfd_byte * contents;
5661
5662 if (size == 0)
5663 {
5664 /* Do not include empty glue sections in the output. */
5665 if (abfd != NULL)
5666 {
5667 s = bfd_get_linker_section (abfd, name);
5668 if (s != NULL)
5669 s->flags |= SEC_EXCLUDE;
5670 }
5671 return;
5672 }
5673
5674 BFD_ASSERT (abfd != NULL);
5675
5676 s = bfd_get_linker_section (abfd, name);
5677 BFD_ASSERT (s != NULL);
5678
5679 contents = (bfd_byte *) bfd_alloc (abfd, size);
5680
5681 BFD_ASSERT (s->size == size);
5682 s->contents = contents;
5683 }
5684
5685 bfd_boolean
5686 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5687 {
5688 struct elf32_arm_link_hash_table * globals;
5689
5690 globals = elf32_arm_hash_table (info);
5691 BFD_ASSERT (globals != NULL);
5692
5693 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5694 globals->arm_glue_size,
5695 ARM2THUMB_GLUE_SECTION_NAME);
5696
5697 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5698 globals->thumb_glue_size,
5699 THUMB2ARM_GLUE_SECTION_NAME);
5700
5701 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5702 globals->vfp11_erratum_glue_size,
5703 VFP11_ERRATUM_VENEER_SECTION_NAME);
5704
5705 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5706 globals->bx_glue_size,
5707 ARM_BX_GLUE_SECTION_NAME);
5708
5709 return TRUE;
5710 }
5711
5712 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5713 returns the symbol identifying the stub. */
5714
5715 static struct elf_link_hash_entry *
5716 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5717 struct elf_link_hash_entry * h)
5718 {
5719 const char * name = h->root.root.string;
5720 asection * s;
5721 char * tmp_name;
5722 struct elf_link_hash_entry * myh;
5723 struct bfd_link_hash_entry * bh;
5724 struct elf32_arm_link_hash_table * globals;
5725 bfd_vma val;
5726 bfd_size_type size;
5727
5728 globals = elf32_arm_hash_table (link_info);
5729 BFD_ASSERT (globals != NULL);
5730 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5731
5732 s = bfd_get_linker_section
5733 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5734
5735 BFD_ASSERT (s != NULL);
5736
5737 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5738 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5739
5740 BFD_ASSERT (tmp_name);
5741
5742 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5743
5744 myh = elf_link_hash_lookup
5745 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5746
5747 if (myh != NULL)
5748 {
5749 /* We've already seen this guy. */
5750 free (tmp_name);
5751 return myh;
5752 }
5753
5754 /* The only trick here is using hash_table->arm_glue_size as the value.
5755 Even though the section isn't allocated yet, this is where we will be
5756 putting it. The +1 on the value marks that the stub has not been
5757 output yet - not that it is a Thumb function. */
5758 bh = NULL;
5759 val = globals->arm_glue_size + 1;
5760 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5761 tmp_name, BSF_GLOBAL, s, val,
5762 NULL, TRUE, FALSE, &bh);
5763
5764 myh = (struct elf_link_hash_entry *) bh;
5765 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5766 myh->forced_local = 1;
5767
5768 free (tmp_name);
5769
5770 if (link_info->shared || globals->root.is_relocatable_executable
5771 || globals->pic_veneer)
5772 size = ARM2THUMB_PIC_GLUE_SIZE;
5773 else if (globals->use_blx)
5774 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
5775 else
5776 size = ARM2THUMB_STATIC_GLUE_SIZE;
5777
5778 s->size += size;
5779 globals->arm_glue_size += size;
5780
5781 return myh;
5782 }
5783
5784 /* Allocate space for ARMv4 BX veneers. */
5785
5786 static void
5787 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5788 {
5789 asection * s;
5790 struct elf32_arm_link_hash_table *globals;
5791 char *tmp_name;
5792 struct elf_link_hash_entry *myh;
5793 struct bfd_link_hash_entry *bh;
5794 bfd_vma val;
5795
5796 /* BX PC does not need a veneer. */
5797 if (reg == 15)
5798 return;
5799
5800 globals = elf32_arm_hash_table (link_info);
5801 BFD_ASSERT (globals != NULL);
5802 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5803
5804 /* Check if this veneer has already been allocated. */
5805 if (globals->bx_glue_offset[reg])
5806 return;
5807
5808 s = bfd_get_linker_section
5809 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5810
5811 BFD_ASSERT (s != NULL);
5812
5813 /* Add symbol for veneer. */
5814 tmp_name = (char *)
5815 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
5816
5817 BFD_ASSERT (tmp_name);
5818
5819 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
5820
5821 myh = elf_link_hash_lookup
5822 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
5823
5824 BFD_ASSERT (myh == NULL);
5825
5826 bh = NULL;
5827 val = globals->bx_glue_size;
5828 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5829 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5830 NULL, TRUE, FALSE, &bh);
5831
5832 myh = (struct elf_link_hash_entry *) bh;
5833 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5834 myh->forced_local = 1;
5835
5836 s->size += ARM_BX_VENEER_SIZE;
5837 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5838 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5839 }
5840
5841
5842 /* Add an entry to the code/data map for section SEC. */
5843
5844 static void
5845 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5846 {
5847 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5848 unsigned int newidx;
5849
5850 if (sec_data->map == NULL)
5851 {
5852 sec_data->map = (elf32_arm_section_map *)
5853 bfd_malloc (sizeof (elf32_arm_section_map));
5854 sec_data->mapcount = 0;
5855 sec_data->mapsize = 1;
5856 }
5857
5858 newidx = sec_data->mapcount++;
5859
5860 if (sec_data->mapcount > sec_data->mapsize)
5861 {
5862 sec_data->mapsize *= 2;
5863 sec_data->map = (elf32_arm_section_map *)
5864 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5865 * sizeof (elf32_arm_section_map));
5866 }
5867
5868 if (sec_data->map)
5869 {
5870 sec_data->map[newidx].vma = vma;
5871 sec_data->map[newidx].type = type;
5872 }
5873 }
5874
5875
5876 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5877 veneers are handled for now. */
5878
5879 static bfd_vma
5880 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5881 elf32_vfp11_erratum_list *branch,
5882 bfd *branch_bfd,
5883 asection *branch_sec,
5884 unsigned int offset)
5885 {
5886 asection *s;
5887 struct elf32_arm_link_hash_table *hash_table;
5888 char *tmp_name;
5889 struct elf_link_hash_entry *myh;
5890 struct bfd_link_hash_entry *bh;
5891 bfd_vma val;
5892 struct _arm_elf_section_data *sec_data;
5893 elf32_vfp11_erratum_list *newerr;
5894
5895 hash_table = elf32_arm_hash_table (link_info);
5896 BFD_ASSERT (hash_table != NULL);
5897 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
5898
5899 s = bfd_get_linker_section
5900 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
5901
5902 sec_data = elf32_arm_section_data (s);
5903
5904 BFD_ASSERT (s != NULL);
5905
5906 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5907 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
5908
5909 BFD_ASSERT (tmp_name);
5910
5911 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5912 hash_table->num_vfp11_fixes);
5913
5914 myh = elf_link_hash_lookup
5915 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5916
5917 BFD_ASSERT (myh == NULL);
5918
5919 bh = NULL;
5920 val = hash_table->vfp11_erratum_glue_size;
5921 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5922 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5923 NULL, TRUE, FALSE, &bh);
5924
5925 myh = (struct elf_link_hash_entry *) bh;
5926 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5927 myh->forced_local = 1;
5928
5929 /* Link veneer back to calling location. */
5930 sec_data->erratumcount += 1;
5931 newerr = (elf32_vfp11_erratum_list *)
5932 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5933
5934 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5935 newerr->vma = -1;
5936 newerr->u.v.branch = branch;
5937 newerr->u.v.id = hash_table->num_vfp11_fixes;
5938 branch->u.b.veneer = newerr;
5939
5940 newerr->next = sec_data->erratumlist;
5941 sec_data->erratumlist = newerr;
5942
5943 /* A symbol for the return from the veneer. */
5944 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5945 hash_table->num_vfp11_fixes);
5946
5947 myh = elf_link_hash_lookup
5948 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5949
5950 if (myh != NULL)
5951 abort ();
5952
5953 bh = NULL;
5954 val = offset + 4;
5955 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5956 branch_sec, val, NULL, TRUE, FALSE, &bh);
5957
5958 myh = (struct elf_link_hash_entry *) bh;
5959 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5960 myh->forced_local = 1;
5961
5962 free (tmp_name);
5963
5964 /* Generate a mapping symbol for the veneer section, and explicitly add an
5965 entry for that symbol to the code/data map for the section. */
5966 if (hash_table->vfp11_erratum_glue_size == 0)
5967 {
5968 bh = NULL;
5969 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5970 ever requires this erratum fix. */
5971 _bfd_generic_link_add_one_symbol (link_info,
5972 hash_table->bfd_of_glue_owner, "$a",
5973 BSF_LOCAL, s, 0, NULL,
5974 TRUE, FALSE, &bh);
5975
5976 myh = (struct elf_link_hash_entry *) bh;
5977 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5978 myh->forced_local = 1;
5979
5980 /* The elf32_arm_init_maps function only cares about symbols from input
5981 BFDs. We must make a note of this generated mapping symbol
5982 ourselves so that code byteswapping works properly in
5983 elf32_arm_write_section. */
5984 elf32_arm_section_map_add (s, 'a', 0);
5985 }
5986
5987 s->size += VFP11_ERRATUM_VENEER_SIZE;
5988 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5989 hash_table->num_vfp11_fixes++;
5990
5991 /* The offset of the veneer. */
5992 return val;
5993 }
5994
5995 #define ARM_GLUE_SECTION_FLAGS \
5996 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5997 | SEC_READONLY | SEC_LINKER_CREATED)
5998
5999 /* Create a fake section for use by the ARM backend of the linker. */
6000
6001 static bfd_boolean
6002 arm_make_glue_section (bfd * abfd, const char * name)
6003 {
6004 asection * sec;
6005
6006 sec = bfd_get_linker_section (abfd, name);
6007 if (sec != NULL)
6008 /* Already made. */
6009 return TRUE;
6010
6011 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
6012
6013 if (sec == NULL
6014 || !bfd_set_section_alignment (abfd, sec, 2))
6015 return FALSE;
6016
6017 /* Set the gc mark to prevent the section from being removed by garbage
6018 collection, despite the fact that no relocs refer to this section. */
6019 sec->gc_mark = 1;
6020
6021 return TRUE;
6022 }
6023
6024 /* Add the glue sections to ABFD. This function is called from the
6025 linker scripts in ld/emultempl/{armelf}.em. */
6026
6027 bfd_boolean
6028 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6029 struct bfd_link_info *info)
6030 {
6031 /* If we are only performing a partial
6032 link do not bother adding the glue. */
6033 if (info->relocatable)
6034 return TRUE;
6035
6036 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6037 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6038 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6039 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
6040 }
6041
6042 /* Select a BFD to be used to hold the sections used by the glue code.
6043 This function is called from the linker scripts in ld/emultempl/
6044 {armelf/pe}.em. */
6045
6046 bfd_boolean
6047 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
6048 {
6049 struct elf32_arm_link_hash_table *globals;
6050
6051 /* If we are only performing a partial link
6052 do not bother getting a bfd to hold the glue. */
6053 if (info->relocatable)
6054 return TRUE;
6055
6056 /* Make sure we don't attach the glue sections to a dynamic object. */
6057 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6058
6059 globals = elf32_arm_hash_table (info);
6060 BFD_ASSERT (globals != NULL);
6061
6062 if (globals->bfd_of_glue_owner != NULL)
6063 return TRUE;
6064
6065 /* Save the bfd for later use. */
6066 globals->bfd_of_glue_owner = abfd;
6067
6068 return TRUE;
6069 }
6070
6071 static void
6072 check_use_blx (struct elf32_arm_link_hash_table *globals)
6073 {
6074 int cpu_arch;
6075
6076 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
6077 Tag_CPU_arch);
6078
6079 if (globals->fix_arm1176)
6080 {
6081 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6082 globals->use_blx = 1;
6083 }
6084 else
6085 {
6086 if (cpu_arch > TAG_CPU_ARCH_V4T)
6087 globals->use_blx = 1;
6088 }
6089 }
6090
6091 bfd_boolean
6092 bfd_elf32_arm_process_before_allocation (bfd *abfd,
6093 struct bfd_link_info *link_info)
6094 {
6095 Elf_Internal_Shdr *symtab_hdr;
6096 Elf_Internal_Rela *internal_relocs = NULL;
6097 Elf_Internal_Rela *irel, *irelend;
6098 bfd_byte *contents = NULL;
6099
6100 asection *sec;
6101 struct elf32_arm_link_hash_table *globals;
6102
6103 /* If we are only performing a partial link do not bother
6104 to construct any glue. */
6105 if (link_info->relocatable)
6106 return TRUE;
6107
6108 /* Here we have a bfd that is to be included on the link. We have a
6109 hook to do reloc rummaging, before section sizes are nailed down. */
6110 globals = elf32_arm_hash_table (link_info);
6111 BFD_ASSERT (globals != NULL);
6112
6113 check_use_blx (globals);
6114
6115 if (globals->byteswap_code && !bfd_big_endian (abfd))
6116 {
6117 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6118 abfd);
6119 return FALSE;
6120 }
6121
6122 /* PR 5398: If we have not decided to include any loadable sections in
6123 the output then we will not have a glue owner bfd. This is OK, it
6124 just means that there is nothing else for us to do here. */
6125 if (globals->bfd_of_glue_owner == NULL)
6126 return TRUE;
6127
6128 /* Rummage around all the relocs and map the glue vectors. */
6129 sec = abfd->sections;
6130
6131 if (sec == NULL)
6132 return TRUE;
6133
6134 for (; sec != NULL; sec = sec->next)
6135 {
6136 if (sec->reloc_count == 0)
6137 continue;
6138
6139 if ((sec->flags & SEC_EXCLUDE) != 0)
6140 continue;
6141
6142 symtab_hdr = & elf_symtab_hdr (abfd);
6143
6144 /* Load the relocs. */
6145 internal_relocs
6146 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6147
6148 if (internal_relocs == NULL)
6149 goto error_return;
6150
6151 irelend = internal_relocs + sec->reloc_count;
6152 for (irel = internal_relocs; irel < irelend; irel++)
6153 {
6154 long r_type;
6155 unsigned long r_index;
6156
6157 struct elf_link_hash_entry *h;
6158
6159 r_type = ELF32_R_TYPE (irel->r_info);
6160 r_index = ELF32_R_SYM (irel->r_info);
6161
6162 /* These are the only relocation types we care about. */
6163 if ( r_type != R_ARM_PC24
6164 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6165 continue;
6166
6167 /* Get the section contents if we haven't done so already. */
6168 if (contents == NULL)
6169 {
6170 /* Get cached copy if it exists. */
6171 if (elf_section_data (sec)->this_hdr.contents != NULL)
6172 contents = elf_section_data (sec)->this_hdr.contents;
6173 else
6174 {
6175 /* Go get them off disk. */
6176 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6177 goto error_return;
6178 }
6179 }
6180
6181 if (r_type == R_ARM_V4BX)
6182 {
6183 int reg;
6184
6185 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6186 record_arm_bx_glue (link_info, reg);
6187 continue;
6188 }
6189
6190 /* If the relocation is not against a symbol it cannot concern us. */
6191 h = NULL;
6192
6193 /* We don't care about local symbols. */
6194 if (r_index < symtab_hdr->sh_info)
6195 continue;
6196
6197 /* This is an external symbol. */
6198 r_index -= symtab_hdr->sh_info;
6199 h = (struct elf_link_hash_entry *)
6200 elf_sym_hashes (abfd)[r_index];
6201
6202 /* If the relocation is against a static symbol it must be within
6203 the current section and so cannot be a cross ARM/Thumb relocation. */
6204 if (h == NULL)
6205 continue;
6206
6207 /* If the call will go through a PLT entry then we do not need
6208 glue. */
6209 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6210 continue;
6211
6212 switch (r_type)
6213 {
6214 case R_ARM_PC24:
6215 /* This one is a call from arm code. We need to look up
6216 the target of the call. If it is a thumb target, we
6217 insert glue. */
6218 if (h->target_internal == ST_BRANCH_TO_THUMB)
6219 record_arm_to_thumb_glue (link_info, h);
6220 break;
6221
6222 default:
6223 abort ();
6224 }
6225 }
6226
6227 if (contents != NULL
6228 && elf_section_data (sec)->this_hdr.contents != contents)
6229 free (contents);
6230 contents = NULL;
6231
6232 if (internal_relocs != NULL
6233 && elf_section_data (sec)->relocs != internal_relocs)
6234 free (internal_relocs);
6235 internal_relocs = NULL;
6236 }
6237
6238 return TRUE;
6239
6240 error_return:
6241 if (contents != NULL
6242 && elf_section_data (sec)->this_hdr.contents != contents)
6243 free (contents);
6244 if (internal_relocs != NULL
6245 && elf_section_data (sec)->relocs != internal_relocs)
6246 free (internal_relocs);
6247
6248 return FALSE;
6249 }
6250 #endif
6251
6252
6253 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6254
6255 void
6256 bfd_elf32_arm_init_maps (bfd *abfd)
6257 {
6258 Elf_Internal_Sym *isymbuf;
6259 Elf_Internal_Shdr *hdr;
6260 unsigned int i, localsyms;
6261
6262 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6263 if (! is_arm_elf (abfd))
6264 return;
6265
6266 if ((abfd->flags & DYNAMIC) != 0)
6267 return;
6268
6269 hdr = & elf_symtab_hdr (abfd);
6270 localsyms = hdr->sh_info;
6271
6272 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6273 should contain the number of local symbols, which should come before any
6274 global symbols. Mapping symbols are always local. */
6275 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6276 NULL);
6277
6278 /* No internal symbols read? Skip this BFD. */
6279 if (isymbuf == NULL)
6280 return;
6281
6282 for (i = 0; i < localsyms; i++)
6283 {
6284 Elf_Internal_Sym *isym = &isymbuf[i];
6285 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6286 const char *name;
6287
6288 if (sec != NULL
6289 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6290 {
6291 name = bfd_elf_string_from_elf_section (abfd,
6292 hdr->sh_link, isym->st_name);
6293
6294 if (bfd_is_arm_special_symbol_name (name,
6295 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6296 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6297 }
6298 }
6299 }
6300
6301
6302 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6303 say what they wanted. */
6304
6305 void
6306 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6307 {
6308 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6309 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6310
6311 if (globals == NULL)
6312 return;
6313
6314 if (globals->fix_cortex_a8 == -1)
6315 {
6316 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6317 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6318 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6319 || out_attr[Tag_CPU_arch_profile].i == 0))
6320 globals->fix_cortex_a8 = 1;
6321 else
6322 globals->fix_cortex_a8 = 0;
6323 }
6324 }
6325
6326
6327 void
6328 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6329 {
6330 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6331 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6332
6333 if (globals == NULL)
6334 return;
6335 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6336 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6337 {
6338 switch (globals->vfp11_fix)
6339 {
6340 case BFD_ARM_VFP11_FIX_DEFAULT:
6341 case BFD_ARM_VFP11_FIX_NONE:
6342 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6343 break;
6344
6345 default:
6346 /* Give a warning, but do as the user requests anyway. */
6347 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6348 "workaround is not necessary for target architecture"), obfd);
6349 }
6350 }
6351 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6352 /* For earlier architectures, we might need the workaround, but do not
6353 enable it by default. If users is running with broken hardware, they
6354 must enable the erratum fix explicitly. */
6355 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6356 }
6357
6358
6359 enum bfd_arm_vfp11_pipe
6360 {
6361 VFP11_FMAC,
6362 VFP11_LS,
6363 VFP11_DS,
6364 VFP11_BAD
6365 };
6366
6367 /* Return a VFP register number. This is encoded as RX:X for single-precision
6368 registers, or X:RX for double-precision registers, where RX is the group of
6369 four bits in the instruction encoding and X is the single extension bit.
6370 RX and X fields are specified using their lowest (starting) bit. The return
6371 value is:
6372
6373 0...31: single-precision registers s0...s31
6374 32...63: double-precision registers d0...d31.
6375
6376 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6377 encounter VFP3 instructions, so we allow the full range for DP registers. */
6378
6379 static unsigned int
6380 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6381 unsigned int x)
6382 {
6383 if (is_double)
6384 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6385 else
6386 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6387 }
6388
6389 /* Set bits in *WMASK according to a register number REG as encoded by
6390 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6391
6392 static void
6393 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6394 {
6395 if (reg < 32)
6396 *wmask |= 1 << reg;
6397 else if (reg < 48)
6398 *wmask |= 3 << ((reg - 32) * 2);
6399 }
6400
6401 /* Return TRUE if WMASK overwrites anything in REGS. */
6402
6403 static bfd_boolean
6404 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6405 {
6406 int i;
6407
6408 for (i = 0; i < numregs; i++)
6409 {
6410 unsigned int reg = regs[i];
6411
6412 if (reg < 32 && (wmask & (1 << reg)) != 0)
6413 return TRUE;
6414
6415 reg -= 32;
6416
6417 if (reg >= 16)
6418 continue;
6419
6420 if ((wmask & (3 << (reg * 2))) != 0)
6421 return TRUE;
6422 }
6423
6424 return FALSE;
6425 }
6426
6427 /* In this function, we're interested in two things: finding input registers
6428 for VFP data-processing instructions, and finding the set of registers which
6429 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6430 hold the written set, so FLDM etc. are easy to deal with (we're only
6431 interested in 32 SP registers or 16 dp registers, due to the VFP version
6432 implemented by the chip in question). DP registers are marked by setting
6433 both SP registers in the write mask). */
6434
6435 static enum bfd_arm_vfp11_pipe
6436 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6437 int *numregs)
6438 {
6439 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6440 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6441
6442 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6443 {
6444 unsigned int pqrs;
6445 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6446 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6447
6448 pqrs = ((insn & 0x00800000) >> 20)
6449 | ((insn & 0x00300000) >> 19)
6450 | ((insn & 0x00000040) >> 6);
6451
6452 switch (pqrs)
6453 {
6454 case 0: /* fmac[sd]. */
6455 case 1: /* fnmac[sd]. */
6456 case 2: /* fmsc[sd]. */
6457 case 3: /* fnmsc[sd]. */
6458 vpipe = VFP11_FMAC;
6459 bfd_arm_vfp11_write_mask (destmask, fd);
6460 regs[0] = fd;
6461 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6462 regs[2] = fm;
6463 *numregs = 3;
6464 break;
6465
6466 case 4: /* fmul[sd]. */
6467 case 5: /* fnmul[sd]. */
6468 case 6: /* fadd[sd]. */
6469 case 7: /* fsub[sd]. */
6470 vpipe = VFP11_FMAC;
6471 goto vfp_binop;
6472
6473 case 8: /* fdiv[sd]. */
6474 vpipe = VFP11_DS;
6475 vfp_binop:
6476 bfd_arm_vfp11_write_mask (destmask, fd);
6477 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6478 regs[1] = fm;
6479 *numregs = 2;
6480 break;
6481
6482 case 15: /* extended opcode. */
6483 {
6484 unsigned int extn = ((insn >> 15) & 0x1e)
6485 | ((insn >> 7) & 1);
6486
6487 switch (extn)
6488 {
6489 case 0: /* fcpy[sd]. */
6490 case 1: /* fabs[sd]. */
6491 case 2: /* fneg[sd]. */
6492 case 8: /* fcmp[sd]. */
6493 case 9: /* fcmpe[sd]. */
6494 case 10: /* fcmpz[sd]. */
6495 case 11: /* fcmpez[sd]. */
6496 case 16: /* fuito[sd]. */
6497 case 17: /* fsito[sd]. */
6498 case 24: /* ftoui[sd]. */
6499 case 25: /* ftouiz[sd]. */
6500 case 26: /* ftosi[sd]. */
6501 case 27: /* ftosiz[sd]. */
6502 /* These instructions will not bounce due to underflow. */
6503 *numregs = 0;
6504 vpipe = VFP11_FMAC;
6505 break;
6506
6507 case 3: /* fsqrt[sd]. */
6508 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6509 registers to cause the erratum in previous instructions. */
6510 bfd_arm_vfp11_write_mask (destmask, fd);
6511 vpipe = VFP11_DS;
6512 break;
6513
6514 case 15: /* fcvt{ds,sd}. */
6515 {
6516 int rnum = 0;
6517
6518 bfd_arm_vfp11_write_mask (destmask, fd);
6519
6520 /* Only FCVTSD can underflow. */
6521 if ((insn & 0x100) != 0)
6522 regs[rnum++] = fm;
6523
6524 *numregs = rnum;
6525
6526 vpipe = VFP11_FMAC;
6527 }
6528 break;
6529
6530 default:
6531 return VFP11_BAD;
6532 }
6533 }
6534 break;
6535
6536 default:
6537 return VFP11_BAD;
6538 }
6539 }
6540 /* Two-register transfer. */
6541 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6542 {
6543 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6544
6545 if ((insn & 0x100000) == 0)
6546 {
6547 if (is_double)
6548 bfd_arm_vfp11_write_mask (destmask, fm);
6549 else
6550 {
6551 bfd_arm_vfp11_write_mask (destmask, fm);
6552 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6553 }
6554 }
6555
6556 vpipe = VFP11_LS;
6557 }
6558 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6559 {
6560 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6561 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6562
6563 switch (puw)
6564 {
6565 case 0: /* Two-reg transfer. We should catch these above. */
6566 abort ();
6567
6568 case 2: /* fldm[sdx]. */
6569 case 3:
6570 case 5:
6571 {
6572 unsigned int i, offset = insn & 0xff;
6573
6574 if (is_double)
6575 offset >>= 1;
6576
6577 for (i = fd; i < fd + offset; i++)
6578 bfd_arm_vfp11_write_mask (destmask, i);
6579 }
6580 break;
6581
6582 case 4: /* fld[sd]. */
6583 case 6:
6584 bfd_arm_vfp11_write_mask (destmask, fd);
6585 break;
6586
6587 default:
6588 return VFP11_BAD;
6589 }
6590
6591 vpipe = VFP11_LS;
6592 }
6593 /* Single-register transfer. Note L==0. */
6594 else if ((insn & 0x0f100e10) == 0x0e000a10)
6595 {
6596 unsigned int opcode = (insn >> 21) & 7;
6597 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6598
6599 switch (opcode)
6600 {
6601 case 0: /* fmsr/fmdlr. */
6602 case 1: /* fmdhr. */
6603 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6604 destination register. I don't know if this is exactly right,
6605 but it is the conservative choice. */
6606 bfd_arm_vfp11_write_mask (destmask, fn);
6607 break;
6608
6609 case 7: /* fmxr. */
6610 break;
6611 }
6612
6613 vpipe = VFP11_LS;
6614 }
6615
6616 return vpipe;
6617 }
6618
6619
6620 static int elf32_arm_compare_mapping (const void * a, const void * b);
6621
6622
6623 /* Look for potentially-troublesome code sequences which might trigger the
6624 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6625 (available from ARM) for details of the erratum. A short version is
6626 described in ld.texinfo. */
6627
6628 bfd_boolean
6629 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6630 {
6631 asection *sec;
6632 bfd_byte *contents = NULL;
6633 int state = 0;
6634 int regs[3], numregs = 0;
6635 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6636 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
6637
6638 if (globals == NULL)
6639 return FALSE;
6640
6641 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6642 The states transition as follows:
6643
6644 0 -> 1 (vector) or 0 -> 2 (scalar)
6645 A VFP FMAC-pipeline instruction has been seen. Fill
6646 regs[0]..regs[numregs-1] with its input operands. Remember this
6647 instruction in 'first_fmac'.
6648
6649 1 -> 2
6650 Any instruction, except for a VFP instruction which overwrites
6651 regs[*].
6652
6653 1 -> 3 [ -> 0 ] or
6654 2 -> 3 [ -> 0 ]
6655 A VFP instruction has been seen which overwrites any of regs[*].
6656 We must make a veneer! Reset state to 0 before examining next
6657 instruction.
6658
6659 2 -> 0
6660 If we fail to match anything in state 2, reset to state 0 and reset
6661 the instruction pointer to the instruction after 'first_fmac'.
6662
6663 If the VFP11 vector mode is in use, there must be at least two unrelated
6664 instructions between anti-dependent VFP11 instructions to properly avoid
6665 triggering the erratum, hence the use of the extra state 1. */
6666
6667 /* If we are only performing a partial link do not bother
6668 to construct any glue. */
6669 if (link_info->relocatable)
6670 return TRUE;
6671
6672 /* Skip if this bfd does not correspond to an ELF image. */
6673 if (! is_arm_elf (abfd))
6674 return TRUE;
6675
6676 /* We should have chosen a fix type by the time we get here. */
6677 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6678
6679 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6680 return TRUE;
6681
6682 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6683 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6684 return TRUE;
6685
6686 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6687 {
6688 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6689 struct _arm_elf_section_data *sec_data;
6690
6691 /* If we don't have executable progbits, we're not interested in this
6692 section. Also skip if section is to be excluded. */
6693 if (elf_section_type (sec) != SHT_PROGBITS
6694 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6695 || (sec->flags & SEC_EXCLUDE) != 0
6696 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
6697 || sec->output_section == bfd_abs_section_ptr
6698 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6699 continue;
6700
6701 sec_data = elf32_arm_section_data (sec);
6702
6703 if (sec_data->mapcount == 0)
6704 continue;
6705
6706 if (elf_section_data (sec)->this_hdr.contents != NULL)
6707 contents = elf_section_data (sec)->this_hdr.contents;
6708 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6709 goto error_return;
6710
6711 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6712 elf32_arm_compare_mapping);
6713
6714 for (span = 0; span < sec_data->mapcount; span++)
6715 {
6716 unsigned int span_start = sec_data->map[span].vma;
6717 unsigned int span_end = (span == sec_data->mapcount - 1)
6718 ? sec->size : sec_data->map[span + 1].vma;
6719 char span_type = sec_data->map[span].type;
6720
6721 /* FIXME: Only ARM mode is supported at present. We may need to
6722 support Thumb-2 mode also at some point. */
6723 if (span_type != 'a')
6724 continue;
6725
6726 for (i = span_start; i < span_end;)
6727 {
6728 unsigned int next_i = i + 4;
6729 unsigned int insn = bfd_big_endian (abfd)
6730 ? (contents[i] << 24)
6731 | (contents[i + 1] << 16)
6732 | (contents[i + 2] << 8)
6733 | contents[i + 3]
6734 : (contents[i + 3] << 24)
6735 | (contents[i + 2] << 16)
6736 | (contents[i + 1] << 8)
6737 | contents[i];
6738 unsigned int writemask = 0;
6739 enum bfd_arm_vfp11_pipe vpipe;
6740
6741 switch (state)
6742 {
6743 case 0:
6744 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6745 &numregs);
6746 /* I'm assuming the VFP11 erratum can trigger with denorm
6747 operands on either the FMAC or the DS pipeline. This might
6748 lead to slightly overenthusiastic veneer insertion. */
6749 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6750 {
6751 state = use_vector ? 1 : 2;
6752 first_fmac = i;
6753 veneer_of_insn = insn;
6754 }
6755 break;
6756
6757 case 1:
6758 {
6759 int other_regs[3], other_numregs;
6760 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6761 other_regs,
6762 &other_numregs);
6763 if (vpipe != VFP11_BAD
6764 && bfd_arm_vfp11_antidependency (writemask, regs,
6765 numregs))
6766 state = 3;
6767 else
6768 state = 2;
6769 }
6770 break;
6771
6772 case 2:
6773 {
6774 int other_regs[3], other_numregs;
6775 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6776 other_regs,
6777 &other_numregs);
6778 if (vpipe != VFP11_BAD
6779 && bfd_arm_vfp11_antidependency (writemask, regs,
6780 numregs))
6781 state = 3;
6782 else
6783 {
6784 state = 0;
6785 next_i = first_fmac + 4;
6786 }
6787 }
6788 break;
6789
6790 case 3:
6791 abort (); /* Should be unreachable. */
6792 }
6793
6794 if (state == 3)
6795 {
6796 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6797 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6798
6799 elf32_arm_section_data (sec)->erratumcount += 1;
6800
6801 newerr->u.b.vfp_insn = veneer_of_insn;
6802
6803 switch (span_type)
6804 {
6805 case 'a':
6806 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6807 break;
6808
6809 default:
6810 abort ();
6811 }
6812
6813 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6814 first_fmac);
6815
6816 newerr->vma = -1;
6817
6818 newerr->next = sec_data->erratumlist;
6819 sec_data->erratumlist = newerr;
6820
6821 state = 0;
6822 }
6823
6824 i = next_i;
6825 }
6826 }
6827
6828 if (contents != NULL
6829 && elf_section_data (sec)->this_hdr.contents != contents)
6830 free (contents);
6831 contents = NULL;
6832 }
6833
6834 return TRUE;
6835
6836 error_return:
6837 if (contents != NULL
6838 && elf_section_data (sec)->this_hdr.contents != contents)
6839 free (contents);
6840
6841 return FALSE;
6842 }
6843
6844 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6845 after sections have been laid out, using specially-named symbols. */
6846
6847 void
6848 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6849 struct bfd_link_info *link_info)
6850 {
6851 asection *sec;
6852 struct elf32_arm_link_hash_table *globals;
6853 char *tmp_name;
6854
6855 if (link_info->relocatable)
6856 return;
6857
6858 /* Skip if this bfd does not correspond to an ELF image. */
6859 if (! is_arm_elf (abfd))
6860 return;
6861
6862 globals = elf32_arm_hash_table (link_info);
6863 if (globals == NULL)
6864 return;
6865
6866 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6867 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6868
6869 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6870 {
6871 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6872 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
6873
6874 for (; errnode != NULL; errnode = errnode->next)
6875 {
6876 struct elf_link_hash_entry *myh;
6877 bfd_vma vma;
6878
6879 switch (errnode->type)
6880 {
6881 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6882 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6883 /* Find veneer symbol. */
6884 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6885 errnode->u.b.veneer->u.v.id);
6886
6887 myh = elf_link_hash_lookup
6888 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6889
6890 if (myh == NULL)
6891 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6892 "`%s'"), abfd, tmp_name);
6893
6894 vma = myh->root.u.def.section->output_section->vma
6895 + myh->root.u.def.section->output_offset
6896 + myh->root.u.def.value;
6897
6898 errnode->u.b.veneer->vma = vma;
6899 break;
6900
6901 case VFP11_ERRATUM_ARM_VENEER:
6902 case VFP11_ERRATUM_THUMB_VENEER:
6903 /* Find return location. */
6904 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6905 errnode->u.v.id);
6906
6907 myh = elf_link_hash_lookup
6908 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6909
6910 if (myh == NULL)
6911 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6912 "`%s'"), abfd, tmp_name);
6913
6914 vma = myh->root.u.def.section->output_section->vma
6915 + myh->root.u.def.section->output_offset
6916 + myh->root.u.def.value;
6917
6918 errnode->u.v.branch->vma = vma;
6919 break;
6920
6921 default:
6922 abort ();
6923 }
6924 }
6925 }
6926
6927 free (tmp_name);
6928 }
6929
6930
6931 /* Set target relocation values needed during linking. */
6932
6933 void
6934 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6935 struct bfd_link_info *link_info,
6936 int target1_is_rel,
6937 char * target2_type,
6938 int fix_v4bx,
6939 int use_blx,
6940 bfd_arm_vfp11_fix vfp11_fix,
6941 int no_enum_warn, int no_wchar_warn,
6942 int pic_veneer, int fix_cortex_a8,
6943 int fix_arm1176)
6944 {
6945 struct elf32_arm_link_hash_table *globals;
6946
6947 globals = elf32_arm_hash_table (link_info);
6948 if (globals == NULL)
6949 return;
6950
6951 globals->target1_is_rel = target1_is_rel;
6952 if (strcmp (target2_type, "rel") == 0)
6953 globals->target2_reloc = R_ARM_REL32;
6954 else if (strcmp (target2_type, "abs") == 0)
6955 globals->target2_reloc = R_ARM_ABS32;
6956 else if (strcmp (target2_type, "got-rel") == 0)
6957 globals->target2_reloc = R_ARM_GOT_PREL;
6958 else
6959 {
6960 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6961 target2_type);
6962 }
6963 globals->fix_v4bx = fix_v4bx;
6964 globals->use_blx |= use_blx;
6965 globals->vfp11_fix = vfp11_fix;
6966 globals->pic_veneer = pic_veneer;
6967 globals->fix_cortex_a8 = fix_cortex_a8;
6968 globals->fix_arm1176 = fix_arm1176;
6969
6970 BFD_ASSERT (is_arm_elf (output_bfd));
6971 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
6972 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
6973 }
6974
6975 /* Replace the target offset of a Thumb bl or b.w instruction. */
6976
6977 static void
6978 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6979 {
6980 bfd_vma upper;
6981 bfd_vma lower;
6982 int reloc_sign;
6983
6984 BFD_ASSERT ((offset & 1) == 0);
6985
6986 upper = bfd_get_16 (abfd, insn);
6987 lower = bfd_get_16 (abfd, insn + 2);
6988 reloc_sign = (offset < 0) ? 1 : 0;
6989 upper = (upper & ~(bfd_vma) 0x7ff)
6990 | ((offset >> 12) & 0x3ff)
6991 | (reloc_sign << 10);
6992 lower = (lower & ~(bfd_vma) 0x2fff)
6993 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6994 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6995 | ((offset >> 1) & 0x7ff);
6996 bfd_put_16 (abfd, upper, insn);
6997 bfd_put_16 (abfd, lower, insn + 2);
6998 }
6999
7000 /* Thumb code calling an ARM function. */
7001
7002 static int
7003 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7004 const char * name,
7005 bfd * input_bfd,
7006 bfd * output_bfd,
7007 asection * input_section,
7008 bfd_byte * hit_data,
7009 asection * sym_sec,
7010 bfd_vma offset,
7011 bfd_signed_vma addend,
7012 bfd_vma val,
7013 char **error_message)
7014 {
7015 asection * s = 0;
7016 bfd_vma my_offset;
7017 long int ret_offset;
7018 struct elf_link_hash_entry * myh;
7019 struct elf32_arm_link_hash_table * globals;
7020
7021 myh = find_thumb_glue (info, name, error_message);
7022 if (myh == NULL)
7023 return FALSE;
7024
7025 globals = elf32_arm_hash_table (info);
7026 BFD_ASSERT (globals != NULL);
7027 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7028
7029 my_offset = myh->root.u.def.value;
7030
7031 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7032 THUMB2ARM_GLUE_SECTION_NAME);
7033
7034 BFD_ASSERT (s != NULL);
7035 BFD_ASSERT (s->contents != NULL);
7036 BFD_ASSERT (s->output_section != NULL);
7037
7038 if ((my_offset & 0x01) == 0x01)
7039 {
7040 if (sym_sec != NULL
7041 && sym_sec->owner != NULL
7042 && !INTERWORK_FLAG (sym_sec->owner))
7043 {
7044 (*_bfd_error_handler)
7045 (_("%B(%s): warning: interworking not enabled.\n"
7046 " first occurrence: %B: Thumb call to ARM"),
7047 sym_sec->owner, input_bfd, name);
7048
7049 return FALSE;
7050 }
7051
7052 --my_offset;
7053 myh->root.u.def.value = my_offset;
7054
7055 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7056 s->contents + my_offset);
7057
7058 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7059 s->contents + my_offset + 2);
7060
7061 ret_offset =
7062 /* Address of destination of the stub. */
7063 ((bfd_signed_vma) val)
7064 - ((bfd_signed_vma)
7065 /* Offset from the start of the current section
7066 to the start of the stubs. */
7067 (s->output_offset
7068 /* Offset of the start of this stub from the start of the stubs. */
7069 + my_offset
7070 /* Address of the start of the current section. */
7071 + s->output_section->vma)
7072 /* The branch instruction is 4 bytes into the stub. */
7073 + 4
7074 /* ARM branches work from the pc of the instruction + 8. */
7075 + 8);
7076
7077 put_arm_insn (globals, output_bfd,
7078 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7079 s->contents + my_offset + 4);
7080 }
7081
7082 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7083
7084 /* Now go back and fix up the original BL insn to point to here. */
7085 ret_offset =
7086 /* Address of where the stub is located. */
7087 (s->output_section->vma + s->output_offset + my_offset)
7088 /* Address of where the BL is located. */
7089 - (input_section->output_section->vma + input_section->output_offset
7090 + offset)
7091 /* Addend in the relocation. */
7092 - addend
7093 /* Biassing for PC-relative addressing. */
7094 - 8;
7095
7096 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
7097
7098 return TRUE;
7099 }
7100
7101 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7102
7103 static struct elf_link_hash_entry *
7104 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7105 const char * name,
7106 bfd * input_bfd,
7107 bfd * output_bfd,
7108 asection * sym_sec,
7109 bfd_vma val,
7110 asection * s,
7111 char ** error_message)
7112 {
7113 bfd_vma my_offset;
7114 long int ret_offset;
7115 struct elf_link_hash_entry * myh;
7116 struct elf32_arm_link_hash_table * globals;
7117
7118 myh = find_arm_glue (info, name, error_message);
7119 if (myh == NULL)
7120 return NULL;
7121
7122 globals = elf32_arm_hash_table (info);
7123 BFD_ASSERT (globals != NULL);
7124 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7125
7126 my_offset = myh->root.u.def.value;
7127
7128 if ((my_offset & 0x01) == 0x01)
7129 {
7130 if (sym_sec != NULL
7131 && sym_sec->owner != NULL
7132 && !INTERWORK_FLAG (sym_sec->owner))
7133 {
7134 (*_bfd_error_handler)
7135 (_("%B(%s): warning: interworking not enabled.\n"
7136 " first occurrence: %B: arm call to thumb"),
7137 sym_sec->owner, input_bfd, name);
7138 }
7139
7140 --my_offset;
7141 myh->root.u.def.value = my_offset;
7142
7143 if (info->shared || globals->root.is_relocatable_executable
7144 || globals->pic_veneer)
7145 {
7146 /* For relocatable objects we can't use absolute addresses,
7147 so construct the address from a relative offset. */
7148 /* TODO: If the offset is small it's probably worth
7149 constructing the address with adds. */
7150 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7151 s->contents + my_offset);
7152 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7153 s->contents + my_offset + 4);
7154 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7155 s->contents + my_offset + 8);
7156 /* Adjust the offset by 4 for the position of the add,
7157 and 8 for the pipeline offset. */
7158 ret_offset = (val - (s->output_offset
7159 + s->output_section->vma
7160 + my_offset + 12))
7161 | 1;
7162 bfd_put_32 (output_bfd, ret_offset,
7163 s->contents + my_offset + 12);
7164 }
7165 else if (globals->use_blx)
7166 {
7167 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7168 s->contents + my_offset);
7169
7170 /* It's a thumb address. Add the low order bit. */
7171 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7172 s->contents + my_offset + 4);
7173 }
7174 else
7175 {
7176 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7177 s->contents + my_offset);
7178
7179 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7180 s->contents + my_offset + 4);
7181
7182 /* It's a thumb address. Add the low order bit. */
7183 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7184 s->contents + my_offset + 8);
7185
7186 my_offset += 12;
7187 }
7188 }
7189
7190 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7191
7192 return myh;
7193 }
7194
7195 /* Arm code calling a Thumb function. */
7196
7197 static int
7198 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7199 const char * name,
7200 bfd * input_bfd,
7201 bfd * output_bfd,
7202 asection * input_section,
7203 bfd_byte * hit_data,
7204 asection * sym_sec,
7205 bfd_vma offset,
7206 bfd_signed_vma addend,
7207 bfd_vma val,
7208 char **error_message)
7209 {
7210 unsigned long int tmp;
7211 bfd_vma my_offset;
7212 asection * s;
7213 long int ret_offset;
7214 struct elf_link_hash_entry * myh;
7215 struct elf32_arm_link_hash_table * globals;
7216
7217 globals = elf32_arm_hash_table (info);
7218 BFD_ASSERT (globals != NULL);
7219 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7220
7221 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7222 ARM2THUMB_GLUE_SECTION_NAME);
7223 BFD_ASSERT (s != NULL);
7224 BFD_ASSERT (s->contents != NULL);
7225 BFD_ASSERT (s->output_section != NULL);
7226
7227 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
7228 sym_sec, val, s, error_message);
7229 if (!myh)
7230 return FALSE;
7231
7232 my_offset = myh->root.u.def.value;
7233 tmp = bfd_get_32 (input_bfd, hit_data);
7234 tmp = tmp & 0xFF000000;
7235
7236 /* Somehow these are both 4 too far, so subtract 8. */
7237 ret_offset = (s->output_offset
7238 + my_offset
7239 + s->output_section->vma
7240 - (input_section->output_offset
7241 + input_section->output_section->vma
7242 + offset + addend)
7243 - 8);
7244
7245 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7246
7247 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
7248
7249 return TRUE;
7250 }
7251
7252 /* Populate Arm stub for an exported Thumb function. */
7253
7254 static bfd_boolean
7255 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7256 {
7257 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7258 asection * s;
7259 struct elf_link_hash_entry * myh;
7260 struct elf32_arm_link_hash_entry *eh;
7261 struct elf32_arm_link_hash_table * globals;
7262 asection *sec;
7263 bfd_vma val;
7264 char *error_message;
7265
7266 eh = elf32_arm_hash_entry (h);
7267 /* Allocate stubs for exported Thumb functions on v4t. */
7268 if (eh->export_glue == NULL)
7269 return TRUE;
7270
7271 globals = elf32_arm_hash_table (info);
7272 BFD_ASSERT (globals != NULL);
7273 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7274
7275 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7276 ARM2THUMB_GLUE_SECTION_NAME);
7277 BFD_ASSERT (s != NULL);
7278 BFD_ASSERT (s->contents != NULL);
7279 BFD_ASSERT (s->output_section != NULL);
7280
7281 sec = eh->export_glue->root.u.def.section;
7282
7283 BFD_ASSERT (sec->output_section != NULL);
7284
7285 val = eh->export_glue->root.u.def.value + sec->output_offset
7286 + sec->output_section->vma;
7287
7288 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7289 h->root.u.def.section->owner,
7290 globals->obfd, sec, val, s,
7291 &error_message);
7292 BFD_ASSERT (myh);
7293 return TRUE;
7294 }
7295
7296 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7297
7298 static bfd_vma
7299 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7300 {
7301 bfd_byte *p;
7302 bfd_vma glue_addr;
7303 asection *s;
7304 struct elf32_arm_link_hash_table *globals;
7305
7306 globals = elf32_arm_hash_table (info);
7307 BFD_ASSERT (globals != NULL);
7308 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7309
7310 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7311 ARM_BX_GLUE_SECTION_NAME);
7312 BFD_ASSERT (s != NULL);
7313 BFD_ASSERT (s->contents != NULL);
7314 BFD_ASSERT (s->output_section != NULL);
7315
7316 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7317
7318 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7319
7320 if ((globals->bx_glue_offset[reg] & 1) == 0)
7321 {
7322 p = s->contents + glue_addr;
7323 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7324 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7325 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7326 globals->bx_glue_offset[reg] |= 1;
7327 }
7328
7329 return glue_addr + s->output_section->vma + s->output_offset;
7330 }
7331
7332 /* Generate Arm stubs for exported Thumb symbols. */
7333 static void
7334 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
7335 struct bfd_link_info *link_info)
7336 {
7337 struct elf32_arm_link_hash_table * globals;
7338
7339 if (link_info == NULL)
7340 /* Ignore this if we are not called by the ELF backend linker. */
7341 return;
7342
7343 globals = elf32_arm_hash_table (link_info);
7344 if (globals == NULL)
7345 return;
7346
7347 /* If blx is available then exported Thumb symbols are OK and there is
7348 nothing to do. */
7349 if (globals->use_blx)
7350 return;
7351
7352 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7353 link_info);
7354 }
7355
7356 /* Reserve space for COUNT dynamic relocations in relocation selection
7357 SRELOC. */
7358
7359 static void
7360 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7361 bfd_size_type count)
7362 {
7363 struct elf32_arm_link_hash_table *htab;
7364
7365 htab = elf32_arm_hash_table (info);
7366 BFD_ASSERT (htab->root.dynamic_sections_created);
7367 if (sreloc == NULL)
7368 abort ();
7369 sreloc->size += RELOC_SIZE (htab) * count;
7370 }
7371
7372 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7373 dynamic, the relocations should go in SRELOC, otherwise they should
7374 go in the special .rel.iplt section. */
7375
7376 static void
7377 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7378 bfd_size_type count)
7379 {
7380 struct elf32_arm_link_hash_table *htab;
7381
7382 htab = elf32_arm_hash_table (info);
7383 if (!htab->root.dynamic_sections_created)
7384 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7385 else
7386 {
7387 BFD_ASSERT (sreloc != NULL);
7388 sreloc->size += RELOC_SIZE (htab) * count;
7389 }
7390 }
7391
7392 /* Add relocation REL to the end of relocation section SRELOC. */
7393
7394 static void
7395 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7396 asection *sreloc, Elf_Internal_Rela *rel)
7397 {
7398 bfd_byte *loc;
7399 struct elf32_arm_link_hash_table *htab;
7400
7401 htab = elf32_arm_hash_table (info);
7402 if (!htab->root.dynamic_sections_created
7403 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7404 sreloc = htab->root.irelplt;
7405 if (sreloc == NULL)
7406 abort ();
7407 loc = sreloc->contents;
7408 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7409 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7410 abort ();
7411 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7412 }
7413
7414 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7415 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7416 to .plt. */
7417
7418 static void
7419 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7420 bfd_boolean is_iplt_entry,
7421 union gotplt_union *root_plt,
7422 struct arm_plt_info *arm_plt)
7423 {
7424 struct elf32_arm_link_hash_table *htab;
7425 asection *splt;
7426 asection *sgotplt;
7427
7428 htab = elf32_arm_hash_table (info);
7429
7430 if (is_iplt_entry)
7431 {
7432 splt = htab->root.iplt;
7433 sgotplt = htab->root.igotplt;
7434
7435 /* NaCl uses a special first entry in .iplt too. */
7436 if (htab->nacl_p && splt->size == 0)
7437 splt->size += htab->plt_header_size;
7438
7439 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7440 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7441 }
7442 else
7443 {
7444 splt = htab->root.splt;
7445 sgotplt = htab->root.sgotplt;
7446
7447 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7448 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7449
7450 /* If this is the first .plt entry, make room for the special
7451 first entry. */
7452 if (splt->size == 0)
7453 splt->size += htab->plt_header_size;
7454 }
7455
7456 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7457 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7458 splt->size += PLT_THUMB_STUB_SIZE;
7459 root_plt->offset = splt->size;
7460 splt->size += htab->plt_entry_size;
7461
7462 if (!htab->symbian_p)
7463 {
7464 /* We also need to make an entry in the .got.plt section, which
7465 will be placed in the .got section by the linker script. */
7466 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7467 sgotplt->size += 4;
7468 }
7469 }
7470
7471 static bfd_vma
7472 arm_movw_immediate (bfd_vma value)
7473 {
7474 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7475 }
7476
7477 static bfd_vma
7478 arm_movt_immediate (bfd_vma value)
7479 {
7480 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7481 }
7482
7483 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7484 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7485 Otherwise, DYNINDX is the index of the symbol in the dynamic
7486 symbol table and SYM_VALUE is undefined.
7487
7488 ROOT_PLT points to the offset of the PLT entry from the start of its
7489 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7490 bookkeeping information. */
7491
7492 static void
7493 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7494 union gotplt_union *root_plt,
7495 struct arm_plt_info *arm_plt,
7496 int dynindx, bfd_vma sym_value)
7497 {
7498 struct elf32_arm_link_hash_table *htab;
7499 asection *sgot;
7500 asection *splt;
7501 asection *srel;
7502 bfd_byte *loc;
7503 bfd_vma plt_index;
7504 Elf_Internal_Rela rel;
7505 bfd_vma plt_header_size;
7506 bfd_vma got_header_size;
7507
7508 htab = elf32_arm_hash_table (info);
7509
7510 /* Pick the appropriate sections and sizes. */
7511 if (dynindx == -1)
7512 {
7513 splt = htab->root.iplt;
7514 sgot = htab->root.igotplt;
7515 srel = htab->root.irelplt;
7516
7517 /* There are no reserved entries in .igot.plt, and no special
7518 first entry in .iplt. */
7519 got_header_size = 0;
7520 plt_header_size = 0;
7521 }
7522 else
7523 {
7524 splt = htab->root.splt;
7525 sgot = htab->root.sgotplt;
7526 srel = htab->root.srelplt;
7527
7528 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7529 plt_header_size = htab->plt_header_size;
7530 }
7531 BFD_ASSERT (splt != NULL && srel != NULL);
7532
7533 /* Fill in the entry in the procedure linkage table. */
7534 if (htab->symbian_p)
7535 {
7536 BFD_ASSERT (dynindx >= 0);
7537 put_arm_insn (htab, output_bfd,
7538 elf32_arm_symbian_plt_entry[0],
7539 splt->contents + root_plt->offset);
7540 bfd_put_32 (output_bfd,
7541 elf32_arm_symbian_plt_entry[1],
7542 splt->contents + root_plt->offset + 4);
7543
7544 /* Fill in the entry in the .rel.plt section. */
7545 rel.r_offset = (splt->output_section->vma
7546 + splt->output_offset
7547 + root_plt->offset + 4);
7548 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7549
7550 /* Get the index in the procedure linkage table which
7551 corresponds to this symbol. This is the index of this symbol
7552 in all the symbols for which we are making plt entries. The
7553 first entry in the procedure linkage table is reserved. */
7554 plt_index = ((root_plt->offset - plt_header_size)
7555 / htab->plt_entry_size);
7556 }
7557 else
7558 {
7559 bfd_vma got_offset, got_address, plt_address;
7560 bfd_vma got_displacement, initial_got_entry;
7561 bfd_byte * ptr;
7562
7563 BFD_ASSERT (sgot != NULL);
7564
7565 /* Get the offset into the .(i)got.plt table of the entry that
7566 corresponds to this function. */
7567 got_offset = (arm_plt->got_offset & -2);
7568
7569 /* Get the index in the procedure linkage table which
7570 corresponds to this symbol. This is the index of this symbol
7571 in all the symbols for which we are making plt entries.
7572 After the reserved .got.plt entries, all symbols appear in
7573 the same order as in .plt. */
7574 plt_index = (got_offset - got_header_size) / 4;
7575
7576 /* Calculate the address of the GOT entry. */
7577 got_address = (sgot->output_section->vma
7578 + sgot->output_offset
7579 + got_offset);
7580
7581 /* ...and the address of the PLT entry. */
7582 plt_address = (splt->output_section->vma
7583 + splt->output_offset
7584 + root_plt->offset);
7585
7586 ptr = splt->contents + root_plt->offset;
7587 if (htab->vxworks_p && info->shared)
7588 {
7589 unsigned int i;
7590 bfd_vma val;
7591
7592 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7593 {
7594 val = elf32_arm_vxworks_shared_plt_entry[i];
7595 if (i == 2)
7596 val |= got_address - sgot->output_section->vma;
7597 if (i == 5)
7598 val |= plt_index * RELOC_SIZE (htab);
7599 if (i == 2 || i == 5)
7600 bfd_put_32 (output_bfd, val, ptr);
7601 else
7602 put_arm_insn (htab, output_bfd, val, ptr);
7603 }
7604 }
7605 else if (htab->vxworks_p)
7606 {
7607 unsigned int i;
7608 bfd_vma val;
7609
7610 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7611 {
7612 val = elf32_arm_vxworks_exec_plt_entry[i];
7613 if (i == 2)
7614 val |= got_address;
7615 if (i == 4)
7616 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7617 if (i == 5)
7618 val |= plt_index * RELOC_SIZE (htab);
7619 if (i == 2 || i == 5)
7620 bfd_put_32 (output_bfd, val, ptr);
7621 else
7622 put_arm_insn (htab, output_bfd, val, ptr);
7623 }
7624
7625 loc = (htab->srelplt2->contents
7626 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7627
7628 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7629 referencing the GOT for this PLT entry. */
7630 rel.r_offset = plt_address + 8;
7631 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7632 rel.r_addend = got_offset;
7633 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7634 loc += RELOC_SIZE (htab);
7635
7636 /* Create the R_ARM_ABS32 relocation referencing the
7637 beginning of the PLT for this GOT entry. */
7638 rel.r_offset = got_address;
7639 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7640 rel.r_addend = 0;
7641 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7642 }
7643 else if (htab->nacl_p)
7644 {
7645 /* Calculate the displacement between the PLT slot and the
7646 common tail that's part of the special initial PLT slot. */
7647 int32_t tail_displacement
7648 = ((splt->output_section->vma + splt->output_offset
7649 + ARM_NACL_PLT_TAIL_OFFSET)
7650 - (plt_address + htab->plt_entry_size + 4));
7651 BFD_ASSERT ((tail_displacement & 3) == 0);
7652 tail_displacement >>= 2;
7653
7654 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7655 || (-tail_displacement & 0xff000000) == 0);
7656
7657 /* Calculate the displacement between the PLT slot and the entry
7658 in the GOT. The offset accounts for the value produced by
7659 adding to pc in the penultimate instruction of the PLT stub. */
7660 got_displacement = (got_address
7661 - (plt_address + htab->plt_entry_size));
7662
7663 /* NaCl does not support interworking at all. */
7664 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7665
7666 put_arm_insn (htab, output_bfd,
7667 elf32_arm_nacl_plt_entry[0]
7668 | arm_movw_immediate (got_displacement),
7669 ptr + 0);
7670 put_arm_insn (htab, output_bfd,
7671 elf32_arm_nacl_plt_entry[1]
7672 | arm_movt_immediate (got_displacement),
7673 ptr + 4);
7674 put_arm_insn (htab, output_bfd,
7675 elf32_arm_nacl_plt_entry[2],
7676 ptr + 8);
7677 put_arm_insn (htab, output_bfd,
7678 elf32_arm_nacl_plt_entry[3]
7679 | (tail_displacement & 0x00ffffff),
7680 ptr + 12);
7681 }
7682 else
7683 {
7684 /* Calculate the displacement between the PLT slot and the
7685 entry in the GOT. The eight-byte offset accounts for the
7686 value produced by adding to pc in the first instruction
7687 of the PLT stub. */
7688 got_displacement = got_address - (plt_address + 8);
7689
7690 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7691
7692 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7693 {
7694 put_thumb_insn (htab, output_bfd,
7695 elf32_arm_plt_thumb_stub[0], ptr - 4);
7696 put_thumb_insn (htab, output_bfd,
7697 elf32_arm_plt_thumb_stub[1], ptr - 2);
7698 }
7699
7700 put_arm_insn (htab, output_bfd,
7701 elf32_arm_plt_entry[0]
7702 | ((got_displacement & 0x0ff00000) >> 20),
7703 ptr + 0);
7704 put_arm_insn (htab, output_bfd,
7705 elf32_arm_plt_entry[1]
7706 | ((got_displacement & 0x000ff000) >> 12),
7707 ptr+ 4);
7708 put_arm_insn (htab, output_bfd,
7709 elf32_arm_plt_entry[2]
7710 | (got_displacement & 0x00000fff),
7711 ptr + 8);
7712 #ifdef FOUR_WORD_PLT
7713 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7714 #endif
7715 }
7716
7717 /* Fill in the entry in the .rel(a).(i)plt section. */
7718 rel.r_offset = got_address;
7719 rel.r_addend = 0;
7720 if (dynindx == -1)
7721 {
7722 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7723 The dynamic linker or static executable then calls SYM_VALUE
7724 to determine the correct run-time value of the .igot.plt entry. */
7725 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7726 initial_got_entry = sym_value;
7727 }
7728 else
7729 {
7730 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7731 initial_got_entry = (splt->output_section->vma
7732 + splt->output_offset);
7733 }
7734
7735 /* Fill in the entry in the global offset table. */
7736 bfd_put_32 (output_bfd, initial_got_entry,
7737 sgot->contents + got_offset);
7738 }
7739
7740 if (dynindx == -1)
7741 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
7742 else
7743 {
7744 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7745 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7746 }
7747 }
7748
7749 /* Some relocations map to different relocations depending on the
7750 target. Return the real relocation. */
7751
7752 static int
7753 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7754 int r_type)
7755 {
7756 switch (r_type)
7757 {
7758 case R_ARM_TARGET1:
7759 if (globals->target1_is_rel)
7760 return R_ARM_REL32;
7761 else
7762 return R_ARM_ABS32;
7763
7764 case R_ARM_TARGET2:
7765 return globals->target2_reloc;
7766
7767 default:
7768 return r_type;
7769 }
7770 }
7771
7772 /* Return the base VMA address which should be subtracted from real addresses
7773 when resolving @dtpoff relocation.
7774 This is PT_TLS segment p_vaddr. */
7775
7776 static bfd_vma
7777 dtpoff_base (struct bfd_link_info *info)
7778 {
7779 /* If tls_sec is NULL, we should have signalled an error already. */
7780 if (elf_hash_table (info)->tls_sec == NULL)
7781 return 0;
7782 return elf_hash_table (info)->tls_sec->vma;
7783 }
7784
7785 /* Return the relocation value for @tpoff relocation
7786 if STT_TLS virtual address is ADDRESS. */
7787
7788 static bfd_vma
7789 tpoff (struct bfd_link_info *info, bfd_vma address)
7790 {
7791 struct elf_link_hash_table *htab = elf_hash_table (info);
7792 bfd_vma base;
7793
7794 /* If tls_sec is NULL, we should have signalled an error already. */
7795 if (htab->tls_sec == NULL)
7796 return 0;
7797 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7798 return address - htab->tls_sec->vma + base;
7799 }
7800
7801 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7802 VALUE is the relocation value. */
7803
7804 static bfd_reloc_status_type
7805 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7806 {
7807 if (value > 0xfff)
7808 return bfd_reloc_overflow;
7809
7810 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7811 bfd_put_32 (abfd, value, data);
7812 return bfd_reloc_ok;
7813 }
7814
7815 /* Handle TLS relaxations. Relaxing is possible for symbols that use
7816 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7817 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7818
7819 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7820 is to then call final_link_relocate. Return other values in the
7821 case of error.
7822
7823 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7824 the pre-relaxed code. It would be nice if the relocs were updated
7825 to match the optimization. */
7826
7827 static bfd_reloc_status_type
7828 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7829 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7830 Elf_Internal_Rela *rel, unsigned long is_local)
7831 {
7832 unsigned long insn;
7833
7834 switch (ELF32_R_TYPE (rel->r_info))
7835 {
7836 default:
7837 return bfd_reloc_notsupported;
7838
7839 case R_ARM_TLS_GOTDESC:
7840 if (is_local)
7841 insn = 0;
7842 else
7843 {
7844 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7845 if (insn & 1)
7846 insn -= 5; /* THUMB */
7847 else
7848 insn -= 8; /* ARM */
7849 }
7850 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7851 return bfd_reloc_continue;
7852
7853 case R_ARM_THM_TLS_DESCSEQ:
7854 /* Thumb insn. */
7855 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7856 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7857 {
7858 if (is_local)
7859 /* nop */
7860 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7861 }
7862 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7863 {
7864 if (is_local)
7865 /* nop */
7866 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7867 else
7868 /* ldr rx,[ry] */
7869 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7870 }
7871 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7872 {
7873 if (is_local)
7874 /* nop */
7875 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7876 else
7877 /* mov r0, rx */
7878 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7879 contents + rel->r_offset);
7880 }
7881 else
7882 {
7883 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7884 /* It's a 32 bit instruction, fetch the rest of it for
7885 error generation. */
7886 insn = (insn << 16)
7887 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7888 (*_bfd_error_handler)
7889 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7890 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7891 return bfd_reloc_notsupported;
7892 }
7893 break;
7894
7895 case R_ARM_TLS_DESCSEQ:
7896 /* arm insn. */
7897 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7898 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7899 {
7900 if (is_local)
7901 /* mov rx, ry */
7902 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7903 contents + rel->r_offset);
7904 }
7905 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7906 {
7907 if (is_local)
7908 /* nop */
7909 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7910 else
7911 /* ldr rx,[ry] */
7912 bfd_put_32 (input_bfd, insn & 0xfffff000,
7913 contents + rel->r_offset);
7914 }
7915 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7916 {
7917 if (is_local)
7918 /* nop */
7919 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7920 else
7921 /* mov r0, rx */
7922 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7923 contents + rel->r_offset);
7924 }
7925 else
7926 {
7927 (*_bfd_error_handler)
7928 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7929 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7930 return bfd_reloc_notsupported;
7931 }
7932 break;
7933
7934 case R_ARM_TLS_CALL:
7935 /* GD->IE relaxation, turn the instruction into 'nop' or
7936 'ldr r0, [pc,r0]' */
7937 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7938 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7939 break;
7940
7941 case R_ARM_THM_TLS_CALL:
7942 /* GD->IE relaxation */
7943 if (!is_local)
7944 /* add r0,pc; ldr r0, [r0] */
7945 insn = 0x44786800;
7946 else if (arch_has_thumb2_nop (globals))
7947 /* nop.w */
7948 insn = 0xf3af8000;
7949 else
7950 /* nop; nop */
7951 insn = 0xbf00bf00;
7952
7953 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7954 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7955 break;
7956 }
7957 return bfd_reloc_ok;
7958 }
7959
7960 /* For a given value of n, calculate the value of G_n as required to
7961 deal with group relocations. We return it in the form of an
7962 encoded constant-and-rotation, together with the final residual. If n is
7963 specified as less than zero, then final_residual is filled with the
7964 input value and no further action is performed. */
7965
7966 static bfd_vma
7967 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7968 {
7969 int current_n;
7970 bfd_vma g_n;
7971 bfd_vma encoded_g_n = 0;
7972 bfd_vma residual = value; /* Also known as Y_n. */
7973
7974 for (current_n = 0; current_n <= n; current_n++)
7975 {
7976 int shift;
7977
7978 /* Calculate which part of the value to mask. */
7979 if (residual == 0)
7980 shift = 0;
7981 else
7982 {
7983 int msb;
7984
7985 /* Determine the most significant bit in the residual and
7986 align the resulting value to a 2-bit boundary. */
7987 for (msb = 30; msb >= 0; msb -= 2)
7988 if (residual & (3 << msb))
7989 break;
7990
7991 /* The desired shift is now (msb - 6), or zero, whichever
7992 is the greater. */
7993 shift = msb - 6;
7994 if (shift < 0)
7995 shift = 0;
7996 }
7997
7998 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7999 g_n = residual & (0xff << shift);
8000 encoded_g_n = (g_n >> shift)
8001 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
8002
8003 /* Calculate the residual for the next time around. */
8004 residual &= ~g_n;
8005 }
8006
8007 *final_residual = residual;
8008
8009 return encoded_g_n;
8010 }
8011
8012 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
8013 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
8014
8015 static int
8016 identify_add_or_sub (bfd_vma insn)
8017 {
8018 int opcode = insn & 0x1e00000;
8019
8020 if (opcode == 1 << 23) /* ADD */
8021 return 1;
8022
8023 if (opcode == 1 << 22) /* SUB */
8024 return -1;
8025
8026 return 0;
8027 }
8028
8029 /* Perform a relocation as part of a final link. */
8030
8031 static bfd_reloc_status_type
8032 elf32_arm_final_link_relocate (reloc_howto_type * howto,
8033 bfd * input_bfd,
8034 bfd * output_bfd,
8035 asection * input_section,
8036 bfd_byte * contents,
8037 Elf_Internal_Rela * rel,
8038 bfd_vma value,
8039 struct bfd_link_info * info,
8040 asection * sym_sec,
8041 const char * sym_name,
8042 unsigned char st_type,
8043 enum arm_st_branch_type branch_type,
8044 struct elf_link_hash_entry * h,
8045 bfd_boolean * unresolved_reloc_p,
8046 char ** error_message)
8047 {
8048 unsigned long r_type = howto->type;
8049 unsigned long r_symndx;
8050 bfd_byte * hit_data = contents + rel->r_offset;
8051 bfd_vma * local_got_offsets;
8052 bfd_vma * local_tlsdesc_gotents;
8053 asection * sgot;
8054 asection * splt;
8055 asection * sreloc = NULL;
8056 asection * srelgot;
8057 bfd_vma addend;
8058 bfd_signed_vma signed_addend;
8059 unsigned char dynreloc_st_type;
8060 bfd_vma dynreloc_value;
8061 struct elf32_arm_link_hash_table * globals;
8062 struct elf32_arm_link_hash_entry *eh;
8063 union gotplt_union *root_plt;
8064 struct arm_plt_info *arm_plt;
8065 bfd_vma plt_offset;
8066 bfd_vma gotplt_offset;
8067 bfd_boolean has_iplt_entry;
8068
8069 globals = elf32_arm_hash_table (info);
8070 if (globals == NULL)
8071 return bfd_reloc_notsupported;
8072
8073 BFD_ASSERT (is_arm_elf (input_bfd));
8074
8075 /* Some relocation types map to different relocations depending on the
8076 target. We pick the right one here. */
8077 r_type = arm_real_reloc_type (globals, r_type);
8078
8079 /* It is possible to have linker relaxations on some TLS access
8080 models. Update our information here. */
8081 r_type = elf32_arm_tls_transition (info, r_type, h);
8082
8083 if (r_type != howto->type)
8084 howto = elf32_arm_howto_from_type (r_type);
8085
8086 /* If the start address has been set, then set the EF_ARM_HASENTRY
8087 flag. Setting this more than once is redundant, but the cost is
8088 not too high, and it keeps the code simple.
8089
8090 The test is done here, rather than somewhere else, because the
8091 start address is only set just before the final link commences.
8092
8093 Note - if the user deliberately sets a start address of 0, the
8094 flag will not be set. */
8095 if (bfd_get_start_address (output_bfd) != 0)
8096 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
8097
8098 eh = (struct elf32_arm_link_hash_entry *) h;
8099 sgot = globals->root.sgot;
8100 local_got_offsets = elf_local_got_offsets (input_bfd);
8101 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8102
8103 if (globals->root.dynamic_sections_created)
8104 srelgot = globals->root.srelgot;
8105 else
8106 srelgot = NULL;
8107
8108 r_symndx = ELF32_R_SYM (rel->r_info);
8109
8110 if (globals->use_rel)
8111 {
8112 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8113
8114 if (addend & ((howto->src_mask + 1) >> 1))
8115 {
8116 signed_addend = -1;
8117 signed_addend &= ~ howto->src_mask;
8118 signed_addend |= addend;
8119 }
8120 else
8121 signed_addend = addend;
8122 }
8123 else
8124 addend = signed_addend = rel->r_addend;
8125
8126 /* Record the symbol information that should be used in dynamic
8127 relocations. */
8128 dynreloc_st_type = st_type;
8129 dynreloc_value = value;
8130 if (branch_type == ST_BRANCH_TO_THUMB)
8131 dynreloc_value |= 1;
8132
8133 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8134 VALUE appropriately for relocations that we resolve at link time. */
8135 has_iplt_entry = FALSE;
8136 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8137 && root_plt->offset != (bfd_vma) -1)
8138 {
8139 plt_offset = root_plt->offset;
8140 gotplt_offset = arm_plt->got_offset;
8141
8142 if (h == NULL || eh->is_iplt)
8143 {
8144 has_iplt_entry = TRUE;
8145 splt = globals->root.iplt;
8146
8147 /* Populate .iplt entries here, because not all of them will
8148 be seen by finish_dynamic_symbol. The lower bit is set if
8149 we have already populated the entry. */
8150 if (plt_offset & 1)
8151 plt_offset--;
8152 else
8153 {
8154 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8155 -1, dynreloc_value);
8156 root_plt->offset |= 1;
8157 }
8158
8159 /* Static relocations always resolve to the .iplt entry. */
8160 st_type = STT_FUNC;
8161 value = (splt->output_section->vma
8162 + splt->output_offset
8163 + plt_offset);
8164 branch_type = ST_BRANCH_TO_ARM;
8165
8166 /* If there are non-call relocations that resolve to the .iplt
8167 entry, then all dynamic ones must too. */
8168 if (arm_plt->noncall_refcount != 0)
8169 {
8170 dynreloc_st_type = st_type;
8171 dynreloc_value = value;
8172 }
8173 }
8174 else
8175 /* We populate the .plt entry in finish_dynamic_symbol. */
8176 splt = globals->root.splt;
8177 }
8178 else
8179 {
8180 splt = NULL;
8181 plt_offset = (bfd_vma) -1;
8182 gotplt_offset = (bfd_vma) -1;
8183 }
8184
8185 switch (r_type)
8186 {
8187 case R_ARM_NONE:
8188 /* We don't need to find a value for this symbol. It's just a
8189 marker. */
8190 *unresolved_reloc_p = FALSE;
8191 return bfd_reloc_ok;
8192
8193 case R_ARM_ABS12:
8194 if (!globals->vxworks_p)
8195 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8196
8197 case R_ARM_PC24:
8198 case R_ARM_ABS32:
8199 case R_ARM_ABS32_NOI:
8200 case R_ARM_REL32:
8201 case R_ARM_REL32_NOI:
8202 case R_ARM_CALL:
8203 case R_ARM_JUMP24:
8204 case R_ARM_XPC25:
8205 case R_ARM_PREL31:
8206 case R_ARM_PLT32:
8207 /* Handle relocations which should use the PLT entry. ABS32/REL32
8208 will use the symbol's value, which may point to a PLT entry, but we
8209 don't need to handle that here. If we created a PLT entry, all
8210 branches in this object should go to it, except if the PLT is too
8211 far away, in which case a long branch stub should be inserted. */
8212 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
8213 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
8214 && r_type != R_ARM_CALL
8215 && r_type != R_ARM_JUMP24
8216 && r_type != R_ARM_PLT32)
8217 && plt_offset != (bfd_vma) -1)
8218 {
8219 /* If we've created a .plt section, and assigned a PLT entry
8220 to this function, it must either be a STT_GNU_IFUNC reference
8221 or not be known to bind locally. In other cases, we should
8222 have cleared the PLT entry by now. */
8223 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
8224
8225 value = (splt->output_section->vma
8226 + splt->output_offset
8227 + plt_offset);
8228 *unresolved_reloc_p = FALSE;
8229 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8230 contents, rel->r_offset, value,
8231 rel->r_addend);
8232 }
8233
8234 /* When generating a shared object or relocatable executable, these
8235 relocations are copied into the output file to be resolved at
8236 run time. */
8237 if ((info->shared || globals->root.is_relocatable_executable)
8238 && (input_section->flags & SEC_ALLOC)
8239 && !(globals->vxworks_p
8240 && strcmp (input_section->output_section->name,
8241 ".tls_vars") == 0)
8242 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
8243 || !SYMBOL_CALLS_LOCAL (info, h))
8244 && !(input_bfd == globals->stub_bfd
8245 && strstr (input_section->name, STUB_SUFFIX))
8246 && (h == NULL
8247 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8248 || h->root.type != bfd_link_hash_undefweak)
8249 && r_type != R_ARM_PC24
8250 && r_type != R_ARM_CALL
8251 && r_type != R_ARM_JUMP24
8252 && r_type != R_ARM_PREL31
8253 && r_type != R_ARM_PLT32)
8254 {
8255 Elf_Internal_Rela outrel;
8256 bfd_boolean skip, relocate;
8257
8258 *unresolved_reloc_p = FALSE;
8259
8260 if (sreloc == NULL && globals->root.dynamic_sections_created)
8261 {
8262 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8263 ! globals->use_rel);
8264
8265 if (sreloc == NULL)
8266 return bfd_reloc_notsupported;
8267 }
8268
8269 skip = FALSE;
8270 relocate = FALSE;
8271
8272 outrel.r_addend = addend;
8273 outrel.r_offset =
8274 _bfd_elf_section_offset (output_bfd, info, input_section,
8275 rel->r_offset);
8276 if (outrel.r_offset == (bfd_vma) -1)
8277 skip = TRUE;
8278 else if (outrel.r_offset == (bfd_vma) -2)
8279 skip = TRUE, relocate = TRUE;
8280 outrel.r_offset += (input_section->output_section->vma
8281 + input_section->output_offset);
8282
8283 if (skip)
8284 memset (&outrel, 0, sizeof outrel);
8285 else if (h != NULL
8286 && h->dynindx != -1
8287 && (!info->shared
8288 || !info->symbolic
8289 || !h->def_regular))
8290 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
8291 else
8292 {
8293 int symbol;
8294
8295 /* This symbol is local, or marked to become local. */
8296 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
8297 if (globals->symbian_p)
8298 {
8299 asection *osec;
8300
8301 /* On Symbian OS, the data segment and text segement
8302 can be relocated independently. Therefore, we
8303 must indicate the segment to which this
8304 relocation is relative. The BPABI allows us to
8305 use any symbol in the right segment; we just use
8306 the section symbol as it is convenient. (We
8307 cannot use the symbol given by "h" directly as it
8308 will not appear in the dynamic symbol table.)
8309
8310 Note that the dynamic linker ignores the section
8311 symbol value, so we don't subtract osec->vma
8312 from the emitted reloc addend. */
8313 if (sym_sec)
8314 osec = sym_sec->output_section;
8315 else
8316 osec = input_section->output_section;
8317 symbol = elf_section_data (osec)->dynindx;
8318 if (symbol == 0)
8319 {
8320 struct elf_link_hash_table *htab = elf_hash_table (info);
8321
8322 if ((osec->flags & SEC_READONLY) == 0
8323 && htab->data_index_section != NULL)
8324 osec = htab->data_index_section;
8325 else
8326 osec = htab->text_index_section;
8327 symbol = elf_section_data (osec)->dynindx;
8328 }
8329 BFD_ASSERT (symbol != 0);
8330 }
8331 else
8332 /* On SVR4-ish systems, the dynamic loader cannot
8333 relocate the text and data segments independently,
8334 so the symbol does not matter. */
8335 symbol = 0;
8336 if (dynreloc_st_type == STT_GNU_IFUNC)
8337 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8338 to the .iplt entry. Instead, every non-call reference
8339 must use an R_ARM_IRELATIVE relocation to obtain the
8340 correct run-time address. */
8341 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8342 else
8343 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
8344 if (globals->use_rel)
8345 relocate = TRUE;
8346 else
8347 outrel.r_addend += dynreloc_value;
8348 }
8349
8350 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
8351
8352 /* If this reloc is against an external symbol, we do not want to
8353 fiddle with the addend. Otherwise, we need to include the symbol
8354 value so that it becomes an addend for the dynamic reloc. */
8355 if (! relocate)
8356 return bfd_reloc_ok;
8357
8358 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8359 contents, rel->r_offset,
8360 dynreloc_value, (bfd_vma) 0);
8361 }
8362 else switch (r_type)
8363 {
8364 case R_ARM_ABS12:
8365 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8366
8367 case R_ARM_XPC25: /* Arm BLX instruction. */
8368 case R_ARM_CALL:
8369 case R_ARM_JUMP24:
8370 case R_ARM_PC24: /* Arm B/BL instruction. */
8371 case R_ARM_PLT32:
8372 {
8373 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8374
8375 if (r_type == R_ARM_XPC25)
8376 {
8377 /* Check for Arm calling Arm function. */
8378 /* FIXME: Should we translate the instruction into a BL
8379 instruction instead ? */
8380 if (branch_type != ST_BRANCH_TO_THUMB)
8381 (*_bfd_error_handler)
8382 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8383 input_bfd,
8384 h ? h->root.root.string : "(local)");
8385 }
8386 else if (r_type == R_ARM_PC24)
8387 {
8388 /* Check for Arm calling Thumb function. */
8389 if (branch_type == ST_BRANCH_TO_THUMB)
8390 {
8391 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8392 output_bfd, input_section,
8393 hit_data, sym_sec, rel->r_offset,
8394 signed_addend, value,
8395 error_message))
8396 return bfd_reloc_ok;
8397 else
8398 return bfd_reloc_dangerous;
8399 }
8400 }
8401
8402 /* Check if a stub has to be inserted because the
8403 destination is too far or we are changing mode. */
8404 if ( r_type == R_ARM_CALL
8405 || r_type == R_ARM_JUMP24
8406 || r_type == R_ARM_PLT32)
8407 {
8408 enum elf32_arm_stub_type stub_type = arm_stub_none;
8409 struct elf32_arm_link_hash_entry *hash;
8410
8411 hash = (struct elf32_arm_link_hash_entry *) h;
8412 stub_type = arm_type_of_stub (info, input_section, rel,
8413 st_type, &branch_type,
8414 hash, value, sym_sec,
8415 input_bfd, sym_name);
8416
8417 if (stub_type != arm_stub_none)
8418 {
8419 /* The target is out of reach, so redirect the
8420 branch to the local stub for this function. */
8421 stub_entry = elf32_arm_get_stub_entry (input_section,
8422 sym_sec, h,
8423 rel, globals,
8424 stub_type);
8425 {
8426 if (stub_entry != NULL)
8427 value = (stub_entry->stub_offset
8428 + stub_entry->stub_sec->output_offset
8429 + stub_entry->stub_sec->output_section->vma);
8430
8431 if (plt_offset != (bfd_vma) -1)
8432 *unresolved_reloc_p = FALSE;
8433 }
8434 }
8435 else
8436 {
8437 /* If the call goes through a PLT entry, make sure to
8438 check distance to the right destination address. */
8439 if (plt_offset != (bfd_vma) -1)
8440 {
8441 value = (splt->output_section->vma
8442 + splt->output_offset
8443 + plt_offset);
8444 *unresolved_reloc_p = FALSE;
8445 /* The PLT entry is in ARM mode, regardless of the
8446 target function. */
8447 branch_type = ST_BRANCH_TO_ARM;
8448 }
8449 }
8450 }
8451
8452 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8453 where:
8454 S is the address of the symbol in the relocation.
8455 P is address of the instruction being relocated.
8456 A is the addend (extracted from the instruction) in bytes.
8457
8458 S is held in 'value'.
8459 P is the base address of the section containing the
8460 instruction plus the offset of the reloc into that
8461 section, ie:
8462 (input_section->output_section->vma +
8463 input_section->output_offset +
8464 rel->r_offset).
8465 A is the addend, converted into bytes, ie:
8466 (signed_addend * 4)
8467
8468 Note: None of these operations have knowledge of the pipeline
8469 size of the processor, thus it is up to the assembler to
8470 encode this information into the addend. */
8471 value -= (input_section->output_section->vma
8472 + input_section->output_offset);
8473 value -= rel->r_offset;
8474 if (globals->use_rel)
8475 value += (signed_addend << howto->size);
8476 else
8477 /* RELA addends do not have to be adjusted by howto->size. */
8478 value += signed_addend;
8479
8480 signed_addend = value;
8481 signed_addend >>= howto->rightshift;
8482
8483 /* A branch to an undefined weak symbol is turned into a jump to
8484 the next instruction unless a PLT entry will be created.
8485 Do the same for local undefined symbols (but not for STN_UNDEF).
8486 The jump to the next instruction is optimized as a NOP depending
8487 on the architecture. */
8488 if (h ? (h->root.type == bfd_link_hash_undefweak
8489 && plt_offset == (bfd_vma) -1)
8490 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
8491 {
8492 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8493
8494 if (arch_has_arm_nop (globals))
8495 value |= 0x0320f000;
8496 else
8497 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
8498 }
8499 else
8500 {
8501 /* Perform a signed range check. */
8502 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
8503 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8504 return bfd_reloc_overflow;
8505
8506 addend = (value & 2);
8507
8508 value = (signed_addend & howto->dst_mask)
8509 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
8510
8511 if (r_type == R_ARM_CALL)
8512 {
8513 /* Set the H bit in the BLX instruction. */
8514 if (branch_type == ST_BRANCH_TO_THUMB)
8515 {
8516 if (addend)
8517 value |= (1 << 24);
8518 else
8519 value &= ~(bfd_vma)(1 << 24);
8520 }
8521
8522 /* Select the correct instruction (BL or BLX). */
8523 /* Only if we are not handling a BL to a stub. In this
8524 case, mode switching is performed by the stub. */
8525 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
8526 value |= (1 << 28);
8527 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
8528 {
8529 value &= ~(bfd_vma)(1 << 28);
8530 value |= (1 << 24);
8531 }
8532 }
8533 }
8534 }
8535 break;
8536
8537 case R_ARM_ABS32:
8538 value += addend;
8539 if (branch_type == ST_BRANCH_TO_THUMB)
8540 value |= 1;
8541 break;
8542
8543 case R_ARM_ABS32_NOI:
8544 value += addend;
8545 break;
8546
8547 case R_ARM_REL32:
8548 value += addend;
8549 if (branch_type == ST_BRANCH_TO_THUMB)
8550 value |= 1;
8551 value -= (input_section->output_section->vma
8552 + input_section->output_offset + rel->r_offset);
8553 break;
8554
8555 case R_ARM_REL32_NOI:
8556 value += addend;
8557 value -= (input_section->output_section->vma
8558 + input_section->output_offset + rel->r_offset);
8559 break;
8560
8561 case R_ARM_PREL31:
8562 value -= (input_section->output_section->vma
8563 + input_section->output_offset + rel->r_offset);
8564 value += signed_addend;
8565 if (! h || h->root.type != bfd_link_hash_undefweak)
8566 {
8567 /* Check for overflow. */
8568 if ((value ^ (value >> 1)) & (1 << 30))
8569 return bfd_reloc_overflow;
8570 }
8571 value &= 0x7fffffff;
8572 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
8573 if (branch_type == ST_BRANCH_TO_THUMB)
8574 value |= 1;
8575 break;
8576 }
8577
8578 bfd_put_32 (input_bfd, value, hit_data);
8579 return bfd_reloc_ok;
8580
8581 case R_ARM_ABS8:
8582 value += addend;
8583
8584 /* There is no way to tell whether the user intended to use a signed or
8585 unsigned addend. When checking for overflow we accept either,
8586 as specified by the AAELF. */
8587 if ((long) value > 0xff || (long) value < -0x80)
8588 return bfd_reloc_overflow;
8589
8590 bfd_put_8 (input_bfd, value, hit_data);
8591 return bfd_reloc_ok;
8592
8593 case R_ARM_ABS16:
8594 value += addend;
8595
8596 /* See comment for R_ARM_ABS8. */
8597 if ((long) value > 0xffff || (long) value < -0x8000)
8598 return bfd_reloc_overflow;
8599
8600 bfd_put_16 (input_bfd, value, hit_data);
8601 return bfd_reloc_ok;
8602
8603 case R_ARM_THM_ABS5:
8604 /* Support ldr and str instructions for the thumb. */
8605 if (globals->use_rel)
8606 {
8607 /* Need to refetch addend. */
8608 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8609 /* ??? Need to determine shift amount from operand size. */
8610 addend >>= howto->rightshift;
8611 }
8612 value += addend;
8613
8614 /* ??? Isn't value unsigned? */
8615 if ((long) value > 0x1f || (long) value < -0x10)
8616 return bfd_reloc_overflow;
8617
8618 /* ??? Value needs to be properly shifted into place first. */
8619 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8620 bfd_put_16 (input_bfd, value, hit_data);
8621 return bfd_reloc_ok;
8622
8623 case R_ARM_THM_ALU_PREL_11_0:
8624 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8625 {
8626 bfd_vma insn;
8627 bfd_signed_vma relocation;
8628
8629 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8630 | bfd_get_16 (input_bfd, hit_data + 2);
8631
8632 if (globals->use_rel)
8633 {
8634 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8635 | ((insn & (1 << 26)) >> 15);
8636 if (insn & 0xf00000)
8637 signed_addend = -signed_addend;
8638 }
8639
8640 relocation = value + signed_addend;
8641 relocation -= Pa (input_section->output_section->vma
8642 + input_section->output_offset
8643 + rel->r_offset);
8644
8645 value = abs (relocation);
8646
8647 if (value >= 0x1000)
8648 return bfd_reloc_overflow;
8649
8650 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8651 | ((value & 0x700) << 4)
8652 | ((value & 0x800) << 15);
8653 if (relocation < 0)
8654 insn |= 0xa00000;
8655
8656 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8657 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8658
8659 return bfd_reloc_ok;
8660 }
8661
8662 case R_ARM_THM_PC8:
8663 /* PR 10073: This reloc is not generated by the GNU toolchain,
8664 but it is supported for compatibility with third party libraries
8665 generated by other compilers, specifically the ARM/IAR. */
8666 {
8667 bfd_vma insn;
8668 bfd_signed_vma relocation;
8669
8670 insn = bfd_get_16 (input_bfd, hit_data);
8671
8672 if (globals->use_rel)
8673 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
8674
8675 relocation = value + addend;
8676 relocation -= Pa (input_section->output_section->vma
8677 + input_section->output_offset
8678 + rel->r_offset);
8679
8680 value = abs (relocation);
8681
8682 /* We do not check for overflow of this reloc. Although strictly
8683 speaking this is incorrect, it appears to be necessary in order
8684 to work with IAR generated relocs. Since GCC and GAS do not
8685 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8686 a problem for them. */
8687 value &= 0x3fc;
8688
8689 insn = (insn & 0xff00) | (value >> 2);
8690
8691 bfd_put_16 (input_bfd, insn, hit_data);
8692
8693 return bfd_reloc_ok;
8694 }
8695
8696 case R_ARM_THM_PC12:
8697 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8698 {
8699 bfd_vma insn;
8700 bfd_signed_vma relocation;
8701
8702 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8703 | bfd_get_16 (input_bfd, hit_data + 2);
8704
8705 if (globals->use_rel)
8706 {
8707 signed_addend = insn & 0xfff;
8708 if (!(insn & (1 << 23)))
8709 signed_addend = -signed_addend;
8710 }
8711
8712 relocation = value + signed_addend;
8713 relocation -= Pa (input_section->output_section->vma
8714 + input_section->output_offset
8715 + rel->r_offset);
8716
8717 value = abs (relocation);
8718
8719 if (value >= 0x1000)
8720 return bfd_reloc_overflow;
8721
8722 insn = (insn & 0xff7ff000) | value;
8723 if (relocation >= 0)
8724 insn |= (1 << 23);
8725
8726 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8727 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8728
8729 return bfd_reloc_ok;
8730 }
8731
8732 case R_ARM_THM_XPC22:
8733 case R_ARM_THM_CALL:
8734 case R_ARM_THM_JUMP24:
8735 /* Thumb BL (branch long instruction). */
8736 {
8737 bfd_vma relocation;
8738 bfd_vma reloc_sign;
8739 bfd_boolean overflow = FALSE;
8740 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8741 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8742 bfd_signed_vma reloc_signed_max;
8743 bfd_signed_vma reloc_signed_min;
8744 bfd_vma check;
8745 bfd_signed_vma signed_check;
8746 int bitsize;
8747 const int thumb2 = using_thumb2 (globals);
8748
8749 /* A branch to an undefined weak symbol is turned into a jump to
8750 the next instruction unless a PLT entry will be created.
8751 The jump to the next instruction is optimized as a NOP.W for
8752 Thumb-2 enabled architectures. */
8753 if (h && h->root.type == bfd_link_hash_undefweak
8754 && plt_offset == (bfd_vma) -1)
8755 {
8756 if (arch_has_thumb2_nop (globals))
8757 {
8758 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8759 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8760 }
8761 else
8762 {
8763 bfd_put_16 (input_bfd, 0xe000, hit_data);
8764 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8765 }
8766 return bfd_reloc_ok;
8767 }
8768
8769 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8770 with Thumb-1) involving the J1 and J2 bits. */
8771 if (globals->use_rel)
8772 {
8773 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8774 bfd_vma upper = upper_insn & 0x3ff;
8775 bfd_vma lower = lower_insn & 0x7ff;
8776 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8777 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8778 bfd_vma i1 = j1 ^ s ? 0 : 1;
8779 bfd_vma i2 = j2 ^ s ? 0 : 1;
8780
8781 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8782 /* Sign extend. */
8783 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8784
8785 signed_addend = addend;
8786 }
8787
8788 if (r_type == R_ARM_THM_XPC22)
8789 {
8790 /* Check for Thumb to Thumb call. */
8791 /* FIXME: Should we translate the instruction into a BL
8792 instruction instead ? */
8793 if (branch_type == ST_BRANCH_TO_THUMB)
8794 (*_bfd_error_handler)
8795 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8796 input_bfd,
8797 h ? h->root.root.string : "(local)");
8798 }
8799 else
8800 {
8801 /* If it is not a call to Thumb, assume call to Arm.
8802 If it is a call relative to a section name, then it is not a
8803 function call at all, but rather a long jump. Calls through
8804 the PLT do not require stubs. */
8805 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
8806 {
8807 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8808 {
8809 /* Convert BL to BLX. */
8810 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8811 }
8812 else if (( r_type != R_ARM_THM_CALL)
8813 && (r_type != R_ARM_THM_JUMP24))
8814 {
8815 if (elf32_thumb_to_arm_stub
8816 (info, sym_name, input_bfd, output_bfd, input_section,
8817 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8818 error_message))
8819 return bfd_reloc_ok;
8820 else
8821 return bfd_reloc_dangerous;
8822 }
8823 }
8824 else if (branch_type == ST_BRANCH_TO_THUMB
8825 && globals->use_blx
8826 && r_type == R_ARM_THM_CALL)
8827 {
8828 /* Make sure this is a BL. */
8829 lower_insn |= 0x1800;
8830 }
8831 }
8832
8833 enum elf32_arm_stub_type stub_type = arm_stub_none;
8834 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
8835 {
8836 /* Check if a stub has to be inserted because the destination
8837 is too far. */
8838 struct elf32_arm_stub_hash_entry *stub_entry;
8839 struct elf32_arm_link_hash_entry *hash;
8840
8841 hash = (struct elf32_arm_link_hash_entry *) h;
8842
8843 stub_type = arm_type_of_stub (info, input_section, rel,
8844 st_type, &branch_type,
8845 hash, value, sym_sec,
8846 input_bfd, sym_name);
8847
8848 if (stub_type != arm_stub_none)
8849 {
8850 /* The target is out of reach or we are changing modes, so
8851 redirect the branch to the local stub for this
8852 function. */
8853 stub_entry = elf32_arm_get_stub_entry (input_section,
8854 sym_sec, h,
8855 rel, globals,
8856 stub_type);
8857 if (stub_entry != NULL)
8858 {
8859 value = (stub_entry->stub_offset
8860 + stub_entry->stub_sec->output_offset
8861 + stub_entry->stub_sec->output_section->vma);
8862
8863 if (plt_offset != (bfd_vma) -1)
8864 *unresolved_reloc_p = FALSE;
8865 }
8866
8867 /* If this call becomes a call to Arm, force BLX. */
8868 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
8869 {
8870 if ((stub_entry
8871 && !arm_stub_is_thumb (stub_entry->stub_type))
8872 || branch_type != ST_BRANCH_TO_THUMB)
8873 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8874 }
8875 }
8876 }
8877
8878 /* Handle calls via the PLT. */
8879 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
8880 {
8881 value = (splt->output_section->vma
8882 + splt->output_offset
8883 + plt_offset);
8884
8885 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8886 {
8887 /* If the Thumb BLX instruction is available, convert
8888 the BL to a BLX instruction to call the ARM-mode
8889 PLT entry. */
8890 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8891 branch_type = ST_BRANCH_TO_ARM;
8892 }
8893 else
8894 {
8895 /* Target the Thumb stub before the ARM PLT entry. */
8896 value -= PLT_THUMB_STUB_SIZE;
8897 branch_type = ST_BRANCH_TO_THUMB;
8898 }
8899 *unresolved_reloc_p = FALSE;
8900 }
8901
8902 relocation = value + signed_addend;
8903
8904 relocation -= (input_section->output_section->vma
8905 + input_section->output_offset
8906 + rel->r_offset);
8907
8908 check = relocation >> howto->rightshift;
8909
8910 /* If this is a signed value, the rightshift just dropped
8911 leading 1 bits (assuming twos complement). */
8912 if ((bfd_signed_vma) relocation >= 0)
8913 signed_check = check;
8914 else
8915 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8916
8917 /* Calculate the permissable maximum and minimum values for
8918 this relocation according to whether we're relocating for
8919 Thumb-2 or not. */
8920 bitsize = howto->bitsize;
8921 if (!thumb2)
8922 bitsize -= 2;
8923 reloc_signed_max = (1 << (bitsize - 1)) - 1;
8924 reloc_signed_min = ~reloc_signed_max;
8925
8926 /* Assumes two's complement. */
8927 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8928 overflow = TRUE;
8929
8930 if ((lower_insn & 0x5000) == 0x4000)
8931 /* For a BLX instruction, make sure that the relocation is rounded up
8932 to a word boundary. This follows the semantics of the instruction
8933 which specifies that bit 1 of the target address will come from bit
8934 1 of the base address. */
8935 relocation = (relocation + 2) & ~ 3;
8936
8937 /* Put RELOCATION back into the insn. Assumes two's complement.
8938 We use the Thumb-2 encoding, which is safe even if dealing with
8939 a Thumb-1 instruction by virtue of our overflow check above. */
8940 reloc_sign = (signed_check < 0) ? 1 : 0;
8941 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8942 | ((relocation >> 12) & 0x3ff)
8943 | (reloc_sign << 10);
8944 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
8945 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8946 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8947 | ((relocation >> 1) & 0x7ff);
8948
8949 /* Put the relocated value back in the object file: */
8950 bfd_put_16 (input_bfd, upper_insn, hit_data);
8951 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8952
8953 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8954 }
8955 break;
8956
8957 case R_ARM_THM_JUMP19:
8958 /* Thumb32 conditional branch instruction. */
8959 {
8960 bfd_vma relocation;
8961 bfd_boolean overflow = FALSE;
8962 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8963 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8964 bfd_signed_vma reloc_signed_max = 0xffffe;
8965 bfd_signed_vma reloc_signed_min = -0x100000;
8966 bfd_signed_vma signed_check;
8967
8968 /* Need to refetch the addend, reconstruct the top three bits,
8969 and squish the two 11 bit pieces together. */
8970 if (globals->use_rel)
8971 {
8972 bfd_vma S = (upper_insn & 0x0400) >> 10;
8973 bfd_vma upper = (upper_insn & 0x003f);
8974 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8975 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8976 bfd_vma lower = (lower_insn & 0x07ff);
8977
8978 upper |= J1 << 6;
8979 upper |= J2 << 7;
8980 upper |= (!S) << 8;
8981 upper -= 0x0100; /* Sign extend. */
8982
8983 addend = (upper << 12) | (lower << 1);
8984 signed_addend = addend;
8985 }
8986
8987 /* Handle calls via the PLT. */
8988 if (plt_offset != (bfd_vma) -1)
8989 {
8990 value = (splt->output_section->vma
8991 + splt->output_offset
8992 + plt_offset);
8993 /* Target the Thumb stub before the ARM PLT entry. */
8994 value -= PLT_THUMB_STUB_SIZE;
8995 *unresolved_reloc_p = FALSE;
8996 }
8997
8998 /* ??? Should handle interworking? GCC might someday try to
8999 use this for tail calls. */
9000
9001 relocation = value + signed_addend;
9002 relocation -= (input_section->output_section->vma
9003 + input_section->output_offset
9004 + rel->r_offset);
9005 signed_check = (bfd_signed_vma) relocation;
9006
9007 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9008 overflow = TRUE;
9009
9010 /* Put RELOCATION back into the insn. */
9011 {
9012 bfd_vma S = (relocation & 0x00100000) >> 20;
9013 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9014 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9015 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9016 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9017
9018 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
9019 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9020 }
9021
9022 /* Put the relocated value back in the object file: */
9023 bfd_put_16 (input_bfd, upper_insn, hit_data);
9024 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9025
9026 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9027 }
9028
9029 case R_ARM_THM_JUMP11:
9030 case R_ARM_THM_JUMP8:
9031 case R_ARM_THM_JUMP6:
9032 /* Thumb B (branch) instruction). */
9033 {
9034 bfd_signed_vma relocation;
9035 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9036 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
9037 bfd_signed_vma signed_check;
9038
9039 /* CZB cannot jump backward. */
9040 if (r_type == R_ARM_THM_JUMP6)
9041 reloc_signed_min = 0;
9042
9043 if (globals->use_rel)
9044 {
9045 /* Need to refetch addend. */
9046 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9047 if (addend & ((howto->src_mask + 1) >> 1))
9048 {
9049 signed_addend = -1;
9050 signed_addend &= ~ howto->src_mask;
9051 signed_addend |= addend;
9052 }
9053 else
9054 signed_addend = addend;
9055 /* The value in the insn has been right shifted. We need to
9056 undo this, so that we can perform the address calculation
9057 in terms of bytes. */
9058 signed_addend <<= howto->rightshift;
9059 }
9060 relocation = value + signed_addend;
9061
9062 relocation -= (input_section->output_section->vma
9063 + input_section->output_offset
9064 + rel->r_offset);
9065
9066 relocation >>= howto->rightshift;
9067 signed_check = relocation;
9068
9069 if (r_type == R_ARM_THM_JUMP6)
9070 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9071 else
9072 relocation &= howto->dst_mask;
9073 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
9074
9075 bfd_put_16 (input_bfd, relocation, hit_data);
9076
9077 /* Assumes two's complement. */
9078 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9079 return bfd_reloc_overflow;
9080
9081 return bfd_reloc_ok;
9082 }
9083
9084 case R_ARM_ALU_PCREL7_0:
9085 case R_ARM_ALU_PCREL15_8:
9086 case R_ARM_ALU_PCREL23_15:
9087 {
9088 bfd_vma insn;
9089 bfd_vma relocation;
9090
9091 insn = bfd_get_32 (input_bfd, hit_data);
9092 if (globals->use_rel)
9093 {
9094 /* Extract the addend. */
9095 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9096 signed_addend = addend;
9097 }
9098 relocation = value + signed_addend;
9099
9100 relocation -= (input_section->output_section->vma
9101 + input_section->output_offset
9102 + rel->r_offset);
9103 insn = (insn & ~0xfff)
9104 | ((howto->bitpos << 7) & 0xf00)
9105 | ((relocation >> howto->bitpos) & 0xff);
9106 bfd_put_32 (input_bfd, value, hit_data);
9107 }
9108 return bfd_reloc_ok;
9109
9110 case R_ARM_GNU_VTINHERIT:
9111 case R_ARM_GNU_VTENTRY:
9112 return bfd_reloc_ok;
9113
9114 case R_ARM_GOTOFF32:
9115 /* Relocation is relative to the start of the
9116 global offset table. */
9117
9118 BFD_ASSERT (sgot != NULL);
9119 if (sgot == NULL)
9120 return bfd_reloc_notsupported;
9121
9122 /* If we are addressing a Thumb function, we need to adjust the
9123 address by one, so that attempts to call the function pointer will
9124 correctly interpret it as Thumb code. */
9125 if (branch_type == ST_BRANCH_TO_THUMB)
9126 value += 1;
9127
9128 /* Note that sgot->output_offset is not involved in this
9129 calculation. We always want the start of .got. If we
9130 define _GLOBAL_OFFSET_TABLE in a different way, as is
9131 permitted by the ABI, we might have to change this
9132 calculation. */
9133 value -= sgot->output_section->vma;
9134 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9135 contents, rel->r_offset, value,
9136 rel->r_addend);
9137
9138 case R_ARM_GOTPC:
9139 /* Use global offset table as symbol value. */
9140 BFD_ASSERT (sgot != NULL);
9141
9142 if (sgot == NULL)
9143 return bfd_reloc_notsupported;
9144
9145 *unresolved_reloc_p = FALSE;
9146 value = sgot->output_section->vma;
9147 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9148 contents, rel->r_offset, value,
9149 rel->r_addend);
9150
9151 case R_ARM_GOT32:
9152 case R_ARM_GOT_PREL:
9153 /* Relocation is to the entry for this symbol in the
9154 global offset table. */
9155 if (sgot == NULL)
9156 return bfd_reloc_notsupported;
9157
9158 if (dynreloc_st_type == STT_GNU_IFUNC
9159 && plt_offset != (bfd_vma) -1
9160 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9161 {
9162 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9163 symbol, and the relocation resolves directly to the runtime
9164 target rather than to the .iplt entry. This means that any
9165 .got entry would be the same value as the .igot.plt entry,
9166 so there's no point creating both. */
9167 sgot = globals->root.igotplt;
9168 value = sgot->output_offset + gotplt_offset;
9169 }
9170 else if (h != NULL)
9171 {
9172 bfd_vma off;
9173
9174 off = h->got.offset;
9175 BFD_ASSERT (off != (bfd_vma) -1);
9176 if ((off & 1) != 0)
9177 {
9178 /* We have already processsed one GOT relocation against
9179 this symbol. */
9180 off &= ~1;
9181 if (globals->root.dynamic_sections_created
9182 && !SYMBOL_REFERENCES_LOCAL (info, h))
9183 *unresolved_reloc_p = FALSE;
9184 }
9185 else
9186 {
9187 Elf_Internal_Rela outrel;
9188
9189 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
9190 {
9191 /* If the symbol doesn't resolve locally in a static
9192 object, we have an undefined reference. If the
9193 symbol doesn't resolve locally in a dynamic object,
9194 it should be resolved by the dynamic linker. */
9195 if (globals->root.dynamic_sections_created)
9196 {
9197 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9198 *unresolved_reloc_p = FALSE;
9199 }
9200 else
9201 outrel.r_info = 0;
9202 outrel.r_addend = 0;
9203 }
9204 else
9205 {
9206 if (dynreloc_st_type == STT_GNU_IFUNC)
9207 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9208 else if (info->shared &&
9209 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9210 || h->root.type != bfd_link_hash_undefweak))
9211 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9212 else
9213 outrel.r_info = 0;
9214 outrel.r_addend = dynreloc_value;
9215 }
9216
9217 /* The GOT entry is initialized to zero by default.
9218 See if we should install a different value. */
9219 if (outrel.r_addend != 0
9220 && (outrel.r_info == 0 || globals->use_rel))
9221 {
9222 bfd_put_32 (output_bfd, outrel.r_addend,
9223 sgot->contents + off);
9224 outrel.r_addend = 0;
9225 }
9226
9227 if (outrel.r_info != 0)
9228 {
9229 outrel.r_offset = (sgot->output_section->vma
9230 + sgot->output_offset
9231 + off);
9232 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9233 }
9234 h->got.offset |= 1;
9235 }
9236 value = sgot->output_offset + off;
9237 }
9238 else
9239 {
9240 bfd_vma off;
9241
9242 BFD_ASSERT (local_got_offsets != NULL &&
9243 local_got_offsets[r_symndx] != (bfd_vma) -1);
9244
9245 off = local_got_offsets[r_symndx];
9246
9247 /* The offset must always be a multiple of 4. We use the
9248 least significant bit to record whether we have already
9249 generated the necessary reloc. */
9250 if ((off & 1) != 0)
9251 off &= ~1;
9252 else
9253 {
9254 if (globals->use_rel)
9255 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
9256
9257 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
9258 {
9259 Elf_Internal_Rela outrel;
9260
9261 outrel.r_addend = addend + dynreloc_value;
9262 outrel.r_offset = (sgot->output_section->vma
9263 + sgot->output_offset
9264 + off);
9265 if (dynreloc_st_type == STT_GNU_IFUNC)
9266 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9267 else
9268 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9269 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9270 }
9271
9272 local_got_offsets[r_symndx] |= 1;
9273 }
9274
9275 value = sgot->output_offset + off;
9276 }
9277 if (r_type != R_ARM_GOT32)
9278 value += sgot->output_section->vma;
9279
9280 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9281 contents, rel->r_offset, value,
9282 rel->r_addend);
9283
9284 case R_ARM_TLS_LDO32:
9285 value = value - dtpoff_base (info);
9286
9287 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9288 contents, rel->r_offset, value,
9289 rel->r_addend);
9290
9291 case R_ARM_TLS_LDM32:
9292 {
9293 bfd_vma off;
9294
9295 if (sgot == NULL)
9296 abort ();
9297
9298 off = globals->tls_ldm_got.offset;
9299
9300 if ((off & 1) != 0)
9301 off &= ~1;
9302 else
9303 {
9304 /* If we don't know the module number, create a relocation
9305 for it. */
9306 if (info->shared)
9307 {
9308 Elf_Internal_Rela outrel;
9309
9310 if (srelgot == NULL)
9311 abort ();
9312
9313 outrel.r_addend = 0;
9314 outrel.r_offset = (sgot->output_section->vma
9315 + sgot->output_offset + off);
9316 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9317
9318 if (globals->use_rel)
9319 bfd_put_32 (output_bfd, outrel.r_addend,
9320 sgot->contents + off);
9321
9322 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9323 }
9324 else
9325 bfd_put_32 (output_bfd, 1, sgot->contents + off);
9326
9327 globals->tls_ldm_got.offset |= 1;
9328 }
9329
9330 value = sgot->output_section->vma + sgot->output_offset + off
9331 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9332
9333 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9334 contents, rel->r_offset, value,
9335 rel->r_addend);
9336 }
9337
9338 case R_ARM_TLS_CALL:
9339 case R_ARM_THM_TLS_CALL:
9340 case R_ARM_TLS_GD32:
9341 case R_ARM_TLS_IE32:
9342 case R_ARM_TLS_GOTDESC:
9343 case R_ARM_TLS_DESCSEQ:
9344 case R_ARM_THM_TLS_DESCSEQ:
9345 {
9346 bfd_vma off, offplt;
9347 int indx = 0;
9348 char tls_type;
9349
9350 BFD_ASSERT (sgot != NULL);
9351
9352 if (h != NULL)
9353 {
9354 bfd_boolean dyn;
9355 dyn = globals->root.dynamic_sections_created;
9356 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9357 && (!info->shared
9358 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9359 {
9360 *unresolved_reloc_p = FALSE;
9361 indx = h->dynindx;
9362 }
9363 off = h->got.offset;
9364 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
9365 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9366 }
9367 else
9368 {
9369 BFD_ASSERT (local_got_offsets != NULL);
9370 off = local_got_offsets[r_symndx];
9371 offplt = local_tlsdesc_gotents[r_symndx];
9372 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9373 }
9374
9375 /* Linker relaxations happens from one of the
9376 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
9377 if (ELF32_R_TYPE(rel->r_info) != r_type)
9378 tls_type = GOT_TLS_IE;
9379
9380 BFD_ASSERT (tls_type != GOT_UNKNOWN);
9381
9382 if ((off & 1) != 0)
9383 off &= ~1;
9384 else
9385 {
9386 bfd_boolean need_relocs = FALSE;
9387 Elf_Internal_Rela outrel;
9388 int cur_off = off;
9389
9390 /* The GOT entries have not been initialized yet. Do it
9391 now, and emit any relocations. If both an IE GOT and a
9392 GD GOT are necessary, we emit the GD first. */
9393
9394 if ((info->shared || indx != 0)
9395 && (h == NULL
9396 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9397 || h->root.type != bfd_link_hash_undefweak))
9398 {
9399 need_relocs = TRUE;
9400 BFD_ASSERT (srelgot != NULL);
9401 }
9402
9403 if (tls_type & GOT_TLS_GDESC)
9404 {
9405 bfd_byte *loc;
9406
9407 /* We should have relaxed, unless this is an undefined
9408 weak symbol. */
9409 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9410 || info->shared);
9411 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9412 <= globals->root.sgotplt->size);
9413
9414 outrel.r_addend = 0;
9415 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9416 + globals->root.sgotplt->output_offset
9417 + offplt
9418 + globals->sgotplt_jump_table_size);
9419
9420 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9421 sreloc = globals->root.srelplt;
9422 loc = sreloc->contents;
9423 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9424 BFD_ASSERT (loc + RELOC_SIZE (globals)
9425 <= sreloc->contents + sreloc->size);
9426
9427 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9428
9429 /* For globals, the first word in the relocation gets
9430 the relocation index and the top bit set, or zero,
9431 if we're binding now. For locals, it gets the
9432 symbol's offset in the tls section. */
9433 bfd_put_32 (output_bfd,
9434 !h ? value - elf_hash_table (info)->tls_sec->vma
9435 : info->flags & DF_BIND_NOW ? 0
9436 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
9437 globals->root.sgotplt->contents + offplt
9438 + globals->sgotplt_jump_table_size);
9439
9440 /* Second word in the relocation is always zero. */
9441 bfd_put_32 (output_bfd, 0,
9442 globals->root.sgotplt->contents + offplt
9443 + globals->sgotplt_jump_table_size + 4);
9444 }
9445 if (tls_type & GOT_TLS_GD)
9446 {
9447 if (need_relocs)
9448 {
9449 outrel.r_addend = 0;
9450 outrel.r_offset = (sgot->output_section->vma
9451 + sgot->output_offset
9452 + cur_off);
9453 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
9454
9455 if (globals->use_rel)
9456 bfd_put_32 (output_bfd, outrel.r_addend,
9457 sgot->contents + cur_off);
9458
9459 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9460
9461 if (indx == 0)
9462 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9463 sgot->contents + cur_off + 4);
9464 else
9465 {
9466 outrel.r_addend = 0;
9467 outrel.r_info = ELF32_R_INFO (indx,
9468 R_ARM_TLS_DTPOFF32);
9469 outrel.r_offset += 4;
9470
9471 if (globals->use_rel)
9472 bfd_put_32 (output_bfd, outrel.r_addend,
9473 sgot->contents + cur_off + 4);
9474
9475 elf32_arm_add_dynreloc (output_bfd, info,
9476 srelgot, &outrel);
9477 }
9478 }
9479 else
9480 {
9481 /* If we are not emitting relocations for a
9482 general dynamic reference, then we must be in a
9483 static link or an executable link with the
9484 symbol binding locally. Mark it as belonging
9485 to module 1, the executable. */
9486 bfd_put_32 (output_bfd, 1,
9487 sgot->contents + cur_off);
9488 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9489 sgot->contents + cur_off + 4);
9490 }
9491
9492 cur_off += 8;
9493 }
9494
9495 if (tls_type & GOT_TLS_IE)
9496 {
9497 if (need_relocs)
9498 {
9499 if (indx == 0)
9500 outrel.r_addend = value - dtpoff_base (info);
9501 else
9502 outrel.r_addend = 0;
9503 outrel.r_offset = (sgot->output_section->vma
9504 + sgot->output_offset
9505 + cur_off);
9506 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9507
9508 if (globals->use_rel)
9509 bfd_put_32 (output_bfd, outrel.r_addend,
9510 sgot->contents + cur_off);
9511
9512 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9513 }
9514 else
9515 bfd_put_32 (output_bfd, tpoff (info, value),
9516 sgot->contents + cur_off);
9517 cur_off += 4;
9518 }
9519
9520 if (h != NULL)
9521 h->got.offset |= 1;
9522 else
9523 local_got_offsets[r_symndx] |= 1;
9524 }
9525
9526 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9527 off += 8;
9528 else if (tls_type & GOT_TLS_GDESC)
9529 off = offplt;
9530
9531 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9532 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9533 {
9534 bfd_signed_vma offset;
9535 /* TLS stubs are arm mode. The original symbol is a
9536 data object, so branch_type is bogus. */
9537 branch_type = ST_BRANCH_TO_ARM;
9538 enum elf32_arm_stub_type stub_type
9539 = arm_type_of_stub (info, input_section, rel,
9540 st_type, &branch_type,
9541 (struct elf32_arm_link_hash_entry *)h,
9542 globals->tls_trampoline, globals->root.splt,
9543 input_bfd, sym_name);
9544
9545 if (stub_type != arm_stub_none)
9546 {
9547 struct elf32_arm_stub_hash_entry *stub_entry
9548 = elf32_arm_get_stub_entry
9549 (input_section, globals->root.splt, 0, rel,
9550 globals, stub_type);
9551 offset = (stub_entry->stub_offset
9552 + stub_entry->stub_sec->output_offset
9553 + stub_entry->stub_sec->output_section->vma);
9554 }
9555 else
9556 offset = (globals->root.splt->output_section->vma
9557 + globals->root.splt->output_offset
9558 + globals->tls_trampoline);
9559
9560 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9561 {
9562 unsigned long inst;
9563
9564 offset -= (input_section->output_section->vma
9565 + input_section->output_offset
9566 + rel->r_offset + 8);
9567
9568 inst = offset >> 2;
9569 inst &= 0x00ffffff;
9570 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9571 }
9572 else
9573 {
9574 /* Thumb blx encodes the offset in a complicated
9575 fashion. */
9576 unsigned upper_insn, lower_insn;
9577 unsigned neg;
9578
9579 offset -= (input_section->output_section->vma
9580 + input_section->output_offset
9581 + rel->r_offset + 4);
9582
9583 if (stub_type != arm_stub_none
9584 && arm_stub_is_thumb (stub_type))
9585 {
9586 lower_insn = 0xd000;
9587 }
9588 else
9589 {
9590 lower_insn = 0xc000;
9591 /* Round up the offset to a word boundary */
9592 offset = (offset + 2) & ~2;
9593 }
9594
9595 neg = offset < 0;
9596 upper_insn = (0xf000
9597 | ((offset >> 12) & 0x3ff)
9598 | (neg << 10));
9599 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
9600 | (((!((offset >> 22) & 1)) ^ neg) << 11)
9601 | ((offset >> 1) & 0x7ff);
9602 bfd_put_16 (input_bfd, upper_insn, hit_data);
9603 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9604 return bfd_reloc_ok;
9605 }
9606 }
9607 /* These relocations needs special care, as besides the fact
9608 they point somewhere in .gotplt, the addend must be
9609 adjusted accordingly depending on the type of instruction
9610 we refer to */
9611 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9612 {
9613 unsigned long data, insn;
9614 unsigned thumb;
9615
9616 data = bfd_get_32 (input_bfd, hit_data);
9617 thumb = data & 1;
9618 data &= ~1u;
9619
9620 if (thumb)
9621 {
9622 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9623 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9624 insn = (insn << 16)
9625 | bfd_get_16 (input_bfd,
9626 contents + rel->r_offset - data + 2);
9627 if ((insn & 0xf800c000) == 0xf000c000)
9628 /* bl/blx */
9629 value = -6;
9630 else if ((insn & 0xffffff00) == 0x4400)
9631 /* add */
9632 value = -5;
9633 else
9634 {
9635 (*_bfd_error_handler)
9636 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9637 input_bfd, input_section,
9638 (unsigned long)rel->r_offset, insn);
9639 return bfd_reloc_notsupported;
9640 }
9641 }
9642 else
9643 {
9644 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9645
9646 switch (insn >> 24)
9647 {
9648 case 0xeb: /* bl */
9649 case 0xfa: /* blx */
9650 value = -4;
9651 break;
9652
9653 case 0xe0: /* add */
9654 value = -8;
9655 break;
9656
9657 default:
9658 (*_bfd_error_handler)
9659 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9660 input_bfd, input_section,
9661 (unsigned long)rel->r_offset, insn);
9662 return bfd_reloc_notsupported;
9663 }
9664 }
9665
9666 value += ((globals->root.sgotplt->output_section->vma
9667 + globals->root.sgotplt->output_offset + off)
9668 - (input_section->output_section->vma
9669 + input_section->output_offset
9670 + rel->r_offset)
9671 + globals->sgotplt_jump_table_size);
9672 }
9673 else
9674 value = ((globals->root.sgot->output_section->vma
9675 + globals->root.sgot->output_offset + off)
9676 - (input_section->output_section->vma
9677 + input_section->output_offset + rel->r_offset));
9678
9679 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9680 contents, rel->r_offset, value,
9681 rel->r_addend);
9682 }
9683
9684 case R_ARM_TLS_LE32:
9685 if (info->shared && !info->pie)
9686 {
9687 (*_bfd_error_handler)
9688 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9689 input_bfd, input_section,
9690 (long) rel->r_offset, howto->name);
9691 return bfd_reloc_notsupported;
9692 }
9693 else
9694 value = tpoff (info, value);
9695
9696 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9697 contents, rel->r_offset, value,
9698 rel->r_addend);
9699
9700 case R_ARM_V4BX:
9701 if (globals->fix_v4bx)
9702 {
9703 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9704
9705 /* Ensure that we have a BX instruction. */
9706 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
9707
9708 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9709 {
9710 /* Branch to veneer. */
9711 bfd_vma glue_addr;
9712 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9713 glue_addr -= input_section->output_section->vma
9714 + input_section->output_offset
9715 + rel->r_offset + 8;
9716 insn = (insn & 0xf0000000) | 0x0a000000
9717 | ((glue_addr >> 2) & 0x00ffffff);
9718 }
9719 else
9720 {
9721 /* Preserve Rm (lowest four bits) and the condition code
9722 (highest four bits). Other bits encode MOV PC,Rm. */
9723 insn = (insn & 0xf000000f) | 0x01a0f000;
9724 }
9725
9726 bfd_put_32 (input_bfd, insn, hit_data);
9727 }
9728 return bfd_reloc_ok;
9729
9730 case R_ARM_MOVW_ABS_NC:
9731 case R_ARM_MOVT_ABS:
9732 case R_ARM_MOVW_PREL_NC:
9733 case R_ARM_MOVT_PREL:
9734 /* Until we properly support segment-base-relative addressing then
9735 we assume the segment base to be zero, as for the group relocations.
9736 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9737 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9738 case R_ARM_MOVW_BREL_NC:
9739 case R_ARM_MOVW_BREL:
9740 case R_ARM_MOVT_BREL:
9741 {
9742 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9743
9744 if (globals->use_rel)
9745 {
9746 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
9747 signed_addend = (addend ^ 0x8000) - 0x8000;
9748 }
9749
9750 value += signed_addend;
9751
9752 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9753 value -= (input_section->output_section->vma
9754 + input_section->output_offset + rel->r_offset);
9755
9756 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9757 return bfd_reloc_overflow;
9758
9759 if (branch_type == ST_BRANCH_TO_THUMB)
9760 value |= 1;
9761
9762 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9763 || r_type == R_ARM_MOVT_BREL)
9764 value >>= 16;
9765
9766 insn &= 0xfff0f000;
9767 insn |= value & 0xfff;
9768 insn |= (value & 0xf000) << 4;
9769 bfd_put_32 (input_bfd, insn, hit_data);
9770 }
9771 return bfd_reloc_ok;
9772
9773 case R_ARM_THM_MOVW_ABS_NC:
9774 case R_ARM_THM_MOVT_ABS:
9775 case R_ARM_THM_MOVW_PREL_NC:
9776 case R_ARM_THM_MOVT_PREL:
9777 /* Until we properly support segment-base-relative addressing then
9778 we assume the segment base to be zero, as for the above relocations.
9779 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9780 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9781 as R_ARM_THM_MOVT_ABS. */
9782 case R_ARM_THM_MOVW_BREL_NC:
9783 case R_ARM_THM_MOVW_BREL:
9784 case R_ARM_THM_MOVT_BREL:
9785 {
9786 bfd_vma insn;
9787
9788 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9789 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9790
9791 if (globals->use_rel)
9792 {
9793 addend = ((insn >> 4) & 0xf000)
9794 | ((insn >> 15) & 0x0800)
9795 | ((insn >> 4) & 0x0700)
9796 | (insn & 0x00ff);
9797 signed_addend = (addend ^ 0x8000) - 0x8000;
9798 }
9799
9800 value += signed_addend;
9801
9802 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9803 value -= (input_section->output_section->vma
9804 + input_section->output_offset + rel->r_offset);
9805
9806 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9807 return bfd_reloc_overflow;
9808
9809 if (branch_type == ST_BRANCH_TO_THUMB)
9810 value |= 1;
9811
9812 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9813 || r_type == R_ARM_THM_MOVT_BREL)
9814 value >>= 16;
9815
9816 insn &= 0xfbf08f00;
9817 insn |= (value & 0xf000) << 4;
9818 insn |= (value & 0x0800) << 15;
9819 insn |= (value & 0x0700) << 4;
9820 insn |= (value & 0x00ff);
9821
9822 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9823 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9824 }
9825 return bfd_reloc_ok;
9826
9827 case R_ARM_ALU_PC_G0_NC:
9828 case R_ARM_ALU_PC_G1_NC:
9829 case R_ARM_ALU_PC_G0:
9830 case R_ARM_ALU_PC_G1:
9831 case R_ARM_ALU_PC_G2:
9832 case R_ARM_ALU_SB_G0_NC:
9833 case R_ARM_ALU_SB_G1_NC:
9834 case R_ARM_ALU_SB_G0:
9835 case R_ARM_ALU_SB_G1:
9836 case R_ARM_ALU_SB_G2:
9837 {
9838 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9839 bfd_vma pc = input_section->output_section->vma
9840 + input_section->output_offset + rel->r_offset;
9841 /* sb should be the origin of the *segment* containing the symbol.
9842 It is not clear how to obtain this OS-dependent value, so we
9843 make an arbitrary choice of zero. */
9844 bfd_vma sb = 0;
9845 bfd_vma residual;
9846 bfd_vma g_n;
9847 bfd_signed_vma signed_value;
9848 int group = 0;
9849
9850 /* Determine which group of bits to select. */
9851 switch (r_type)
9852 {
9853 case R_ARM_ALU_PC_G0_NC:
9854 case R_ARM_ALU_PC_G0:
9855 case R_ARM_ALU_SB_G0_NC:
9856 case R_ARM_ALU_SB_G0:
9857 group = 0;
9858 break;
9859
9860 case R_ARM_ALU_PC_G1_NC:
9861 case R_ARM_ALU_PC_G1:
9862 case R_ARM_ALU_SB_G1_NC:
9863 case R_ARM_ALU_SB_G1:
9864 group = 1;
9865 break;
9866
9867 case R_ARM_ALU_PC_G2:
9868 case R_ARM_ALU_SB_G2:
9869 group = 2;
9870 break;
9871
9872 default:
9873 abort ();
9874 }
9875
9876 /* If REL, extract the addend from the insn. If RELA, it will
9877 have already been fetched for us. */
9878 if (globals->use_rel)
9879 {
9880 int negative;
9881 bfd_vma constant = insn & 0xff;
9882 bfd_vma rotation = (insn & 0xf00) >> 8;
9883
9884 if (rotation == 0)
9885 signed_addend = constant;
9886 else
9887 {
9888 /* Compensate for the fact that in the instruction, the
9889 rotation is stored in multiples of 2 bits. */
9890 rotation *= 2;
9891
9892 /* Rotate "constant" right by "rotation" bits. */
9893 signed_addend = (constant >> rotation) |
9894 (constant << (8 * sizeof (bfd_vma) - rotation));
9895 }
9896
9897 /* Determine if the instruction is an ADD or a SUB.
9898 (For REL, this determines the sign of the addend.) */
9899 negative = identify_add_or_sub (insn);
9900 if (negative == 0)
9901 {
9902 (*_bfd_error_handler)
9903 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9904 input_bfd, input_section,
9905 (long) rel->r_offset, howto->name);
9906 return bfd_reloc_overflow;
9907 }
9908
9909 signed_addend *= negative;
9910 }
9911
9912 /* Compute the value (X) to go in the place. */
9913 if (r_type == R_ARM_ALU_PC_G0_NC
9914 || r_type == R_ARM_ALU_PC_G1_NC
9915 || r_type == R_ARM_ALU_PC_G0
9916 || r_type == R_ARM_ALU_PC_G1
9917 || r_type == R_ARM_ALU_PC_G2)
9918 /* PC relative. */
9919 signed_value = value - pc + signed_addend;
9920 else
9921 /* Section base relative. */
9922 signed_value = value - sb + signed_addend;
9923
9924 /* If the target symbol is a Thumb function, then set the
9925 Thumb bit in the address. */
9926 if (branch_type == ST_BRANCH_TO_THUMB)
9927 signed_value |= 1;
9928
9929 /* Calculate the value of the relevant G_n, in encoded
9930 constant-with-rotation format. */
9931 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9932 &residual);
9933
9934 /* Check for overflow if required. */
9935 if ((r_type == R_ARM_ALU_PC_G0
9936 || r_type == R_ARM_ALU_PC_G1
9937 || r_type == R_ARM_ALU_PC_G2
9938 || r_type == R_ARM_ALU_SB_G0
9939 || r_type == R_ARM_ALU_SB_G1
9940 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9941 {
9942 (*_bfd_error_handler)
9943 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9944 input_bfd, input_section,
9945 (long) rel->r_offset, abs (signed_value), howto->name);
9946 return bfd_reloc_overflow;
9947 }
9948
9949 /* Mask out the value and the ADD/SUB part of the opcode; take care
9950 not to destroy the S bit. */
9951 insn &= 0xff1ff000;
9952
9953 /* Set the opcode according to whether the value to go in the
9954 place is negative. */
9955 if (signed_value < 0)
9956 insn |= 1 << 22;
9957 else
9958 insn |= 1 << 23;
9959
9960 /* Encode the offset. */
9961 insn |= g_n;
9962
9963 bfd_put_32 (input_bfd, insn, hit_data);
9964 }
9965 return bfd_reloc_ok;
9966
9967 case R_ARM_LDR_PC_G0:
9968 case R_ARM_LDR_PC_G1:
9969 case R_ARM_LDR_PC_G2:
9970 case R_ARM_LDR_SB_G0:
9971 case R_ARM_LDR_SB_G1:
9972 case R_ARM_LDR_SB_G2:
9973 {
9974 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9975 bfd_vma pc = input_section->output_section->vma
9976 + input_section->output_offset + rel->r_offset;
9977 bfd_vma sb = 0; /* See note above. */
9978 bfd_vma residual;
9979 bfd_signed_vma signed_value;
9980 int group = 0;
9981
9982 /* Determine which groups of bits to calculate. */
9983 switch (r_type)
9984 {
9985 case R_ARM_LDR_PC_G0:
9986 case R_ARM_LDR_SB_G0:
9987 group = 0;
9988 break;
9989
9990 case R_ARM_LDR_PC_G1:
9991 case R_ARM_LDR_SB_G1:
9992 group = 1;
9993 break;
9994
9995 case R_ARM_LDR_PC_G2:
9996 case R_ARM_LDR_SB_G2:
9997 group = 2;
9998 break;
9999
10000 default:
10001 abort ();
10002 }
10003
10004 /* If REL, extract the addend from the insn. If RELA, it will
10005 have already been fetched for us. */
10006 if (globals->use_rel)
10007 {
10008 int negative = (insn & (1 << 23)) ? 1 : -1;
10009 signed_addend = negative * (insn & 0xfff);
10010 }
10011
10012 /* Compute the value (X) to go in the place. */
10013 if (r_type == R_ARM_LDR_PC_G0
10014 || r_type == R_ARM_LDR_PC_G1
10015 || r_type == R_ARM_LDR_PC_G2)
10016 /* PC relative. */
10017 signed_value = value - pc + signed_addend;
10018 else
10019 /* Section base relative. */
10020 signed_value = value - sb + signed_addend;
10021
10022 /* Calculate the value of the relevant G_{n-1} to obtain
10023 the residual at that stage. */
10024 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10025
10026 /* Check for overflow. */
10027 if (residual >= 0x1000)
10028 {
10029 (*_bfd_error_handler)
10030 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10031 input_bfd, input_section,
10032 (long) rel->r_offset, abs (signed_value), howto->name);
10033 return bfd_reloc_overflow;
10034 }
10035
10036 /* Mask out the value and U bit. */
10037 insn &= 0xff7ff000;
10038
10039 /* Set the U bit if the value to go in the place is non-negative. */
10040 if (signed_value >= 0)
10041 insn |= 1 << 23;
10042
10043 /* Encode the offset. */
10044 insn |= residual;
10045
10046 bfd_put_32 (input_bfd, insn, hit_data);
10047 }
10048 return bfd_reloc_ok;
10049
10050 case R_ARM_LDRS_PC_G0:
10051 case R_ARM_LDRS_PC_G1:
10052 case R_ARM_LDRS_PC_G2:
10053 case R_ARM_LDRS_SB_G0:
10054 case R_ARM_LDRS_SB_G1:
10055 case R_ARM_LDRS_SB_G2:
10056 {
10057 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10058 bfd_vma pc = input_section->output_section->vma
10059 + input_section->output_offset + rel->r_offset;
10060 bfd_vma sb = 0; /* See note above. */
10061 bfd_vma residual;
10062 bfd_signed_vma signed_value;
10063 int group = 0;
10064
10065 /* Determine which groups of bits to calculate. */
10066 switch (r_type)
10067 {
10068 case R_ARM_LDRS_PC_G0:
10069 case R_ARM_LDRS_SB_G0:
10070 group = 0;
10071 break;
10072
10073 case R_ARM_LDRS_PC_G1:
10074 case R_ARM_LDRS_SB_G1:
10075 group = 1;
10076 break;
10077
10078 case R_ARM_LDRS_PC_G2:
10079 case R_ARM_LDRS_SB_G2:
10080 group = 2;
10081 break;
10082
10083 default:
10084 abort ();
10085 }
10086
10087 /* If REL, extract the addend from the insn. If RELA, it will
10088 have already been fetched for us. */
10089 if (globals->use_rel)
10090 {
10091 int negative = (insn & (1 << 23)) ? 1 : -1;
10092 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10093 }
10094
10095 /* Compute the value (X) to go in the place. */
10096 if (r_type == R_ARM_LDRS_PC_G0
10097 || r_type == R_ARM_LDRS_PC_G1
10098 || r_type == R_ARM_LDRS_PC_G2)
10099 /* PC relative. */
10100 signed_value = value - pc + signed_addend;
10101 else
10102 /* Section base relative. */
10103 signed_value = value - sb + signed_addend;
10104
10105 /* Calculate the value of the relevant G_{n-1} to obtain
10106 the residual at that stage. */
10107 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10108
10109 /* Check for overflow. */
10110 if (residual >= 0x100)
10111 {
10112 (*_bfd_error_handler)
10113 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10114 input_bfd, input_section,
10115 (long) rel->r_offset, abs (signed_value), howto->name);
10116 return bfd_reloc_overflow;
10117 }
10118
10119 /* Mask out the value and U bit. */
10120 insn &= 0xff7ff0f0;
10121
10122 /* Set the U bit if the value to go in the place is non-negative. */
10123 if (signed_value >= 0)
10124 insn |= 1 << 23;
10125
10126 /* Encode the offset. */
10127 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
10128
10129 bfd_put_32 (input_bfd, insn, hit_data);
10130 }
10131 return bfd_reloc_ok;
10132
10133 case R_ARM_LDC_PC_G0:
10134 case R_ARM_LDC_PC_G1:
10135 case R_ARM_LDC_PC_G2:
10136 case R_ARM_LDC_SB_G0:
10137 case R_ARM_LDC_SB_G1:
10138 case R_ARM_LDC_SB_G2:
10139 {
10140 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10141 bfd_vma pc = input_section->output_section->vma
10142 + input_section->output_offset + rel->r_offset;
10143 bfd_vma sb = 0; /* See note above. */
10144 bfd_vma residual;
10145 bfd_signed_vma signed_value;
10146 int group = 0;
10147
10148 /* Determine which groups of bits to calculate. */
10149 switch (r_type)
10150 {
10151 case R_ARM_LDC_PC_G0:
10152 case R_ARM_LDC_SB_G0:
10153 group = 0;
10154 break;
10155
10156 case R_ARM_LDC_PC_G1:
10157 case R_ARM_LDC_SB_G1:
10158 group = 1;
10159 break;
10160
10161 case R_ARM_LDC_PC_G2:
10162 case R_ARM_LDC_SB_G2:
10163 group = 2;
10164 break;
10165
10166 default:
10167 abort ();
10168 }
10169
10170 /* If REL, extract the addend from the insn. If RELA, it will
10171 have already been fetched for us. */
10172 if (globals->use_rel)
10173 {
10174 int negative = (insn & (1 << 23)) ? 1 : -1;
10175 signed_addend = negative * ((insn & 0xff) << 2);
10176 }
10177
10178 /* Compute the value (X) to go in the place. */
10179 if (r_type == R_ARM_LDC_PC_G0
10180 || r_type == R_ARM_LDC_PC_G1
10181 || r_type == R_ARM_LDC_PC_G2)
10182 /* PC relative. */
10183 signed_value = value - pc + signed_addend;
10184 else
10185 /* Section base relative. */
10186 signed_value = value - sb + signed_addend;
10187
10188 /* Calculate the value of the relevant G_{n-1} to obtain
10189 the residual at that stage. */
10190 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10191
10192 /* Check for overflow. (The absolute value to go in the place must be
10193 divisible by four and, after having been divided by four, must
10194 fit in eight bits.) */
10195 if ((residual & 0x3) != 0 || residual >= 0x400)
10196 {
10197 (*_bfd_error_handler)
10198 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10199 input_bfd, input_section,
10200 (long) rel->r_offset, abs (signed_value), howto->name);
10201 return bfd_reloc_overflow;
10202 }
10203
10204 /* Mask out the value and U bit. */
10205 insn &= 0xff7fff00;
10206
10207 /* Set the U bit if the value to go in the place is non-negative. */
10208 if (signed_value >= 0)
10209 insn |= 1 << 23;
10210
10211 /* Encode the offset. */
10212 insn |= residual >> 2;
10213
10214 bfd_put_32 (input_bfd, insn, hit_data);
10215 }
10216 return bfd_reloc_ok;
10217
10218 default:
10219 return bfd_reloc_notsupported;
10220 }
10221 }
10222
10223 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10224 static void
10225 arm_add_to_rel (bfd * abfd,
10226 bfd_byte * address,
10227 reloc_howto_type * howto,
10228 bfd_signed_vma increment)
10229 {
10230 bfd_signed_vma addend;
10231
10232 if (howto->type == R_ARM_THM_CALL
10233 || howto->type == R_ARM_THM_JUMP24)
10234 {
10235 int upper_insn, lower_insn;
10236 int upper, lower;
10237
10238 upper_insn = bfd_get_16 (abfd, address);
10239 lower_insn = bfd_get_16 (abfd, address + 2);
10240 upper = upper_insn & 0x7ff;
10241 lower = lower_insn & 0x7ff;
10242
10243 addend = (upper << 12) | (lower << 1);
10244 addend += increment;
10245 addend >>= 1;
10246
10247 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10248 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10249
10250 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10251 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
10252 }
10253 else
10254 {
10255 bfd_vma contents;
10256
10257 contents = bfd_get_32 (abfd, address);
10258
10259 /* Get the (signed) value from the instruction. */
10260 addend = contents & howto->src_mask;
10261 if (addend & ((howto->src_mask + 1) >> 1))
10262 {
10263 bfd_signed_vma mask;
10264
10265 mask = -1;
10266 mask &= ~ howto->src_mask;
10267 addend |= mask;
10268 }
10269
10270 /* Add in the increment, (which is a byte value). */
10271 switch (howto->type)
10272 {
10273 default:
10274 addend += increment;
10275 break;
10276
10277 case R_ARM_PC24:
10278 case R_ARM_PLT32:
10279 case R_ARM_CALL:
10280 case R_ARM_JUMP24:
10281 addend <<= howto->size;
10282 addend += increment;
10283
10284 /* Should we check for overflow here ? */
10285
10286 /* Drop any undesired bits. */
10287 addend >>= howto->rightshift;
10288 break;
10289 }
10290
10291 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10292
10293 bfd_put_32 (abfd, contents, address);
10294 }
10295 }
10296
10297 #define IS_ARM_TLS_RELOC(R_TYPE) \
10298 ((R_TYPE) == R_ARM_TLS_GD32 \
10299 || (R_TYPE) == R_ARM_TLS_LDO32 \
10300 || (R_TYPE) == R_ARM_TLS_LDM32 \
10301 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10302 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10303 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10304 || (R_TYPE) == R_ARM_TLS_LE32 \
10305 || (R_TYPE) == R_ARM_TLS_IE32 \
10306 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10307
10308 /* Specific set of relocations for the gnu tls dialect. */
10309 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10310 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10311 || (R_TYPE) == R_ARM_TLS_CALL \
10312 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10313 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10314 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
10315
10316 /* Relocate an ARM ELF section. */
10317
10318 static bfd_boolean
10319 elf32_arm_relocate_section (bfd * output_bfd,
10320 struct bfd_link_info * info,
10321 bfd * input_bfd,
10322 asection * input_section,
10323 bfd_byte * contents,
10324 Elf_Internal_Rela * relocs,
10325 Elf_Internal_Sym * local_syms,
10326 asection ** local_sections)
10327 {
10328 Elf_Internal_Shdr *symtab_hdr;
10329 struct elf_link_hash_entry **sym_hashes;
10330 Elf_Internal_Rela *rel;
10331 Elf_Internal_Rela *relend;
10332 const char *name;
10333 struct elf32_arm_link_hash_table * globals;
10334
10335 globals = elf32_arm_hash_table (info);
10336 if (globals == NULL)
10337 return FALSE;
10338
10339 symtab_hdr = & elf_symtab_hdr (input_bfd);
10340 sym_hashes = elf_sym_hashes (input_bfd);
10341
10342 rel = relocs;
10343 relend = relocs + input_section->reloc_count;
10344 for (; rel < relend; rel++)
10345 {
10346 int r_type;
10347 reloc_howto_type * howto;
10348 unsigned long r_symndx;
10349 Elf_Internal_Sym * sym;
10350 asection * sec;
10351 struct elf_link_hash_entry * h;
10352 bfd_vma relocation;
10353 bfd_reloc_status_type r;
10354 arelent bfd_reloc;
10355 char sym_type;
10356 bfd_boolean unresolved_reloc = FALSE;
10357 char *error_message = NULL;
10358
10359 r_symndx = ELF32_R_SYM (rel->r_info);
10360 r_type = ELF32_R_TYPE (rel->r_info);
10361 r_type = arm_real_reloc_type (globals, r_type);
10362
10363 if ( r_type == R_ARM_GNU_VTENTRY
10364 || r_type == R_ARM_GNU_VTINHERIT)
10365 continue;
10366
10367 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
10368 howto = bfd_reloc.howto;
10369
10370 h = NULL;
10371 sym = NULL;
10372 sec = NULL;
10373
10374 if (r_symndx < symtab_hdr->sh_info)
10375 {
10376 sym = local_syms + r_symndx;
10377 sym_type = ELF32_ST_TYPE (sym->st_info);
10378 sec = local_sections[r_symndx];
10379
10380 /* An object file might have a reference to a local
10381 undefined symbol. This is a daft object file, but we
10382 should at least do something about it. V4BX & NONE
10383 relocations do not use the symbol and are explicitly
10384 allowed to use the undefined symbol, so allow those.
10385 Likewise for relocations against STN_UNDEF. */
10386 if (r_type != R_ARM_V4BX
10387 && r_type != R_ARM_NONE
10388 && r_symndx != STN_UNDEF
10389 && bfd_is_und_section (sec)
10390 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10391 {
10392 if (!info->callbacks->undefined_symbol
10393 (info, bfd_elf_string_from_elf_section
10394 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10395 input_bfd, input_section,
10396 rel->r_offset, TRUE))
10397 return FALSE;
10398 }
10399
10400 if (globals->use_rel)
10401 {
10402 relocation = (sec->output_section->vma
10403 + sec->output_offset
10404 + sym->st_value);
10405 if (!info->relocatable
10406 && (sec->flags & SEC_MERGE)
10407 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10408 {
10409 asection *msec;
10410 bfd_vma addend, value;
10411
10412 switch (r_type)
10413 {
10414 case R_ARM_MOVW_ABS_NC:
10415 case R_ARM_MOVT_ABS:
10416 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10417 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10418 addend = (addend ^ 0x8000) - 0x8000;
10419 break;
10420
10421 case R_ARM_THM_MOVW_ABS_NC:
10422 case R_ARM_THM_MOVT_ABS:
10423 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10424 << 16;
10425 value |= bfd_get_16 (input_bfd,
10426 contents + rel->r_offset + 2);
10427 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10428 | ((value & 0x04000000) >> 15);
10429 addend = (addend ^ 0x8000) - 0x8000;
10430 break;
10431
10432 default:
10433 if (howto->rightshift
10434 || (howto->src_mask & (howto->src_mask + 1)))
10435 {
10436 (*_bfd_error_handler)
10437 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10438 input_bfd, input_section,
10439 (long) rel->r_offset, howto->name);
10440 return FALSE;
10441 }
10442
10443 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10444
10445 /* Get the (signed) value from the instruction. */
10446 addend = value & howto->src_mask;
10447 if (addend & ((howto->src_mask + 1) >> 1))
10448 {
10449 bfd_signed_vma mask;
10450
10451 mask = -1;
10452 mask &= ~ howto->src_mask;
10453 addend |= mask;
10454 }
10455 break;
10456 }
10457
10458 msec = sec;
10459 addend =
10460 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10461 - relocation;
10462 addend += msec->output_section->vma + msec->output_offset;
10463
10464 /* Cases here must match those in the preceding
10465 switch statement. */
10466 switch (r_type)
10467 {
10468 case R_ARM_MOVW_ABS_NC:
10469 case R_ARM_MOVT_ABS:
10470 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10471 | (addend & 0xfff);
10472 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10473 break;
10474
10475 case R_ARM_THM_MOVW_ABS_NC:
10476 case R_ARM_THM_MOVT_ABS:
10477 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10478 | (addend & 0xff) | ((addend & 0x0800) << 15);
10479 bfd_put_16 (input_bfd, value >> 16,
10480 contents + rel->r_offset);
10481 bfd_put_16 (input_bfd, value,
10482 contents + rel->r_offset + 2);
10483 break;
10484
10485 default:
10486 value = (value & ~ howto->dst_mask)
10487 | (addend & howto->dst_mask);
10488 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10489 break;
10490 }
10491 }
10492 }
10493 else
10494 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
10495 }
10496 else
10497 {
10498 bfd_boolean warned;
10499
10500 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10501 r_symndx, symtab_hdr, sym_hashes,
10502 h, sec, relocation,
10503 unresolved_reloc, warned);
10504
10505 sym_type = h->type;
10506 }
10507
10508 if (sec != NULL && discarded_section (sec))
10509 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
10510 rel, 1, relend, howto, 0, contents);
10511
10512 if (info->relocatable)
10513 {
10514 /* This is a relocatable link. We don't have to change
10515 anything, unless the reloc is against a section symbol,
10516 in which case we have to adjust according to where the
10517 section symbol winds up in the output section. */
10518 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10519 {
10520 if (globals->use_rel)
10521 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10522 howto, (bfd_signed_vma) sec->output_offset);
10523 else
10524 rel->r_addend += sec->output_offset;
10525 }
10526 continue;
10527 }
10528
10529 if (h != NULL)
10530 name = h->root.root.string;
10531 else
10532 {
10533 name = (bfd_elf_string_from_elf_section
10534 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10535 if (name == NULL || *name == '\0')
10536 name = bfd_section_name (input_bfd, sec);
10537 }
10538
10539 if (r_symndx != STN_UNDEF
10540 && r_type != R_ARM_NONE
10541 && (h == NULL
10542 || h->root.type == bfd_link_hash_defined
10543 || h->root.type == bfd_link_hash_defweak)
10544 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10545 {
10546 (*_bfd_error_handler)
10547 ((sym_type == STT_TLS
10548 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10549 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10550 input_bfd,
10551 input_section,
10552 (long) rel->r_offset,
10553 howto->name,
10554 name);
10555 }
10556
10557 /* We call elf32_arm_final_link_relocate unless we're completely
10558 done, i.e., the relaxation produced the final output we want,
10559 and we won't let anybody mess with it. Also, we have to do
10560 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10561 both in relaxed and non-relaxed cases */
10562 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10563 || (IS_ARM_TLS_GNU_RELOC (r_type)
10564 && !((h ? elf32_arm_hash_entry (h)->tls_type :
10565 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10566 & GOT_TLS_GDESC)))
10567 {
10568 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10569 contents, rel, h == NULL);
10570 /* This may have been marked unresolved because it came from
10571 a shared library. But we've just dealt with that. */
10572 unresolved_reloc = 0;
10573 }
10574 else
10575 r = bfd_reloc_continue;
10576
10577 if (r == bfd_reloc_continue)
10578 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10579 input_section, contents, rel,
10580 relocation, info, sec, name, sym_type,
10581 (h ? h->target_internal
10582 : ARM_SYM_BRANCH_TYPE (sym)), h,
10583 &unresolved_reloc, &error_message);
10584
10585 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10586 because such sections are not SEC_ALLOC and thus ld.so will
10587 not process them. */
10588 if (unresolved_reloc
10589 && !((input_section->flags & SEC_DEBUGGING) != 0
10590 && h->def_dynamic)
10591 && _bfd_elf_section_offset (output_bfd, info, input_section,
10592 rel->r_offset) != (bfd_vma) -1)
10593 {
10594 (*_bfd_error_handler)
10595 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10596 input_bfd,
10597 input_section,
10598 (long) rel->r_offset,
10599 howto->name,
10600 h->root.root.string);
10601 return FALSE;
10602 }
10603
10604 if (r != bfd_reloc_ok)
10605 {
10606 switch (r)
10607 {
10608 case bfd_reloc_overflow:
10609 /* If the overflowing reloc was to an undefined symbol,
10610 we have already printed one error message and there
10611 is no point complaining again. */
10612 if ((! h ||
10613 h->root.type != bfd_link_hash_undefined)
10614 && (!((*info->callbacks->reloc_overflow)
10615 (info, (h ? &h->root : NULL), name, howto->name,
10616 (bfd_vma) 0, input_bfd, input_section,
10617 rel->r_offset))))
10618 return FALSE;
10619 break;
10620
10621 case bfd_reloc_undefined:
10622 if (!((*info->callbacks->undefined_symbol)
10623 (info, name, input_bfd, input_section,
10624 rel->r_offset, TRUE)))
10625 return FALSE;
10626 break;
10627
10628 case bfd_reloc_outofrange:
10629 error_message = _("out of range");
10630 goto common_error;
10631
10632 case bfd_reloc_notsupported:
10633 error_message = _("unsupported relocation");
10634 goto common_error;
10635
10636 case bfd_reloc_dangerous:
10637 /* error_message should already be set. */
10638 goto common_error;
10639
10640 default:
10641 error_message = _("unknown error");
10642 /* Fall through. */
10643
10644 common_error:
10645 BFD_ASSERT (error_message != NULL);
10646 if (!((*info->callbacks->reloc_dangerous)
10647 (info, error_message, input_bfd, input_section,
10648 rel->r_offset)))
10649 return FALSE;
10650 break;
10651 }
10652 }
10653 }
10654
10655 return TRUE;
10656 }
10657
10658 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
10659 adds the edit to the start of the list. (The list must be built in order of
10660 ascending TINDEX: the function's callers are primarily responsible for
10661 maintaining that condition). */
10662
10663 static void
10664 add_unwind_table_edit (arm_unwind_table_edit **head,
10665 arm_unwind_table_edit **tail,
10666 arm_unwind_edit_type type,
10667 asection *linked_section,
10668 unsigned int tindex)
10669 {
10670 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10671 xmalloc (sizeof (arm_unwind_table_edit));
10672
10673 new_edit->type = type;
10674 new_edit->linked_section = linked_section;
10675 new_edit->index = tindex;
10676
10677 if (tindex > 0)
10678 {
10679 new_edit->next = NULL;
10680
10681 if (*tail)
10682 (*tail)->next = new_edit;
10683
10684 (*tail) = new_edit;
10685
10686 if (!*head)
10687 (*head) = new_edit;
10688 }
10689 else
10690 {
10691 new_edit->next = *head;
10692
10693 if (!*tail)
10694 *tail = new_edit;
10695
10696 *head = new_edit;
10697 }
10698 }
10699
10700 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10701
10702 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10703 static void
10704 adjust_exidx_size(asection *exidx_sec, int adjust)
10705 {
10706 asection *out_sec;
10707
10708 if (!exidx_sec->rawsize)
10709 exidx_sec->rawsize = exidx_sec->size;
10710
10711 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10712 out_sec = exidx_sec->output_section;
10713 /* Adjust size of output section. */
10714 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10715 }
10716
10717 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10718 static void
10719 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10720 {
10721 struct _arm_elf_section_data *exidx_arm_data;
10722
10723 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10724 add_unwind_table_edit (
10725 &exidx_arm_data->u.exidx.unwind_edit_list,
10726 &exidx_arm_data->u.exidx.unwind_edit_tail,
10727 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10728
10729 adjust_exidx_size(exidx_sec, 8);
10730 }
10731
10732 /* Scan .ARM.exidx tables, and create a list describing edits which should be
10733 made to those tables, such that:
10734
10735 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10736 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10737 codes which have been inlined into the index).
10738
10739 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10740
10741 The edits are applied when the tables are written
10742 (in elf32_arm_write_section). */
10743
10744 bfd_boolean
10745 elf32_arm_fix_exidx_coverage (asection **text_section_order,
10746 unsigned int num_text_sections,
10747 struct bfd_link_info *info,
10748 bfd_boolean merge_exidx_entries)
10749 {
10750 bfd *inp;
10751 unsigned int last_second_word = 0, i;
10752 asection *last_exidx_sec = NULL;
10753 asection *last_text_sec = NULL;
10754 int last_unwind_type = -1;
10755
10756 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10757 text sections. */
10758 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10759 {
10760 asection *sec;
10761
10762 for (sec = inp->sections; sec != NULL; sec = sec->next)
10763 {
10764 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10765 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
10766
10767 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
10768 continue;
10769
10770 if (elf_sec->linked_to)
10771 {
10772 Elf_Internal_Shdr *linked_hdr
10773 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10774 struct _arm_elf_section_data *linked_sec_arm_data
10775 = get_arm_elf_section_data (linked_hdr->bfd_section);
10776
10777 if (linked_sec_arm_data == NULL)
10778 continue;
10779
10780 /* Link this .ARM.exidx section back from the text section it
10781 describes. */
10782 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10783 }
10784 }
10785 }
10786
10787 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10788 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
10789 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
10790
10791 for (i = 0; i < num_text_sections; i++)
10792 {
10793 asection *sec = text_section_order[i];
10794 asection *exidx_sec;
10795 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10796 struct _arm_elf_section_data *exidx_arm_data;
10797 bfd_byte *contents = NULL;
10798 int deleted_exidx_bytes = 0;
10799 bfd_vma j;
10800 arm_unwind_table_edit *unwind_edit_head = NULL;
10801 arm_unwind_table_edit *unwind_edit_tail = NULL;
10802 Elf_Internal_Shdr *hdr;
10803 bfd *ibfd;
10804
10805 if (arm_data == NULL)
10806 continue;
10807
10808 exidx_sec = arm_data->u.text.arm_exidx_sec;
10809 if (exidx_sec == NULL)
10810 {
10811 /* Section has no unwind data. */
10812 if (last_unwind_type == 0 || !last_exidx_sec)
10813 continue;
10814
10815 /* Ignore zero sized sections. */
10816 if (sec->size == 0)
10817 continue;
10818
10819 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10820 last_unwind_type = 0;
10821 continue;
10822 }
10823
10824 /* Skip /DISCARD/ sections. */
10825 if (bfd_is_abs_section (exidx_sec->output_section))
10826 continue;
10827
10828 hdr = &elf_section_data (exidx_sec)->this_hdr;
10829 if (hdr->sh_type != SHT_ARM_EXIDX)
10830 continue;
10831
10832 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10833 if (exidx_arm_data == NULL)
10834 continue;
10835
10836 ibfd = exidx_sec->owner;
10837
10838 if (hdr->contents != NULL)
10839 contents = hdr->contents;
10840 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10841 /* An error? */
10842 continue;
10843
10844 for (j = 0; j < hdr->sh_size; j += 8)
10845 {
10846 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10847 int unwind_type;
10848 int elide = 0;
10849
10850 /* An EXIDX_CANTUNWIND entry. */
10851 if (second_word == 1)
10852 {
10853 if (last_unwind_type == 0)
10854 elide = 1;
10855 unwind_type = 0;
10856 }
10857 /* Inlined unwinding data. Merge if equal to previous. */
10858 else if ((second_word & 0x80000000) != 0)
10859 {
10860 if (merge_exidx_entries
10861 && last_second_word == second_word && last_unwind_type == 1)
10862 elide = 1;
10863 unwind_type = 1;
10864 last_second_word = second_word;
10865 }
10866 /* Normal table entry. In theory we could merge these too,
10867 but duplicate entries are likely to be much less common. */
10868 else
10869 unwind_type = 2;
10870
10871 if (elide)
10872 {
10873 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10874 DELETE_EXIDX_ENTRY, NULL, j / 8);
10875
10876 deleted_exidx_bytes += 8;
10877 }
10878
10879 last_unwind_type = unwind_type;
10880 }
10881
10882 /* Free contents if we allocated it ourselves. */
10883 if (contents != hdr->contents)
10884 free (contents);
10885
10886 /* Record edits to be applied later (in elf32_arm_write_section). */
10887 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10888 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
10889
10890 if (deleted_exidx_bytes > 0)
10891 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10892
10893 last_exidx_sec = exidx_sec;
10894 last_text_sec = sec;
10895 }
10896
10897 /* Add terminating CANTUNWIND entry. */
10898 if (last_exidx_sec && last_unwind_type != 0)
10899 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10900
10901 return TRUE;
10902 }
10903
10904 static bfd_boolean
10905 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10906 bfd *ibfd, const char *name)
10907 {
10908 asection *sec, *osec;
10909
10910 sec = bfd_get_linker_section (ibfd, name);
10911 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10912 return TRUE;
10913
10914 osec = sec->output_section;
10915 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10916 return TRUE;
10917
10918 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10919 sec->output_offset, sec->size))
10920 return FALSE;
10921
10922 return TRUE;
10923 }
10924
10925 static bfd_boolean
10926 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10927 {
10928 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
10929 asection *sec, *osec;
10930
10931 if (globals == NULL)
10932 return FALSE;
10933
10934 /* Invoke the regular ELF backend linker to do all the work. */
10935 if (!bfd_elf_final_link (abfd, info))
10936 return FALSE;
10937
10938 /* Process stub sections (eg BE8 encoding, ...). */
10939 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10940 int i;
10941 for (i=0; i<htab->top_id; i++)
10942 {
10943 sec = htab->stub_group[i].stub_sec;
10944 /* Only process it once, in its link_sec slot. */
10945 if (sec && i == htab->stub_group[i].link_sec->id)
10946 {
10947 osec = sec->output_section;
10948 elf32_arm_write_section (abfd, info, sec, sec->contents);
10949 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10950 sec->output_offset, sec->size))
10951 return FALSE;
10952 }
10953 }
10954
10955 /* Write out any glue sections now that we have created all the
10956 stubs. */
10957 if (globals->bfd_of_glue_owner != NULL)
10958 {
10959 if (! elf32_arm_output_glue_section (info, abfd,
10960 globals->bfd_of_glue_owner,
10961 ARM2THUMB_GLUE_SECTION_NAME))
10962 return FALSE;
10963
10964 if (! elf32_arm_output_glue_section (info, abfd,
10965 globals->bfd_of_glue_owner,
10966 THUMB2ARM_GLUE_SECTION_NAME))
10967 return FALSE;
10968
10969 if (! elf32_arm_output_glue_section (info, abfd,
10970 globals->bfd_of_glue_owner,
10971 VFP11_ERRATUM_VENEER_SECTION_NAME))
10972 return FALSE;
10973
10974 if (! elf32_arm_output_glue_section (info, abfd,
10975 globals->bfd_of_glue_owner,
10976 ARM_BX_GLUE_SECTION_NAME))
10977 return FALSE;
10978 }
10979
10980 return TRUE;
10981 }
10982
10983 /* Return a best guess for the machine number based on the attributes. */
10984
10985 static unsigned int
10986 bfd_arm_get_mach_from_attributes (bfd * abfd)
10987 {
10988 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
10989
10990 switch (arch)
10991 {
10992 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
10993 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
10994 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
10995
10996 case TAG_CPU_ARCH_V5TE:
10997 {
10998 char * name;
10999
11000 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11001 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11002
11003 if (name)
11004 {
11005 if (strcmp (name, "IWMMXT2") == 0)
11006 return bfd_mach_arm_iWMMXt2;
11007
11008 if (strcmp (name, "IWMMXT") == 0)
11009 return bfd_mach_arm_iWMMXt;
11010
11011 if (strcmp (name, "XSCALE") == 0)
11012 {
11013 int wmmx;
11014
11015 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
11016 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
11017 switch (wmmx)
11018 {
11019 case 1: return bfd_mach_arm_iWMMXt;
11020 case 2: return bfd_mach_arm_iWMMXt2;
11021 default: return bfd_mach_arm_XScale;
11022 }
11023 }
11024 }
11025
11026 return bfd_mach_arm_5TE;
11027 }
11028
11029 default:
11030 return bfd_mach_arm_unknown;
11031 }
11032 }
11033
11034 /* Set the right machine number. */
11035
11036 static bfd_boolean
11037 elf32_arm_object_p (bfd *abfd)
11038 {
11039 unsigned int mach;
11040
11041 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
11042
11043 if (mach == bfd_mach_arm_unknown)
11044 {
11045 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11046 mach = bfd_mach_arm_ep9312;
11047 else
11048 mach = bfd_arm_get_mach_from_attributes (abfd);
11049 }
11050
11051 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
11052 return TRUE;
11053 }
11054
11055 /* Function to keep ARM specific flags in the ELF header. */
11056
11057 static bfd_boolean
11058 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
11059 {
11060 if (elf_flags_init (abfd)
11061 && elf_elfheader (abfd)->e_flags != flags)
11062 {
11063 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11064 {
11065 if (flags & EF_ARM_INTERWORK)
11066 (*_bfd_error_handler)
11067 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11068 abfd);
11069 else
11070 _bfd_error_handler
11071 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11072 abfd);
11073 }
11074 }
11075 else
11076 {
11077 elf_elfheader (abfd)->e_flags = flags;
11078 elf_flags_init (abfd) = TRUE;
11079 }
11080
11081 return TRUE;
11082 }
11083
11084 /* Copy backend specific data from one object module to another. */
11085
11086 static bfd_boolean
11087 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
11088 {
11089 flagword in_flags;
11090 flagword out_flags;
11091
11092 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
11093 return TRUE;
11094
11095 in_flags = elf_elfheader (ibfd)->e_flags;
11096 out_flags = elf_elfheader (obfd)->e_flags;
11097
11098 if (elf_flags_init (obfd)
11099 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11100 && in_flags != out_flags)
11101 {
11102 /* Cannot mix APCS26 and APCS32 code. */
11103 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
11104 return FALSE;
11105
11106 /* Cannot mix float APCS and non-float APCS code. */
11107 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
11108 return FALSE;
11109
11110 /* If the src and dest have different interworking flags
11111 then turn off the interworking bit. */
11112 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
11113 {
11114 if (out_flags & EF_ARM_INTERWORK)
11115 _bfd_error_handler
11116 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11117 obfd, ibfd);
11118
11119 in_flags &= ~EF_ARM_INTERWORK;
11120 }
11121
11122 /* Likewise for PIC, though don't warn for this case. */
11123 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11124 in_flags &= ~EF_ARM_PIC;
11125 }
11126
11127 elf_elfheader (obfd)->e_flags = in_flags;
11128 elf_flags_init (obfd) = TRUE;
11129
11130 /* Also copy the EI_OSABI field. */
11131 elf_elfheader (obfd)->e_ident[EI_OSABI] =
11132 elf_elfheader (ibfd)->e_ident[EI_OSABI];
11133
11134 /* Copy object attributes. */
11135 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11136
11137 return TRUE;
11138 }
11139
11140 /* Values for Tag_ABI_PCS_R9_use. */
11141 enum
11142 {
11143 AEABI_R9_V6,
11144 AEABI_R9_SB,
11145 AEABI_R9_TLS,
11146 AEABI_R9_unused
11147 };
11148
11149 /* Values for Tag_ABI_PCS_RW_data. */
11150 enum
11151 {
11152 AEABI_PCS_RW_data_absolute,
11153 AEABI_PCS_RW_data_PCrel,
11154 AEABI_PCS_RW_data_SBrel,
11155 AEABI_PCS_RW_data_unused
11156 };
11157
11158 /* Values for Tag_ABI_enum_size. */
11159 enum
11160 {
11161 AEABI_enum_unused,
11162 AEABI_enum_short,
11163 AEABI_enum_wide,
11164 AEABI_enum_forced_wide
11165 };
11166
11167 /* Determine whether an object attribute tag takes an integer, a
11168 string or both. */
11169
11170 static int
11171 elf32_arm_obj_attrs_arg_type (int tag)
11172 {
11173 if (tag == Tag_compatibility)
11174 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
11175 else if (tag == Tag_nodefaults)
11176 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11177 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11178 return ATTR_TYPE_FLAG_STR_VAL;
11179 else if (tag < 32)
11180 return ATTR_TYPE_FLAG_INT_VAL;
11181 else
11182 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
11183 }
11184
11185 /* The ABI defines that Tag_conformance should be emitted first, and that
11186 Tag_nodefaults should be second (if either is defined). This sets those
11187 two positions, and bumps up the position of all the remaining tags to
11188 compensate. */
11189 static int
11190 elf32_arm_obj_attrs_order (int num)
11191 {
11192 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
11193 return Tag_conformance;
11194 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
11195 return Tag_nodefaults;
11196 if ((num - 2) < Tag_nodefaults)
11197 return num - 2;
11198 if ((num - 1) < Tag_conformance)
11199 return num - 1;
11200 return num;
11201 }
11202
11203 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
11204 static bfd_boolean
11205 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11206 {
11207 if ((tag & 127) < 64)
11208 {
11209 _bfd_error_handler
11210 (_("%B: Unknown mandatory EABI object attribute %d"),
11211 abfd, tag);
11212 bfd_set_error (bfd_error_bad_value);
11213 return FALSE;
11214 }
11215 else
11216 {
11217 _bfd_error_handler
11218 (_("Warning: %B: Unknown EABI object attribute %d"),
11219 abfd, tag);
11220 return TRUE;
11221 }
11222 }
11223
11224 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
11225 Returns -1 if no architecture could be read. */
11226
11227 static int
11228 get_secondary_compatible_arch (bfd *abfd)
11229 {
11230 obj_attribute *attr =
11231 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11232
11233 /* Note: the tag and its argument below are uleb128 values, though
11234 currently-defined values fit in one byte for each. */
11235 if (attr->s
11236 && attr->s[0] == Tag_CPU_arch
11237 && (attr->s[1] & 128) != 128
11238 && attr->s[2] == 0)
11239 return attr->s[1];
11240
11241 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11242 return -1;
11243 }
11244
11245 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11246 The tag is removed if ARCH is -1. */
11247
11248 static void
11249 set_secondary_compatible_arch (bfd *abfd, int arch)
11250 {
11251 obj_attribute *attr =
11252 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11253
11254 if (arch == -1)
11255 {
11256 attr->s = NULL;
11257 return;
11258 }
11259
11260 /* Note: the tag and its argument below are uleb128 values, though
11261 currently-defined values fit in one byte for each. */
11262 if (!attr->s)
11263 attr->s = (char *) bfd_alloc (abfd, 3);
11264 attr->s[0] = Tag_CPU_arch;
11265 attr->s[1] = arch;
11266 attr->s[2] = '\0';
11267 }
11268
11269 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11270 into account. */
11271
11272 static int
11273 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11274 int newtag, int secondary_compat)
11275 {
11276 #define T(X) TAG_CPU_ARCH_##X
11277 int tagl, tagh, result;
11278 const int v6t2[] =
11279 {
11280 T(V6T2), /* PRE_V4. */
11281 T(V6T2), /* V4. */
11282 T(V6T2), /* V4T. */
11283 T(V6T2), /* V5T. */
11284 T(V6T2), /* V5TE. */
11285 T(V6T2), /* V5TEJ. */
11286 T(V6T2), /* V6. */
11287 T(V7), /* V6KZ. */
11288 T(V6T2) /* V6T2. */
11289 };
11290 const int v6k[] =
11291 {
11292 T(V6K), /* PRE_V4. */
11293 T(V6K), /* V4. */
11294 T(V6K), /* V4T. */
11295 T(V6K), /* V5T. */
11296 T(V6K), /* V5TE. */
11297 T(V6K), /* V5TEJ. */
11298 T(V6K), /* V6. */
11299 T(V6KZ), /* V6KZ. */
11300 T(V7), /* V6T2. */
11301 T(V6K) /* V6K. */
11302 };
11303 const int v7[] =
11304 {
11305 T(V7), /* PRE_V4. */
11306 T(V7), /* V4. */
11307 T(V7), /* V4T. */
11308 T(V7), /* V5T. */
11309 T(V7), /* V5TE. */
11310 T(V7), /* V5TEJ. */
11311 T(V7), /* V6. */
11312 T(V7), /* V6KZ. */
11313 T(V7), /* V6T2. */
11314 T(V7), /* V6K. */
11315 T(V7) /* V7. */
11316 };
11317 const int v6_m[] =
11318 {
11319 -1, /* PRE_V4. */
11320 -1, /* V4. */
11321 T(V6K), /* V4T. */
11322 T(V6K), /* V5T. */
11323 T(V6K), /* V5TE. */
11324 T(V6K), /* V5TEJ. */
11325 T(V6K), /* V6. */
11326 T(V6KZ), /* V6KZ. */
11327 T(V7), /* V6T2. */
11328 T(V6K), /* V6K. */
11329 T(V7), /* V7. */
11330 T(V6_M) /* V6_M. */
11331 };
11332 const int v6s_m[] =
11333 {
11334 -1, /* PRE_V4. */
11335 -1, /* V4. */
11336 T(V6K), /* V4T. */
11337 T(V6K), /* V5T. */
11338 T(V6K), /* V5TE. */
11339 T(V6K), /* V5TEJ. */
11340 T(V6K), /* V6. */
11341 T(V6KZ), /* V6KZ. */
11342 T(V7), /* V6T2. */
11343 T(V6K), /* V6K. */
11344 T(V7), /* V7. */
11345 T(V6S_M), /* V6_M. */
11346 T(V6S_M) /* V6S_M. */
11347 };
11348 const int v7e_m[] =
11349 {
11350 -1, /* PRE_V4. */
11351 -1, /* V4. */
11352 T(V7E_M), /* V4T. */
11353 T(V7E_M), /* V5T. */
11354 T(V7E_M), /* V5TE. */
11355 T(V7E_M), /* V5TEJ. */
11356 T(V7E_M), /* V6. */
11357 T(V7E_M), /* V6KZ. */
11358 T(V7E_M), /* V6T2. */
11359 T(V7E_M), /* V6K. */
11360 T(V7E_M), /* V7. */
11361 T(V7E_M), /* V6_M. */
11362 T(V7E_M), /* V6S_M. */
11363 T(V7E_M) /* V7E_M. */
11364 };
11365 const int v8[] =
11366 {
11367 T(V8), /* PRE_V4. */
11368 T(V8), /* V4. */
11369 T(V8), /* V4T. */
11370 T(V8), /* V5T. */
11371 T(V8), /* V5TE. */
11372 T(V8), /* V5TEJ. */
11373 T(V8), /* V6. */
11374 T(V8), /* V6KZ. */
11375 T(V8), /* V6T2. */
11376 T(V8), /* V6K. */
11377 T(V8), /* V7. */
11378 T(V8), /* V6_M. */
11379 T(V8), /* V6S_M. */
11380 T(V8), /* V7E_M. */
11381 T(V8) /* V8. */
11382 };
11383 const int v4t_plus_v6_m[] =
11384 {
11385 -1, /* PRE_V4. */
11386 -1, /* V4. */
11387 T(V4T), /* V4T. */
11388 T(V5T), /* V5T. */
11389 T(V5TE), /* V5TE. */
11390 T(V5TEJ), /* V5TEJ. */
11391 T(V6), /* V6. */
11392 T(V6KZ), /* V6KZ. */
11393 T(V6T2), /* V6T2. */
11394 T(V6K), /* V6K. */
11395 T(V7), /* V7. */
11396 T(V6_M), /* V6_M. */
11397 T(V6S_M), /* V6S_M. */
11398 T(V7E_M), /* V7E_M. */
11399 T(V8), /* V8. */
11400 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11401 };
11402 const int *comb[] =
11403 {
11404 v6t2,
11405 v6k,
11406 v7,
11407 v6_m,
11408 v6s_m,
11409 v7e_m,
11410 v8,
11411 /* Pseudo-architecture. */
11412 v4t_plus_v6_m
11413 };
11414
11415 /* Check we've not got a higher architecture than we know about. */
11416
11417 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
11418 {
11419 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
11420 return -1;
11421 }
11422
11423 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11424
11425 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11426 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11427 oldtag = T(V4T_PLUS_V6_M);
11428
11429 /* And override the new tag if we have a Tag_also_compatible_with on the
11430 input. */
11431
11432 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11433 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11434 newtag = T(V4T_PLUS_V6_M);
11435
11436 tagl = (oldtag < newtag) ? oldtag : newtag;
11437 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11438
11439 /* Architectures before V6KZ add features monotonically. */
11440 if (tagh <= TAG_CPU_ARCH_V6KZ)
11441 return result;
11442
11443 result = comb[tagh - T(V6T2)][tagl];
11444
11445 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11446 as the canonical version. */
11447 if (result == T(V4T_PLUS_V6_M))
11448 {
11449 result = T(V4T);
11450 *secondary_compat_out = T(V6_M);
11451 }
11452 else
11453 *secondary_compat_out = -1;
11454
11455 if (result == -1)
11456 {
11457 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
11458 ibfd, oldtag, newtag);
11459 return -1;
11460 }
11461
11462 return result;
11463 #undef T
11464 }
11465
11466 /* Query attributes object to see if integer divide instructions may be
11467 present in an object. */
11468 static bfd_boolean
11469 elf32_arm_attributes_accept_div (const obj_attribute *attr)
11470 {
11471 int arch = attr[Tag_CPU_arch].i;
11472 int profile = attr[Tag_CPU_arch_profile].i;
11473
11474 switch (attr[Tag_DIV_use].i)
11475 {
11476 case 0:
11477 /* Integer divide allowed if instruction contained in archetecture. */
11478 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11479 return TRUE;
11480 else if (arch >= TAG_CPU_ARCH_V7E_M)
11481 return TRUE;
11482 else
11483 return FALSE;
11484
11485 case 1:
11486 /* Integer divide explicitly prohibited. */
11487 return FALSE;
11488
11489 default:
11490 /* Unrecognised case - treat as allowing divide everywhere. */
11491 case 2:
11492 /* Integer divide allowed in ARM state. */
11493 return TRUE;
11494 }
11495 }
11496
11497 /* Query attributes object to see if integer divide instructions are
11498 forbidden to be in the object. This is not the inverse of
11499 elf32_arm_attributes_accept_div. */
11500 static bfd_boolean
11501 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11502 {
11503 return attr[Tag_DIV_use].i == 1;
11504 }
11505
11506 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11507 are conflicting attributes. */
11508
11509 static bfd_boolean
11510 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11511 {
11512 obj_attribute *in_attr;
11513 obj_attribute *out_attr;
11514 /* Some tags have 0 = don't care, 1 = strong requirement,
11515 2 = weak requirement. */
11516 static const int order_021[3] = {0, 2, 1};
11517 int i;
11518 bfd_boolean result = TRUE;
11519
11520 /* Skip the linker stubs file. This preserves previous behavior
11521 of accepting unknown attributes in the first input file - but
11522 is that a bug? */
11523 if (ibfd->flags & BFD_LINKER_CREATED)
11524 return TRUE;
11525
11526 if (!elf_known_obj_attributes_proc (obfd)[0].i)
11527 {
11528 /* This is the first object. Copy the attributes. */
11529 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11530
11531 out_attr = elf_known_obj_attributes_proc (obfd);
11532
11533 /* Use the Tag_null value to indicate the attributes have been
11534 initialized. */
11535 out_attr[0].i = 1;
11536
11537 /* We do not output objects with Tag_MPextension_use_legacy - we move
11538 the attribute's value to Tag_MPextension_use. */
11539 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11540 {
11541 if (out_attr[Tag_MPextension_use].i != 0
11542 && out_attr[Tag_MPextension_use_legacy].i
11543 != out_attr[Tag_MPextension_use].i)
11544 {
11545 _bfd_error_handler
11546 (_("Error: %B has both the current and legacy "
11547 "Tag_MPextension_use attributes"), ibfd);
11548 result = FALSE;
11549 }
11550
11551 out_attr[Tag_MPextension_use] =
11552 out_attr[Tag_MPextension_use_legacy];
11553 out_attr[Tag_MPextension_use_legacy].type = 0;
11554 out_attr[Tag_MPextension_use_legacy].i = 0;
11555 }
11556
11557 return result;
11558 }
11559
11560 in_attr = elf_known_obj_attributes_proc (ibfd);
11561 out_attr = elf_known_obj_attributes_proc (obfd);
11562 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11563 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11564 {
11565 /* Ignore mismatches if the object doesn't use floating point. */
11566 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11567 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11568 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11569 {
11570 _bfd_error_handler
11571 (_("error: %B uses VFP register arguments, %B does not"),
11572 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11573 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
11574 result = FALSE;
11575 }
11576 }
11577
11578 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
11579 {
11580 /* Merge this attribute with existing attributes. */
11581 switch (i)
11582 {
11583 case Tag_CPU_raw_name:
11584 case Tag_CPU_name:
11585 /* These are merged after Tag_CPU_arch. */
11586 break;
11587
11588 case Tag_ABI_optimization_goals:
11589 case Tag_ABI_FP_optimization_goals:
11590 /* Use the first value seen. */
11591 break;
11592
11593 case Tag_CPU_arch:
11594 {
11595 int secondary_compat = -1, secondary_compat_out = -1;
11596 unsigned int saved_out_attr = out_attr[i].i;
11597 static const char *name_table[] = {
11598 /* These aren't real CPU names, but we can't guess
11599 that from the architecture version alone. */
11600 "Pre v4",
11601 "ARM v4",
11602 "ARM v4T",
11603 "ARM v5T",
11604 "ARM v5TE",
11605 "ARM v5TEJ",
11606 "ARM v6",
11607 "ARM v6KZ",
11608 "ARM v6T2",
11609 "ARM v6K",
11610 "ARM v7",
11611 "ARM v6-M",
11612 "ARM v6S-M",
11613 "ARM v8"
11614 };
11615
11616 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11617 secondary_compat = get_secondary_compatible_arch (ibfd);
11618 secondary_compat_out = get_secondary_compatible_arch (obfd);
11619 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11620 &secondary_compat_out,
11621 in_attr[i].i,
11622 secondary_compat);
11623 set_secondary_compatible_arch (obfd, secondary_compat_out);
11624
11625 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11626 if (out_attr[i].i == saved_out_attr)
11627 ; /* Leave the names alone. */
11628 else if (out_attr[i].i == in_attr[i].i)
11629 {
11630 /* The output architecture has been changed to match the
11631 input architecture. Use the input names. */
11632 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11633 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11634 : NULL;
11635 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11636 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11637 : NULL;
11638 }
11639 else
11640 {
11641 out_attr[Tag_CPU_name].s = NULL;
11642 out_attr[Tag_CPU_raw_name].s = NULL;
11643 }
11644
11645 /* If we still don't have a value for Tag_CPU_name,
11646 make one up now. Tag_CPU_raw_name remains blank. */
11647 if (out_attr[Tag_CPU_name].s == NULL
11648 && out_attr[i].i < ARRAY_SIZE (name_table))
11649 out_attr[Tag_CPU_name].s =
11650 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11651 }
11652 break;
11653
11654 case Tag_ARM_ISA_use:
11655 case Tag_THUMB_ISA_use:
11656 case Tag_WMMX_arch:
11657 case Tag_Advanced_SIMD_arch:
11658 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
11659 case Tag_ABI_FP_rounding:
11660 case Tag_ABI_FP_exceptions:
11661 case Tag_ABI_FP_user_exceptions:
11662 case Tag_ABI_FP_number_model:
11663 case Tag_FP_HP_extension:
11664 case Tag_CPU_unaligned_access:
11665 case Tag_T2EE_use:
11666 case Tag_MPextension_use:
11667 /* Use the largest value specified. */
11668 if (in_attr[i].i > out_attr[i].i)
11669 out_attr[i].i = in_attr[i].i;
11670 break;
11671
11672 case Tag_ABI_align_preserved:
11673 case Tag_ABI_PCS_RO_data:
11674 /* Use the smallest value specified. */
11675 if (in_attr[i].i < out_attr[i].i)
11676 out_attr[i].i = in_attr[i].i;
11677 break;
11678
11679 case Tag_ABI_align_needed:
11680 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
11681 && (in_attr[Tag_ABI_align_preserved].i == 0
11682 || out_attr[Tag_ABI_align_preserved].i == 0))
11683 {
11684 /* This error message should be enabled once all non-conformant
11685 binaries in the toolchain have had the attributes set
11686 properly.
11687 _bfd_error_handler
11688 (_("error: %B: 8-byte data alignment conflicts with %B"),
11689 obfd, ibfd);
11690 result = FALSE; */
11691 }
11692 /* Fall through. */
11693 case Tag_ABI_FP_denormal:
11694 case Tag_ABI_PCS_GOT_use:
11695 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11696 value if greater than 2 (for future-proofing). */
11697 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11698 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11699 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
11700 out_attr[i].i = in_attr[i].i;
11701 break;
11702
11703 case Tag_Virtualization_use:
11704 /* The virtualization tag effectively stores two bits of
11705 information: the intended use of TrustZone (in bit 0), and the
11706 intended use of Virtualization (in bit 1). */
11707 if (out_attr[i].i == 0)
11708 out_attr[i].i = in_attr[i].i;
11709 else if (in_attr[i].i != 0
11710 && in_attr[i].i != out_attr[i].i)
11711 {
11712 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11713 out_attr[i].i = 3;
11714 else
11715 {
11716 _bfd_error_handler
11717 (_("error: %B: unable to merge virtualization attributes "
11718 "with %B"),
11719 obfd, ibfd);
11720 result = FALSE;
11721 }
11722 }
11723 break;
11724
11725 case Tag_CPU_arch_profile:
11726 if (out_attr[i].i != in_attr[i].i)
11727 {
11728 /* 0 will merge with anything.
11729 'A' and 'S' merge to 'A'.
11730 'R' and 'S' merge to 'R'.
11731 'M' and 'A|R|S' is an error. */
11732 if (out_attr[i].i == 0
11733 || (out_attr[i].i == 'S'
11734 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11735 out_attr[i].i = in_attr[i].i;
11736 else if (in_attr[i].i == 0
11737 || (in_attr[i].i == 'S'
11738 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11739 ; /* Do nothing. */
11740 else
11741 {
11742 _bfd_error_handler
11743 (_("error: %B: Conflicting architecture profiles %c/%c"),
11744 ibfd,
11745 in_attr[i].i ? in_attr[i].i : '0',
11746 out_attr[i].i ? out_attr[i].i : '0');
11747 result = FALSE;
11748 }
11749 }
11750 break;
11751 case Tag_FP_arch:
11752 {
11753 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11754 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11755 when it's 0. It might mean absence of FP hardware if
11756 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11757
11758 #define VFP_VERSION_COUNT 8
11759 static const struct
11760 {
11761 int ver;
11762 int regs;
11763 } vfp_versions[VFP_VERSION_COUNT] =
11764 {
11765 {0, 0},
11766 {1, 16},
11767 {2, 16},
11768 {3, 32},
11769 {3, 16},
11770 {4, 32},
11771 {4, 16},
11772 {8, 32}
11773 };
11774 int ver;
11775 int regs;
11776 int newval;
11777
11778 /* If the output has no requirement about FP hardware,
11779 follow the requirement of the input. */
11780 if (out_attr[i].i == 0)
11781 {
11782 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11783 out_attr[i].i = in_attr[i].i;
11784 out_attr[Tag_ABI_HardFP_use].i
11785 = in_attr[Tag_ABI_HardFP_use].i;
11786 break;
11787 }
11788 /* If the input has no requirement about FP hardware, do
11789 nothing. */
11790 else if (in_attr[i].i == 0)
11791 {
11792 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11793 break;
11794 }
11795
11796 /* Both the input and the output have nonzero Tag_FP_arch.
11797 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11798
11799 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11800 do nothing. */
11801 if (in_attr[Tag_ABI_HardFP_use].i == 0
11802 && out_attr[Tag_ABI_HardFP_use].i == 0)
11803 ;
11804 /* If the input and the output have different Tag_ABI_HardFP_use,
11805 the combination of them is 3 (SP & DP). */
11806 else if (in_attr[Tag_ABI_HardFP_use].i
11807 != out_attr[Tag_ABI_HardFP_use].i)
11808 out_attr[Tag_ABI_HardFP_use].i = 3;
11809
11810 /* Now we can handle Tag_FP_arch. */
11811
11812 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
11813 pick the biggest. */
11814 if (in_attr[i].i >= VFP_VERSION_COUNT
11815 && in_attr[i].i > out_attr[i].i)
11816 {
11817 out_attr[i] = in_attr[i];
11818 break;
11819 }
11820 /* The output uses the superset of input features
11821 (ISA version) and registers. */
11822 ver = vfp_versions[in_attr[i].i].ver;
11823 if (ver < vfp_versions[out_attr[i].i].ver)
11824 ver = vfp_versions[out_attr[i].i].ver;
11825 regs = vfp_versions[in_attr[i].i].regs;
11826 if (regs < vfp_versions[out_attr[i].i].regs)
11827 regs = vfp_versions[out_attr[i].i].regs;
11828 /* This assumes all possible supersets are also a valid
11829 options. */
11830 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
11831 {
11832 if (regs == vfp_versions[newval].regs
11833 && ver == vfp_versions[newval].ver)
11834 break;
11835 }
11836 out_attr[i].i = newval;
11837 }
11838 break;
11839 case Tag_PCS_config:
11840 if (out_attr[i].i == 0)
11841 out_attr[i].i = in_attr[i].i;
11842 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
11843 {
11844 /* It's sometimes ok to mix different configs, so this is only
11845 a warning. */
11846 _bfd_error_handler
11847 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11848 }
11849 break;
11850 case Tag_ABI_PCS_R9_use:
11851 if (in_attr[i].i != out_attr[i].i
11852 && out_attr[i].i != AEABI_R9_unused
11853 && in_attr[i].i != AEABI_R9_unused)
11854 {
11855 _bfd_error_handler
11856 (_("error: %B: Conflicting use of R9"), ibfd);
11857 result = FALSE;
11858 }
11859 if (out_attr[i].i == AEABI_R9_unused)
11860 out_attr[i].i = in_attr[i].i;
11861 break;
11862 case Tag_ABI_PCS_RW_data:
11863 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11864 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11865 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11866 {
11867 _bfd_error_handler
11868 (_("error: %B: SB relative addressing conflicts with use of R9"),
11869 ibfd);
11870 result = FALSE;
11871 }
11872 /* Use the smallest value specified. */
11873 if (in_attr[i].i < out_attr[i].i)
11874 out_attr[i].i = in_attr[i].i;
11875 break;
11876 case Tag_ABI_PCS_wchar_t:
11877 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11878 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
11879 {
11880 _bfd_error_handler
11881 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11882 ibfd, in_attr[i].i, out_attr[i].i);
11883 }
11884 else if (in_attr[i].i && !out_attr[i].i)
11885 out_attr[i].i = in_attr[i].i;
11886 break;
11887 case Tag_ABI_enum_size:
11888 if (in_attr[i].i != AEABI_enum_unused)
11889 {
11890 if (out_attr[i].i == AEABI_enum_unused
11891 || out_attr[i].i == AEABI_enum_forced_wide)
11892 {
11893 /* The existing object is compatible with anything.
11894 Use whatever requirements the new object has. */
11895 out_attr[i].i = in_attr[i].i;
11896 }
11897 else if (in_attr[i].i != AEABI_enum_forced_wide
11898 && out_attr[i].i != in_attr[i].i
11899 && !elf_arm_tdata (obfd)->no_enum_size_warning)
11900 {
11901 static const char *aeabi_enum_names[] =
11902 { "", "variable-size", "32-bit", "" };
11903 const char *in_name =
11904 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11905 ? aeabi_enum_names[in_attr[i].i]
11906 : "<unknown>";
11907 const char *out_name =
11908 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11909 ? aeabi_enum_names[out_attr[i].i]
11910 : "<unknown>";
11911 _bfd_error_handler
11912 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
11913 ibfd, in_name, out_name);
11914 }
11915 }
11916 break;
11917 case Tag_ABI_VFP_args:
11918 /* Aready done. */
11919 break;
11920 case Tag_ABI_WMMX_args:
11921 if (in_attr[i].i != out_attr[i].i)
11922 {
11923 _bfd_error_handler
11924 (_("error: %B uses iWMMXt register arguments, %B does not"),
11925 ibfd, obfd);
11926 result = FALSE;
11927 }
11928 break;
11929 case Tag_compatibility:
11930 /* Merged in target-independent code. */
11931 break;
11932 case Tag_ABI_HardFP_use:
11933 /* This is handled along with Tag_FP_arch. */
11934 break;
11935 case Tag_ABI_FP_16bit_format:
11936 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11937 {
11938 if (in_attr[i].i != out_attr[i].i)
11939 {
11940 _bfd_error_handler
11941 (_("error: fp16 format mismatch between %B and %B"),
11942 ibfd, obfd);
11943 result = FALSE;
11944 }
11945 }
11946 if (in_attr[i].i != 0)
11947 out_attr[i].i = in_attr[i].i;
11948 break;
11949
11950 case Tag_DIV_use:
11951 /* A value of zero on input means that the divide instruction may
11952 be used if available in the base architecture as specified via
11953 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
11954 the user did not want divide instructions. A value of 2
11955 explicitly means that divide instructions were allowed in ARM
11956 and Thumb state. */
11957 if (in_attr[i].i == out_attr[i].i)
11958 /* Do nothing. */ ;
11959 else if (elf32_arm_attributes_forbid_div (in_attr)
11960 && !elf32_arm_attributes_accept_div (out_attr))
11961 out_attr[i].i = 1;
11962 else if (elf32_arm_attributes_forbid_div (out_attr)
11963 && elf32_arm_attributes_accept_div (in_attr))
11964 out_attr[i].i = in_attr[i].i;
11965 else if (in_attr[i].i == 2)
11966 out_attr[i].i = in_attr[i].i;
11967 break;
11968
11969 case Tag_MPextension_use_legacy:
11970 /* We don't output objects with Tag_MPextension_use_legacy - we
11971 move the value to Tag_MPextension_use. */
11972 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11973 {
11974 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11975 {
11976 _bfd_error_handler
11977 (_("%B has has both the current and legacy "
11978 "Tag_MPextension_use attributes"),
11979 ibfd);
11980 result = FALSE;
11981 }
11982 }
11983
11984 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
11985 out_attr[Tag_MPextension_use] = in_attr[i];
11986
11987 break;
11988
11989 case Tag_nodefaults:
11990 /* This tag is set if it exists, but the value is unused (and is
11991 typically zero). We don't actually need to do anything here -
11992 the merge happens automatically when the type flags are merged
11993 below. */
11994 break;
11995 case Tag_also_compatible_with:
11996 /* Already done in Tag_CPU_arch. */
11997 break;
11998 case Tag_conformance:
11999 /* Keep the attribute if it matches. Throw it away otherwise.
12000 No attribute means no claim to conform. */
12001 if (!in_attr[i].s || !out_attr[i].s
12002 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
12003 out_attr[i].s = NULL;
12004 break;
12005
12006 default:
12007 result
12008 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
12009 }
12010
12011 /* If out_attr was copied from in_attr then it won't have a type yet. */
12012 if (in_attr[i].type && !out_attr[i].type)
12013 out_attr[i].type = in_attr[i].type;
12014 }
12015
12016 /* Merge Tag_compatibility attributes and any common GNU ones. */
12017 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
12018 return FALSE;
12019
12020 /* Check for any attributes not known on ARM. */
12021 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
12022
12023 return result;
12024 }
12025
12026
12027 /* Return TRUE if the two EABI versions are incompatible. */
12028
12029 static bfd_boolean
12030 elf32_arm_versions_compatible (unsigned iver, unsigned over)
12031 {
12032 /* v4 and v5 are the same spec before and after it was released,
12033 so allow mixing them. */
12034 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
12035 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
12036 return TRUE;
12037
12038 return (iver == over);
12039 }
12040
12041 /* Merge backend specific data from an object file to the output
12042 object file when linking. */
12043
12044 static bfd_boolean
12045 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
12046
12047 /* Display the flags field. */
12048
12049 static bfd_boolean
12050 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
12051 {
12052 FILE * file = (FILE *) ptr;
12053 unsigned long flags;
12054
12055 BFD_ASSERT (abfd != NULL && ptr != NULL);
12056
12057 /* Print normal ELF private data. */
12058 _bfd_elf_print_private_bfd_data (abfd, ptr);
12059
12060 flags = elf_elfheader (abfd)->e_flags;
12061 /* Ignore init flag - it may not be set, despite the flags field
12062 containing valid data. */
12063
12064 /* xgettext:c-format */
12065 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
12066
12067 switch (EF_ARM_EABI_VERSION (flags))
12068 {
12069 case EF_ARM_EABI_UNKNOWN:
12070 /* The following flag bits are GNU extensions and not part of the
12071 official ARM ELF extended ABI. Hence they are only decoded if
12072 the EABI version is not set. */
12073 if (flags & EF_ARM_INTERWORK)
12074 fprintf (file, _(" [interworking enabled]"));
12075
12076 if (flags & EF_ARM_APCS_26)
12077 fprintf (file, " [APCS-26]");
12078 else
12079 fprintf (file, " [APCS-32]");
12080
12081 if (flags & EF_ARM_VFP_FLOAT)
12082 fprintf (file, _(" [VFP float format]"));
12083 else if (flags & EF_ARM_MAVERICK_FLOAT)
12084 fprintf (file, _(" [Maverick float format]"));
12085 else
12086 fprintf (file, _(" [FPA float format]"));
12087
12088 if (flags & EF_ARM_APCS_FLOAT)
12089 fprintf (file, _(" [floats passed in float registers]"));
12090
12091 if (flags & EF_ARM_PIC)
12092 fprintf (file, _(" [position independent]"));
12093
12094 if (flags & EF_ARM_NEW_ABI)
12095 fprintf (file, _(" [new ABI]"));
12096
12097 if (flags & EF_ARM_OLD_ABI)
12098 fprintf (file, _(" [old ABI]"));
12099
12100 if (flags & EF_ARM_SOFT_FLOAT)
12101 fprintf (file, _(" [software FP]"));
12102
12103 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12104 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
12105 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12106 | EF_ARM_MAVERICK_FLOAT);
12107 break;
12108
12109 case EF_ARM_EABI_VER1:
12110 fprintf (file, _(" [Version1 EABI]"));
12111
12112 if (flags & EF_ARM_SYMSARESORTED)
12113 fprintf (file, _(" [sorted symbol table]"));
12114 else
12115 fprintf (file, _(" [unsorted symbol table]"));
12116
12117 flags &= ~ EF_ARM_SYMSARESORTED;
12118 break;
12119
12120 case EF_ARM_EABI_VER2:
12121 fprintf (file, _(" [Version2 EABI]"));
12122
12123 if (flags & EF_ARM_SYMSARESORTED)
12124 fprintf (file, _(" [sorted symbol table]"));
12125 else
12126 fprintf (file, _(" [unsorted symbol table]"));
12127
12128 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12129 fprintf (file, _(" [dynamic symbols use segment index]"));
12130
12131 if (flags & EF_ARM_MAPSYMSFIRST)
12132 fprintf (file, _(" [mapping symbols precede others]"));
12133
12134 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
12135 | EF_ARM_MAPSYMSFIRST);
12136 break;
12137
12138 case EF_ARM_EABI_VER3:
12139 fprintf (file, _(" [Version3 EABI]"));
12140 break;
12141
12142 case EF_ARM_EABI_VER4:
12143 fprintf (file, _(" [Version4 EABI]"));
12144 goto eabi;
12145
12146 case EF_ARM_EABI_VER5:
12147 fprintf (file, _(" [Version5 EABI]"));
12148
12149 if (flags & EF_ARM_ABI_FLOAT_SOFT)
12150 fprintf (file, _(" [soft-float ABI]"));
12151
12152 if (flags & EF_ARM_ABI_FLOAT_HARD)
12153 fprintf (file, _(" [hard-float ABI]"));
12154
12155 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
12156
12157 eabi:
12158 if (flags & EF_ARM_BE8)
12159 fprintf (file, _(" [BE8]"));
12160
12161 if (flags & EF_ARM_LE8)
12162 fprintf (file, _(" [LE8]"));
12163
12164 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12165 break;
12166
12167 default:
12168 fprintf (file, _(" <EABI version unrecognised>"));
12169 break;
12170 }
12171
12172 flags &= ~ EF_ARM_EABIMASK;
12173
12174 if (flags & EF_ARM_RELEXEC)
12175 fprintf (file, _(" [relocatable executable]"));
12176
12177 if (flags & EF_ARM_HASENTRY)
12178 fprintf (file, _(" [has entry point]"));
12179
12180 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12181
12182 if (flags)
12183 fprintf (file, _("<Unrecognised flag bits set>"));
12184
12185 fputc ('\n', file);
12186
12187 return TRUE;
12188 }
12189
12190 static int
12191 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
12192 {
12193 switch (ELF_ST_TYPE (elf_sym->st_info))
12194 {
12195 case STT_ARM_TFUNC:
12196 return ELF_ST_TYPE (elf_sym->st_info);
12197
12198 case STT_ARM_16BIT:
12199 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12200 This allows us to distinguish between data used by Thumb instructions
12201 and non-data (which is probably code) inside Thumb regions of an
12202 executable. */
12203 if (type != STT_OBJECT && type != STT_TLS)
12204 return ELF_ST_TYPE (elf_sym->st_info);
12205 break;
12206
12207 default:
12208 break;
12209 }
12210
12211 return type;
12212 }
12213
12214 static asection *
12215 elf32_arm_gc_mark_hook (asection *sec,
12216 struct bfd_link_info *info,
12217 Elf_Internal_Rela *rel,
12218 struct elf_link_hash_entry *h,
12219 Elf_Internal_Sym *sym)
12220 {
12221 if (h != NULL)
12222 switch (ELF32_R_TYPE (rel->r_info))
12223 {
12224 case R_ARM_GNU_VTINHERIT:
12225 case R_ARM_GNU_VTENTRY:
12226 return NULL;
12227 }
12228
12229 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
12230 }
12231
12232 /* Update the got entry reference counts for the section being removed. */
12233
12234 static bfd_boolean
12235 elf32_arm_gc_sweep_hook (bfd * abfd,
12236 struct bfd_link_info * info,
12237 asection * sec,
12238 const Elf_Internal_Rela * relocs)
12239 {
12240 Elf_Internal_Shdr *symtab_hdr;
12241 struct elf_link_hash_entry **sym_hashes;
12242 bfd_signed_vma *local_got_refcounts;
12243 const Elf_Internal_Rela *rel, *relend;
12244 struct elf32_arm_link_hash_table * globals;
12245
12246 if (info->relocatable)
12247 return TRUE;
12248
12249 globals = elf32_arm_hash_table (info);
12250 if (globals == NULL)
12251 return FALSE;
12252
12253 elf_section_data (sec)->local_dynrel = NULL;
12254
12255 symtab_hdr = & elf_symtab_hdr (abfd);
12256 sym_hashes = elf_sym_hashes (abfd);
12257 local_got_refcounts = elf_local_got_refcounts (abfd);
12258
12259 check_use_blx (globals);
12260
12261 relend = relocs + sec->reloc_count;
12262 for (rel = relocs; rel < relend; rel++)
12263 {
12264 unsigned long r_symndx;
12265 struct elf_link_hash_entry *h = NULL;
12266 struct elf32_arm_link_hash_entry *eh;
12267 int r_type;
12268 bfd_boolean call_reloc_p;
12269 bfd_boolean may_become_dynamic_p;
12270 bfd_boolean may_need_local_target_p;
12271 union gotplt_union *root_plt;
12272 struct arm_plt_info *arm_plt;
12273
12274 r_symndx = ELF32_R_SYM (rel->r_info);
12275 if (r_symndx >= symtab_hdr->sh_info)
12276 {
12277 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12278 while (h->root.type == bfd_link_hash_indirect
12279 || h->root.type == bfd_link_hash_warning)
12280 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12281 }
12282 eh = (struct elf32_arm_link_hash_entry *) h;
12283
12284 call_reloc_p = FALSE;
12285 may_become_dynamic_p = FALSE;
12286 may_need_local_target_p = FALSE;
12287
12288 r_type = ELF32_R_TYPE (rel->r_info);
12289 r_type = arm_real_reloc_type (globals, r_type);
12290 switch (r_type)
12291 {
12292 case R_ARM_GOT32:
12293 case R_ARM_GOT_PREL:
12294 case R_ARM_TLS_GD32:
12295 case R_ARM_TLS_IE32:
12296 if (h != NULL)
12297 {
12298 if (h->got.refcount > 0)
12299 h->got.refcount -= 1;
12300 }
12301 else if (local_got_refcounts != NULL)
12302 {
12303 if (local_got_refcounts[r_symndx] > 0)
12304 local_got_refcounts[r_symndx] -= 1;
12305 }
12306 break;
12307
12308 case R_ARM_TLS_LDM32:
12309 globals->tls_ldm_got.refcount -= 1;
12310 break;
12311
12312 case R_ARM_PC24:
12313 case R_ARM_PLT32:
12314 case R_ARM_CALL:
12315 case R_ARM_JUMP24:
12316 case R_ARM_PREL31:
12317 case R_ARM_THM_CALL:
12318 case R_ARM_THM_JUMP24:
12319 case R_ARM_THM_JUMP19:
12320 call_reloc_p = TRUE;
12321 may_need_local_target_p = TRUE;
12322 break;
12323
12324 case R_ARM_ABS12:
12325 if (!globals->vxworks_p)
12326 {
12327 may_need_local_target_p = TRUE;
12328 break;
12329 }
12330 /* Fall through. */
12331 case R_ARM_ABS32:
12332 case R_ARM_ABS32_NOI:
12333 case R_ARM_REL32:
12334 case R_ARM_REL32_NOI:
12335 case R_ARM_MOVW_ABS_NC:
12336 case R_ARM_MOVT_ABS:
12337 case R_ARM_MOVW_PREL_NC:
12338 case R_ARM_MOVT_PREL:
12339 case R_ARM_THM_MOVW_ABS_NC:
12340 case R_ARM_THM_MOVT_ABS:
12341 case R_ARM_THM_MOVW_PREL_NC:
12342 case R_ARM_THM_MOVT_PREL:
12343 /* Should the interworking branches be here also? */
12344 if ((info->shared || globals->root.is_relocatable_executable)
12345 && (sec->flags & SEC_ALLOC) != 0)
12346 {
12347 if (h == NULL
12348 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12349 {
12350 call_reloc_p = TRUE;
12351 may_need_local_target_p = TRUE;
12352 }
12353 else
12354 may_become_dynamic_p = TRUE;
12355 }
12356 else
12357 may_need_local_target_p = TRUE;
12358 break;
12359
12360 default:
12361 break;
12362 }
12363
12364 if (may_need_local_target_p
12365 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
12366 {
12367 /* If PLT refcount book-keeping is wrong and too low, we'll
12368 see a zero value (going to -1) for the root PLT reference
12369 count. */
12370 if (root_plt->refcount >= 0)
12371 {
12372 BFD_ASSERT (root_plt->refcount != 0);
12373 root_plt->refcount -= 1;
12374 }
12375 else
12376 /* A value of -1 means the symbol has become local, forced
12377 or seeing a hidden definition. Any other negative value
12378 is an error. */
12379 BFD_ASSERT (root_plt->refcount == -1);
12380
12381 if (!call_reloc_p)
12382 arm_plt->noncall_refcount--;
12383
12384 if (r_type == R_ARM_THM_CALL)
12385 arm_plt->maybe_thumb_refcount--;
12386
12387 if (r_type == R_ARM_THM_JUMP24
12388 || r_type == R_ARM_THM_JUMP19)
12389 arm_plt->thumb_refcount--;
12390 }
12391
12392 if (may_become_dynamic_p)
12393 {
12394 struct elf_dyn_relocs **pp;
12395 struct elf_dyn_relocs *p;
12396
12397 if (h != NULL)
12398 pp = &(eh->dyn_relocs);
12399 else
12400 {
12401 Elf_Internal_Sym *isym;
12402
12403 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12404 abfd, r_symndx);
12405 if (isym == NULL)
12406 return FALSE;
12407 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12408 if (pp == NULL)
12409 return FALSE;
12410 }
12411 for (; (p = *pp) != NULL; pp = &p->next)
12412 if (p->sec == sec)
12413 {
12414 /* Everything must go for SEC. */
12415 *pp = p->next;
12416 break;
12417 }
12418 }
12419 }
12420
12421 return TRUE;
12422 }
12423
12424 /* Look through the relocs for a section during the first phase. */
12425
12426 static bfd_boolean
12427 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12428 asection *sec, const Elf_Internal_Rela *relocs)
12429 {
12430 Elf_Internal_Shdr *symtab_hdr;
12431 struct elf_link_hash_entry **sym_hashes;
12432 const Elf_Internal_Rela *rel;
12433 const Elf_Internal_Rela *rel_end;
12434 bfd *dynobj;
12435 asection *sreloc;
12436 struct elf32_arm_link_hash_table *htab;
12437 bfd_boolean call_reloc_p;
12438 bfd_boolean may_become_dynamic_p;
12439 bfd_boolean may_need_local_target_p;
12440 unsigned long nsyms;
12441
12442 if (info->relocatable)
12443 return TRUE;
12444
12445 BFD_ASSERT (is_arm_elf (abfd));
12446
12447 htab = elf32_arm_hash_table (info);
12448 if (htab == NULL)
12449 return FALSE;
12450
12451 sreloc = NULL;
12452
12453 /* Create dynamic sections for relocatable executables so that we can
12454 copy relocations. */
12455 if (htab->root.is_relocatable_executable
12456 && ! htab->root.dynamic_sections_created)
12457 {
12458 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12459 return FALSE;
12460 }
12461
12462 if (htab->root.dynobj == NULL)
12463 htab->root.dynobj = abfd;
12464 if (!create_ifunc_sections (info))
12465 return FALSE;
12466
12467 dynobj = htab->root.dynobj;
12468
12469 symtab_hdr = & elf_symtab_hdr (abfd);
12470 sym_hashes = elf_sym_hashes (abfd);
12471 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
12472
12473 rel_end = relocs + sec->reloc_count;
12474 for (rel = relocs; rel < rel_end; rel++)
12475 {
12476 Elf_Internal_Sym *isym;
12477 struct elf_link_hash_entry *h;
12478 struct elf32_arm_link_hash_entry *eh;
12479 unsigned long r_symndx;
12480 int r_type;
12481
12482 r_symndx = ELF32_R_SYM (rel->r_info);
12483 r_type = ELF32_R_TYPE (rel->r_info);
12484 r_type = arm_real_reloc_type (htab, r_type);
12485
12486 if (r_symndx >= nsyms
12487 /* PR 9934: It is possible to have relocations that do not
12488 refer to symbols, thus it is also possible to have an
12489 object file containing relocations but no symbol table. */
12490 && (r_symndx > STN_UNDEF || nsyms > 0))
12491 {
12492 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
12493 r_symndx);
12494 return FALSE;
12495 }
12496
12497 h = NULL;
12498 isym = NULL;
12499 if (nsyms > 0)
12500 {
12501 if (r_symndx < symtab_hdr->sh_info)
12502 {
12503 /* A local symbol. */
12504 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12505 abfd, r_symndx);
12506 if (isym == NULL)
12507 return FALSE;
12508 }
12509 else
12510 {
12511 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12512 while (h->root.type == bfd_link_hash_indirect
12513 || h->root.type == bfd_link_hash_warning)
12514 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12515
12516 /* PR15323, ref flags aren't set for references in the
12517 same object. */
12518 h->root.non_ir_ref = 1;
12519 }
12520 }
12521
12522 eh = (struct elf32_arm_link_hash_entry *) h;
12523
12524 call_reloc_p = FALSE;
12525 may_become_dynamic_p = FALSE;
12526 may_need_local_target_p = FALSE;
12527
12528 /* Could be done earlier, if h were already available. */
12529 r_type = elf32_arm_tls_transition (info, r_type, h);
12530 switch (r_type)
12531 {
12532 case R_ARM_GOT32:
12533 case R_ARM_GOT_PREL:
12534 case R_ARM_TLS_GD32:
12535 case R_ARM_TLS_IE32:
12536 case R_ARM_TLS_GOTDESC:
12537 case R_ARM_TLS_DESCSEQ:
12538 case R_ARM_THM_TLS_DESCSEQ:
12539 case R_ARM_TLS_CALL:
12540 case R_ARM_THM_TLS_CALL:
12541 /* This symbol requires a global offset table entry. */
12542 {
12543 int tls_type, old_tls_type;
12544
12545 switch (r_type)
12546 {
12547 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
12548
12549 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
12550
12551 case R_ARM_TLS_GOTDESC:
12552 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12553 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12554 tls_type = GOT_TLS_GDESC; break;
12555
12556 default: tls_type = GOT_NORMAL; break;
12557 }
12558
12559 if (h != NULL)
12560 {
12561 h->got.refcount++;
12562 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12563 }
12564 else
12565 {
12566 /* This is a global offset table entry for a local symbol. */
12567 if (!elf32_arm_allocate_local_sym_info (abfd))
12568 return FALSE;
12569 elf_local_got_refcounts (abfd)[r_symndx] += 1;
12570 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12571 }
12572
12573 /* If a variable is accessed with both tls methods, two
12574 slots may be created. */
12575 if (GOT_TLS_GD_ANY_P (old_tls_type)
12576 && GOT_TLS_GD_ANY_P (tls_type))
12577 tls_type |= old_tls_type;
12578
12579 /* We will already have issued an error message if there
12580 is a TLS/non-TLS mismatch, based on the symbol
12581 type. So just combine any TLS types needed. */
12582 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12583 && tls_type != GOT_NORMAL)
12584 tls_type |= old_tls_type;
12585
12586 /* If the symbol is accessed in both IE and GDESC
12587 method, we're able to relax. Turn off the GDESC flag,
12588 without messing up with any other kind of tls types
12589 that may be involved */
12590 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12591 tls_type &= ~GOT_TLS_GDESC;
12592
12593 if (old_tls_type != tls_type)
12594 {
12595 if (h != NULL)
12596 elf32_arm_hash_entry (h)->tls_type = tls_type;
12597 else
12598 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12599 }
12600 }
12601 /* Fall through. */
12602
12603 case R_ARM_TLS_LDM32:
12604 if (r_type == R_ARM_TLS_LDM32)
12605 htab->tls_ldm_got.refcount++;
12606 /* Fall through. */
12607
12608 case R_ARM_GOTOFF32:
12609 case R_ARM_GOTPC:
12610 if (htab->root.sgot == NULL
12611 && !create_got_section (htab->root.dynobj, info))
12612 return FALSE;
12613 break;
12614
12615 case R_ARM_PC24:
12616 case R_ARM_PLT32:
12617 case R_ARM_CALL:
12618 case R_ARM_JUMP24:
12619 case R_ARM_PREL31:
12620 case R_ARM_THM_CALL:
12621 case R_ARM_THM_JUMP24:
12622 case R_ARM_THM_JUMP19:
12623 call_reloc_p = TRUE;
12624 may_need_local_target_p = TRUE;
12625 break;
12626
12627 case R_ARM_ABS12:
12628 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12629 ldr __GOTT_INDEX__ offsets. */
12630 if (!htab->vxworks_p)
12631 {
12632 may_need_local_target_p = TRUE;
12633 break;
12634 }
12635 /* Fall through. */
12636
12637 case R_ARM_MOVW_ABS_NC:
12638 case R_ARM_MOVT_ABS:
12639 case R_ARM_THM_MOVW_ABS_NC:
12640 case R_ARM_THM_MOVT_ABS:
12641 if (info->shared)
12642 {
12643 (*_bfd_error_handler)
12644 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12645 abfd, elf32_arm_howto_table_1[r_type].name,
12646 (h) ? h->root.root.string : "a local symbol");
12647 bfd_set_error (bfd_error_bad_value);
12648 return FALSE;
12649 }
12650
12651 /* Fall through. */
12652 case R_ARM_ABS32:
12653 case R_ARM_ABS32_NOI:
12654 case R_ARM_REL32:
12655 case R_ARM_REL32_NOI:
12656 case R_ARM_MOVW_PREL_NC:
12657 case R_ARM_MOVT_PREL:
12658 case R_ARM_THM_MOVW_PREL_NC:
12659 case R_ARM_THM_MOVT_PREL:
12660
12661 /* Should the interworking branches be listed here? */
12662 if ((info->shared || htab->root.is_relocatable_executable)
12663 && (sec->flags & SEC_ALLOC) != 0)
12664 {
12665 if (h == NULL
12666 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12667 {
12668 /* In shared libraries and relocatable executables,
12669 we treat local relative references as calls;
12670 see the related SYMBOL_CALLS_LOCAL code in
12671 allocate_dynrelocs. */
12672 call_reloc_p = TRUE;
12673 may_need_local_target_p = TRUE;
12674 }
12675 else
12676 /* We are creating a shared library or relocatable
12677 executable, and this is a reloc against a global symbol,
12678 or a non-PC-relative reloc against a local symbol.
12679 We may need to copy the reloc into the output. */
12680 may_become_dynamic_p = TRUE;
12681 }
12682 else
12683 may_need_local_target_p = TRUE;
12684 break;
12685
12686 /* This relocation describes the C++ object vtable hierarchy.
12687 Reconstruct it for later use during GC. */
12688 case R_ARM_GNU_VTINHERIT:
12689 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12690 return FALSE;
12691 break;
12692
12693 /* This relocation describes which C++ vtable entries are actually
12694 used. Record for later use during GC. */
12695 case R_ARM_GNU_VTENTRY:
12696 BFD_ASSERT (h != NULL);
12697 if (h != NULL
12698 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12699 return FALSE;
12700 break;
12701 }
12702
12703 if (h != NULL)
12704 {
12705 if (call_reloc_p)
12706 /* We may need a .plt entry if the function this reloc
12707 refers to is in a different object, regardless of the
12708 symbol's type. We can't tell for sure yet, because
12709 something later might force the symbol local. */
12710 h->needs_plt = 1;
12711 else if (may_need_local_target_p)
12712 /* If this reloc is in a read-only section, we might
12713 need a copy reloc. We can't check reliably at this
12714 stage whether the section is read-only, as input
12715 sections have not yet been mapped to output sections.
12716 Tentatively set the flag for now, and correct in
12717 adjust_dynamic_symbol. */
12718 h->non_got_ref = 1;
12719 }
12720
12721 if (may_need_local_target_p
12722 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
12723 {
12724 union gotplt_union *root_plt;
12725 struct arm_plt_info *arm_plt;
12726 struct arm_local_iplt_info *local_iplt;
12727
12728 if (h != NULL)
12729 {
12730 root_plt = &h->plt;
12731 arm_plt = &eh->plt;
12732 }
12733 else
12734 {
12735 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12736 if (local_iplt == NULL)
12737 return FALSE;
12738 root_plt = &local_iplt->root;
12739 arm_plt = &local_iplt->arm;
12740 }
12741
12742 /* If the symbol is a function that doesn't bind locally,
12743 this relocation will need a PLT entry. */
12744 if (root_plt->refcount != -1)
12745 root_plt->refcount += 1;
12746
12747 if (!call_reloc_p)
12748 arm_plt->noncall_refcount++;
12749
12750 /* It's too early to use htab->use_blx here, so we have to
12751 record possible blx references separately from
12752 relocs that definitely need a thumb stub. */
12753
12754 if (r_type == R_ARM_THM_CALL)
12755 arm_plt->maybe_thumb_refcount += 1;
12756
12757 if (r_type == R_ARM_THM_JUMP24
12758 || r_type == R_ARM_THM_JUMP19)
12759 arm_plt->thumb_refcount += 1;
12760 }
12761
12762 if (may_become_dynamic_p)
12763 {
12764 struct elf_dyn_relocs *p, **head;
12765
12766 /* Create a reloc section in dynobj. */
12767 if (sreloc == NULL)
12768 {
12769 sreloc = _bfd_elf_make_dynamic_reloc_section
12770 (sec, dynobj, 2, abfd, ! htab->use_rel);
12771
12772 if (sreloc == NULL)
12773 return FALSE;
12774
12775 /* BPABI objects never have dynamic relocations mapped. */
12776 if (htab->symbian_p)
12777 {
12778 flagword flags;
12779
12780 flags = bfd_get_section_flags (dynobj, sreloc);
12781 flags &= ~(SEC_LOAD | SEC_ALLOC);
12782 bfd_set_section_flags (dynobj, sreloc, flags);
12783 }
12784 }
12785
12786 /* If this is a global symbol, count the number of
12787 relocations we need for this symbol. */
12788 if (h != NULL)
12789 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12790 else
12791 {
12792 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12793 if (head == NULL)
12794 return FALSE;
12795 }
12796
12797 p = *head;
12798 if (p == NULL || p->sec != sec)
12799 {
12800 bfd_size_type amt = sizeof *p;
12801
12802 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12803 if (p == NULL)
12804 return FALSE;
12805 p->next = *head;
12806 *head = p;
12807 p->sec = sec;
12808 p->count = 0;
12809 p->pc_count = 0;
12810 }
12811
12812 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12813 p->pc_count += 1;
12814 p->count += 1;
12815 }
12816 }
12817
12818 return TRUE;
12819 }
12820
12821 /* Unwinding tables are not referenced directly. This pass marks them as
12822 required if the corresponding code section is marked. */
12823
12824 static bfd_boolean
12825 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12826 elf_gc_mark_hook_fn gc_mark_hook)
12827 {
12828 bfd *sub;
12829 Elf_Internal_Shdr **elf_shdrp;
12830 bfd_boolean again;
12831
12832 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12833
12834 /* Marking EH data may cause additional code sections to be marked,
12835 requiring multiple passes. */
12836 again = TRUE;
12837 while (again)
12838 {
12839 again = FALSE;
12840 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12841 {
12842 asection *o;
12843
12844 if (! is_arm_elf (sub))
12845 continue;
12846
12847 elf_shdrp = elf_elfsections (sub);
12848 for (o = sub->sections; o != NULL; o = o->next)
12849 {
12850 Elf_Internal_Shdr *hdr;
12851
12852 hdr = &elf_section_data (o)->this_hdr;
12853 if (hdr->sh_type == SHT_ARM_EXIDX
12854 && hdr->sh_link
12855 && hdr->sh_link < elf_numsections (sub)
12856 && !o->gc_mark
12857 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12858 {
12859 again = TRUE;
12860 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12861 return FALSE;
12862 }
12863 }
12864 }
12865 }
12866
12867 return TRUE;
12868 }
12869
12870 /* Treat mapping symbols as special target symbols. */
12871
12872 static bfd_boolean
12873 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12874 {
12875 return bfd_is_arm_special_symbol_name (sym->name,
12876 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
12877 }
12878
12879 /* This is a copy of elf_find_function() from elf.c except that
12880 ARM mapping symbols are ignored when looking for function names
12881 and STT_ARM_TFUNC is considered to a function type. */
12882
12883 static bfd_boolean
12884 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12885 asection * section,
12886 asymbol ** symbols,
12887 bfd_vma offset,
12888 const char ** filename_ptr,
12889 const char ** functionname_ptr)
12890 {
12891 const char * filename = NULL;
12892 asymbol * func = NULL;
12893 bfd_vma low_func = 0;
12894 asymbol ** p;
12895
12896 for (p = symbols; *p != NULL; p++)
12897 {
12898 elf_symbol_type *q;
12899
12900 q = (elf_symbol_type *) *p;
12901
12902 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12903 {
12904 default:
12905 break;
12906 case STT_FILE:
12907 filename = bfd_asymbol_name (&q->symbol);
12908 break;
12909 case STT_FUNC:
12910 case STT_ARM_TFUNC:
12911 case STT_NOTYPE:
12912 /* Skip mapping symbols. */
12913 if ((q->symbol.flags & BSF_LOCAL)
12914 && bfd_is_arm_special_symbol_name (q->symbol.name,
12915 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
12916 continue;
12917 /* Fall through. */
12918 if (bfd_get_section (&q->symbol) == section
12919 && q->symbol.value >= low_func
12920 && q->symbol.value <= offset)
12921 {
12922 func = (asymbol *) q;
12923 low_func = q->symbol.value;
12924 }
12925 break;
12926 }
12927 }
12928
12929 if (func == NULL)
12930 return FALSE;
12931
12932 if (filename_ptr)
12933 *filename_ptr = filename;
12934 if (functionname_ptr)
12935 *functionname_ptr = bfd_asymbol_name (func);
12936
12937 return TRUE;
12938 }
12939
12940
12941 /* Find the nearest line to a particular section and offset, for error
12942 reporting. This code is a duplicate of the code in elf.c, except
12943 that it uses arm_elf_find_function. */
12944
12945 static bfd_boolean
12946 elf32_arm_find_nearest_line (bfd * abfd,
12947 asection * section,
12948 asymbol ** symbols,
12949 bfd_vma offset,
12950 const char ** filename_ptr,
12951 const char ** functionname_ptr,
12952 unsigned int * line_ptr)
12953 {
12954 bfd_boolean found = FALSE;
12955
12956 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12957
12958 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
12959 section, symbols, offset,
12960 filename_ptr, functionname_ptr,
12961 line_ptr, NULL, 0,
12962 & elf_tdata (abfd)->dwarf2_find_line_info))
12963 {
12964 if (!*functionname_ptr)
12965 arm_elf_find_function (abfd, section, symbols, offset,
12966 *filename_ptr ? NULL : filename_ptr,
12967 functionname_ptr);
12968
12969 return TRUE;
12970 }
12971
12972 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12973 & found, filename_ptr,
12974 functionname_ptr, line_ptr,
12975 & elf_tdata (abfd)->line_info))
12976 return FALSE;
12977
12978 if (found && (*functionname_ptr || *line_ptr))
12979 return TRUE;
12980
12981 if (symbols == NULL)
12982 return FALSE;
12983
12984 if (! arm_elf_find_function (abfd, section, symbols, offset,
12985 filename_ptr, functionname_ptr))
12986 return FALSE;
12987
12988 *line_ptr = 0;
12989 return TRUE;
12990 }
12991
12992 static bfd_boolean
12993 elf32_arm_find_inliner_info (bfd * abfd,
12994 const char ** filename_ptr,
12995 const char ** functionname_ptr,
12996 unsigned int * line_ptr)
12997 {
12998 bfd_boolean found;
12999 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
13000 functionname_ptr, line_ptr,
13001 & elf_tdata (abfd)->dwarf2_find_line_info);
13002 return found;
13003 }
13004
13005 /* Adjust a symbol defined by a dynamic object and referenced by a
13006 regular object. The current definition is in some section of the
13007 dynamic object, but we're not including those sections. We have to
13008 change the definition to something the rest of the link can
13009 understand. */
13010
13011 static bfd_boolean
13012 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
13013 struct elf_link_hash_entry * h)
13014 {
13015 bfd * dynobj;
13016 asection * s;
13017 struct elf32_arm_link_hash_entry * eh;
13018 struct elf32_arm_link_hash_table *globals;
13019
13020 globals = elf32_arm_hash_table (info);
13021 if (globals == NULL)
13022 return FALSE;
13023
13024 dynobj = elf_hash_table (info)->dynobj;
13025
13026 /* Make sure we know what is going on here. */
13027 BFD_ASSERT (dynobj != NULL
13028 && (h->needs_plt
13029 || h->type == STT_GNU_IFUNC
13030 || h->u.weakdef != NULL
13031 || (h->def_dynamic
13032 && h->ref_regular
13033 && !h->def_regular)));
13034
13035 eh = (struct elf32_arm_link_hash_entry *) h;
13036
13037 /* If this is a function, put it in the procedure linkage table. We
13038 will fill in the contents of the procedure linkage table later,
13039 when we know the address of the .got section. */
13040 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
13041 {
13042 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
13043 symbol binds locally. */
13044 if (h->plt.refcount <= 0
13045 || (h->type != STT_GNU_IFUNC
13046 && (SYMBOL_CALLS_LOCAL (info, h)
13047 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
13048 && h->root.type == bfd_link_hash_undefweak))))
13049 {
13050 /* This case can occur if we saw a PLT32 reloc in an input
13051 file, but the symbol was never referred to by a dynamic
13052 object, or if all references were garbage collected. In
13053 such a case, we don't actually need to build a procedure
13054 linkage table, and we can just do a PC24 reloc instead. */
13055 h->plt.offset = (bfd_vma) -1;
13056 eh->plt.thumb_refcount = 0;
13057 eh->plt.maybe_thumb_refcount = 0;
13058 eh->plt.noncall_refcount = 0;
13059 h->needs_plt = 0;
13060 }
13061
13062 return TRUE;
13063 }
13064 else
13065 {
13066 /* It's possible that we incorrectly decided a .plt reloc was
13067 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13068 in check_relocs. We can't decide accurately between function
13069 and non-function syms in check-relocs; Objects loaded later in
13070 the link may change h->type. So fix it now. */
13071 h->plt.offset = (bfd_vma) -1;
13072 eh->plt.thumb_refcount = 0;
13073 eh->plt.maybe_thumb_refcount = 0;
13074 eh->plt.noncall_refcount = 0;
13075 }
13076
13077 /* If this is a weak symbol, and there is a real definition, the
13078 processor independent code will have arranged for us to see the
13079 real definition first, and we can just use the same value. */
13080 if (h->u.weakdef != NULL)
13081 {
13082 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13083 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13084 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13085 h->root.u.def.value = h->u.weakdef->root.u.def.value;
13086 return TRUE;
13087 }
13088
13089 /* If there are no non-GOT references, we do not need a copy
13090 relocation. */
13091 if (!h->non_got_ref)
13092 return TRUE;
13093
13094 /* This is a reference to a symbol defined by a dynamic object which
13095 is not a function. */
13096
13097 /* If we are creating a shared library, we must presume that the
13098 only references to the symbol are via the global offset table.
13099 For such cases we need not do anything here; the relocations will
13100 be handled correctly by relocate_section. Relocatable executables
13101 can reference data in shared objects directly, so we don't need to
13102 do anything here. */
13103 if (info->shared || globals->root.is_relocatable_executable)
13104 return TRUE;
13105
13106 /* We must allocate the symbol in our .dynbss section, which will
13107 become part of the .bss section of the executable. There will be
13108 an entry for this symbol in the .dynsym section. The dynamic
13109 object will contain position independent code, so all references
13110 from the dynamic object to this symbol will go through the global
13111 offset table. The dynamic linker will use the .dynsym entry to
13112 determine the address it must put in the global offset table, so
13113 both the dynamic object and the regular object will refer to the
13114 same memory location for the variable. */
13115 s = bfd_get_linker_section (dynobj, ".dynbss");
13116 BFD_ASSERT (s != NULL);
13117
13118 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13119 copy the initial value out of the dynamic object and into the
13120 runtime process image. We need to remember the offset into the
13121 .rel(a).bss section we are going to use. */
13122 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
13123 {
13124 asection *srel;
13125
13126 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
13127 elf32_arm_allocate_dynrelocs (info, srel, 1);
13128 h->needs_copy = 1;
13129 }
13130
13131 return _bfd_elf_adjust_dynamic_copy (h, s);
13132 }
13133
13134 /* Allocate space in .plt, .got and associated reloc sections for
13135 dynamic relocs. */
13136
13137 static bfd_boolean
13138 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
13139 {
13140 struct bfd_link_info *info;
13141 struct elf32_arm_link_hash_table *htab;
13142 struct elf32_arm_link_hash_entry *eh;
13143 struct elf_dyn_relocs *p;
13144
13145 if (h->root.type == bfd_link_hash_indirect)
13146 return TRUE;
13147
13148 eh = (struct elf32_arm_link_hash_entry *) h;
13149
13150 info = (struct bfd_link_info *) inf;
13151 htab = elf32_arm_hash_table (info);
13152 if (htab == NULL)
13153 return FALSE;
13154
13155 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
13156 && h->plt.refcount > 0)
13157 {
13158 /* Make sure this symbol is output as a dynamic symbol.
13159 Undefined weak syms won't yet be marked as dynamic. */
13160 if (h->dynindx == -1
13161 && !h->forced_local)
13162 {
13163 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13164 return FALSE;
13165 }
13166
13167 /* If the call in the PLT entry binds locally, the associated
13168 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13169 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13170 than the .plt section. */
13171 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13172 {
13173 eh->is_iplt = 1;
13174 if (eh->plt.noncall_refcount == 0
13175 && SYMBOL_REFERENCES_LOCAL (info, h))
13176 /* All non-call references can be resolved directly.
13177 This means that they can (and in some cases, must)
13178 resolve directly to the run-time target, rather than
13179 to the PLT. That in turns means that any .got entry
13180 would be equal to the .igot.plt entry, so there's
13181 no point having both. */
13182 h->got.refcount = 0;
13183 }
13184
13185 if (info->shared
13186 || eh->is_iplt
13187 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
13188 {
13189 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
13190
13191 /* If this symbol is not defined in a regular file, and we are
13192 not generating a shared library, then set the symbol to this
13193 location in the .plt. This is required to make function
13194 pointers compare as equal between the normal executable and
13195 the shared library. */
13196 if (! info->shared
13197 && !h->def_regular)
13198 {
13199 h->root.u.def.section = htab->root.splt;
13200 h->root.u.def.value = h->plt.offset;
13201
13202 /* Make sure the function is not marked as Thumb, in case
13203 it is the target of an ABS32 relocation, which will
13204 point to the PLT entry. */
13205 h->target_internal = ST_BRANCH_TO_ARM;
13206 }
13207
13208 htab->next_tls_desc_index++;
13209
13210 /* VxWorks executables have a second set of relocations for
13211 each PLT entry. They go in a separate relocation section,
13212 which is processed by the kernel loader. */
13213 if (htab->vxworks_p && !info->shared)
13214 {
13215 /* There is a relocation for the initial PLT entry:
13216 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13217 if (h->plt.offset == htab->plt_header_size)
13218 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
13219
13220 /* There are two extra relocations for each subsequent
13221 PLT entry: an R_ARM_32 relocation for the GOT entry,
13222 and an R_ARM_32 relocation for the PLT entry. */
13223 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
13224 }
13225 }
13226 else
13227 {
13228 h->plt.offset = (bfd_vma) -1;
13229 h->needs_plt = 0;
13230 }
13231 }
13232 else
13233 {
13234 h->plt.offset = (bfd_vma) -1;
13235 h->needs_plt = 0;
13236 }
13237
13238 eh = (struct elf32_arm_link_hash_entry *) h;
13239 eh->tlsdesc_got = (bfd_vma) -1;
13240
13241 if (h->got.refcount > 0)
13242 {
13243 asection *s;
13244 bfd_boolean dyn;
13245 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13246 int indx;
13247
13248 /* Make sure this symbol is output as a dynamic symbol.
13249 Undefined weak syms won't yet be marked as dynamic. */
13250 if (h->dynindx == -1
13251 && !h->forced_local)
13252 {
13253 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13254 return FALSE;
13255 }
13256
13257 if (!htab->symbian_p)
13258 {
13259 s = htab->root.sgot;
13260 h->got.offset = s->size;
13261
13262 if (tls_type == GOT_UNKNOWN)
13263 abort ();
13264
13265 if (tls_type == GOT_NORMAL)
13266 /* Non-TLS symbols need one GOT slot. */
13267 s->size += 4;
13268 else
13269 {
13270 if (tls_type & GOT_TLS_GDESC)
13271 {
13272 /* R_ARM_TLS_DESC needs 2 GOT slots. */
13273 eh->tlsdesc_got
13274 = (htab->root.sgotplt->size
13275 - elf32_arm_compute_jump_table_size (htab));
13276 htab->root.sgotplt->size += 8;
13277 h->got.offset = (bfd_vma) -2;
13278 /* plt.got_offset needs to know there's a TLS_DESC
13279 reloc in the middle of .got.plt. */
13280 htab->num_tls_desc++;
13281 }
13282
13283 if (tls_type & GOT_TLS_GD)
13284 {
13285 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13286 the symbol is both GD and GDESC, got.offset may
13287 have been overwritten. */
13288 h->got.offset = s->size;
13289 s->size += 8;
13290 }
13291
13292 if (tls_type & GOT_TLS_IE)
13293 /* R_ARM_TLS_IE32 needs one GOT slot. */
13294 s->size += 4;
13295 }
13296
13297 dyn = htab->root.dynamic_sections_created;
13298
13299 indx = 0;
13300 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13301 && (!info->shared
13302 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13303 indx = h->dynindx;
13304
13305 if (tls_type != GOT_NORMAL
13306 && (info->shared || indx != 0)
13307 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13308 || h->root.type != bfd_link_hash_undefweak))
13309 {
13310 if (tls_type & GOT_TLS_IE)
13311 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13312
13313 if (tls_type & GOT_TLS_GD)
13314 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13315
13316 if (tls_type & GOT_TLS_GDESC)
13317 {
13318 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13319 /* GDESC needs a trampoline to jump to. */
13320 htab->tls_trampoline = -1;
13321 }
13322
13323 /* Only GD needs it. GDESC just emits one relocation per
13324 2 entries. */
13325 if ((tls_type & GOT_TLS_GD) && indx != 0)
13326 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13327 }
13328 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
13329 {
13330 if (htab->root.dynamic_sections_created)
13331 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13332 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13333 }
13334 else if (h->type == STT_GNU_IFUNC
13335 && eh->plt.noncall_refcount == 0)
13336 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13337 they all resolve dynamically instead. Reserve room for the
13338 GOT entry's R_ARM_IRELATIVE relocation. */
13339 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
13340 else if (info->shared && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13341 || h->root.type != bfd_link_hash_undefweak))
13342 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
13343 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13344 }
13345 }
13346 else
13347 h->got.offset = (bfd_vma) -1;
13348
13349 /* Allocate stubs for exported Thumb functions on v4t. */
13350 if (!htab->use_blx && h->dynindx != -1
13351 && h->def_regular
13352 && h->target_internal == ST_BRANCH_TO_THUMB
13353 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13354 {
13355 struct elf_link_hash_entry * th;
13356 struct bfd_link_hash_entry * bh;
13357 struct elf_link_hash_entry * myh;
13358 char name[1024];
13359 asection *s;
13360 bh = NULL;
13361 /* Create a new symbol to regist the real location of the function. */
13362 s = h->root.u.def.section;
13363 sprintf (name, "__real_%s", h->root.root.string);
13364 _bfd_generic_link_add_one_symbol (info, s->owner,
13365 name, BSF_GLOBAL, s,
13366 h->root.u.def.value,
13367 NULL, TRUE, FALSE, &bh);
13368
13369 myh = (struct elf_link_hash_entry *) bh;
13370 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13371 myh->forced_local = 1;
13372 myh->target_internal = ST_BRANCH_TO_THUMB;
13373 eh->export_glue = myh;
13374 th = record_arm_to_thumb_glue (info, h);
13375 /* Point the symbol at the stub. */
13376 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
13377 h->target_internal = ST_BRANCH_TO_ARM;
13378 h->root.u.def.section = th->root.u.def.section;
13379 h->root.u.def.value = th->root.u.def.value & ~1;
13380 }
13381
13382 if (eh->dyn_relocs == NULL)
13383 return TRUE;
13384
13385 /* In the shared -Bsymbolic case, discard space allocated for
13386 dynamic pc-relative relocs against symbols which turn out to be
13387 defined in regular objects. For the normal shared case, discard
13388 space for pc-relative relocs that have become local due to symbol
13389 visibility changes. */
13390
13391 if (info->shared || htab->root.is_relocatable_executable)
13392 {
13393 /* The only relocs that use pc_count are R_ARM_REL32 and
13394 R_ARM_REL32_NOI, which will appear on something like
13395 ".long foo - .". We want calls to protected symbols to resolve
13396 directly to the function rather than going via the plt. If people
13397 want function pointer comparisons to work as expected then they
13398 should avoid writing assembly like ".long foo - .". */
13399 if (SYMBOL_CALLS_LOCAL (info, h))
13400 {
13401 struct elf_dyn_relocs **pp;
13402
13403 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13404 {
13405 p->count -= p->pc_count;
13406 p->pc_count = 0;
13407 if (p->count == 0)
13408 *pp = p->next;
13409 else
13410 pp = &p->next;
13411 }
13412 }
13413
13414 if (htab->vxworks_p)
13415 {
13416 struct elf_dyn_relocs **pp;
13417
13418 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13419 {
13420 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
13421 *pp = p->next;
13422 else
13423 pp = &p->next;
13424 }
13425 }
13426
13427 /* Also discard relocs on undefined weak syms with non-default
13428 visibility. */
13429 if (eh->dyn_relocs != NULL
13430 && h->root.type == bfd_link_hash_undefweak)
13431 {
13432 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
13433 eh->dyn_relocs = NULL;
13434
13435 /* Make sure undefined weak symbols are output as a dynamic
13436 symbol in PIEs. */
13437 else if (h->dynindx == -1
13438 && !h->forced_local)
13439 {
13440 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13441 return FALSE;
13442 }
13443 }
13444
13445 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13446 && h->root.type == bfd_link_hash_new)
13447 {
13448 /* Output absolute symbols so that we can create relocations
13449 against them. For normal symbols we output a relocation
13450 against the section that contains them. */
13451 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13452 return FALSE;
13453 }
13454
13455 }
13456 else
13457 {
13458 /* For the non-shared case, discard space for relocs against
13459 symbols which turn out to need copy relocs or are not
13460 dynamic. */
13461
13462 if (!h->non_got_ref
13463 && ((h->def_dynamic
13464 && !h->def_regular)
13465 || (htab->root.dynamic_sections_created
13466 && (h->root.type == bfd_link_hash_undefweak
13467 || h->root.type == bfd_link_hash_undefined))))
13468 {
13469 /* Make sure this symbol is output as a dynamic symbol.
13470 Undefined weak syms won't yet be marked as dynamic. */
13471 if (h->dynindx == -1
13472 && !h->forced_local)
13473 {
13474 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13475 return FALSE;
13476 }
13477
13478 /* If that succeeded, we know we'll be keeping all the
13479 relocs. */
13480 if (h->dynindx != -1)
13481 goto keep;
13482 }
13483
13484 eh->dyn_relocs = NULL;
13485
13486 keep: ;
13487 }
13488
13489 /* Finally, allocate space. */
13490 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13491 {
13492 asection *sreloc = elf_section_data (p->sec)->sreloc;
13493 if (h->type == STT_GNU_IFUNC
13494 && eh->plt.noncall_refcount == 0
13495 && SYMBOL_REFERENCES_LOCAL (info, h))
13496 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13497 else
13498 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
13499 }
13500
13501 return TRUE;
13502 }
13503
13504 /* Find any dynamic relocs that apply to read-only sections. */
13505
13506 static bfd_boolean
13507 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
13508 {
13509 struct elf32_arm_link_hash_entry * eh;
13510 struct elf_dyn_relocs * p;
13511
13512 eh = (struct elf32_arm_link_hash_entry *) h;
13513 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13514 {
13515 asection *s = p->sec;
13516
13517 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13518 {
13519 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13520
13521 info->flags |= DF_TEXTREL;
13522
13523 /* Not an error, just cut short the traversal. */
13524 return FALSE;
13525 }
13526 }
13527 return TRUE;
13528 }
13529
13530 void
13531 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13532 int byteswap_code)
13533 {
13534 struct elf32_arm_link_hash_table *globals;
13535
13536 globals = elf32_arm_hash_table (info);
13537 if (globals == NULL)
13538 return;
13539
13540 globals->byteswap_code = byteswap_code;
13541 }
13542
13543 /* Set the sizes of the dynamic sections. */
13544
13545 static bfd_boolean
13546 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13547 struct bfd_link_info * info)
13548 {
13549 bfd * dynobj;
13550 asection * s;
13551 bfd_boolean plt;
13552 bfd_boolean relocs;
13553 bfd *ibfd;
13554 struct elf32_arm_link_hash_table *htab;
13555
13556 htab = elf32_arm_hash_table (info);
13557 if (htab == NULL)
13558 return FALSE;
13559
13560 dynobj = elf_hash_table (info)->dynobj;
13561 BFD_ASSERT (dynobj != NULL);
13562 check_use_blx (htab);
13563
13564 if (elf_hash_table (info)->dynamic_sections_created)
13565 {
13566 /* Set the contents of the .interp section to the interpreter. */
13567 if (info->executable)
13568 {
13569 s = bfd_get_linker_section (dynobj, ".interp");
13570 BFD_ASSERT (s != NULL);
13571 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
13572 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13573 }
13574 }
13575
13576 /* Set up .got offsets for local syms, and space for local dynamic
13577 relocs. */
13578 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13579 {
13580 bfd_signed_vma *local_got;
13581 bfd_signed_vma *end_local_got;
13582 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
13583 char *local_tls_type;
13584 bfd_vma *local_tlsdesc_gotent;
13585 bfd_size_type locsymcount;
13586 Elf_Internal_Shdr *symtab_hdr;
13587 asection *srel;
13588 bfd_boolean is_vxworks = htab->vxworks_p;
13589 unsigned int symndx;
13590
13591 if (! is_arm_elf (ibfd))
13592 continue;
13593
13594 for (s = ibfd->sections; s != NULL; s = s->next)
13595 {
13596 struct elf_dyn_relocs *p;
13597
13598 for (p = (struct elf_dyn_relocs *)
13599 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
13600 {
13601 if (!bfd_is_abs_section (p->sec)
13602 && bfd_is_abs_section (p->sec->output_section))
13603 {
13604 /* Input section has been discarded, either because
13605 it is a copy of a linkonce section or due to
13606 linker script /DISCARD/, so we'll be discarding
13607 the relocs too. */
13608 }
13609 else if (is_vxworks
13610 && strcmp (p->sec->output_section->name,
13611 ".tls_vars") == 0)
13612 {
13613 /* Relocations in vxworks .tls_vars sections are
13614 handled specially by the loader. */
13615 }
13616 else if (p->count != 0)
13617 {
13618 srel = elf_section_data (p->sec)->sreloc;
13619 elf32_arm_allocate_dynrelocs (info, srel, p->count);
13620 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
13621 info->flags |= DF_TEXTREL;
13622 }
13623 }
13624 }
13625
13626 local_got = elf_local_got_refcounts (ibfd);
13627 if (!local_got)
13628 continue;
13629
13630 symtab_hdr = & elf_symtab_hdr (ibfd);
13631 locsymcount = symtab_hdr->sh_info;
13632 end_local_got = local_got + locsymcount;
13633 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
13634 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
13635 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
13636 symndx = 0;
13637 s = htab->root.sgot;
13638 srel = htab->root.srelgot;
13639 for (; local_got < end_local_got;
13640 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13641 ++local_tlsdesc_gotent, ++symndx)
13642 {
13643 *local_tlsdesc_gotent = (bfd_vma) -1;
13644 local_iplt = *local_iplt_ptr;
13645 if (local_iplt != NULL)
13646 {
13647 struct elf_dyn_relocs *p;
13648
13649 if (local_iplt->root.refcount > 0)
13650 {
13651 elf32_arm_allocate_plt_entry (info, TRUE,
13652 &local_iplt->root,
13653 &local_iplt->arm);
13654 if (local_iplt->arm.noncall_refcount == 0)
13655 /* All references to the PLT are calls, so all
13656 non-call references can resolve directly to the
13657 run-time target. This means that the .got entry
13658 would be the same as the .igot.plt entry, so there's
13659 no point creating both. */
13660 *local_got = 0;
13661 }
13662 else
13663 {
13664 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13665 local_iplt->root.offset = (bfd_vma) -1;
13666 }
13667
13668 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13669 {
13670 asection *psrel;
13671
13672 psrel = elf_section_data (p->sec)->sreloc;
13673 if (local_iplt->arm.noncall_refcount == 0)
13674 elf32_arm_allocate_irelocs (info, psrel, p->count);
13675 else
13676 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13677 }
13678 }
13679 if (*local_got > 0)
13680 {
13681 Elf_Internal_Sym *isym;
13682
13683 *local_got = s->size;
13684 if (*local_tls_type & GOT_TLS_GD)
13685 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13686 s->size += 8;
13687 if (*local_tls_type & GOT_TLS_GDESC)
13688 {
13689 *local_tlsdesc_gotent = htab->root.sgotplt->size
13690 - elf32_arm_compute_jump_table_size (htab);
13691 htab->root.sgotplt->size += 8;
13692 *local_got = (bfd_vma) -2;
13693 /* plt.got_offset needs to know there's a TLS_DESC
13694 reloc in the middle of .got.plt. */
13695 htab->num_tls_desc++;
13696 }
13697 if (*local_tls_type & GOT_TLS_IE)
13698 s->size += 4;
13699
13700 if (*local_tls_type & GOT_NORMAL)
13701 {
13702 /* If the symbol is both GD and GDESC, *local_got
13703 may have been overwritten. */
13704 *local_got = s->size;
13705 s->size += 4;
13706 }
13707
13708 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13709 if (isym == NULL)
13710 return FALSE;
13711
13712 /* If all references to an STT_GNU_IFUNC PLT are calls,
13713 then all non-call references, including this GOT entry,
13714 resolve directly to the run-time target. */
13715 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13716 && (local_iplt == NULL
13717 || local_iplt->arm.noncall_refcount == 0))
13718 elf32_arm_allocate_irelocs (info, srel, 1);
13719 else if (info->shared || output_bfd->flags & DYNAMIC)
13720 {
13721 if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13722 || *local_tls_type & GOT_TLS_GD)
13723 elf32_arm_allocate_dynrelocs (info, srel, 1);
13724
13725 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13726 {
13727 elf32_arm_allocate_dynrelocs (info,
13728 htab->root.srelplt, 1);
13729 htab->tls_trampoline = -1;
13730 }
13731 }
13732 }
13733 else
13734 *local_got = (bfd_vma) -1;
13735 }
13736 }
13737
13738 if (htab->tls_ldm_got.refcount > 0)
13739 {
13740 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13741 for R_ARM_TLS_LDM32 relocations. */
13742 htab->tls_ldm_got.offset = htab->root.sgot->size;
13743 htab->root.sgot->size += 8;
13744 if (info->shared)
13745 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13746 }
13747 else
13748 htab->tls_ldm_got.offset = -1;
13749
13750 /* Allocate global sym .plt and .got entries, and space for global
13751 sym dynamic relocs. */
13752 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
13753
13754 /* Here we rummage through the found bfds to collect glue information. */
13755 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13756 {
13757 if (! is_arm_elf (ibfd))
13758 continue;
13759
13760 /* Initialise mapping tables for code/data. */
13761 bfd_elf32_arm_init_maps (ibfd);
13762
13763 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13764 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13765 /* xgettext:c-format */
13766 _bfd_error_handler (_("Errors encountered processing file %s"),
13767 ibfd->filename);
13768 }
13769
13770 /* Allocate space for the glue sections now that we've sized them. */
13771 bfd_elf32_arm_allocate_interworking_sections (info);
13772
13773 /* For every jump slot reserved in the sgotplt, reloc_count is
13774 incremented. However, when we reserve space for TLS descriptors,
13775 it's not incremented, so in order to compute the space reserved
13776 for them, it suffices to multiply the reloc count by the jump
13777 slot size. */
13778 if (htab->root.srelplt)
13779 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13780
13781 if (htab->tls_trampoline)
13782 {
13783 if (htab->root.splt->size == 0)
13784 htab->root.splt->size += htab->plt_header_size;
13785
13786 htab->tls_trampoline = htab->root.splt->size;
13787 htab->root.splt->size += htab->plt_entry_size;
13788
13789 /* If we're not using lazy TLS relocations, don't generate the
13790 PLT and GOT entries they require. */
13791 if (!(info->flags & DF_BIND_NOW))
13792 {
13793 htab->dt_tlsdesc_got = htab->root.sgot->size;
13794 htab->root.sgot->size += 4;
13795
13796 htab->dt_tlsdesc_plt = htab->root.splt->size;
13797 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13798 }
13799 }
13800
13801 /* The check_relocs and adjust_dynamic_symbol entry points have
13802 determined the sizes of the various dynamic sections. Allocate
13803 memory for them. */
13804 plt = FALSE;
13805 relocs = FALSE;
13806 for (s = dynobj->sections; s != NULL; s = s->next)
13807 {
13808 const char * name;
13809
13810 if ((s->flags & SEC_LINKER_CREATED) == 0)
13811 continue;
13812
13813 /* It's OK to base decisions on the section name, because none
13814 of the dynobj section names depend upon the input files. */
13815 name = bfd_get_section_name (dynobj, s);
13816
13817 if (s == htab->root.splt)
13818 {
13819 /* Remember whether there is a PLT. */
13820 plt = s->size != 0;
13821 }
13822 else if (CONST_STRNEQ (name, ".rel"))
13823 {
13824 if (s->size != 0)
13825 {
13826 /* Remember whether there are any reloc sections other
13827 than .rel(a).plt and .rela.plt.unloaded. */
13828 if (s != htab->root.srelplt && s != htab->srelplt2)
13829 relocs = TRUE;
13830
13831 /* We use the reloc_count field as a counter if we need
13832 to copy relocs into the output file. */
13833 s->reloc_count = 0;
13834 }
13835 }
13836 else if (s != htab->root.sgot
13837 && s != htab->root.sgotplt
13838 && s != htab->root.iplt
13839 && s != htab->root.igotplt
13840 && s != htab->sdynbss)
13841 {
13842 /* It's not one of our sections, so don't allocate space. */
13843 continue;
13844 }
13845
13846 if (s->size == 0)
13847 {
13848 /* If we don't need this section, strip it from the
13849 output file. This is mostly to handle .rel(a).bss and
13850 .rel(a).plt. We must create both sections in
13851 create_dynamic_sections, because they must be created
13852 before the linker maps input sections to output
13853 sections. The linker does that before
13854 adjust_dynamic_symbol is called, and it is that
13855 function which decides whether anything needs to go
13856 into these sections. */
13857 s->flags |= SEC_EXCLUDE;
13858 continue;
13859 }
13860
13861 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13862 continue;
13863
13864 /* Allocate memory for the section contents. */
13865 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
13866 if (s->contents == NULL)
13867 return FALSE;
13868 }
13869
13870 if (elf_hash_table (info)->dynamic_sections_created)
13871 {
13872 /* Add some entries to the .dynamic section. We fill in the
13873 values later, in elf32_arm_finish_dynamic_sections, but we
13874 must add the entries now so that we get the correct size for
13875 the .dynamic section. The DT_DEBUG entry is filled in by the
13876 dynamic linker and used by the debugger. */
13877 #define add_dynamic_entry(TAG, VAL) \
13878 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
13879
13880 if (info->executable)
13881 {
13882 if (!add_dynamic_entry (DT_DEBUG, 0))
13883 return FALSE;
13884 }
13885
13886 if (plt)
13887 {
13888 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13889 || !add_dynamic_entry (DT_PLTRELSZ, 0)
13890 || !add_dynamic_entry (DT_PLTREL,
13891 htab->use_rel ? DT_REL : DT_RELA)
13892 || !add_dynamic_entry (DT_JMPREL, 0))
13893 return FALSE;
13894
13895 if (htab->dt_tlsdesc_plt &&
13896 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
13897 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
13898 return FALSE;
13899 }
13900
13901 if (relocs)
13902 {
13903 if (htab->use_rel)
13904 {
13905 if (!add_dynamic_entry (DT_REL, 0)
13906 || !add_dynamic_entry (DT_RELSZ, 0)
13907 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13908 return FALSE;
13909 }
13910 else
13911 {
13912 if (!add_dynamic_entry (DT_RELA, 0)
13913 || !add_dynamic_entry (DT_RELASZ, 0)
13914 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13915 return FALSE;
13916 }
13917 }
13918
13919 /* If any dynamic relocs apply to a read-only section,
13920 then we need a DT_TEXTREL entry. */
13921 if ((info->flags & DF_TEXTREL) == 0)
13922 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13923 info);
13924
13925 if ((info->flags & DF_TEXTREL) != 0)
13926 {
13927 if (!add_dynamic_entry (DT_TEXTREL, 0))
13928 return FALSE;
13929 }
13930 if (htab->vxworks_p
13931 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13932 return FALSE;
13933 }
13934 #undef add_dynamic_entry
13935
13936 return TRUE;
13937 }
13938
13939 /* Size sections even though they're not dynamic. We use it to setup
13940 _TLS_MODULE_BASE_, if needed. */
13941
13942 static bfd_boolean
13943 elf32_arm_always_size_sections (bfd *output_bfd,
13944 struct bfd_link_info *info)
13945 {
13946 asection *tls_sec;
13947
13948 if (info->relocatable)
13949 return TRUE;
13950
13951 tls_sec = elf_hash_table (info)->tls_sec;
13952
13953 if (tls_sec)
13954 {
13955 struct elf_link_hash_entry *tlsbase;
13956
13957 tlsbase = elf_link_hash_lookup
13958 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13959
13960 if (tlsbase)
13961 {
13962 struct bfd_link_hash_entry *bh = NULL;
13963 const struct elf_backend_data *bed
13964 = get_elf_backend_data (output_bfd);
13965
13966 if (!(_bfd_generic_link_add_one_symbol
13967 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13968 tls_sec, 0, NULL, FALSE,
13969 bed->collect, &bh)))
13970 return FALSE;
13971
13972 tlsbase->type = STT_TLS;
13973 tlsbase = (struct elf_link_hash_entry *)bh;
13974 tlsbase->def_regular = 1;
13975 tlsbase->other = STV_HIDDEN;
13976 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
13977 }
13978 }
13979 return TRUE;
13980 }
13981
13982 /* Finish up dynamic symbol handling. We set the contents of various
13983 dynamic sections here. */
13984
13985 static bfd_boolean
13986 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
13987 struct bfd_link_info * info,
13988 struct elf_link_hash_entry * h,
13989 Elf_Internal_Sym * sym)
13990 {
13991 struct elf32_arm_link_hash_table *htab;
13992 struct elf32_arm_link_hash_entry *eh;
13993
13994 htab = elf32_arm_hash_table (info);
13995 if (htab == NULL)
13996 return FALSE;
13997
13998 eh = (struct elf32_arm_link_hash_entry *) h;
13999
14000 if (h->plt.offset != (bfd_vma) -1)
14001 {
14002 if (!eh->is_iplt)
14003 {
14004 BFD_ASSERT (h->dynindx != -1);
14005 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
14006 h->dynindx, 0);
14007 }
14008
14009 if (!h->def_regular)
14010 {
14011 /* Mark the symbol as undefined, rather than as defined in
14012 the .plt section. Leave the value alone. */
14013 sym->st_shndx = SHN_UNDEF;
14014 /* If the symbol is weak, we do need to clear the value.
14015 Otherwise, the PLT entry would provide a definition for
14016 the symbol even if the symbol wasn't defined anywhere,
14017 and so the symbol would never be NULL. */
14018 if (!h->ref_regular_nonweak)
14019 sym->st_value = 0;
14020 }
14021 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
14022 {
14023 /* At least one non-call relocation references this .iplt entry,
14024 so the .iplt entry is the function's canonical address. */
14025 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
14026 sym->st_target_internal = ST_BRANCH_TO_ARM;
14027 sym->st_shndx = (_bfd_elf_section_from_bfd_section
14028 (output_bfd, htab->root.iplt->output_section));
14029 sym->st_value = (h->plt.offset
14030 + htab->root.iplt->output_section->vma
14031 + htab->root.iplt->output_offset);
14032 }
14033 }
14034
14035 if (h->needs_copy)
14036 {
14037 asection * s;
14038 Elf_Internal_Rela rel;
14039
14040 /* This symbol needs a copy reloc. Set it up. */
14041 BFD_ASSERT (h->dynindx != -1
14042 && (h->root.type == bfd_link_hash_defined
14043 || h->root.type == bfd_link_hash_defweak));
14044
14045 s = htab->srelbss;
14046 BFD_ASSERT (s != NULL);
14047
14048 rel.r_addend = 0;
14049 rel.r_offset = (h->root.u.def.value
14050 + h->root.u.def.section->output_section->vma
14051 + h->root.u.def.section->output_offset);
14052 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
14053 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
14054 }
14055
14056 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14057 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14058 to the ".got" section. */
14059 if (h == htab->root.hdynamic
14060 || (!htab->vxworks_p && h == htab->root.hgot))
14061 sym->st_shndx = SHN_ABS;
14062
14063 return TRUE;
14064 }
14065
14066 static void
14067 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14068 void *contents,
14069 const unsigned long *template, unsigned count)
14070 {
14071 unsigned ix;
14072
14073 for (ix = 0; ix != count; ix++)
14074 {
14075 unsigned long insn = template[ix];
14076
14077 /* Emit mov pc,rx if bx is not permitted. */
14078 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14079 insn = (insn & 0xf000000f) | 0x01a0f000;
14080 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14081 }
14082 }
14083
14084 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
14085 other variants, NaCl needs this entry in a static executable's
14086 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
14087 zero. For .iplt really only the last bundle is useful, and .iplt
14088 could have a shorter first entry, with each individual PLT entry's
14089 relative branch calculated differently so it targets the last
14090 bundle instead of the instruction before it (labelled .Lplt_tail
14091 above). But it's simpler to keep the size and layout of PLT0
14092 consistent with the dynamic case, at the cost of some dead code at
14093 the start of .iplt and the one dead store to the stack at the start
14094 of .Lplt_tail. */
14095 static void
14096 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14097 asection *plt, bfd_vma got_displacement)
14098 {
14099 unsigned int i;
14100
14101 put_arm_insn (htab, output_bfd,
14102 elf32_arm_nacl_plt0_entry[0]
14103 | arm_movw_immediate (got_displacement),
14104 plt->contents + 0);
14105 put_arm_insn (htab, output_bfd,
14106 elf32_arm_nacl_plt0_entry[1]
14107 | arm_movt_immediate (got_displacement),
14108 plt->contents + 4);
14109
14110 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14111 put_arm_insn (htab, output_bfd,
14112 elf32_arm_nacl_plt0_entry[i],
14113 plt->contents + (i * 4));
14114 }
14115
14116 /* Finish up the dynamic sections. */
14117
14118 static bfd_boolean
14119 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
14120 {
14121 bfd * dynobj;
14122 asection * sgot;
14123 asection * sdyn;
14124 struct elf32_arm_link_hash_table *htab;
14125
14126 htab = elf32_arm_hash_table (info);
14127 if (htab == NULL)
14128 return FALSE;
14129
14130 dynobj = elf_hash_table (info)->dynobj;
14131
14132 sgot = htab->root.sgotplt;
14133 /* A broken linker script might have discarded the dynamic sections.
14134 Catch this here so that we do not seg-fault later on. */
14135 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14136 return FALSE;
14137 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
14138
14139 if (elf_hash_table (info)->dynamic_sections_created)
14140 {
14141 asection *splt;
14142 Elf32_External_Dyn *dyncon, *dynconend;
14143
14144 splt = htab->root.splt;
14145 BFD_ASSERT (splt != NULL && sdyn != NULL);
14146 BFD_ASSERT (htab->symbian_p || sgot != NULL);
14147
14148 dyncon = (Elf32_External_Dyn *) sdyn->contents;
14149 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
14150
14151 for (; dyncon < dynconend; dyncon++)
14152 {
14153 Elf_Internal_Dyn dyn;
14154 const char * name;
14155 asection * s;
14156
14157 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14158
14159 switch (dyn.d_tag)
14160 {
14161 unsigned int type;
14162
14163 default:
14164 if (htab->vxworks_p
14165 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14166 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14167 break;
14168
14169 case DT_HASH:
14170 name = ".hash";
14171 goto get_vma_if_bpabi;
14172 case DT_STRTAB:
14173 name = ".dynstr";
14174 goto get_vma_if_bpabi;
14175 case DT_SYMTAB:
14176 name = ".dynsym";
14177 goto get_vma_if_bpabi;
14178 case DT_VERSYM:
14179 name = ".gnu.version";
14180 goto get_vma_if_bpabi;
14181 case DT_VERDEF:
14182 name = ".gnu.version_d";
14183 goto get_vma_if_bpabi;
14184 case DT_VERNEED:
14185 name = ".gnu.version_r";
14186 goto get_vma_if_bpabi;
14187
14188 case DT_PLTGOT:
14189 name = ".got";
14190 goto get_vma;
14191 case DT_JMPREL:
14192 name = RELOC_SECTION (htab, ".plt");
14193 get_vma:
14194 s = bfd_get_section_by_name (output_bfd, name);
14195 if (s == NULL)
14196 {
14197 /* PR ld/14397: Issue an error message if a required section is missing. */
14198 (*_bfd_error_handler)
14199 (_("error: required section '%s' not found in the linker script"), name);
14200 bfd_set_error (bfd_error_invalid_operation);
14201 return FALSE;
14202 }
14203 if (!htab->symbian_p)
14204 dyn.d_un.d_ptr = s->vma;
14205 else
14206 /* In the BPABI, tags in the PT_DYNAMIC section point
14207 at the file offset, not the memory address, for the
14208 convenience of the post linker. */
14209 dyn.d_un.d_ptr = s->filepos;
14210 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14211 break;
14212
14213 get_vma_if_bpabi:
14214 if (htab->symbian_p)
14215 goto get_vma;
14216 break;
14217
14218 case DT_PLTRELSZ:
14219 s = htab->root.srelplt;
14220 BFD_ASSERT (s != NULL);
14221 dyn.d_un.d_val = s->size;
14222 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14223 break;
14224
14225 case DT_RELSZ:
14226 case DT_RELASZ:
14227 if (!htab->symbian_p)
14228 {
14229 /* My reading of the SVR4 ABI indicates that the
14230 procedure linkage table relocs (DT_JMPREL) should be
14231 included in the overall relocs (DT_REL). This is
14232 what Solaris does. However, UnixWare can not handle
14233 that case. Therefore, we override the DT_RELSZ entry
14234 here to make it not include the JMPREL relocs. Since
14235 the linker script arranges for .rel(a).plt to follow all
14236 other relocation sections, we don't have to worry
14237 about changing the DT_REL entry. */
14238 s = htab->root.srelplt;
14239 if (s != NULL)
14240 dyn.d_un.d_val -= s->size;
14241 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14242 break;
14243 }
14244 /* Fall through. */
14245
14246 case DT_REL:
14247 case DT_RELA:
14248 /* In the BPABI, the DT_REL tag must point at the file
14249 offset, not the VMA, of the first relocation
14250 section. So, we use code similar to that in
14251 elflink.c, but do not check for SHF_ALLOC on the
14252 relcoation section, since relocations sections are
14253 never allocated under the BPABI. The comments above
14254 about Unixware notwithstanding, we include all of the
14255 relocations here. */
14256 if (htab->symbian_p)
14257 {
14258 unsigned int i;
14259 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14260 ? SHT_REL : SHT_RELA);
14261 dyn.d_un.d_val = 0;
14262 for (i = 1; i < elf_numsections (output_bfd); i++)
14263 {
14264 Elf_Internal_Shdr *hdr
14265 = elf_elfsections (output_bfd)[i];
14266 if (hdr->sh_type == type)
14267 {
14268 if (dyn.d_tag == DT_RELSZ
14269 || dyn.d_tag == DT_RELASZ)
14270 dyn.d_un.d_val += hdr->sh_size;
14271 else if ((ufile_ptr) hdr->sh_offset
14272 <= dyn.d_un.d_val - 1)
14273 dyn.d_un.d_val = hdr->sh_offset;
14274 }
14275 }
14276 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14277 }
14278 break;
14279
14280 case DT_TLSDESC_PLT:
14281 s = htab->root.splt;
14282 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14283 + htab->dt_tlsdesc_plt);
14284 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14285 break;
14286
14287 case DT_TLSDESC_GOT:
14288 s = htab->root.sgot;
14289 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14290 + htab->dt_tlsdesc_got);
14291 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14292 break;
14293
14294 /* Set the bottom bit of DT_INIT/FINI if the
14295 corresponding function is Thumb. */
14296 case DT_INIT:
14297 name = info->init_function;
14298 goto get_sym;
14299 case DT_FINI:
14300 name = info->fini_function;
14301 get_sym:
14302 /* If it wasn't set by elf_bfd_final_link
14303 then there is nothing to adjust. */
14304 if (dyn.d_un.d_val != 0)
14305 {
14306 struct elf_link_hash_entry * eh;
14307
14308 eh = elf_link_hash_lookup (elf_hash_table (info), name,
14309 FALSE, FALSE, TRUE);
14310 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
14311 {
14312 dyn.d_un.d_val |= 1;
14313 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14314 }
14315 }
14316 break;
14317 }
14318 }
14319
14320 /* Fill in the first entry in the procedure linkage table. */
14321 if (splt->size > 0 && htab->plt_header_size)
14322 {
14323 const bfd_vma *plt0_entry;
14324 bfd_vma got_address, plt_address, got_displacement;
14325
14326 /* Calculate the addresses of the GOT and PLT. */
14327 got_address = sgot->output_section->vma + sgot->output_offset;
14328 plt_address = splt->output_section->vma + splt->output_offset;
14329
14330 if (htab->vxworks_p)
14331 {
14332 /* The VxWorks GOT is relocated by the dynamic linker.
14333 Therefore, we must emit relocations rather than simply
14334 computing the values now. */
14335 Elf_Internal_Rela rel;
14336
14337 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
14338 put_arm_insn (htab, output_bfd, plt0_entry[0],
14339 splt->contents + 0);
14340 put_arm_insn (htab, output_bfd, plt0_entry[1],
14341 splt->contents + 4);
14342 put_arm_insn (htab, output_bfd, plt0_entry[2],
14343 splt->contents + 8);
14344 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14345
14346 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
14347 rel.r_offset = plt_address + 12;
14348 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14349 rel.r_addend = 0;
14350 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14351 htab->srelplt2->contents);
14352 }
14353 else if (htab->nacl_p)
14354 arm_nacl_put_plt0 (htab, output_bfd, splt,
14355 got_address + 8 - (plt_address + 16));
14356 else
14357 {
14358 got_displacement = got_address - (plt_address + 16);
14359
14360 plt0_entry = elf32_arm_plt0_entry;
14361 put_arm_insn (htab, output_bfd, plt0_entry[0],
14362 splt->contents + 0);
14363 put_arm_insn (htab, output_bfd, plt0_entry[1],
14364 splt->contents + 4);
14365 put_arm_insn (htab, output_bfd, plt0_entry[2],
14366 splt->contents + 8);
14367 put_arm_insn (htab, output_bfd, plt0_entry[3],
14368 splt->contents + 12);
14369
14370 #ifdef FOUR_WORD_PLT
14371 /* The displacement value goes in the otherwise-unused
14372 last word of the second entry. */
14373 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
14374 #else
14375 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
14376 #endif
14377 }
14378 }
14379
14380 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14381 really seem like the right value. */
14382 if (splt->output_section->owner == output_bfd)
14383 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
14384
14385 if (htab->dt_tlsdesc_plt)
14386 {
14387 bfd_vma got_address
14388 = sgot->output_section->vma + sgot->output_offset;
14389 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14390 + htab->root.sgot->output_offset);
14391 bfd_vma plt_address
14392 = splt->output_section->vma + splt->output_offset;
14393
14394 arm_put_trampoline (htab, output_bfd,
14395 splt->contents + htab->dt_tlsdesc_plt,
14396 dl_tlsdesc_lazy_trampoline, 6);
14397
14398 bfd_put_32 (output_bfd,
14399 gotplt_address + htab->dt_tlsdesc_got
14400 - (plt_address + htab->dt_tlsdesc_plt)
14401 - dl_tlsdesc_lazy_trampoline[6],
14402 splt->contents + htab->dt_tlsdesc_plt + 24);
14403 bfd_put_32 (output_bfd,
14404 got_address - (plt_address + htab->dt_tlsdesc_plt)
14405 - dl_tlsdesc_lazy_trampoline[7],
14406 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14407 }
14408
14409 if (htab->tls_trampoline)
14410 {
14411 arm_put_trampoline (htab, output_bfd,
14412 splt->contents + htab->tls_trampoline,
14413 tls_trampoline, 3);
14414 #ifdef FOUR_WORD_PLT
14415 bfd_put_32 (output_bfd, 0x00000000,
14416 splt->contents + htab->tls_trampoline + 12);
14417 #endif
14418 }
14419
14420 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
14421 {
14422 /* Correct the .rel(a).plt.unloaded relocations. They will have
14423 incorrect symbol indexes. */
14424 int num_plts;
14425 unsigned char *p;
14426
14427 num_plts = ((htab->root.splt->size - htab->plt_header_size)
14428 / htab->plt_entry_size);
14429 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14430
14431 for (; num_plts; num_plts--)
14432 {
14433 Elf_Internal_Rela rel;
14434
14435 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14436 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14437 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14438 p += RELOC_SIZE (htab);
14439
14440 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14441 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14442 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14443 p += RELOC_SIZE (htab);
14444 }
14445 }
14446 }
14447
14448 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
14449 /* NaCl uses a special first entry in .iplt too. */
14450 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
14451
14452 /* Fill in the first three entries in the global offset table. */
14453 if (sgot)
14454 {
14455 if (sgot->size > 0)
14456 {
14457 if (sdyn == NULL)
14458 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14459 else
14460 bfd_put_32 (output_bfd,
14461 sdyn->output_section->vma + sdyn->output_offset,
14462 sgot->contents);
14463 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14464 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14465 }
14466
14467 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14468 }
14469
14470 return TRUE;
14471 }
14472
14473 static void
14474 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
14475 {
14476 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
14477 struct elf32_arm_link_hash_table *globals;
14478
14479 i_ehdrp = elf_elfheader (abfd);
14480
14481 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14482 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14483 else
14484 i_ehdrp->e_ident[EI_OSABI] = 0;
14485 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
14486
14487 if (link_info)
14488 {
14489 globals = elf32_arm_hash_table (link_info);
14490 if (globals != NULL && globals->byteswap_code)
14491 i_ehdrp->e_flags |= EF_ARM_BE8;
14492 }
14493
14494 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
14495 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
14496 {
14497 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
14498 if (abi)
14499 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
14500 else
14501 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
14502 }
14503 }
14504
14505 static enum elf_reloc_type_class
14506 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
14507 const asection *rel_sec ATTRIBUTE_UNUSED,
14508 const Elf_Internal_Rela *rela)
14509 {
14510 switch ((int) ELF32_R_TYPE (rela->r_info))
14511 {
14512 case R_ARM_RELATIVE:
14513 return reloc_class_relative;
14514 case R_ARM_JUMP_SLOT:
14515 return reloc_class_plt;
14516 case R_ARM_COPY:
14517 return reloc_class_copy;
14518 default:
14519 return reloc_class_normal;
14520 }
14521 }
14522
14523 static void
14524 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
14525 {
14526 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
14527 }
14528
14529 /* Return TRUE if this is an unwinding table entry. */
14530
14531 static bfd_boolean
14532 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14533 {
14534 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14535 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
14536 }
14537
14538
14539 /* Set the type and flags for an ARM section. We do this by
14540 the section name, which is a hack, but ought to work. */
14541
14542 static bfd_boolean
14543 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14544 {
14545 const char * name;
14546
14547 name = bfd_get_section_name (abfd, sec);
14548
14549 if (is_arm_elf_unwind_section_name (abfd, name))
14550 {
14551 hdr->sh_type = SHT_ARM_EXIDX;
14552 hdr->sh_flags |= SHF_LINK_ORDER;
14553 }
14554 return TRUE;
14555 }
14556
14557 /* Handle an ARM specific section when reading an object file. This is
14558 called when bfd_section_from_shdr finds a section with an unknown
14559 type. */
14560
14561 static bfd_boolean
14562 elf32_arm_section_from_shdr (bfd *abfd,
14563 Elf_Internal_Shdr * hdr,
14564 const char *name,
14565 int shindex)
14566 {
14567 /* There ought to be a place to keep ELF backend specific flags, but
14568 at the moment there isn't one. We just keep track of the
14569 sections by their name, instead. Fortunately, the ABI gives
14570 names for all the ARM specific sections, so we will probably get
14571 away with this. */
14572 switch (hdr->sh_type)
14573 {
14574 case SHT_ARM_EXIDX:
14575 case SHT_ARM_PREEMPTMAP:
14576 case SHT_ARM_ATTRIBUTES:
14577 break;
14578
14579 default:
14580 return FALSE;
14581 }
14582
14583 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
14584 return FALSE;
14585
14586 return TRUE;
14587 }
14588
14589 static _arm_elf_section_data *
14590 get_arm_elf_section_data (asection * sec)
14591 {
14592 if (sec && sec->owner && is_arm_elf (sec->owner))
14593 return elf32_arm_section_data (sec);
14594 else
14595 return NULL;
14596 }
14597
14598 typedef struct
14599 {
14600 void *flaginfo;
14601 struct bfd_link_info *info;
14602 asection *sec;
14603 int sec_shndx;
14604 int (*func) (void *, const char *, Elf_Internal_Sym *,
14605 asection *, struct elf_link_hash_entry *);
14606 } output_arch_syminfo;
14607
14608 enum map_symbol_type
14609 {
14610 ARM_MAP_ARM,
14611 ARM_MAP_THUMB,
14612 ARM_MAP_DATA
14613 };
14614
14615
14616 /* Output a single mapping symbol. */
14617
14618 static bfd_boolean
14619 elf32_arm_output_map_sym (output_arch_syminfo *osi,
14620 enum map_symbol_type type,
14621 bfd_vma offset)
14622 {
14623 static const char *names[3] = {"$a", "$t", "$d"};
14624 Elf_Internal_Sym sym;
14625
14626 sym.st_value = osi->sec->output_section->vma
14627 + osi->sec->output_offset
14628 + offset;
14629 sym.st_size = 0;
14630 sym.st_other = 0;
14631 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
14632 sym.st_shndx = osi->sec_shndx;
14633 sym.st_target_internal = 0;
14634 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
14635 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
14636 }
14637
14638 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14639 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
14640
14641 static bfd_boolean
14642 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14643 bfd_boolean is_iplt_entry_p,
14644 union gotplt_union *root_plt,
14645 struct arm_plt_info *arm_plt)
14646 {
14647 struct elf32_arm_link_hash_table *htab;
14648 bfd_vma addr, plt_header_size;
14649
14650 if (root_plt->offset == (bfd_vma) -1)
14651 return TRUE;
14652
14653 htab = elf32_arm_hash_table (osi->info);
14654 if (htab == NULL)
14655 return FALSE;
14656
14657 if (is_iplt_entry_p)
14658 {
14659 osi->sec = htab->root.iplt;
14660 plt_header_size = 0;
14661 }
14662 else
14663 {
14664 osi->sec = htab->root.splt;
14665 plt_header_size = htab->plt_header_size;
14666 }
14667 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14668 (osi->info->output_bfd, osi->sec->output_section));
14669
14670 addr = root_plt->offset & -2;
14671 if (htab->symbian_p)
14672 {
14673 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14674 return FALSE;
14675 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
14676 return FALSE;
14677 }
14678 else if (htab->vxworks_p)
14679 {
14680 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14681 return FALSE;
14682 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
14683 return FALSE;
14684 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
14685 return FALSE;
14686 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
14687 return FALSE;
14688 }
14689 else if (htab->nacl_p)
14690 {
14691 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14692 return FALSE;
14693 }
14694 else
14695 {
14696 bfd_boolean thumb_stub_p;
14697
14698 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14699 if (thumb_stub_p)
14700 {
14701 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
14702 return FALSE;
14703 }
14704 #ifdef FOUR_WORD_PLT
14705 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14706 return FALSE;
14707 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
14708 return FALSE;
14709 #else
14710 /* A three-word PLT with no Thumb thunk contains only Arm code,
14711 so only need to output a mapping symbol for the first PLT entry and
14712 entries with thumb thunks. */
14713 if (thumb_stub_p || addr == plt_header_size)
14714 {
14715 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14716 return FALSE;
14717 }
14718 #endif
14719 }
14720
14721 return TRUE;
14722 }
14723
14724 /* Output mapping symbols for PLT entries associated with H. */
14725
14726 static bfd_boolean
14727 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14728 {
14729 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14730 struct elf32_arm_link_hash_entry *eh;
14731
14732 if (h->root.type == bfd_link_hash_indirect)
14733 return TRUE;
14734
14735 if (h->root.type == bfd_link_hash_warning)
14736 /* When warning symbols are created, they **replace** the "real"
14737 entry in the hash table, thus we never get to see the real
14738 symbol in a hash traversal. So look at it now. */
14739 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14740
14741 eh = (struct elf32_arm_link_hash_entry *) h;
14742 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14743 &h->plt, &eh->plt);
14744 }
14745
14746 /* Output a single local symbol for a generated stub. */
14747
14748 static bfd_boolean
14749 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14750 bfd_vma offset, bfd_vma size)
14751 {
14752 Elf_Internal_Sym sym;
14753
14754 sym.st_value = osi->sec->output_section->vma
14755 + osi->sec->output_offset
14756 + offset;
14757 sym.st_size = size;
14758 sym.st_other = 0;
14759 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14760 sym.st_shndx = osi->sec_shndx;
14761 sym.st_target_internal = 0;
14762 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
14763 }
14764
14765 static bfd_boolean
14766 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14767 void * in_arg)
14768 {
14769 struct elf32_arm_stub_hash_entry *stub_entry;
14770 asection *stub_sec;
14771 bfd_vma addr;
14772 char *stub_name;
14773 output_arch_syminfo *osi;
14774 const insn_sequence *template_sequence;
14775 enum stub_insn_type prev_type;
14776 int size;
14777 int i;
14778 enum map_symbol_type sym_type;
14779
14780 /* Massage our args to the form they really have. */
14781 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14782 osi = (output_arch_syminfo *) in_arg;
14783
14784 stub_sec = stub_entry->stub_sec;
14785
14786 /* Ensure this stub is attached to the current section being
14787 processed. */
14788 if (stub_sec != osi->sec)
14789 return TRUE;
14790
14791 addr = (bfd_vma) stub_entry->stub_offset;
14792 stub_name = stub_entry->output_name;
14793
14794 template_sequence = stub_entry->stub_template;
14795 switch (template_sequence[0].type)
14796 {
14797 case ARM_TYPE:
14798 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
14799 return FALSE;
14800 break;
14801 case THUMB16_TYPE:
14802 case THUMB32_TYPE:
14803 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14804 stub_entry->stub_size))
14805 return FALSE;
14806 break;
14807 default:
14808 BFD_FAIL ();
14809 return 0;
14810 }
14811
14812 prev_type = DATA_TYPE;
14813 size = 0;
14814 for (i = 0; i < stub_entry->stub_template_size; i++)
14815 {
14816 switch (template_sequence[i].type)
14817 {
14818 case ARM_TYPE:
14819 sym_type = ARM_MAP_ARM;
14820 break;
14821
14822 case THUMB16_TYPE:
14823 case THUMB32_TYPE:
14824 sym_type = ARM_MAP_THUMB;
14825 break;
14826
14827 case DATA_TYPE:
14828 sym_type = ARM_MAP_DATA;
14829 break;
14830
14831 default:
14832 BFD_FAIL ();
14833 return FALSE;
14834 }
14835
14836 if (template_sequence[i].type != prev_type)
14837 {
14838 prev_type = template_sequence[i].type;
14839 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14840 return FALSE;
14841 }
14842
14843 switch (template_sequence[i].type)
14844 {
14845 case ARM_TYPE:
14846 case THUMB32_TYPE:
14847 size += 4;
14848 break;
14849
14850 case THUMB16_TYPE:
14851 size += 2;
14852 break;
14853
14854 case DATA_TYPE:
14855 size += 4;
14856 break;
14857
14858 default:
14859 BFD_FAIL ();
14860 return FALSE;
14861 }
14862 }
14863
14864 return TRUE;
14865 }
14866
14867 /* Output mapping symbols for linker generated sections,
14868 and for those data-only sections that do not have a
14869 $d. */
14870
14871 static bfd_boolean
14872 elf32_arm_output_arch_local_syms (bfd *output_bfd,
14873 struct bfd_link_info *info,
14874 void *flaginfo,
14875 int (*func) (void *, const char *,
14876 Elf_Internal_Sym *,
14877 asection *,
14878 struct elf_link_hash_entry *))
14879 {
14880 output_arch_syminfo osi;
14881 struct elf32_arm_link_hash_table *htab;
14882 bfd_vma offset;
14883 bfd_size_type size;
14884 bfd *input_bfd;
14885
14886 htab = elf32_arm_hash_table (info);
14887 if (htab == NULL)
14888 return FALSE;
14889
14890 check_use_blx (htab);
14891
14892 osi.flaginfo = flaginfo;
14893 osi.info = info;
14894 osi.func = func;
14895
14896 /* Add a $d mapping symbol to data-only sections that
14897 don't have any mapping symbol. This may result in (harmless) redundant
14898 mapping symbols. */
14899 for (input_bfd = info->input_bfds;
14900 input_bfd != NULL;
14901 input_bfd = input_bfd->link_next)
14902 {
14903 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14904 for (osi.sec = input_bfd->sections;
14905 osi.sec != NULL;
14906 osi.sec = osi.sec->next)
14907 {
14908 if (osi.sec->output_section != NULL
14909 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14910 != 0)
14911 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14912 == SEC_HAS_CONTENTS
14913 && get_arm_elf_section_data (osi.sec) != NULL
14914 && get_arm_elf_section_data (osi.sec)->mapcount == 0
14915 && osi.sec->size > 0
14916 && (osi.sec->flags & SEC_EXCLUDE) == 0)
14917 {
14918 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14919 (output_bfd, osi.sec->output_section);
14920 if (osi.sec_shndx != (int)SHN_BAD)
14921 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14922 }
14923 }
14924 }
14925
14926 /* ARM->Thumb glue. */
14927 if (htab->arm_glue_size > 0)
14928 {
14929 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14930 ARM2THUMB_GLUE_SECTION_NAME);
14931
14932 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14933 (output_bfd, osi.sec->output_section);
14934 if (info->shared || htab->root.is_relocatable_executable
14935 || htab->pic_veneer)
14936 size = ARM2THUMB_PIC_GLUE_SIZE;
14937 else if (htab->use_blx)
14938 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14939 else
14940 size = ARM2THUMB_STATIC_GLUE_SIZE;
14941
14942 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14943 {
14944 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14945 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
14946 }
14947 }
14948
14949 /* Thumb->ARM glue. */
14950 if (htab->thumb_glue_size > 0)
14951 {
14952 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14953 THUMB2ARM_GLUE_SECTION_NAME);
14954
14955 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14956 (output_bfd, osi.sec->output_section);
14957 size = THUMB2ARM_GLUE_SIZE;
14958
14959 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14960 {
14961 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14962 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
14963 }
14964 }
14965
14966 /* ARMv4 BX veneers. */
14967 if (htab->bx_glue_size > 0)
14968 {
14969 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14970 ARM_BX_GLUE_SECTION_NAME);
14971
14972 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14973 (output_bfd, osi.sec->output_section);
14974
14975 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
14976 }
14977
14978 /* Long calls stubs. */
14979 if (htab->stub_bfd && htab->stub_bfd->sections)
14980 {
14981 asection* stub_sec;
14982
14983 for (stub_sec = htab->stub_bfd->sections;
14984 stub_sec != NULL;
14985 stub_sec = stub_sec->next)
14986 {
14987 /* Ignore non-stub sections. */
14988 if (!strstr (stub_sec->name, STUB_SUFFIX))
14989 continue;
14990
14991 osi.sec = stub_sec;
14992
14993 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14994 (output_bfd, osi.sec->output_section);
14995
14996 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
14997 }
14998 }
14999
15000 /* Finally, output mapping symbols for the PLT. */
15001 if (htab->root.splt && htab->root.splt->size > 0)
15002 {
15003 osi.sec = htab->root.splt;
15004 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15005 (output_bfd, osi.sec->output_section));
15006
15007 /* Output mapping symbols for the plt header. SymbianOS does not have a
15008 plt header. */
15009 if (htab->vxworks_p)
15010 {
15011 /* VxWorks shared libraries have no PLT header. */
15012 if (!info->shared)
15013 {
15014 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15015 return FALSE;
15016 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15017 return FALSE;
15018 }
15019 }
15020 else if (htab->nacl_p)
15021 {
15022 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15023 return FALSE;
15024 }
15025 else if (!htab->symbian_p)
15026 {
15027 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15028 return FALSE;
15029 #ifndef FOUR_WORD_PLT
15030 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
15031 return FALSE;
15032 #endif
15033 }
15034 }
15035 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
15036 {
15037 /* NaCl uses a special first entry in .iplt too. */
15038 osi.sec = htab->root.iplt;
15039 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15040 (output_bfd, osi.sec->output_section));
15041 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15042 return FALSE;
15043 }
15044 if ((htab->root.splt && htab->root.splt->size > 0)
15045 || (htab->root.iplt && htab->root.iplt->size > 0))
15046 {
15047 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
15048 for (input_bfd = info->input_bfds;
15049 input_bfd != NULL;
15050 input_bfd = input_bfd->link_next)
15051 {
15052 struct arm_local_iplt_info **local_iplt;
15053 unsigned int i, num_syms;
15054
15055 local_iplt = elf32_arm_local_iplt (input_bfd);
15056 if (local_iplt != NULL)
15057 {
15058 num_syms = elf_symtab_hdr (input_bfd).sh_info;
15059 for (i = 0; i < num_syms; i++)
15060 if (local_iplt[i] != NULL
15061 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
15062 &local_iplt[i]->root,
15063 &local_iplt[i]->arm))
15064 return FALSE;
15065 }
15066 }
15067 }
15068 if (htab->dt_tlsdesc_plt != 0)
15069 {
15070 /* Mapping symbols for the lazy tls trampoline. */
15071 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
15072 return FALSE;
15073
15074 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15075 htab->dt_tlsdesc_plt + 24))
15076 return FALSE;
15077 }
15078 if (htab->tls_trampoline != 0)
15079 {
15080 /* Mapping symbols for the tls trampoline. */
15081 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
15082 return FALSE;
15083 #ifdef FOUR_WORD_PLT
15084 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15085 htab->tls_trampoline + 12))
15086 return FALSE;
15087 #endif
15088 }
15089
15090 return TRUE;
15091 }
15092
15093 /* Allocate target specific section data. */
15094
15095 static bfd_boolean
15096 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
15097 {
15098 if (!sec->used_by_bfd)
15099 {
15100 _arm_elf_section_data *sdata;
15101 bfd_size_type amt = sizeof (*sdata);
15102
15103 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
15104 if (sdata == NULL)
15105 return FALSE;
15106 sec->used_by_bfd = sdata;
15107 }
15108
15109 return _bfd_elf_new_section_hook (abfd, sec);
15110 }
15111
15112
15113 /* Used to order a list of mapping symbols by address. */
15114
15115 static int
15116 elf32_arm_compare_mapping (const void * a, const void * b)
15117 {
15118 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
15119 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
15120
15121 if (amap->vma > bmap->vma)
15122 return 1;
15123 else if (amap->vma < bmap->vma)
15124 return -1;
15125 else if (amap->type > bmap->type)
15126 /* Ensure results do not depend on the host qsort for objects with
15127 multiple mapping symbols at the same address by sorting on type
15128 after vma. */
15129 return 1;
15130 else if (amap->type < bmap->type)
15131 return -1;
15132 else
15133 return 0;
15134 }
15135
15136 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15137
15138 static unsigned long
15139 offset_prel31 (unsigned long addr, bfd_vma offset)
15140 {
15141 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15142 }
15143
15144 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15145 relocations. */
15146
15147 static void
15148 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15149 {
15150 unsigned long first_word = bfd_get_32 (output_bfd, from);
15151 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
15152
15153 /* High bit of first word is supposed to be zero. */
15154 if ((first_word & 0x80000000ul) == 0)
15155 first_word = offset_prel31 (first_word, offset);
15156
15157 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15158 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15159 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15160 second_word = offset_prel31 (second_word, offset);
15161
15162 bfd_put_32 (output_bfd, first_word, to);
15163 bfd_put_32 (output_bfd, second_word, to + 4);
15164 }
15165
15166 /* Data for make_branch_to_a8_stub(). */
15167
15168 struct a8_branch_to_stub_data
15169 {
15170 asection *writing_section;
15171 bfd_byte *contents;
15172 };
15173
15174
15175 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
15176 places for a particular section. */
15177
15178 static bfd_boolean
15179 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
15180 void *in_arg)
15181 {
15182 struct elf32_arm_stub_hash_entry *stub_entry;
15183 struct a8_branch_to_stub_data *data;
15184 bfd_byte *contents;
15185 unsigned long branch_insn;
15186 bfd_vma veneered_insn_loc, veneer_entry_loc;
15187 bfd_signed_vma branch_offset;
15188 bfd *abfd;
15189 unsigned int target;
15190
15191 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15192 data = (struct a8_branch_to_stub_data *) in_arg;
15193
15194 if (stub_entry->target_section != data->writing_section
15195 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
15196 return TRUE;
15197
15198 contents = data->contents;
15199
15200 veneered_insn_loc = stub_entry->target_section->output_section->vma
15201 + stub_entry->target_section->output_offset
15202 + stub_entry->target_value;
15203
15204 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15205 + stub_entry->stub_sec->output_offset
15206 + stub_entry->stub_offset;
15207
15208 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15209 veneered_insn_loc &= ~3u;
15210
15211 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15212
15213 abfd = stub_entry->target_section->owner;
15214 target = stub_entry->target_value;
15215
15216 /* We attempt to avoid this condition by setting stubs_always_after_branch
15217 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15218 This check is just to be on the safe side... */
15219 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15220 {
15221 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15222 "allocated in unsafe location"), abfd);
15223 return FALSE;
15224 }
15225
15226 switch (stub_entry->stub_type)
15227 {
15228 case arm_stub_a8_veneer_b:
15229 case arm_stub_a8_veneer_b_cond:
15230 branch_insn = 0xf0009000;
15231 goto jump24;
15232
15233 case arm_stub_a8_veneer_blx:
15234 branch_insn = 0xf000e800;
15235 goto jump24;
15236
15237 case arm_stub_a8_veneer_bl:
15238 {
15239 unsigned int i1, j1, i2, j2, s;
15240
15241 branch_insn = 0xf000d000;
15242
15243 jump24:
15244 if (branch_offset < -16777216 || branch_offset > 16777214)
15245 {
15246 /* There's not much we can do apart from complain if this
15247 happens. */
15248 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15249 "of range (input file too large)"), abfd);
15250 return FALSE;
15251 }
15252
15253 /* i1 = not(j1 eor s), so:
15254 not i1 = j1 eor s
15255 j1 = (not i1) eor s. */
15256
15257 branch_insn |= (branch_offset >> 1) & 0x7ff;
15258 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15259 i2 = (branch_offset >> 22) & 1;
15260 i1 = (branch_offset >> 23) & 1;
15261 s = (branch_offset >> 24) & 1;
15262 j1 = (!i1) ^ s;
15263 j2 = (!i2) ^ s;
15264 branch_insn |= j2 << 11;
15265 branch_insn |= j1 << 13;
15266 branch_insn |= s << 26;
15267 }
15268 break;
15269
15270 default:
15271 BFD_FAIL ();
15272 return FALSE;
15273 }
15274
15275 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15276 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
15277
15278 return TRUE;
15279 }
15280
15281 /* Do code byteswapping. Return FALSE afterwards so that the section is
15282 written out as normal. */
15283
15284 static bfd_boolean
15285 elf32_arm_write_section (bfd *output_bfd,
15286 struct bfd_link_info *link_info,
15287 asection *sec,
15288 bfd_byte *contents)
15289 {
15290 unsigned int mapcount, errcount;
15291 _arm_elf_section_data *arm_data;
15292 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
15293 elf32_arm_section_map *map;
15294 elf32_vfp11_erratum_list *errnode;
15295 bfd_vma ptr;
15296 bfd_vma end;
15297 bfd_vma offset = sec->output_section->vma + sec->output_offset;
15298 bfd_byte tmp;
15299 unsigned int i;
15300
15301 if (globals == NULL)
15302 return FALSE;
15303
15304 /* If this section has not been allocated an _arm_elf_section_data
15305 structure then we cannot record anything. */
15306 arm_data = get_arm_elf_section_data (sec);
15307 if (arm_data == NULL)
15308 return FALSE;
15309
15310 mapcount = arm_data->mapcount;
15311 map = arm_data->map;
15312 errcount = arm_data->erratumcount;
15313
15314 if (errcount != 0)
15315 {
15316 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15317
15318 for (errnode = arm_data->erratumlist; errnode != 0;
15319 errnode = errnode->next)
15320 {
15321 bfd_vma target = errnode->vma - offset;
15322
15323 switch (errnode->type)
15324 {
15325 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15326 {
15327 bfd_vma branch_to_veneer;
15328 /* Original condition code of instruction, plus bit mask for
15329 ARM B instruction. */
15330 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15331 | 0x0a000000;
15332
15333 /* The instruction is before the label. */
15334 target -= 4;
15335
15336 /* Above offset included in -4 below. */
15337 branch_to_veneer = errnode->u.b.veneer->vma
15338 - errnode->vma - 4;
15339
15340 if ((signed) branch_to_veneer < -(1 << 25)
15341 || (signed) branch_to_veneer >= (1 << 25))
15342 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15343 "range"), output_bfd);
15344
15345 insn |= (branch_to_veneer >> 2) & 0xffffff;
15346 contents[endianflip ^ target] = insn & 0xff;
15347 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15348 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15349 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15350 }
15351 break;
15352
15353 case VFP11_ERRATUM_ARM_VENEER:
15354 {
15355 bfd_vma branch_from_veneer;
15356 unsigned int insn;
15357
15358 /* Take size of veneer into account. */
15359 branch_from_veneer = errnode->u.v.branch->vma
15360 - errnode->vma - 12;
15361
15362 if ((signed) branch_from_veneer < -(1 << 25)
15363 || (signed) branch_from_veneer >= (1 << 25))
15364 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15365 "range"), output_bfd);
15366
15367 /* Original instruction. */
15368 insn = errnode->u.v.branch->u.b.vfp_insn;
15369 contents[endianflip ^ target] = insn & 0xff;
15370 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15371 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15372 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15373
15374 /* Branch back to insn after original insn. */
15375 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15376 contents[endianflip ^ (target + 4)] = insn & 0xff;
15377 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15378 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15379 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15380 }
15381 break;
15382
15383 default:
15384 abort ();
15385 }
15386 }
15387 }
15388
15389 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15390 {
15391 arm_unwind_table_edit *edit_node
15392 = arm_data->u.exidx.unwind_edit_list;
15393 /* Now, sec->size is the size of the section we will write. The original
15394 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15395 markers) was sec->rawsize. (This isn't the case if we perform no
15396 edits, then rawsize will be zero and we should use size). */
15397 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
15398 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15399 unsigned int in_index, out_index;
15400 bfd_vma add_to_offsets = 0;
15401
15402 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15403 {
15404 if (edit_node)
15405 {
15406 unsigned int edit_index = edit_node->index;
15407
15408 if (in_index < edit_index && in_index * 8 < input_size)
15409 {
15410 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15411 contents + in_index * 8, add_to_offsets);
15412 out_index++;
15413 in_index++;
15414 }
15415 else if (in_index == edit_index
15416 || (in_index * 8 >= input_size
15417 && edit_index == UINT_MAX))
15418 {
15419 switch (edit_node->type)
15420 {
15421 case DELETE_EXIDX_ENTRY:
15422 in_index++;
15423 add_to_offsets += 8;
15424 break;
15425
15426 case INSERT_EXIDX_CANTUNWIND_AT_END:
15427 {
15428 asection *text_sec = edit_node->linked_section;
15429 bfd_vma text_offset = text_sec->output_section->vma
15430 + text_sec->output_offset
15431 + text_sec->size;
15432 bfd_vma exidx_offset = offset + out_index * 8;
15433 unsigned long prel31_offset;
15434
15435 /* Note: this is meant to be equivalent to an
15436 R_ARM_PREL31 relocation. These synthetic
15437 EXIDX_CANTUNWIND markers are not relocated by the
15438 usual BFD method. */
15439 prel31_offset = (text_offset - exidx_offset)
15440 & 0x7ffffffful;
15441
15442 /* First address we can't unwind. */
15443 bfd_put_32 (output_bfd, prel31_offset,
15444 &edited_contents[out_index * 8]);
15445
15446 /* Code for EXIDX_CANTUNWIND. */
15447 bfd_put_32 (output_bfd, 0x1,
15448 &edited_contents[out_index * 8 + 4]);
15449
15450 out_index++;
15451 add_to_offsets -= 8;
15452 }
15453 break;
15454 }
15455
15456 edit_node = edit_node->next;
15457 }
15458 }
15459 else
15460 {
15461 /* No more edits, copy remaining entries verbatim. */
15462 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15463 contents + in_index * 8, add_to_offsets);
15464 out_index++;
15465 in_index++;
15466 }
15467 }
15468
15469 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15470 bfd_set_section_contents (output_bfd, sec->output_section,
15471 edited_contents,
15472 (file_ptr) sec->output_offset, sec->size);
15473
15474 return TRUE;
15475 }
15476
15477 /* Fix code to point to Cortex-A8 erratum stubs. */
15478 if (globals->fix_cortex_a8)
15479 {
15480 struct a8_branch_to_stub_data data;
15481
15482 data.writing_section = sec;
15483 data.contents = contents;
15484
15485 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15486 &data);
15487 }
15488
15489 if (mapcount == 0)
15490 return FALSE;
15491
15492 if (globals->byteswap_code)
15493 {
15494 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
15495
15496 ptr = map[0].vma;
15497 for (i = 0; i < mapcount; i++)
15498 {
15499 if (i == mapcount - 1)
15500 end = sec->size;
15501 else
15502 end = map[i + 1].vma;
15503
15504 switch (map[i].type)
15505 {
15506 case 'a':
15507 /* Byte swap code words. */
15508 while (ptr + 3 < end)
15509 {
15510 tmp = contents[ptr];
15511 contents[ptr] = contents[ptr + 3];
15512 contents[ptr + 3] = tmp;
15513 tmp = contents[ptr + 1];
15514 contents[ptr + 1] = contents[ptr + 2];
15515 contents[ptr + 2] = tmp;
15516 ptr += 4;
15517 }
15518 break;
15519
15520 case 't':
15521 /* Byte swap code halfwords. */
15522 while (ptr + 1 < end)
15523 {
15524 tmp = contents[ptr];
15525 contents[ptr] = contents[ptr + 1];
15526 contents[ptr + 1] = tmp;
15527 ptr += 2;
15528 }
15529 break;
15530
15531 case 'd':
15532 /* Leave data alone. */
15533 break;
15534 }
15535 ptr = end;
15536 }
15537 }
15538
15539 free (map);
15540 arm_data->mapcount = -1;
15541 arm_data->mapsize = 0;
15542 arm_data->map = NULL;
15543
15544 return FALSE;
15545 }
15546
15547 /* Mangle thumb function symbols as we read them in. */
15548
15549 static bfd_boolean
15550 elf32_arm_swap_symbol_in (bfd * abfd,
15551 const void *psrc,
15552 const void *pshn,
15553 Elf_Internal_Sym *dst)
15554 {
15555 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15556 return FALSE;
15557
15558 /* New EABI objects mark thumb function symbols by setting the low bit of
15559 the address. */
15560 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15561 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
15562 {
15563 if (dst->st_value & 1)
15564 {
15565 dst->st_value &= ~(bfd_vma) 1;
15566 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15567 }
15568 else
15569 dst->st_target_internal = ST_BRANCH_TO_ARM;
15570 }
15571 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15572 {
15573 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15574 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15575 }
15576 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15577 dst->st_target_internal = ST_BRANCH_LONG;
15578 else
15579 dst->st_target_internal = ST_BRANCH_UNKNOWN;
15580
15581 return TRUE;
15582 }
15583
15584
15585 /* Mangle thumb function symbols as we write them out. */
15586
15587 static void
15588 elf32_arm_swap_symbol_out (bfd *abfd,
15589 const Elf_Internal_Sym *src,
15590 void *cdst,
15591 void *shndx)
15592 {
15593 Elf_Internal_Sym newsym;
15594
15595 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15596 of the address set, as per the new EABI. We do this unconditionally
15597 because objcopy does not set the elf header flags until after
15598 it writes out the symbol table. */
15599 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
15600 {
15601 newsym = *src;
15602 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15603 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
15604 if (newsym.st_shndx != SHN_UNDEF)
15605 {
15606 /* Do this only for defined symbols. At link type, the static
15607 linker will simulate the work of dynamic linker of resolving
15608 symbols and will carry over the thumbness of found symbols to
15609 the output symbol table. It's not clear how it happens, but
15610 the thumbness of undefined symbols can well be different at
15611 runtime, and writing '1' for them will be confusing for users
15612 and possibly for dynamic linker itself.
15613 */
15614 newsym.st_value |= 1;
15615 }
15616
15617 src = &newsym;
15618 }
15619 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15620 }
15621
15622 /* Add the PT_ARM_EXIDX program header. */
15623
15624 static bfd_boolean
15625 elf32_arm_modify_segment_map (bfd *abfd,
15626 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15627 {
15628 struct elf_segment_map *m;
15629 asection *sec;
15630
15631 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15632 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15633 {
15634 /* If there is already a PT_ARM_EXIDX header, then we do not
15635 want to add another one. This situation arises when running
15636 "strip"; the input binary already has the header. */
15637 m = elf_seg_map (abfd);
15638 while (m && m->p_type != PT_ARM_EXIDX)
15639 m = m->next;
15640 if (!m)
15641 {
15642 m = (struct elf_segment_map *)
15643 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
15644 if (m == NULL)
15645 return FALSE;
15646 m->p_type = PT_ARM_EXIDX;
15647 m->count = 1;
15648 m->sections[0] = sec;
15649
15650 m->next = elf_seg_map (abfd);
15651 elf_seg_map (abfd) = m;
15652 }
15653 }
15654
15655 return TRUE;
15656 }
15657
15658 /* We may add a PT_ARM_EXIDX program header. */
15659
15660 static int
15661 elf32_arm_additional_program_headers (bfd *abfd,
15662 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15663 {
15664 asection *sec;
15665
15666 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15667 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15668 return 1;
15669 else
15670 return 0;
15671 }
15672
15673 /* Hook called by the linker routine which adds symbols from an object
15674 file. */
15675
15676 static bfd_boolean
15677 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15678 Elf_Internal_Sym *sym, const char **namep,
15679 flagword *flagsp, asection **secp, bfd_vma *valp)
15680 {
15681 if ((abfd->flags & DYNAMIC) == 0
15682 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15683 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15684 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
15685
15686 if (elf32_arm_hash_table (info)->vxworks_p
15687 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15688 flagsp, secp, valp))
15689 return FALSE;
15690
15691 return TRUE;
15692 }
15693
15694 /* We use this to override swap_symbol_in and swap_symbol_out. */
15695 const struct elf_size_info elf32_arm_size_info =
15696 {
15697 sizeof (Elf32_External_Ehdr),
15698 sizeof (Elf32_External_Phdr),
15699 sizeof (Elf32_External_Shdr),
15700 sizeof (Elf32_External_Rel),
15701 sizeof (Elf32_External_Rela),
15702 sizeof (Elf32_External_Sym),
15703 sizeof (Elf32_External_Dyn),
15704 sizeof (Elf_External_Note),
15705 4,
15706 1,
15707 32, 2,
15708 ELFCLASS32, EV_CURRENT,
15709 bfd_elf32_write_out_phdrs,
15710 bfd_elf32_write_shdrs_and_ehdr,
15711 bfd_elf32_checksum_contents,
15712 bfd_elf32_write_relocs,
15713 elf32_arm_swap_symbol_in,
15714 elf32_arm_swap_symbol_out,
15715 bfd_elf32_slurp_reloc_table,
15716 bfd_elf32_slurp_symbol_table,
15717 bfd_elf32_swap_dyn_in,
15718 bfd_elf32_swap_dyn_out,
15719 bfd_elf32_swap_reloc_in,
15720 bfd_elf32_swap_reloc_out,
15721 bfd_elf32_swap_reloca_in,
15722 bfd_elf32_swap_reloca_out
15723 };
15724
15725 #define ELF_ARCH bfd_arch_arm
15726 #define ELF_TARGET_ID ARM_ELF_DATA
15727 #define ELF_MACHINE_CODE EM_ARM
15728 #ifdef __QNXTARGET__
15729 #define ELF_MAXPAGESIZE 0x1000
15730 #else
15731 #define ELF_MAXPAGESIZE 0x8000
15732 #endif
15733 #define ELF_MINPAGESIZE 0x1000
15734 #define ELF_COMMONPAGESIZE 0x1000
15735
15736 #define bfd_elf32_mkobject elf32_arm_mkobject
15737
15738 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15739 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
15740 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15741 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15742 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
15743 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
15744 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
15745 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
15746 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
15747 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
15748 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
15749 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
15750 #define bfd_elf32_bfd_final_link elf32_arm_final_link
15751
15752 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15753 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
15754 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
15755 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15756 #define elf_backend_check_relocs elf32_arm_check_relocs
15757 #define elf_backend_relocate_section elf32_arm_relocate_section
15758 #define elf_backend_write_section elf32_arm_write_section
15759 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
15760 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
15761 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15762 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15763 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
15764 #define elf_backend_always_size_sections elf32_arm_always_size_sections
15765 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
15766 #define elf_backend_post_process_headers elf32_arm_post_process_headers
15767 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
15768 #define elf_backend_object_p elf32_arm_object_p
15769 #define elf_backend_fake_sections elf32_arm_fake_sections
15770 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
15771 #define elf_backend_final_write_processing elf32_arm_final_write_processing
15772 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
15773 #define elf_backend_size_info elf32_arm_size_info
15774 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15775 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15776 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15777 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
15778 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
15779
15780 #define elf_backend_can_refcount 1
15781 #define elf_backend_can_gc_sections 1
15782 #define elf_backend_plt_readonly 1
15783 #define elf_backend_want_got_plt 1
15784 #define elf_backend_want_plt_sym 0
15785 #define elf_backend_may_use_rel_p 1
15786 #define elf_backend_may_use_rela_p 0
15787 #define elf_backend_default_use_rela_p 0
15788
15789 #define elf_backend_got_header_size 12
15790
15791 #undef elf_backend_obj_attrs_vendor
15792 #define elf_backend_obj_attrs_vendor "aeabi"
15793 #undef elf_backend_obj_attrs_section
15794 #define elf_backend_obj_attrs_section ".ARM.attributes"
15795 #undef elf_backend_obj_attrs_arg_type
15796 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15797 #undef elf_backend_obj_attrs_section_type
15798 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
15799 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15800 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
15801
15802 #include "elf32-target.h"
15803
15804 /* Native Client targets. */
15805
15806 #undef TARGET_LITTLE_SYM
15807 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
15808 #undef TARGET_LITTLE_NAME
15809 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
15810 #undef TARGET_BIG_SYM
15811 #define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
15812 #undef TARGET_BIG_NAME
15813 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
15814
15815 /* Like elf32_arm_link_hash_table_create -- but overrides
15816 appropriately for NaCl. */
15817
15818 static struct bfd_link_hash_table *
15819 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
15820 {
15821 struct bfd_link_hash_table *ret;
15822
15823 ret = elf32_arm_link_hash_table_create (abfd);
15824 if (ret)
15825 {
15826 struct elf32_arm_link_hash_table *htab
15827 = (struct elf32_arm_link_hash_table *) ret;
15828
15829 htab->nacl_p = 1;
15830
15831 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
15832 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
15833 }
15834 return ret;
15835 }
15836
15837 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
15838 really need to use elf32_arm_modify_segment_map. But we do it
15839 anyway just to reduce gratuitous differences with the stock ARM backend. */
15840
15841 static bfd_boolean
15842 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
15843 {
15844 return (elf32_arm_modify_segment_map (abfd, info)
15845 && nacl_modify_segment_map (abfd, info));
15846 }
15847
15848 #undef elf32_bed
15849 #define elf32_bed elf32_arm_nacl_bed
15850 #undef bfd_elf32_bfd_link_hash_table_create
15851 #define bfd_elf32_bfd_link_hash_table_create \
15852 elf32_arm_nacl_link_hash_table_create
15853 #undef elf_backend_plt_alignment
15854 #define elf_backend_plt_alignment 4
15855 #undef elf_backend_modify_segment_map
15856 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
15857 #undef elf_backend_modify_program_headers
15858 #define elf_backend_modify_program_headers nacl_modify_program_headers
15859
15860 #undef ELF_MAXPAGESIZE
15861 #define ELF_MAXPAGESIZE 0x10000
15862
15863 #include "elf32-target.h"
15864
15865 /* Reset to defaults. */
15866 #undef elf_backend_plt_alignment
15867 #undef elf_backend_modify_segment_map
15868 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15869 #undef elf_backend_modify_program_headers
15870
15871 /* VxWorks Targets. */
15872
15873 #undef TARGET_LITTLE_SYM
15874 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
15875 #undef TARGET_LITTLE_NAME
15876 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
15877 #undef TARGET_BIG_SYM
15878 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
15879 #undef TARGET_BIG_NAME
15880 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15881
15882 /* Like elf32_arm_link_hash_table_create -- but overrides
15883 appropriately for VxWorks. */
15884
15885 static struct bfd_link_hash_table *
15886 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15887 {
15888 struct bfd_link_hash_table *ret;
15889
15890 ret = elf32_arm_link_hash_table_create (abfd);
15891 if (ret)
15892 {
15893 struct elf32_arm_link_hash_table *htab
15894 = (struct elf32_arm_link_hash_table *) ret;
15895 htab->use_rel = 0;
15896 htab->vxworks_p = 1;
15897 }
15898 return ret;
15899 }
15900
15901 static void
15902 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15903 {
15904 elf32_arm_final_write_processing (abfd, linker);
15905 elf_vxworks_final_write_processing (abfd, linker);
15906 }
15907
15908 #undef elf32_bed
15909 #define elf32_bed elf32_arm_vxworks_bed
15910
15911 #undef bfd_elf32_bfd_link_hash_table_create
15912 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
15913 #undef elf_backend_final_write_processing
15914 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15915 #undef elf_backend_emit_relocs
15916 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
15917
15918 #undef elf_backend_may_use_rel_p
15919 #define elf_backend_may_use_rel_p 0
15920 #undef elf_backend_may_use_rela_p
15921 #define elf_backend_may_use_rela_p 1
15922 #undef elf_backend_default_use_rela_p
15923 #define elf_backend_default_use_rela_p 1
15924 #undef elf_backend_want_plt_sym
15925 #define elf_backend_want_plt_sym 1
15926 #undef ELF_MAXPAGESIZE
15927 #define ELF_MAXPAGESIZE 0x1000
15928
15929 #include "elf32-target.h"
15930
15931
15932 /* Merge backend specific data from an object file to the output
15933 object file when linking. */
15934
15935 static bfd_boolean
15936 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15937 {
15938 flagword out_flags;
15939 flagword in_flags;
15940 bfd_boolean flags_compatible = TRUE;
15941 asection *sec;
15942
15943 /* Check if we have the same endianness. */
15944 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15945 return FALSE;
15946
15947 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15948 return TRUE;
15949
15950 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15951 return FALSE;
15952
15953 /* The input BFD must have had its flags initialised. */
15954 /* The following seems bogus to me -- The flags are initialized in
15955 the assembler but I don't think an elf_flags_init field is
15956 written into the object. */
15957 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15958
15959 in_flags = elf_elfheader (ibfd)->e_flags;
15960 out_flags = elf_elfheader (obfd)->e_flags;
15961
15962 /* In theory there is no reason why we couldn't handle this. However
15963 in practice it isn't even close to working and there is no real
15964 reason to want it. */
15965 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15966 && !(ibfd->flags & DYNAMIC)
15967 && (in_flags & EF_ARM_BE8))
15968 {
15969 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15970 ibfd);
15971 return FALSE;
15972 }
15973
15974 if (!elf_flags_init (obfd))
15975 {
15976 /* If the input is the default architecture and had the default
15977 flags then do not bother setting the flags for the output
15978 architecture, instead allow future merges to do this. If no
15979 future merges ever set these flags then they will retain their
15980 uninitialised values, which surprise surprise, correspond
15981 to the default values. */
15982 if (bfd_get_arch_info (ibfd)->the_default
15983 && elf_elfheader (ibfd)->e_flags == 0)
15984 return TRUE;
15985
15986 elf_flags_init (obfd) = TRUE;
15987 elf_elfheader (obfd)->e_flags = in_flags;
15988
15989 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
15990 && bfd_get_arch_info (obfd)->the_default)
15991 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
15992
15993 return TRUE;
15994 }
15995
15996 /* Determine what should happen if the input ARM architecture
15997 does not match the output ARM architecture. */
15998 if (! bfd_arm_merge_machines (ibfd, obfd))
15999 return FALSE;
16000
16001 /* Identical flags must be compatible. */
16002 if (in_flags == out_flags)
16003 return TRUE;
16004
16005 /* Check to see if the input BFD actually contains any sections. If
16006 not, its flags may not have been initialised either, but it
16007 cannot actually cause any incompatiblity. Do not short-circuit
16008 dynamic objects; their section list may be emptied by
16009 elf_link_add_object_symbols.
16010
16011 Also check to see if there are no code sections in the input.
16012 In this case there is no need to check for code specific flags.
16013 XXX - do we need to worry about floating-point format compatability
16014 in data sections ? */
16015 if (!(ibfd->flags & DYNAMIC))
16016 {
16017 bfd_boolean null_input_bfd = TRUE;
16018 bfd_boolean only_data_sections = TRUE;
16019
16020 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
16021 {
16022 /* Ignore synthetic glue sections. */
16023 if (strcmp (sec->name, ".glue_7")
16024 && strcmp (sec->name, ".glue_7t"))
16025 {
16026 if ((bfd_get_section_flags (ibfd, sec)
16027 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16028 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16029 only_data_sections = FALSE;
16030
16031 null_input_bfd = FALSE;
16032 break;
16033 }
16034 }
16035
16036 if (null_input_bfd || only_data_sections)
16037 return TRUE;
16038 }
16039
16040 /* Complain about various flag mismatches. */
16041 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
16042 EF_ARM_EABI_VERSION (out_flags)))
16043 {
16044 _bfd_error_handler
16045 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
16046 ibfd, obfd,
16047 (in_flags & EF_ARM_EABIMASK) >> 24,
16048 (out_flags & EF_ARM_EABIMASK) >> 24);
16049 return FALSE;
16050 }
16051
16052 /* Not sure what needs to be checked for EABI versions >= 1. */
16053 /* VxWorks libraries do not use these flags. */
16054 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
16055 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
16056 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
16057 {
16058 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
16059 {
16060 _bfd_error_handler
16061 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
16062 ibfd, obfd,
16063 in_flags & EF_ARM_APCS_26 ? 26 : 32,
16064 out_flags & EF_ARM_APCS_26 ? 26 : 32);
16065 flags_compatible = FALSE;
16066 }
16067
16068 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
16069 {
16070 if (in_flags & EF_ARM_APCS_FLOAT)
16071 _bfd_error_handler
16072 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
16073 ibfd, obfd);
16074 else
16075 _bfd_error_handler
16076 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
16077 ibfd, obfd);
16078
16079 flags_compatible = FALSE;
16080 }
16081
16082 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
16083 {
16084 if (in_flags & EF_ARM_VFP_FLOAT)
16085 _bfd_error_handler
16086 (_("error: %B uses VFP instructions, whereas %B does not"),
16087 ibfd, obfd);
16088 else
16089 _bfd_error_handler
16090 (_("error: %B uses FPA instructions, whereas %B does not"),
16091 ibfd, obfd);
16092
16093 flags_compatible = FALSE;
16094 }
16095
16096 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
16097 {
16098 if (in_flags & EF_ARM_MAVERICK_FLOAT)
16099 _bfd_error_handler
16100 (_("error: %B uses Maverick instructions, whereas %B does not"),
16101 ibfd, obfd);
16102 else
16103 _bfd_error_handler
16104 (_("error: %B does not use Maverick instructions, whereas %B does"),
16105 ibfd, obfd);
16106
16107 flags_compatible = FALSE;
16108 }
16109
16110 #ifdef EF_ARM_SOFT_FLOAT
16111 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
16112 {
16113 /* We can allow interworking between code that is VFP format
16114 layout, and uses either soft float or integer regs for
16115 passing floating point arguments and results. We already
16116 know that the APCS_FLOAT flags match; similarly for VFP
16117 flags. */
16118 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
16119 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
16120 {
16121 if (in_flags & EF_ARM_SOFT_FLOAT)
16122 _bfd_error_handler
16123 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16124 ibfd, obfd);
16125 else
16126 _bfd_error_handler
16127 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16128 ibfd, obfd);
16129
16130 flags_compatible = FALSE;
16131 }
16132 }
16133 #endif
16134
16135 /* Interworking mismatch is only a warning. */
16136 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16137 {
16138 if (in_flags & EF_ARM_INTERWORK)
16139 {
16140 _bfd_error_handler
16141 (_("Warning: %B supports interworking, whereas %B does not"),
16142 ibfd, obfd);
16143 }
16144 else
16145 {
16146 _bfd_error_handler
16147 (_("Warning: %B does not support interworking, whereas %B does"),
16148 ibfd, obfd);
16149 }
16150 }
16151 }
16152
16153 return flags_compatible;
16154 }
16155
16156
16157 /* Symbian OS Targets. */
16158
16159 #undef TARGET_LITTLE_SYM
16160 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
16161 #undef TARGET_LITTLE_NAME
16162 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
16163 #undef TARGET_BIG_SYM
16164 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
16165 #undef TARGET_BIG_NAME
16166 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
16167
16168 /* Like elf32_arm_link_hash_table_create -- but overrides
16169 appropriately for Symbian OS. */
16170
16171 static struct bfd_link_hash_table *
16172 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16173 {
16174 struct bfd_link_hash_table *ret;
16175
16176 ret = elf32_arm_link_hash_table_create (abfd);
16177 if (ret)
16178 {
16179 struct elf32_arm_link_hash_table *htab
16180 = (struct elf32_arm_link_hash_table *)ret;
16181 /* There is no PLT header for Symbian OS. */
16182 htab->plt_header_size = 0;
16183 /* The PLT entries are each one instruction and one word. */
16184 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
16185 htab->symbian_p = 1;
16186 /* Symbian uses armv5t or above, so use_blx is always true. */
16187 htab->use_blx = 1;
16188 htab->root.is_relocatable_executable = 1;
16189 }
16190 return ret;
16191 }
16192
16193 static const struct bfd_elf_special_section
16194 elf32_arm_symbian_special_sections[] =
16195 {
16196 /* In a BPABI executable, the dynamic linking sections do not go in
16197 the loadable read-only segment. The post-linker may wish to
16198 refer to these sections, but they are not part of the final
16199 program image. */
16200 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16201 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16202 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16203 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16204 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
16205 /* These sections do not need to be writable as the SymbianOS
16206 postlinker will arrange things so that no dynamic relocation is
16207 required. */
16208 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16209 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16210 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16211 { NULL, 0, 0, 0, 0 }
16212 };
16213
16214 static void
16215 elf32_arm_symbian_begin_write_processing (bfd *abfd,
16216 struct bfd_link_info *link_info)
16217 {
16218 /* BPABI objects are never loaded directly by an OS kernel; they are
16219 processed by a postlinker first, into an OS-specific format. If
16220 the D_PAGED bit is set on the file, BFD will align segments on
16221 page boundaries, so that an OS can directly map the file. With
16222 BPABI objects, that just results in wasted space. In addition,
16223 because we clear the D_PAGED bit, map_sections_to_segments will
16224 recognize that the program headers should not be mapped into any
16225 loadable segment. */
16226 abfd->flags &= ~D_PAGED;
16227 elf32_arm_begin_write_processing (abfd, link_info);
16228 }
16229
16230 static bfd_boolean
16231 elf32_arm_symbian_modify_segment_map (bfd *abfd,
16232 struct bfd_link_info *info)
16233 {
16234 struct elf_segment_map *m;
16235 asection *dynsec;
16236
16237 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16238 segment. However, because the .dynamic section is not marked
16239 with SEC_LOAD, the generic ELF code will not create such a
16240 segment. */
16241 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16242 if (dynsec)
16243 {
16244 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16245 if (m->p_type == PT_DYNAMIC)
16246 break;
16247
16248 if (m == NULL)
16249 {
16250 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
16251 m->next = elf_seg_map (abfd);
16252 elf_seg_map (abfd) = m;
16253 }
16254 }
16255
16256 /* Also call the generic arm routine. */
16257 return elf32_arm_modify_segment_map (abfd, info);
16258 }
16259
16260 /* Return address for Ith PLT stub in section PLT, for relocation REL
16261 or (bfd_vma) -1 if it should not be included. */
16262
16263 static bfd_vma
16264 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16265 const arelent *rel ATTRIBUTE_UNUSED)
16266 {
16267 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16268 }
16269
16270
16271 #undef elf32_bed
16272 #define elf32_bed elf32_arm_symbian_bed
16273
16274 /* The dynamic sections are not allocated on SymbianOS; the postlinker
16275 will process them and then discard them. */
16276 #undef ELF_DYNAMIC_SEC_FLAGS
16277 #define ELF_DYNAMIC_SEC_FLAGS \
16278 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16279
16280 #undef elf_backend_emit_relocs
16281
16282 #undef bfd_elf32_bfd_link_hash_table_create
16283 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16284 #undef elf_backend_special_sections
16285 #define elf_backend_special_sections elf32_arm_symbian_special_sections
16286 #undef elf_backend_begin_write_processing
16287 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16288 #undef elf_backend_final_write_processing
16289 #define elf_backend_final_write_processing elf32_arm_final_write_processing
16290
16291 #undef elf_backend_modify_segment_map
16292 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16293
16294 /* There is no .got section for BPABI objects, and hence no header. */
16295 #undef elf_backend_got_header_size
16296 #define elf_backend_got_header_size 0
16297
16298 /* Similarly, there is no .got.plt section. */
16299 #undef elf_backend_want_got_plt
16300 #define elf_backend_want_got_plt 0
16301
16302 #undef elf_backend_plt_sym_val
16303 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16304
16305 #undef elf_backend_may_use_rel_p
16306 #define elf_backend_may_use_rel_p 1
16307 #undef elf_backend_may_use_rela_p
16308 #define elf_backend_may_use_rela_p 0
16309 #undef elf_backend_default_use_rela_p
16310 #define elf_backend_default_use_rela_p 0
16311 #undef elf_backend_want_plt_sym
16312 #define elf_backend_want_plt_sym 0
16313 #undef ELF_MAXPAGESIZE
16314 #define ELF_MAXPAGESIZE 0x8000
16315
16316 #include "elf32-target.h"