NDS32/BFD: Correct an aliasing error in `nds32_elf_check_relocs'
[binutils-gdb.git] / bfd / elf32-nds32.c
1 /* NDS32-specific support for 32-bit ELF.
2 Copyright (C) 2012-2016 Free Software Foundation, Inc.
3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22
23 #include "sysdep.h"
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "bfdlink.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "libiberty.h"
30 #include "bfd_stdint.h"
31 #include "elf/nds32.h"
32 #include "opcode/nds32.h"
33 #include "elf32-nds32.h"
34 #include "opcode/cgen.h"
35 #include "../opcodes/nds32-opc.h"
36
37 /* Relocation HOWTO functions. */
38 static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40 static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42 static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45 static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48 static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51 static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55 /* Helper functions for HOWTO. */
56 static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
59 static void nds32_elf_relocate_hi20
60 (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
61 static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup
62 (enum elf_nds32_reloc_type);
63 static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
64 (bfd *, bfd_reloc_code_real_type);
65
66 /* Target hooks. */
67 static void nds32_info_to_howto_rel
68 (bfd *, arelent *, Elf_Internal_Rela *dst);
69 static void nds32_info_to_howto
70 (bfd *, arelent *, Elf_Internal_Rela *dst);
71 static bfd_boolean nds32_elf_add_symbol_hook
72 (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
73 flagword *, asection **, bfd_vma *);
74 static bfd_boolean nds32_elf_relocate_section
75 (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
76 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
77 static bfd_boolean nds32_elf_object_p (bfd *);
78 static void nds32_elf_final_write_processing (bfd *, bfd_boolean);
79 static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword);
80 static bfd_boolean nds32_elf_merge_private_bfd_data
81 (bfd *, struct bfd_link_info *);
82 static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *);
83 static bfd_boolean nds32_elf_gc_sweep_hook
84 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
85 static bfd_boolean nds32_elf_check_relocs
86 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
87 static asection *nds32_elf_gc_mark_hook
88 (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
89 struct elf_link_hash_entry *, Elf_Internal_Sym *);
90 static bfd_boolean nds32_elf_adjust_dynamic_symbol
91 (struct bfd_link_info *, struct elf_link_hash_entry *);
92 static bfd_boolean nds32_elf_size_dynamic_sections
93 (bfd *, struct bfd_link_info *);
94 static bfd_boolean nds32_elf_create_dynamic_sections
95 (bfd *, struct bfd_link_info *);
96 static bfd_boolean nds32_elf_finish_dynamic_sections
97 (bfd *, struct bfd_link_info *info);
98 static bfd_boolean nds32_elf_finish_dynamic_symbol
99 (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
100 Elf_Internal_Sym *);
101 static bfd_boolean nds32_elf_mkobject (bfd *);
102
103 /* Nds32 helper functions. */
104 static bfd_reloc_status_type nds32_elf_final_sda_base
105 (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean);
106 static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *);
107 static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *);
108 static Elf_Internal_Rela *find_relocs_at_address
109 (Elf_Internal_Rela *, Elf_Internal_Rela *,
110 Elf_Internal_Rela *, enum elf_nds32_reloc_type);
111 static bfd_vma calculate_memory_address
112 (bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
113 static int nds32_get_section_contents (bfd *, asection *,
114 bfd_byte **, bfd_boolean);
115 static bfd_boolean nds32_elf_ex9_build_hash_table
116 (bfd *, asection *, struct bfd_link_info *);
117 static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
118 static void nds32_elf_ex9_import_table (struct bfd_link_info *);
119 static void nds32_elf_ex9_finish (struct bfd_link_info *);
120 static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
121 static void nds32_elf_get_insn_with_reg
122 (Elf_Internal_Rela *, uint32_t, uint32_t *);
123 static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
124 Elf_Internal_Sym **);
125 static bfd_boolean nds32_elf_ex9_replace_instruction
126 (struct bfd_link_info *, bfd *, asection *);
127 static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
128 asection *);
129 static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
130 static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
131 static bfd_boolean nds32_elf_ifc_reloc (void);
132 static bfd_boolean nds32_relax_fp_as_gp
133 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
134 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
135 Elf_Internal_Sym *isymbuf);
136 static bfd_boolean nds32_fag_remove_unused_fpbase
137 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
138 Elf_Internal_Rela *irelend);
139 static bfd_byte *
140 nds32_elf_get_relocated_section_contents (bfd *abfd,
141 struct bfd_link_info *link_info,
142 struct bfd_link_order *link_order,
143 bfd_byte *data,
144 bfd_boolean relocatable,
145 asymbol **symbols);
146
147 enum
148 {
149 MACH_V1 = bfd_mach_n1h,
150 MACH_V2 = bfd_mach_n1h_v2,
151 MACH_V3 = bfd_mach_n1h_v3,
152 MACH_V3M = bfd_mach_n1h_v3m
153 };
154
155 #define MIN(a, b) ((a) > (b) ? (b) : (a))
156 #define MAX(a, b) ((a) > (b) ? (a) : (b))
157
158 /* The name of the dynamic interpreter. This is put in the .interp
159 section. */
160 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
161
162 /* The nop opcode we use. */
163 #define NDS32_NOP32 0x40000009
164 #define NDS32_NOP16 0x9200
165
166 /* The size in bytes of an entry in the procedure linkage table. */
167 #define PLT_ENTRY_SIZE 24
168 #define PLT_HEADER_SIZE 24
169
170 /* The first entry in a procedure linkage table are reserved,
171 and the initial contents are unimportant (we zero them out).
172 Subsequent entries look like this. */
173 #define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
174 #define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
175 #define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
176 #define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
177 #define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
178
179 /* $ta is change to $r15 (from $r25). */
180 #define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
181 #define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
182 #define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
183 #define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
184 #define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
185 #define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
186
187 #define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
188 #define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
189 #define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
190 #define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
191 #define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
192
193 #define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
194 #define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
195 #define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
196 #define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
197 #define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
198 #define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
199
200 /* These are macros used to get the relocation accurate value. */
201 #define ACCURATE_8BIT_S1 (0x100)
202 #define ACCURATE_U9BIT_S1 (0x400)
203 #define ACCURATE_12BIT_S1 (0x2000)
204 #define ACCURATE_14BIT_S1 (0x4000)
205 #define ACCURATE_19BIT (0x40000)
206
207 /* These are macros used to get the relocation conservative value. */
208 #define CONSERVATIVE_8BIT_S1 (0x100 - 4)
209 #define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
210 #define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
211 #define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
212 /* These must be more conservative because the address may be in
213 different segment. */
214 #define CONSERVATIVE_15BIT (0x4000 - 0x1000)
215 #define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
216 #define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
217 #define CONSERVATIVE_19BIT (0x40000 - 0x1000)
218 #define CONSERVATIVE_20BIT (0x80000 - 0x1000)
219
220 /* Size of small data/bss sections, used to calculate SDA_BASE. */
221 static long got_size = 0;
222 static int is_SDA_BASE_set = 0;
223 static int is_ITB_BASE_set = 0;
224
225 /* Convert ELF-VER in eflags to string for debugging purpose. */
226 static const char *const nds32_elfver_strtab[] =
227 {
228 "ELF-1.2",
229 "ELF-1.3",
230 "ELF-1.4",
231 };
232
233 /* The nds32 linker needs to keep track of the number of relocs that it
234 decides to copy in check_relocs for each symbol. This is so that
235 it can discard PC relative relocs if it doesn't need them when
236 linking with -Bsymbolic. We store the information in a field
237 extending the regular ELF linker hash table. */
238
239 /* This structure keeps track of the number of PC relative relocs we
240 have copied for a given symbol. */
241
242 struct elf_nds32_pcrel_relocs_copied
243 {
244 /* Next section. */
245 struct elf_nds32_pcrel_relocs_copied *next;
246 /* A section in dynobj. */
247 asection *section;
248 /* Number of relocs copied in this section. */
249 bfd_size_type count;
250 };
251
252 /* The sh linker needs to keep track of the number of relocs that it
253 decides to copy as dynamic relocs in check_relocs for each symbol.
254 This is so that it can later discard them if they are found to be
255 unnecessary. We store the information in a field extending the
256 regular ELF linker hash table. */
257
258 struct elf_nds32_dyn_relocs
259 {
260 struct elf_nds32_dyn_relocs *next;
261
262 /* The input section of the reloc. */
263 asection *sec;
264
265 /* Total number of relocs copied for the input section. */
266 bfd_size_type count;
267
268 /* Number of pc-relative relocs copied for the input section. */
269 bfd_size_type pc_count;
270 };
271
272 /* Nds32 ELF linker hash entry. */
273
274 struct elf_nds32_link_hash_entry
275 {
276 struct elf_link_hash_entry root;
277
278 /* Track dynamic relocs copied for this symbol. */
279 struct elf_nds32_dyn_relocs *dyn_relocs;
280
281 /* For checking relocation type. */
282 #define GOT_UNKNOWN 0
283 #define GOT_NORMAL 1
284 #define GOT_TLS_IE 2
285 unsigned int tls_type;
286 };
287
288 /* Get the nds32 ELF linker hash table from a link_info structure. */
289
290 #define FP_BASE_NAME "_FP_BASE_"
291 static int check_start_export_sym = 0;
292 static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
293
294 /* The offset for executable tls relaxation. */
295 #define TP_OFFSET 0x0
296
297 struct elf_nds32_obj_tdata
298 {
299 struct elf_obj_tdata root;
300
301 /* tls_type for each local got entry. */
302 char *local_got_tls_type;
303 };
304
305 #define elf_nds32_tdata(bfd) \
306 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
307
308 #define elf32_nds32_local_got_tls_type(bfd) \
309 (elf_nds32_tdata (bfd)->local_got_tls_type)
310
311 #define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
312
313 static bfd_boolean
314 nds32_elf_mkobject (bfd *abfd)
315 {
316 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
317 NDS32_ELF_DATA);
318 }
319
320 /* Relocations used for relocation. */
321 static reloc_howto_type nds32_elf_howto_table[] =
322 {
323 /* This reloc does nothing. */
324 HOWTO (R_NDS32_NONE, /* type */
325 0, /* rightshift */
326 3, /* size (0 = byte, 1 = short, 2 = long) */
327 0, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_dont, /* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_NDS32_NONE", /* name */
333 FALSE, /* partial_inplace */
334 0, /* src_mask */
335 0, /* dst_mask */
336 FALSE), /* pcrel_offset */
337
338 /* A 16 bit absolute relocation. */
339 HOWTO (R_NDS32_16, /* type */
340 0, /* rightshift */
341 1, /* size (0 = byte, 1 = short, 2 = long) */
342 16, /* bitsize */
343 FALSE, /* pc_relative */
344 0, /* bitpos */
345 complain_overflow_bitfield, /* complain_on_overflow */
346 nds32_elf_generic_reloc, /* special_function */
347 "R_NDS32_16", /* name */
348 FALSE, /* partial_inplace */
349 0xffff, /* src_mask */
350 0xffff, /* dst_mask */
351 FALSE), /* pcrel_offset */
352
353 /* A 32 bit absolute relocation. */
354 HOWTO (R_NDS32_32, /* type */
355 0, /* rightshift */
356 2, /* size (0 = byte, 1 = short, 2 = long) */
357 32, /* bitsize */
358 FALSE, /* pc_relative */
359 0, /* bitpos */
360 complain_overflow_bitfield, /* complain_on_overflow */
361 nds32_elf_generic_reloc, /* special_function */
362 "R_NDS32_32", /* name */
363 FALSE, /* partial_inplace */
364 0xffffffff, /* src_mask */
365 0xffffffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
367
368 /* A 20 bit address. */
369 HOWTO (R_NDS32_20, /* type */
370 0, /* rightshift */
371 2, /* size (0 = byte, 1 = short, 2 = long) */
372 20, /* bitsize */
373 FALSE, /* pc_relative */
374 0, /* bitpos */
375 complain_overflow_unsigned, /* complain_on_overflow */
376 nds32_elf_generic_reloc, /* special_function */
377 "R_NDS32_20", /* name */
378 FALSE, /* partial_inplace */
379 0xfffff, /* src_mask */
380 0xfffff, /* dst_mask */
381 FALSE), /* pcrel_offset */
382
383 /* An PC Relative 9-bit relocation, shifted by 2.
384 This reloc is complicated because relocations are relative to pc & -4.
385 i.e. branches in the right insn slot use the address of the left insn
386 slot for pc. */
387 /* ??? It's not clear whether this should have partial_inplace set or not.
388 Branch relaxing in the assembler can store the addend in the insn,
389 and if bfd_install_relocation gets called the addend may get added
390 again. */
391 HOWTO (R_NDS32_9_PCREL, /* type */
392 1, /* rightshift */
393 1, /* size (0 = byte, 1 = short, 2 = long) */
394 8, /* bitsize */
395 TRUE, /* pc_relative */
396 0, /* bitpos */
397 complain_overflow_signed, /* complain_on_overflow */
398 nds32_elf_9_pcrel_reloc, /* special_function */
399 "R_NDS32_9_PCREL", /* name */
400 FALSE, /* partial_inplace */
401 0xff, /* src_mask */
402 0xff, /* dst_mask */
403 TRUE), /* pcrel_offset */
404
405 /* A relative 15 bit relocation, right shifted by 1. */
406 HOWTO (R_NDS32_15_PCREL, /* type */
407 1, /* rightshift */
408 2, /* size (0 = byte, 1 = short, 2 = long) */
409 14, /* bitsize */
410 TRUE, /* pc_relative */
411 0, /* bitpos */
412 complain_overflow_signed, /* complain_on_overflow */
413 bfd_elf_generic_reloc, /* special_function */
414 "R_NDS32_15_PCREL", /* name */
415 FALSE, /* partial_inplace */
416 0x3fff, /* src_mask */
417 0x3fff, /* dst_mask */
418 TRUE), /* pcrel_offset */
419
420 /* A relative 17 bit relocation, right shifted by 1. */
421 HOWTO (R_NDS32_17_PCREL, /* type */
422 1, /* rightshift */
423 2, /* size (0 = byte, 1 = short, 2 = long) */
424 16, /* bitsize */
425 TRUE, /* pc_relative */
426 0, /* bitpos */
427 complain_overflow_signed, /* complain_on_overflow */
428 bfd_elf_generic_reloc, /* special_function */
429 "R_NDS32_17_PCREL", /* name */
430 FALSE, /* partial_inplace */
431 0xffff, /* src_mask */
432 0xffff, /* dst_mask */
433 TRUE), /* pcrel_offset */
434
435 /* A relative 25 bit relocation, right shifted by 1. */
436 /* ??? It's not clear whether this should have partial_inplace set or not.
437 Branch relaxing in the assembler can store the addend in the insn,
438 and if bfd_install_relocation gets called the addend may get added
439 again. */
440 HOWTO (R_NDS32_25_PCREL, /* type */
441 1, /* rightshift */
442 2, /* size (0 = byte, 1 = short, 2 = long) */
443 24, /* bitsize */
444 TRUE, /* pc_relative */
445 0, /* bitpos */
446 complain_overflow_signed, /* complain_on_overflow */
447 bfd_elf_generic_reloc, /* special_function */
448 "R_NDS32_25_PCREL", /* name */
449 FALSE, /* partial_inplace */
450 0xffffff, /* src_mask */
451 0xffffff, /* dst_mask */
452 TRUE), /* pcrel_offset */
453
454 /* High 20 bits of address when lower 12 is or'd in. */
455 HOWTO (R_NDS32_HI20, /* type */
456 12, /* rightshift */
457 2, /* size (0 = byte, 1 = short, 2 = long) */
458 20, /* bitsize */
459 FALSE, /* pc_relative */
460 0, /* bitpos */
461 complain_overflow_dont,/* complain_on_overflow */
462 nds32_elf_hi20_reloc, /* special_function */
463 "R_NDS32_HI20", /* name */
464 FALSE, /* partial_inplace */
465 0x000fffff, /* src_mask */
466 0x000fffff, /* dst_mask */
467 FALSE), /* pcrel_offset */
468
469 /* Lower 12 bits of address. */
470 HOWTO (R_NDS32_LO12S3, /* type */
471 3, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 9, /* bitsize */
474 FALSE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_dont,/* complain_on_overflow */
477 nds32_elf_lo12_reloc, /* special_function */
478 "R_NDS32_LO12S3", /* name */
479 FALSE, /* partial_inplace */
480 0x000001ff, /* src_mask */
481 0x000001ff, /* dst_mask */
482 FALSE), /* pcrel_offset */
483
484 /* Lower 12 bits of address. */
485 HOWTO (R_NDS32_LO12S2, /* type */
486 2, /* rightshift */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
488 10, /* bitsize */
489 FALSE, /* pc_relative */
490 0, /* bitpos */
491 complain_overflow_dont,/* complain_on_overflow */
492 nds32_elf_lo12_reloc, /* special_function */
493 "R_NDS32_LO12S2", /* name */
494 FALSE, /* partial_inplace */
495 0x000003ff, /* src_mask */
496 0x000003ff, /* dst_mask */
497 FALSE), /* pcrel_offset */
498
499 /* Lower 12 bits of address. */
500 HOWTO (R_NDS32_LO12S1, /* type */
501 1, /* rightshift */
502 2, /* size (0 = byte, 1 = short, 2 = long) */
503 11, /* bitsize */
504 FALSE, /* pc_relative */
505 0, /* bitpos */
506 complain_overflow_dont,/* complain_on_overflow */
507 nds32_elf_lo12_reloc, /* special_function */
508 "R_NDS32_LO12S1", /* name */
509 FALSE, /* partial_inplace */
510 0x000007ff, /* src_mask */
511 0x000007ff, /* dst_mask */
512 FALSE), /* pcrel_offset */
513
514 /* Lower 12 bits of address. */
515 HOWTO (R_NDS32_LO12S0, /* type */
516 0, /* rightshift */
517 2, /* size (0 = byte, 1 = short, 2 = long) */
518 12, /* bitsize */
519 FALSE, /* pc_relative */
520 0, /* bitpos */
521 complain_overflow_dont,/* complain_on_overflow */
522 nds32_elf_lo12_reloc, /* special_function */
523 "R_NDS32_LO12S0", /* name */
524 FALSE, /* partial_inplace */
525 0x00000fff, /* src_mask */
526 0x00000fff, /* dst_mask */
527 FALSE), /* pcrel_offset */
528
529 /* Small data area 15 bits offset. */
530 HOWTO (R_NDS32_SDA15S3, /* type */
531 3, /* rightshift */
532 2, /* size (0 = byte, 1 = short, 2 = long) */
533 15, /* bitsize */
534 FALSE, /* pc_relative */
535 0, /* bitpos */
536 complain_overflow_signed, /* complain_on_overflow */
537 nds32_elf_sda15_reloc, /* special_function */
538 "R_NDS32_SDA15S3", /* name */
539 FALSE, /* partial_inplace */
540 0x00007fff, /* src_mask */
541 0x00007fff, /* dst_mask */
542 FALSE), /* pcrel_offset */
543
544 /* Small data area 15 bits offset. */
545 HOWTO (R_NDS32_SDA15S2, /* type */
546 2, /* rightshift */
547 2, /* size (0 = byte, 1 = short, 2 = long) */
548 15, /* bitsize */
549 FALSE, /* pc_relative */
550 0, /* bitpos */
551 complain_overflow_signed, /* complain_on_overflow */
552 nds32_elf_sda15_reloc, /* special_function */
553 "R_NDS32_SDA15S2", /* name */
554 FALSE, /* partial_inplace */
555 0x00007fff, /* src_mask */
556 0x00007fff, /* dst_mask */
557 FALSE), /* pcrel_offset */
558
559 /* Small data area 15 bits offset. */
560 HOWTO (R_NDS32_SDA15S1, /* type */
561 1, /* rightshift */
562 2, /* size (0 = byte, 1 = short, 2 = long) */
563 15, /* bitsize */
564 FALSE, /* pc_relative */
565 0, /* bitpos */
566 complain_overflow_signed, /* complain_on_overflow */
567 nds32_elf_sda15_reloc, /* special_function */
568 "R_NDS32_SDA15S1", /* name */
569 FALSE, /* partial_inplace */
570 0x00007fff, /* src_mask */
571 0x00007fff, /* dst_mask */
572 FALSE), /* pcrel_offset */
573
574 /* Small data area 15 bits offset. */
575 HOWTO (R_NDS32_SDA15S0, /* type */
576 0, /* rightshift */
577 2, /* size (0 = byte, 1 = short, 2 = long) */
578 15, /* bitsize */
579 FALSE, /* pc_relative */
580 0, /* bitpos */
581 complain_overflow_signed, /* complain_on_overflow */
582 nds32_elf_sda15_reloc, /* special_function */
583 "R_NDS32_SDA15S0", /* name */
584 FALSE, /* partial_inplace */
585 0x00007fff, /* src_mask */
586 0x00007fff, /* dst_mask */
587 FALSE), /* pcrel_offset */
588
589 /* GNU extension to record C++ vtable hierarchy */
590 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
591 0, /* rightshift */
592 2, /* size (0 = byte, 1 = short, 2 = long) */
593 0, /* bitsize */
594 FALSE, /* pc_relative */
595 0, /* bitpos */
596 complain_overflow_dont,/* complain_on_overflow */
597 NULL, /* special_function */
598 "R_NDS32_GNU_VTINHERIT", /* name */
599 FALSE, /* partial_inplace */
600 0, /* src_mask */
601 0, /* dst_mask */
602 FALSE), /* pcrel_offset */
603
604 /* GNU extension to record C++ vtable member usage */
605 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
606 0, /* rightshift */
607 2, /* size (0 = byte, 1 = short, 2 = long) */
608 0, /* bitsize */
609 FALSE, /* pc_relative */
610 0, /* bitpos */
611 complain_overflow_dont,/* complain_on_overflow */
612 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
613 "R_NDS32_GNU_VTENTRY", /* name */
614 FALSE, /* partial_inplace */
615 0, /* src_mask */
616 0, /* dst_mask */
617 FALSE), /* pcrel_offset */
618
619 /* A 16 bit absolute relocation. */
620 HOWTO (R_NDS32_16_RELA, /* type */
621 0, /* rightshift */
622 1, /* size (0 = byte, 1 = short, 2 = long) */
623 16, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_bitfield, /* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_NDS32_16_RELA", /* name */
629 FALSE, /* partial_inplace */
630 0xffff, /* src_mask */
631 0xffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 /* A 32 bit absolute relocation. */
635 HOWTO (R_NDS32_32_RELA, /* type */
636 0, /* rightshift */
637 2, /* size (0 = byte, 1 = short, 2 = long) */
638 32, /* bitsize */
639 FALSE, /* pc_relative */
640 0, /* bitpos */
641 complain_overflow_bitfield, /* complain_on_overflow */
642 bfd_elf_generic_reloc, /* special_function */
643 "R_NDS32_32_RELA", /* name */
644 FALSE, /* partial_inplace */
645 0xffffffff, /* src_mask */
646 0xffffffff, /* dst_mask */
647 FALSE), /* pcrel_offset */
648
649 /* A 20 bit address. */
650 HOWTO (R_NDS32_20_RELA, /* type */
651 0, /* rightshift */
652 2, /* size (0 = byte, 1 = short, 2 = long) */
653 20, /* bitsize */
654 FALSE, /* pc_relative */
655 0, /* bitpos */
656 complain_overflow_signed, /* complain_on_overflow */
657 bfd_elf_generic_reloc, /* special_function */
658 "R_NDS32_20_RELA", /* name */
659 FALSE, /* partial_inplace */
660 0xfffff, /* src_mask */
661 0xfffff, /* dst_mask */
662 FALSE), /* pcrel_offset */
663
664 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
665 1, /* rightshift */
666 1, /* size (0 = byte, 1 = short, 2 = long) */
667 8, /* bitsize */
668 TRUE, /* pc_relative */
669 0, /* bitpos */
670 complain_overflow_signed, /* complain_on_overflow */
671 bfd_elf_generic_reloc, /* special_function */
672 "R_NDS32_9_PCREL_RELA",/* name */
673 FALSE, /* partial_inplace */
674 0xff, /* src_mask */
675 0xff, /* dst_mask */
676 TRUE), /* pcrel_offset */
677
678 /* A relative 15 bit relocation, right shifted by 1. */
679 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
680 1, /* rightshift */
681 2, /* size (0 = byte, 1 = short, 2 = long) */
682 14, /* bitsize */
683 TRUE, /* pc_relative */
684 0, /* bitpos */
685 complain_overflow_signed, /* complain_on_overflow */
686 bfd_elf_generic_reloc, /* special_function */
687 "R_NDS32_15_PCREL_RELA", /* name */
688 FALSE, /* partial_inplace */
689 0x3fff, /* src_mask */
690 0x3fff, /* dst_mask */
691 TRUE), /* pcrel_offset */
692
693 /* A relative 17 bit relocation, right shifted by 1. */
694 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
695 1, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 TRUE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_signed, /* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_NDS32_17_PCREL_RELA", /* name */
703 FALSE, /* partial_inplace */
704 0xffff, /* src_mask */
705 0xffff, /* dst_mask */
706 TRUE), /* pcrel_offset */
707
708 /* A relative 25 bit relocation, right shifted by 2. */
709 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
710 1, /* rightshift */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
712 24, /* bitsize */
713 TRUE, /* pc_relative */
714 0, /* bitpos */
715 complain_overflow_signed, /* complain_on_overflow */
716 bfd_elf_generic_reloc, /* special_function */
717 "R_NDS32_25_PCREL_RELA", /* name */
718 FALSE, /* partial_inplace */
719 0xffffff, /* src_mask */
720 0xffffff, /* dst_mask */
721 TRUE), /* pcrel_offset */
722
723 /* High 20 bits of address when lower 16 is or'd in. */
724 HOWTO (R_NDS32_HI20_RELA, /* type */
725 12, /* rightshift */
726 2, /* size (0 = byte, 1 = short, 2 = long) */
727 20, /* bitsize */
728 FALSE, /* pc_relative */
729 0, /* bitpos */
730 complain_overflow_dont,/* complain_on_overflow */
731 bfd_elf_generic_reloc, /* special_function */
732 "R_NDS32_HI20_RELA", /* name */
733 FALSE, /* partial_inplace */
734 0x000fffff, /* src_mask */
735 0x000fffff, /* dst_mask */
736 FALSE), /* pcrel_offset */
737
738 /* Lower 12 bits of address. */
739 HOWTO (R_NDS32_LO12S3_RELA, /* type */
740 3, /* rightshift */
741 2, /* size (0 = byte, 1 = short, 2 = long) */
742 9, /* bitsize */
743 FALSE, /* pc_relative */
744 0, /* bitpos */
745 complain_overflow_dont,/* complain_on_overflow */
746 bfd_elf_generic_reloc, /* special_function */
747 "R_NDS32_LO12S3_RELA", /* name */
748 FALSE, /* partial_inplace */
749 0x000001ff, /* src_mask */
750 0x000001ff, /* dst_mask */
751 FALSE), /* pcrel_offset */
752
753 /* Lower 12 bits of address. */
754 HOWTO (R_NDS32_LO12S2_RELA, /* type */
755 2, /* rightshift */
756 2, /* size (0 = byte, 1 = short, 2 = long) */
757 10, /* bitsize */
758 FALSE, /* pc_relative */
759 0, /* bitpos */
760 complain_overflow_dont,/* complain_on_overflow */
761 bfd_elf_generic_reloc, /* special_function */
762 "R_NDS32_LO12S2_RELA", /* name */
763 FALSE, /* partial_inplace */
764 0x000003ff, /* src_mask */
765 0x000003ff, /* dst_mask */
766 FALSE), /* pcrel_offset */
767
768 /* Lower 12 bits of address. */
769 HOWTO (R_NDS32_LO12S1_RELA, /* type */
770 1, /* rightshift */
771 2, /* size (0 = byte, 1 = short, 2 = long) */
772 11, /* bitsize */
773 FALSE, /* pc_relative */
774 0, /* bitpos */
775 complain_overflow_dont,/* complain_on_overflow */
776 bfd_elf_generic_reloc, /* special_function */
777 "R_NDS32_LO12S1_RELA", /* name */
778 FALSE, /* partial_inplace */
779 0x000007ff, /* src_mask */
780 0x000007ff, /* dst_mask */
781 FALSE), /* pcrel_offset */
782
783 /* Lower 12 bits of address. */
784 HOWTO (R_NDS32_LO12S0_RELA, /* type */
785 0, /* rightshift */
786 2, /* size (0 = byte, 1 = short, 2 = long) */
787 12, /* bitsize */
788 FALSE, /* pc_relative */
789 0, /* bitpos */
790 complain_overflow_dont,/* complain_on_overflow */
791 bfd_elf_generic_reloc, /* special_function */
792 "R_NDS32_LO12S0_RELA", /* name */
793 FALSE, /* partial_inplace */
794 0x00000fff, /* src_mask */
795 0x00000fff, /* dst_mask */
796 FALSE), /* pcrel_offset */
797
798 /* Small data area 15 bits offset. */
799 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
800 3, /* rightshift */
801 2, /* size (0 = byte, 1 = short, 2 = long) */
802 15, /* bitsize */
803 FALSE, /* pc_relative */
804 0, /* bitpos */
805 complain_overflow_signed, /* complain_on_overflow */
806 bfd_elf_generic_reloc, /* special_function */
807 "R_NDS32_SDA15S3_RELA",/* name */
808 FALSE, /* partial_inplace */
809 0x00007fff, /* src_mask */
810 0x00007fff, /* dst_mask */
811 FALSE), /* pcrel_offset */
812
813 /* Small data area 15 bits offset. */
814 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
815 2, /* rightshift */
816 2, /* size (0 = byte, 1 = short, 2 = long) */
817 15, /* bitsize */
818 FALSE, /* pc_relative */
819 0, /* bitpos */
820 complain_overflow_signed, /* complain_on_overflow */
821 bfd_elf_generic_reloc, /* special_function */
822 "R_NDS32_SDA15S2_RELA",/* name */
823 FALSE, /* partial_inplace */
824 0x00007fff, /* src_mask */
825 0x00007fff, /* dst_mask */
826 FALSE), /* pcrel_offset */
827
828 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
829 1, /* rightshift */
830 2, /* size (0 = byte, 1 = short, 2 = long) */
831 15, /* bitsize */
832 FALSE, /* pc_relative */
833 0, /* bitpos */
834 complain_overflow_signed, /* complain_on_overflow */
835 bfd_elf_generic_reloc, /* special_function */
836 "R_NDS32_SDA15S1_RELA",/* name */
837 FALSE, /* partial_inplace */
838 0x00007fff, /* src_mask */
839 0x00007fff, /* dst_mask */
840 FALSE), /* pcrel_offset */
841
842 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
843 0, /* rightshift */
844 2, /* size (0 = byte, 1 = short, 2 = long) */
845 15, /* bitsize */
846 FALSE, /* pc_relative */
847 0, /* bitpos */
848 complain_overflow_signed, /* complain_on_overflow */
849 bfd_elf_generic_reloc, /* special_function */
850 "R_NDS32_SDA15S0_RELA",/* name */
851 FALSE, /* partial_inplace */
852 0x00007fff, /* src_mask */
853 0x00007fff, /* dst_mask */
854 FALSE), /* pcrel_offset */
855
856 /* GNU extension to record C++ vtable hierarchy */
857 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
858 0, /* rightshift */
859 2, /* size (0 = byte, 1 = short, 2 = long) */
860 0, /* bitsize */
861 FALSE, /* pc_relative */
862 0, /* bitpos */
863 complain_overflow_dont,/* complain_on_overflow */
864 NULL, /* special_function */
865 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
866 FALSE, /* partial_inplace */
867 0, /* src_mask */
868 0, /* dst_mask */
869 FALSE), /* pcrel_offset */
870
871 /* GNU extension to record C++ vtable member usage */
872 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
873 0, /* rightshift */
874 2, /* size (0 = byte, 1 = short, 2 = long) */
875 0, /* bitsize */
876 FALSE, /* pc_relative */
877 0, /* bitpos */
878 complain_overflow_dont,/* complain_on_overflow */
879 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
880 "R_NDS32_RELA_GNU_VTENTRY", /* name */
881 FALSE, /* partial_inplace */
882 0, /* src_mask */
883 0, /* dst_mask */
884 FALSE), /* pcrel_offset */
885
886 /* Like R_NDS32_20, but referring to the GOT table entry for
887 the symbol. */
888 HOWTO (R_NDS32_GOT20, /* type */
889 0, /* rightshift */
890 2, /* size (0 = byte, 1 = short, 2 = long) */
891 20, /* bitsize */
892 FALSE, /* pc_relative */
893 0, /* bitpos */
894 complain_overflow_signed, /* complain_on_overflow */
895 bfd_elf_generic_reloc, /* special_function */
896 "R_NDS32_GOT20", /* name */
897 FALSE, /* partial_inplace */
898 0xfffff, /* src_mask */
899 0xfffff, /* dst_mask */
900 FALSE), /* pcrel_offset */
901
902 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
903 entry for the symbol. */
904 HOWTO (R_NDS32_25_PLTREL, /* type */
905 1, /* rightshift */
906 2, /* size (0 = byte, 1 = short, 2 = long) */
907 24, /* bitsize */
908 TRUE, /* pc_relative */
909 0, /* bitpos */
910 complain_overflow_signed, /* complain_on_overflow */
911 bfd_elf_generic_reloc, /* special_function */
912 "R_NDS32_25_PLTREL", /* name */
913 FALSE, /* partial_inplace */
914 0xffffff, /* src_mask */
915 0xffffff, /* dst_mask */
916 TRUE), /* pcrel_offset */
917
918 /* This is used only by the dynamic linker. The symbol should exist
919 both in the object being run and in some shared library. The
920 dynamic linker copies the data addressed by the symbol from the
921 shared library into the object, because the object being
922 run has to have the data at some particular address. */
923 HOWTO (R_NDS32_COPY, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 FALSE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_bitfield, /* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_NDS32_COPY", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 FALSE), /* pcrel_offset */
936
937 /* Like R_NDS32_20, but used when setting global offset table
938 entries. */
939 HOWTO (R_NDS32_GLOB_DAT, /* type */
940 0, /* rightshift */
941 2, /* size (0 = byte, 1 = short, 2 = long) */
942 32, /* bitsize */
943 FALSE, /* pc_relative */
944 0, /* bitpos */
945 complain_overflow_bitfield, /* complain_on_overflow */
946 bfd_elf_generic_reloc, /* special_function */
947 "R_NDS32_GLOB_DAT", /* name */
948 FALSE, /* partial_inplace */
949 0xffffffff, /* src_mask */
950 0xffffffff, /* dst_mask */
951 FALSE), /* pcrel_offset */
952
953 /* Marks a procedure linkage table entry for a symbol. */
954 HOWTO (R_NDS32_JMP_SLOT, /* type */
955 0, /* rightshift */
956 2, /* size (0 = byte, 1 = short, 2 = long) */
957 32, /* bitsize */
958 FALSE, /* pc_relative */
959 0, /* bitpos */
960 complain_overflow_bitfield, /* complain_on_overflow */
961 bfd_elf_generic_reloc, /* special_function */
962 "R_NDS32_JMP_SLOT", /* name */
963 FALSE, /* partial_inplace */
964 0xffffffff, /* src_mask */
965 0xffffffff, /* dst_mask */
966 FALSE), /* pcrel_offset */
967
968 /* Used only by the dynamic linker. When the object is run, this
969 longword is set to the load address of the object, plus the
970 addend. */
971 HOWTO (R_NDS32_RELATIVE, /* type */
972 0, /* rightshift */
973 2, /* size (0 = byte, 1 = short, 2 = long) */
974 32, /* bitsize */
975 FALSE, /* pc_relative */
976 0, /* bitpos */
977 complain_overflow_bitfield, /* complain_on_overflow */
978 bfd_elf_generic_reloc, /* special_function */
979 "R_NDS32_RELATIVE", /* name */
980 FALSE, /* partial_inplace */
981 0xffffffff, /* src_mask */
982 0xffffffff, /* dst_mask */
983 FALSE), /* pcrel_offset */
984
985 HOWTO (R_NDS32_GOTOFF, /* type */
986 0, /* rightshift */
987 2, /* size (0 = byte, 1 = short, 2 = long) */
988 20, /* bitsize */
989 FALSE, /* pc_relative */
990 0, /* bitpos */
991 complain_overflow_signed, /* complain_on_overflow */
992 bfd_elf_generic_reloc, /* special_function */
993 "R_NDS32_GOTOFF", /* name */
994 FALSE, /* partial_inplace */
995 0xfffff, /* src_mask */
996 0xfffff, /* dst_mask */
997 FALSE), /* pcrel_offset */
998
999 /* An PC Relative 20-bit relocation used when setting PIC offset
1000 table register. */
1001 HOWTO (R_NDS32_GOTPC20, /* type */
1002 0, /* rightshift */
1003 2, /* size (0 = byte, 1 = short, 2 = long) */
1004 20, /* bitsize */
1005 TRUE, /* pc_relative */
1006 0, /* bitpos */
1007 complain_overflow_signed, /* complain_on_overflow */
1008 bfd_elf_generic_reloc, /* special_function */
1009 "R_NDS32_GOTPC20", /* name */
1010 FALSE, /* partial_inplace */
1011 0xfffff, /* src_mask */
1012 0xfffff, /* dst_mask */
1013 TRUE), /* pcrel_offset */
1014
1015 /* Like R_NDS32_HI20, but referring to the GOT table entry for
1016 the symbol. */
1017 HOWTO (R_NDS32_GOT_HI20, /* type */
1018 12, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 20, /* bitsize */
1021 FALSE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_NDS32_GOT_HI20", /* name */
1026 FALSE, /* partial_inplace */
1027 0x000fffff, /* src_mask */
1028 0x000fffff, /* dst_mask */
1029 FALSE), /* pcrel_offset */
1030 HOWTO (R_NDS32_GOT_LO12, /* type */
1031 0, /* rightshift */
1032 2, /* size (0 = byte, 1 = short, 2 = long) */
1033 12, /* bitsize */
1034 FALSE, /* pc_relative */
1035 0, /* bitpos */
1036 complain_overflow_dont,/* complain_on_overflow */
1037 bfd_elf_generic_reloc, /* special_function */
1038 "R_NDS32_GOT_LO12", /* name */
1039 FALSE, /* partial_inplace */
1040 0x00000fff, /* src_mask */
1041 0x00000fff, /* dst_mask */
1042 FALSE), /* pcrel_offset */
1043
1044 /* An PC Relative relocation used when setting PIC offset table register.
1045 Like R_NDS32_HI20, but referring to the GOT table entry for
1046 the symbol. */
1047 HOWTO (R_NDS32_GOTPC_HI20, /* type */
1048 12, /* rightshift */
1049 2, /* size (0 = byte, 1 = short, 2 = long) */
1050 20, /* bitsize */
1051 FALSE, /* pc_relative */
1052 0, /* bitpos */
1053 complain_overflow_dont,/* complain_on_overflow */
1054 bfd_elf_generic_reloc, /* special_function */
1055 "R_NDS32_GOTPC_HI20", /* name */
1056 FALSE, /* partial_inplace */
1057 0x000fffff, /* src_mask */
1058 0x000fffff, /* dst_mask */
1059 TRUE), /* pcrel_offset */
1060 HOWTO (R_NDS32_GOTPC_LO12, /* type */
1061 0, /* rightshift */
1062 2, /* size (0 = byte, 1 = short, 2 = long) */
1063 12, /* bitsize */
1064 FALSE, /* pc_relative */
1065 0, /* bitpos */
1066 complain_overflow_dont, /* complain_on_overflow */
1067 bfd_elf_generic_reloc, /* special_function */
1068 "R_NDS32_GOTPC_LO12", /* name */
1069 FALSE, /* partial_inplace */
1070 0x00000fff, /* src_mask */
1071 0x00000fff, /* dst_mask */
1072 TRUE), /* pcrel_offset */
1073
1074 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
1075 12, /* rightshift */
1076 2, /* size (0 = byte, 1 = short, 2 = long) */
1077 20, /* bitsize */
1078 FALSE, /* pc_relative */
1079 0, /* bitpos */
1080 complain_overflow_dont,/* complain_on_overflow */
1081 bfd_elf_generic_reloc, /* special_function */
1082 "R_NDS32_GOTOFF_HI20", /* name */
1083 FALSE, /* partial_inplace */
1084 0x000fffff, /* src_mask */
1085 0x000fffff, /* dst_mask */
1086 FALSE), /* pcrel_offset */
1087 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 12, /* bitsize */
1091 FALSE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_NDS32_GOTOFF_LO12", /* name */
1096 FALSE, /* partial_inplace */
1097 0x00000fff, /* src_mask */
1098 0x00000fff, /* dst_mask */
1099 FALSE), /* pcrel_offset */
1100
1101 /* Alignment hint for relaxable instruction. This is used with
1102 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1103 in order to make next label aligned on word boundary. */
1104 HOWTO (R_NDS32_INSN16, /* type */
1105 0, /* rightshift */
1106 2, /* size (0 = byte, 1 = short, 2 = long) */
1107 32, /* bitsize */
1108 FALSE, /* pc_relative */
1109 0, /* bitpos */
1110 complain_overflow_dont,/* complain_on_overflow */
1111 nds32_elf_ignore_reloc,/* special_function */
1112 "R_NDS32_INSN16", /* name */
1113 FALSE, /* partial_inplace */
1114 0x00000fff, /* src_mask */
1115 0x00000fff, /* dst_mask */
1116 FALSE), /* pcrel_offset */
1117
1118 /* Alignment hint for label. */
1119 HOWTO (R_NDS32_LABEL, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 FALSE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 nds32_elf_ignore_reloc,/* special_function */
1127 "R_NDS32_LABEL", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 FALSE), /* pcrel_offset */
1132
1133 /* Relax hint for unconditional call sequence */
1134 HOWTO (R_NDS32_LONGCALL1, /* type */
1135 0, /* rightshift */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 32, /* bitsize */
1138 FALSE, /* pc_relative */
1139 0, /* bitpos */
1140 complain_overflow_dont,/* complain_on_overflow */
1141 nds32_elf_ignore_reloc,/* special_function */
1142 "R_NDS32_LONGCALL1", /* name */
1143 FALSE, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 FALSE), /* pcrel_offset */
1147
1148 /* Relax hint for conditional call sequence. */
1149 HOWTO (R_NDS32_LONGCALL2, /* type */
1150 0, /* rightshift */
1151 2, /* size (0 = byte, 1 = short, 2 = long) */
1152 32, /* bitsize */
1153 FALSE, /* pc_relative */
1154 0, /* bitpos */
1155 complain_overflow_dont,/* complain_on_overflow */
1156 nds32_elf_ignore_reloc,/* special_function */
1157 "R_NDS32_LONGCALL2", /* name */
1158 FALSE, /* partial_inplace */
1159 0xffffffff, /* src_mask */
1160 0xffffffff, /* dst_mask */
1161 FALSE), /* pcrel_offset */
1162
1163 /* Relax hint for conditional call sequence. */
1164 HOWTO (R_NDS32_LONGCALL3, /* type */
1165 0, /* rightshift */
1166 2, /* size (0 = byte, 1 = short, 2 = long) */
1167 32, /* bitsize */
1168 FALSE, /* pc_relative */
1169 0, /* bitpos */
1170 complain_overflow_dont,/* complain_on_overflow */
1171 nds32_elf_ignore_reloc,/* special_function */
1172 "R_NDS32_LONGCALL3", /* name */
1173 FALSE, /* partial_inplace */
1174 0xffffffff, /* src_mask */
1175 0xffffffff, /* dst_mask */
1176 FALSE), /* pcrel_offset */
1177
1178 /* Relax hint for unconditional branch sequence. */
1179 HOWTO (R_NDS32_LONGJUMP1, /* type */
1180 0, /* rightshift */
1181 2, /* size (0 = byte, 1 = short, 2 = long) */
1182 32, /* bitsize */
1183 FALSE, /* pc_relative */
1184 0, /* bitpos */
1185 complain_overflow_dont,/* complain_on_overflow */
1186 nds32_elf_ignore_reloc,/* special_function */
1187 "R_NDS32_LONGJUMP1", /* name */
1188 FALSE, /* partial_inplace */
1189 0xffffffff, /* src_mask */
1190 0xffffffff, /* dst_mask */
1191 FALSE), /* pcrel_offset */
1192
1193 /* Relax hint for conditional branch sequence. */
1194 HOWTO (R_NDS32_LONGJUMP2, /* type */
1195 0, /* rightshift */
1196 2, /* size (0 = byte, 1 = short, 2 = long) */
1197 32, /* bitsize */
1198 FALSE, /* pc_relative */
1199 0, /* bitpos */
1200 complain_overflow_dont,/* complain_on_overflow */
1201 nds32_elf_ignore_reloc,/* special_function */
1202 "R_NDS32_LONGJUMP2", /* name */
1203 FALSE, /* partial_inplace */
1204 0xffffffff, /* src_mask */
1205 0xffffffff, /* dst_mask */
1206 FALSE), /* pcrel_offset */
1207
1208 /* Relax hint for conditional branch sequence. */
1209 HOWTO (R_NDS32_LONGJUMP3, /* type */
1210 0, /* rightshift */
1211 2, /* size (0 = byte, 1 = short, 2 = long) */
1212 32, /* bitsize */
1213 FALSE, /* pc_relative */
1214 0, /* bitpos */
1215 complain_overflow_dont,/* complain_on_overflow */
1216 nds32_elf_ignore_reloc,/* special_function */
1217 "R_NDS32_LONGJUMP3", /* name */
1218 FALSE, /* partial_inplace */
1219 0xffffffff, /* src_mask */
1220 0xffffffff, /* dst_mask */
1221 FALSE), /* pcrel_offset */
1222
1223 /* Relax hint for load/store sequence. */
1224 HOWTO (R_NDS32_LOADSTORE, /* type */
1225 0, /* rightshift */
1226 2, /* size (0 = byte, 1 = short, 2 = long) */
1227 32, /* bitsize */
1228 FALSE, /* pc_relative */
1229 0, /* bitpos */
1230 complain_overflow_dont,/* complain_on_overflow */
1231 nds32_elf_ignore_reloc,/* special_function */
1232 "R_NDS32_LOADSTORE", /* name */
1233 FALSE, /* partial_inplace */
1234 0xffffffff, /* src_mask */
1235 0xffffffff, /* dst_mask */
1236 FALSE), /* pcrel_offset */
1237
1238 /* Relax hint for load/store sequence. */
1239 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1240 0, /* rightshift */
1241 1, /* size (0 = byte, 1 = short, 2 = long) */
1242 16, /* bitsize */
1243 FALSE, /* pc_relative */
1244 0, /* bitpos */
1245 complain_overflow_dont,/* complain_on_overflow */
1246 nds32_elf_ignore_reloc,/* special_function */
1247 "R_NDS32_9_FIXED_RELA",/* name */
1248 FALSE, /* partial_inplace */
1249 0x000000ff, /* src_mask */
1250 0x000000ff, /* dst_mask */
1251 FALSE), /* pcrel_offset */
1252
1253 /* Relax hint for load/store sequence. */
1254 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1255 0, /* rightshift */
1256 2, /* size (0 = byte, 1 = short, 2 = long) */
1257 32, /* bitsize */
1258 FALSE, /* pc_relative */
1259 0, /* bitpos */
1260 complain_overflow_dont,/* complain_on_overflow */
1261 nds32_elf_ignore_reloc,/* special_function */
1262 "R_NDS32_15_FIXED_RELA", /* name */
1263 FALSE, /* partial_inplace */
1264 0x00003fff, /* src_mask */
1265 0x00003fff, /* dst_mask */
1266 FALSE), /* pcrel_offset */
1267
1268 /* Relax hint for load/store sequence. */
1269 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1270 0, /* rightshift */
1271 2, /* size (0 = byte, 1 = short, 2 = long) */
1272 32, /* bitsize */
1273 FALSE, /* pc_relative */
1274 0, /* bitpos */
1275 complain_overflow_dont,/* complain_on_overflow */
1276 nds32_elf_ignore_reloc,/* special_function */
1277 "R_NDS32_17_FIXED_RELA", /* name */
1278 FALSE, /* partial_inplace */
1279 0x0000ffff, /* src_mask */
1280 0x0000ffff, /* dst_mask */
1281 FALSE), /* pcrel_offset */
1282
1283 /* Relax hint for load/store sequence. */
1284 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1285 0, /* rightshift */
1286 2, /* size (0 = byte, 1 = short, 2 = long) */
1287 32, /* bitsize */
1288 FALSE, /* pc_relative */
1289 0, /* bitpos */
1290 complain_overflow_dont,/* complain_on_overflow */
1291 nds32_elf_ignore_reloc,/* special_function */
1292 "R_NDS32_25_FIXED_RELA", /* name */
1293 FALSE, /* partial_inplace */
1294 0x00ffffff, /* src_mask */
1295 0x00ffffff, /* dst_mask */
1296 FALSE), /* pcrel_offset */
1297
1298 /* High 20 bits of PLT symbol offset relative to PC. */
1299 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1300 12, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 20, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_NDS32_PLTREL_HI20", /* name */
1308 FALSE, /* partial_inplace */
1309 0x000fffff, /* src_mask */
1310 0x000fffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 /* Low 12 bits of PLT symbol offset relative to PC. */
1314 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1315 0, /* rightshift */
1316 2, /* size (0 = byte, 1 = short, 2 = long) */
1317 12, /* bitsize */
1318 FALSE, /* pc_relative */
1319 0, /* bitpos */
1320 complain_overflow_dont,/* complain_on_overflow */
1321 bfd_elf_generic_reloc, /* special_function */
1322 "R_NDS32_PLTREL_LO12", /* name */
1323 FALSE, /* partial_inplace */
1324 0x00000fff, /* src_mask */
1325 0x00000fff, /* dst_mask */
1326 FALSE), /* pcrel_offset */
1327
1328 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1329 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1330 12, /* rightshift */
1331 2, /* size (0 = byte, 1 = short, 2 = long) */
1332 20, /* bitsize */
1333 FALSE, /* pc_relative */
1334 0, /* bitpos */
1335 complain_overflow_dont,/* complain_on_overflow */
1336 bfd_elf_generic_reloc, /* special_function */
1337 "R_NDS32_PLT_GOTREL_HI20", /* name */
1338 FALSE, /* partial_inplace */
1339 0x000fffff, /* src_mask */
1340 0x000fffff, /* dst_mask */
1341 FALSE), /* pcrel_offset */
1342
1343 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1344 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1345 0, /* rightshift */
1346 2, /* size (0 = byte, 1 = short, 2 = long) */
1347 12, /* bitsize */
1348 FALSE, /* pc_relative */
1349 0, /* bitpos */
1350 complain_overflow_dont,/* complain_on_overflow */
1351 bfd_elf_generic_reloc, /* special_function */
1352 "R_NDS32_PLT_GOTREL_LO12", /* name */
1353 FALSE, /* partial_inplace */
1354 0x00000fff, /* src_mask */
1355 0x00000fff, /* dst_mask */
1356 FALSE), /* pcrel_offset */
1357
1358 /* Small data area 12 bits offset. */
1359 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1360 2, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 12, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_signed, /* complain_on_overflow */
1366 bfd_elf_generic_reloc, /* special_function */
1367 "R_NDS32_SDA12S2_DP_RELA", /* name */
1368 FALSE, /* partial_inplace */
1369 0x00000fff, /* src_mask */
1370 0x00000fff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 /* Small data area 12 bits offset. */
1374 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1375 2, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 12, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_signed, /* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_NDS32_SDA12S2_SP_RELA", /* name */
1383 FALSE, /* partial_inplace */
1384 0x00000fff, /* src_mask */
1385 0x00000fff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387 /* Lower 12 bits of address. */
1388
1389 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1390 2, /* rightshift */
1391 2, /* size (0 = byte, 1 = short, 2 = long) */
1392 10, /* bitsize */
1393 FALSE, /* pc_relative */
1394 0, /* bitpos */
1395 complain_overflow_dont,/* complain_on_overflow */
1396 bfd_elf_generic_reloc, /* special_function */
1397 "R_NDS32_LO12S2_DP_RELA", /* name */
1398 FALSE, /* partial_inplace */
1399 0x000003ff, /* src_mask */
1400 0x000003ff, /* dst_mask */
1401 FALSE), /* pcrel_offset */
1402
1403 /* Lower 12 bits of address. */
1404 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1405 2, /* rightshift */
1406 2, /* size (0 = byte, 1 = short, 2 = long) */
1407 10, /* bitsize */
1408 FALSE, /* pc_relative */
1409 0, /* bitpos */
1410 complain_overflow_dont,/* complain_on_overflow */
1411 bfd_elf_generic_reloc, /* special_function */
1412 "R_NDS32_LO12S2_SP_RELA", /* name */
1413 FALSE, /* partial_inplace */
1414 0x000003ff, /* src_mask */
1415 0x000003ff, /* dst_mask */
1416 FALSE), /* pcrel_offset */
1417 /* Lower 12 bits of address. Special identity for or case. */
1418 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1419 0, /* rightshift */
1420 2, /* size (0 = byte, 1 = short, 2 = long) */
1421 12, /* bitsize */
1422 FALSE, /* pc_relative */
1423 0, /* bitpos */
1424 complain_overflow_dont,/* complain_on_overflow */
1425 bfd_elf_generic_reloc, /* special_function */
1426 "R_NDS32_LO12S0_ORI_RELA", /* name */
1427 FALSE, /* partial_inplace */
1428 0x00000fff, /* src_mask */
1429 0x00000fff, /* dst_mask */
1430 FALSE), /* pcrel_offset */
1431 /* Small data area 19 bits offset. */
1432 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1433 3, /* rightshift */
1434 2, /* size (0 = byte, 1 = short, 2 = long) */
1435 16, /* bitsize */
1436 FALSE, /* pc_relative */
1437 0, /* bitpos */
1438 complain_overflow_signed, /* complain_on_overflow */
1439 bfd_elf_generic_reloc, /* special_function */
1440 "R_NDS32_SDA16S3_RELA",/* name */
1441 FALSE, /* partial_inplace */
1442 0x0000ffff, /* src_mask */
1443 0x0000ffff, /* dst_mask */
1444 FALSE), /* pcrel_offset */
1445
1446 /* Small data area 15 bits offset. */
1447 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1448 2, /* rightshift */
1449 2, /* size (0 = byte, 1 = short, 2 = long) */
1450 17, /* bitsize */
1451 FALSE, /* pc_relative */
1452 0, /* bitpos */
1453 complain_overflow_signed, /* complain_on_overflow */
1454 bfd_elf_generic_reloc, /* special_function */
1455 "R_NDS32_SDA17S2_RELA",/* name */
1456 FALSE, /* partial_inplace */
1457 0x0001ffff, /* src_mask */
1458 0x0001ffff, /* dst_mask */
1459 FALSE), /* pcrel_offset */
1460
1461 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1462 1, /* rightshift */
1463 2, /* size (0 = byte, 1 = short, 2 = long) */
1464 18, /* bitsize */
1465 FALSE, /* pc_relative */
1466 0, /* bitpos */
1467 complain_overflow_signed, /* complain_on_overflow */
1468 bfd_elf_generic_reloc, /* special_function */
1469 "R_NDS32_SDA18S1_RELA",/* name */
1470 FALSE, /* partial_inplace */
1471 0x0003ffff, /* src_mask */
1472 0x0003ffff, /* dst_mask */
1473 FALSE), /* pcrel_offset */
1474
1475 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1476 0, /* rightshift */
1477 2, /* size (0 = byte, 1 = short, 2 = long) */
1478 19, /* bitsize */
1479 FALSE, /* pc_relative */
1480 0, /* bitpos */
1481 complain_overflow_signed, /* complain_on_overflow */
1482 bfd_elf_generic_reloc, /* special_function */
1483 "R_NDS32_SDA19S0_RELA",/* name */
1484 FALSE, /* partial_inplace */
1485 0x0007ffff, /* src_mask */
1486 0x0007ffff, /* dst_mask */
1487 FALSE), /* pcrel_offset */
1488 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1489 0, /* rightshift */
1490 0, /* size (0 = byte, 1 = short, 2 = long) */
1491 8, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont,/* complain_on_overflow */
1495 nds32_elf_ignore_reloc,/* special_function */
1496 "R_NDS32_DWARF2_OP1_RELA", /* name */
1497 FALSE, /* partial_inplace */
1498 0xff, /* src_mask */
1499 0xff, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1502 0, /* rightshift */
1503 1, /* size (0 = byte, 1 = short, 2 = long) */
1504 16, /* bitsize */
1505 FALSE, /* pc_relative */
1506 0, /* bitpos */
1507 complain_overflow_dont,/* complain_on_overflow */
1508 nds32_elf_ignore_reloc,/* special_function */
1509 "R_NDS32_DWARF2_OP2_RELA", /* name */
1510 FALSE, /* partial_inplace */
1511 0xffff, /* src_mask */
1512 0xffff, /* dst_mask */
1513 FALSE), /* pcrel_offset */
1514 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1515 0, /* rightshift */
1516 2, /* size (0 = byte, 1 = short, 2 = long) */
1517 32, /* bitsize */
1518 FALSE, /* pc_relative */
1519 0, /* bitpos */
1520 complain_overflow_dont,/* complain_on_overflow */
1521 nds32_elf_ignore_reloc,/* special_function */
1522 "R_NDS32_DWARF2_LEB_RELA", /* name */
1523 FALSE, /* partial_inplace */
1524 0xffffffff, /* src_mask */
1525 0xffffffff, /* dst_mask */
1526 FALSE), /* pcrel_offset */
1527 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1528 0, /* rightshift */
1529 1, /* size (0 = byte, 1 = short, 2 = long) */
1530 16, /* bitsize */
1531 FALSE, /* pc_relative */
1532 0, /* bitpos */
1533 complain_overflow_dont,/* complain_on_overflow */
1534 nds32_elf_ignore_reloc,/* special_function */
1535 "R_NDS32_UPDATE_TA_RELA", /* name */
1536 FALSE, /* partial_inplace */
1537 0xffff, /* src_mask */
1538 0xffff, /* dst_mask */
1539 FALSE), /* pcrel_offset */
1540 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1541 entry for the symbol. */
1542 HOWTO (R_NDS32_9_PLTREL, /* type */
1543 1, /* rightshift */
1544 1, /* size (0 = byte, 1 = short, 2 = long) */
1545 8, /* bitsize */
1546 TRUE, /* pc_relative */
1547 0, /* bitpos */
1548 complain_overflow_signed, /* complain_on_overflow */
1549 bfd_elf_generic_reloc, /* special_function */
1550 "R_NDS32_9_PLTREL", /* name */
1551 FALSE, /* partial_inplace */
1552 0xff, /* src_mask */
1553 0xff, /* dst_mask */
1554 TRUE), /* pcrel_offset */
1555 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1556 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1557 0, /* rightshift */
1558 2, /* size (0 = byte, 1 = short, 2 = long) */
1559 20, /* bitsize */
1560 FALSE, /* pc_relative */
1561 0, /* bitpos */
1562 complain_overflow_dont,/* complain_on_overflow */
1563 bfd_elf_generic_reloc, /* special_function */
1564 "R_NDS32_PLT_GOTREL_LO20", /* name */
1565 FALSE, /* partial_inplace */
1566 0x000fffff, /* src_mask */
1567 0x000fffff, /* dst_mask */
1568 FALSE), /* pcrel_offset */
1569 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1570 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1571 0, /* rightshift */
1572 2, /* size (0 = byte, 1 = short, 2 = long) */
1573 15, /* bitsize */
1574 FALSE, /* pc_relative */
1575 0, /* bitpos */
1576 complain_overflow_dont,/* complain_on_overflow */
1577 bfd_elf_generic_reloc, /* special_function */
1578 "R_NDS32_PLT_GOTREL_LO15", /* name */
1579 FALSE, /* partial_inplace */
1580 0x00007fff, /* src_mask */
1581 0x00007fff, /* dst_mask */
1582 FALSE), /* pcrel_offset */
1583 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1584 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1585 0, /* rightshift */
1586 2, /* size (0 = byte, 1 = short, 2 = long) */
1587 19, /* bitsize */
1588 FALSE, /* pc_relative */
1589 0, /* bitpos */
1590 complain_overflow_dont,/* complain_on_overflow */
1591 bfd_elf_generic_reloc, /* special_function */
1592 "R_NDS32_PLT_GOTREL_LO19", /* name */
1593 FALSE, /* partial_inplace */
1594 0x0007ffff, /* src_mask */
1595 0x0007ffff, /* dst_mask */
1596 FALSE), /* pcrel_offset */
1597 HOWTO (R_NDS32_GOT_LO15, /* type */
1598 0, /* rightshift */
1599 2, /* size (0 = byte, 1 = short, 2 = long) */
1600 15, /* bitsize */
1601 FALSE, /* pc_relative */
1602 0, /* bitpos */
1603 complain_overflow_dont,/* complain_on_overflow */
1604 bfd_elf_generic_reloc, /* special_function */
1605 "R_NDS32_GOT_LO15", /* name */
1606 FALSE, /* partial_inplace */
1607 0x00007fff, /* src_mask */
1608 0x00007fff, /* dst_mask */
1609 FALSE), /* pcrel_offset */
1610 HOWTO (R_NDS32_GOT_LO19, /* type */
1611 0, /* rightshift */
1612 2, /* size (0 = byte, 1 = short, 2 = long) */
1613 19, /* bitsize */
1614 FALSE, /* pc_relative */
1615 0, /* bitpos */
1616 complain_overflow_dont,/* complain_on_overflow */
1617 bfd_elf_generic_reloc, /* special_function */
1618 "R_NDS32_GOT_LO19", /* name */
1619 FALSE, /* partial_inplace */
1620 0x0007ffff, /* src_mask */
1621 0x0007ffff, /* dst_mask */
1622 FALSE), /* pcrel_offset */
1623 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1624 0, /* rightshift */
1625 2, /* size (0 = byte, 1 = short, 2 = long) */
1626 15, /* bitsize */
1627 FALSE, /* pc_relative */
1628 0, /* bitpos */
1629 complain_overflow_dont,/* complain_on_overflow */
1630 bfd_elf_generic_reloc, /* special_function */
1631 "R_NDS32_GOTOFF_LO15", /* name */
1632 FALSE, /* partial_inplace */
1633 0x00007fff, /* src_mask */
1634 0x00007fff, /* dst_mask */
1635 FALSE), /* pcrel_offset */
1636 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1637 0, /* rightshift */
1638 2, /* size (0 = byte, 1 = short, 2 = long) */
1639 19, /* bitsize */
1640 FALSE, /* pc_relative */
1641 0, /* bitpos */
1642 complain_overflow_dont,/* complain_on_overflow */
1643 bfd_elf_generic_reloc, /* special_function */
1644 "R_NDS32_GOTOFF_LO19", /* name */
1645 FALSE, /* partial_inplace */
1646 0x0007ffff, /* src_mask */
1647 0x0007ffff, /* dst_mask */
1648 FALSE), /* pcrel_offset */
1649 /* GOT 15 bits offset. */
1650 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1651 2, /* rightshift */
1652 2, /* size (0 = byte, 1 = short, 2 = long) */
1653 15, /* bitsize */
1654 FALSE, /* pc_relative */
1655 0, /* bitpos */
1656 complain_overflow_signed, /* complain_on_overflow */
1657 bfd_elf_generic_reloc, /* special_function */
1658 "R_NDS32_GOT15S2_RELA",/* name */
1659 FALSE, /* partial_inplace */
1660 0x00007fff, /* src_mask */
1661 0x00007fff, /* dst_mask */
1662 FALSE), /* pcrel_offset */
1663 /* GOT 17 bits offset. */
1664 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1665 2, /* rightshift */
1666 2, /* size (0 = byte, 1 = short, 2 = long) */
1667 17, /* bitsize */
1668 FALSE, /* pc_relative */
1669 0, /* bitpos */
1670 complain_overflow_signed, /* complain_on_overflow */
1671 bfd_elf_generic_reloc, /* special_function */
1672 "R_NDS32_GOT17S2_RELA",/* name */
1673 FALSE, /* partial_inplace */
1674 0x0001ffff, /* src_mask */
1675 0x0001ffff, /* dst_mask */
1676 FALSE), /* pcrel_offset */
1677 /* A 5 bit address. */
1678 HOWTO (R_NDS32_5_RELA, /* type */
1679 0, /* rightshift */
1680 1, /* size (0 = byte, 1 = short, 2 = long) */
1681 5, /* bitsize */
1682 FALSE, /* pc_relative */
1683 0, /* bitpos */
1684 complain_overflow_signed, /* complain_on_overflow */
1685 bfd_elf_generic_reloc, /* special_function */
1686 "R_NDS32_5_RELA", /* name */
1687 FALSE, /* partial_inplace */
1688 0x1f, /* src_mask */
1689 0x1f, /* dst_mask */
1690 FALSE), /* pcrel_offset */
1691 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1692 1, /* rightshift */
1693 1, /* size (0 = byte, 1 = short, 2 = long) */
1694 9, /* bitsize */
1695 TRUE, /* pc_relative */
1696 0, /* bitpos */
1697 complain_overflow_unsigned, /* complain_on_overflow */
1698 bfd_elf_generic_reloc, /* special_function */
1699 "R_NDS32_10_UPCREL_RELA", /* name */
1700 FALSE, /* partial_inplace */
1701 0x1ff, /* src_mask */
1702 0x1ff, /* dst_mask */
1703 TRUE), /* pcrel_offset */
1704 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1705 2, /* rightshift */
1706 1, /* size (0 = byte, 1 = short, 2 = long) */
1707 7, /* bitsize */
1708 FALSE, /* pc_relative */
1709 0, /* bitpos */
1710 complain_overflow_unsigned, /* complain_on_overflow */
1711 bfd_elf_generic_reloc, /* special_function */
1712 "R_NDS32_SDA_FP7U2_RELA", /* name */
1713 FALSE, /* partial_inplace */
1714 0x0000007f, /* src_mask */
1715 0x0000007f, /* dst_mask */
1716 FALSE), /* pcrel_offset */
1717 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1718 1, /* rightshift */
1719 2, /* size (0 = byte, 1 = short, 2 = long) */
1720 8, /* bitsize */
1721 TRUE, /* pc_relative */
1722 0, /* bitpos */
1723 complain_overflow_signed, /* complain_on_overflow */
1724 bfd_elf_generic_reloc, /* special_function */
1725 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1726 FALSE, /* partial_inplace */
1727 0xff, /* src_mask */
1728 0xff, /* dst_mask */
1729 TRUE), /* pcrel_offset */
1730 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1731 1, /* rightshift */
1732 2, /* size (0 = byte, 1 = short, 2 = long) */
1733 24, /* bitsize */
1734 FALSE, /* pc_relative */
1735 0, /* bitpos */
1736 complain_overflow_dont,/* complain_on_overflow */
1737 bfd_elf_generic_reloc, /* special_function */
1738 "R_NDS32_25_ABS_RELA", /* name */
1739 FALSE, /* partial_inplace */
1740 0xffffff, /* src_mask */
1741 0xffffff, /* dst_mask */
1742 FALSE), /* pcrel_offset */
1743
1744 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1745 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1746 1, /* rightshift */
1747 2, /* size (0 = byte, 1 = short, 2 = long) */
1748 16, /* bitsize */
1749 TRUE, /* pc_relative */
1750 0, /* bitpos */
1751 complain_overflow_signed, /* complain_on_overflow */
1752 bfd_elf_generic_reloc, /* special_function */
1753 "R_NDS32_17IFC_PCREL_RELA", /* name */
1754 FALSE, /* partial_inplace */
1755 0xffff, /* src_mask */
1756 0xffff, /* dst_mask */
1757 TRUE), /* pcrel_offset */
1758
1759 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1760 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1761 1, /* rightshift */
1762 1, /* size (0 = byte, 1 = short, 2 = long) */
1763 9, /* bitsize */
1764 TRUE, /* pc_relative */
1765 0, /* bitpos */
1766 complain_overflow_unsigned, /* complain_on_overflow */
1767 bfd_elf_generic_reloc, /* special_function */
1768 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1769 FALSE, /* partial_inplace */
1770 0x1ff, /* src_mask */
1771 0x1ff, /* dst_mask */
1772 TRUE), /* pcrel_offset */
1773
1774 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1775 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1776 12, /* rightshift */
1777 2, /* size (0 = byte, 1 = short, 2 = long) */
1778 20, /* bitsize */
1779 FALSE, /* pc_relative */
1780 0, /* bitpos */
1781 complain_overflow_dont, /* complain_on_overflow */
1782 bfd_elf_generic_reloc, /* special_function */
1783 "R_NDS32_TLS_LE_HI20", /* name */
1784 FALSE, /* partial_inplace */
1785 0x000fffff, /* src_mask */
1786 0x000fffff, /* dst_mask */
1787 FALSE), /* pcrel_offset */
1788 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1789 0, /* rightshift */
1790 2, /* size (0 = byte, 1 = short, 2 = long) */
1791 12, /* bitsize */
1792 FALSE, /* pc_relative */
1793 0, /* bitpos */
1794 complain_overflow_dont, /* complain_on_overflow */
1795 bfd_elf_generic_reloc, /* special_function */
1796 "R_NDS32_TLS_LE_LO12", /* name */
1797 FALSE, /* partial_inplace */
1798 0x00000fff, /* src_mask */
1799 0x00000fff, /* dst_mask */
1800 FALSE), /* pcrel_offset */
1801
1802 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1803 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1804 12, /* rightshift */
1805 2, /* size (0 = byte, 1 = short, 2 = long) */
1806 20, /* bitsize */
1807 FALSE, /* pc_relative */
1808 0, /* bitpos */
1809 complain_overflow_dont, /* complain_on_overflow */
1810 bfd_elf_generic_reloc, /* special_function */
1811 "R_NDS32_TLS_IE_HI20", /* name */
1812 FALSE, /* partial_inplace */
1813 0x000fffff, /* src_mask */
1814 0x000fffff, /* dst_mask */
1815 FALSE), /* pcrel_offset */
1816 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1817 2, /* rightshift */
1818 2, /* size (0 = byte, 1 = short, 2 = long) */
1819 10, /* bitsize */
1820 FALSE, /* pc_relative */
1821 0, /* bitpos */
1822 complain_overflow_dont, /* complain_on_overflow */
1823 bfd_elf_generic_reloc, /* special_function */
1824 "R_NDS32_TLS_IE_LO12S2", /* name */
1825 FALSE, /* partial_inplace */
1826 0x000003ff, /* src_mask */
1827 0x000003ff, /* dst_mask */
1828 FALSE), /* pcrel_offset */
1829 /* Mark a TLS IE entry in GOT. */
1830 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1831 0, /* rightshift */
1832 2, /* size (0 = byte, 1 = short, 2 = long) */
1833 32, /* bitsize */
1834 FALSE, /* pc_relative */
1835 0, /* bitpos */
1836 complain_overflow_bitfield, /* complain_on_overflow */
1837 bfd_elf_generic_reloc, /* special_function */
1838 "R_NDS32_TLS_TPOFF", /* name */
1839 FALSE, /* partial_inplace */
1840 0xffffffff, /* src_mask */
1841 0xffffffff, /* dst_mask */
1842 FALSE), /* pcrel_offset */
1843 /* A 20 bit address. */
1844 HOWTO (R_NDS32_TLS_LE_20, /* type */
1845 0, /* rightshift */
1846 2, /* size (0 = byte, 1 = short, 2 = long) */
1847 20, /* bitsize */
1848 FALSE, /* pc_relative */
1849 0, /* bitpos */
1850 complain_overflow_signed, /* complain_on_overflow */
1851 bfd_elf_generic_reloc, /* special_function */
1852 "R_NDS32_TLS_LE_20", /* name */
1853 FALSE, /* partial_inplace */
1854 0xfffff, /* src_mask */
1855 0xfffff, /* dst_mask */
1856 FALSE), /* pcrel_offset */
1857 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1858 0, /* rightshift */
1859 2, /* size (0 = byte, 1 = short, 2 = long) */
1860 15, /* bitsize */
1861 FALSE, /* pc_relative */
1862 0, /* bitpos */
1863 complain_overflow_signed, /* complain_on_overflow */
1864 bfd_elf_generic_reloc, /* special_function */
1865 "R_NDS32_TLS_LE_15S0", /* name */
1866 FALSE, /* partial_inplace */
1867 0x7fff, /* src_mask */
1868 0x7fff, /* dst_mask */
1869 FALSE), /* pcrel_offset */
1870 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1871 1, /* rightshift */
1872 2, /* size (0 = byte, 1 = short, 2 = long) */
1873 15, /* bitsize */
1874 FALSE, /* pc_relative */
1875 0, /* bitpos */
1876 complain_overflow_signed, /* complain_on_overflow */
1877 bfd_elf_generic_reloc, /* special_function */
1878 "R_NDS32_TLS_LE_15S1", /* name */
1879 FALSE, /* partial_inplace */
1880 0x7fff, /* src_mask */
1881 0x7fff, /* dst_mask */
1882 FALSE), /* pcrel_offset */
1883 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1884 2, /* rightshift */
1885 2, /* size (0 = byte, 1 = short, 2 = long) */
1886 15, /* bitsize */
1887 FALSE, /* pc_relative */
1888 0, /* bitpos */
1889 complain_overflow_signed, /* complain_on_overflow */
1890 bfd_elf_generic_reloc, /* special_function */
1891 "R_NDS32_TLS_LE_15S2", /* name */
1892 FALSE, /* partial_inplace */
1893 0x7fff, /* src_mask */
1894 0x7fff, /* dst_mask */
1895 FALSE), /* pcrel_offset */
1896
1897 /* Relax hint for unconditional call sequence */
1898 HOWTO (R_NDS32_LONGCALL4, /* type */
1899 0, /* rightshift */
1900 2, /* size (0 = byte, 1 = short, 2 = long) */
1901 32, /* bitsize */
1902 FALSE, /* pc_relative */
1903 0, /* bitpos */
1904 complain_overflow_dont, /* complain_on_overflow */
1905 nds32_elf_ignore_reloc, /* special_function */
1906 "R_NDS32_LONGCALL4", /* name */
1907 FALSE, /* partial_inplace */
1908 0xffffffff, /* src_mask */
1909 0xffffffff, /* dst_mask */
1910 FALSE), /* pcrel_offset */
1911
1912 /* Relax hint for conditional call sequence. */
1913 HOWTO (R_NDS32_LONGCALL5, /* type */
1914 0, /* rightshift */
1915 2, /* size (0 = byte, 1 = short, 2 = long) */
1916 32, /* bitsize */
1917 FALSE, /* pc_relative */
1918 0, /* bitpos */
1919 complain_overflow_dont, /* complain_on_overflow */
1920 nds32_elf_ignore_reloc, /* special_function */
1921 "R_NDS32_LONGCALL5", /* name */
1922 FALSE, /* partial_inplace */
1923 0xffffffff, /* src_mask */
1924 0xffffffff, /* dst_mask */
1925 FALSE), /* pcrel_offset */
1926
1927 /* Relax hint for conditional call sequence. */
1928 HOWTO (R_NDS32_LONGCALL6, /* type */
1929 0, /* rightshift */
1930 2, /* size (0 = byte, 1 = short, 2 = long) */
1931 32, /* bitsize */
1932 FALSE, /* pc_relative */
1933 0, /* bitpos */
1934 complain_overflow_dont, /* complain_on_overflow */
1935 nds32_elf_ignore_reloc, /* special_function */
1936 "R_NDS32_LONGCALL6", /* name */
1937 FALSE, /* partial_inplace */
1938 0xffffffff, /* src_mask */
1939 0xffffffff, /* dst_mask */
1940 FALSE), /* pcrel_offset */
1941
1942 /* Relax hint for unconditional branch sequence. */
1943 HOWTO (R_NDS32_LONGJUMP4, /* type */
1944 0, /* rightshift */
1945 2, /* size (0 = byte, 1 = short, 2 = long) */
1946 32, /* bitsize */
1947 FALSE, /* pc_relative */
1948 0, /* bitpos */
1949 complain_overflow_dont, /* complain_on_overflow */
1950 nds32_elf_ignore_reloc, /* special_function */
1951 "R_NDS32_LONGJUMP4", /* name */
1952 FALSE, /* partial_inplace */
1953 0xffffffff, /* src_mask */
1954 0xffffffff, /* dst_mask */
1955 FALSE), /* pcrel_offset */
1956
1957 /* Relax hint for conditional branch sequence. */
1958 HOWTO (R_NDS32_LONGJUMP5, /* type */
1959 0, /* rightshift */
1960 2, /* size (0 = byte, 1 = short, 2 = long) */
1961 32, /* bitsize */
1962 FALSE, /* pc_relative */
1963 0, /* bitpos */
1964 complain_overflow_dont, /* complain_on_overflow */
1965 nds32_elf_ignore_reloc, /* special_function */
1966 "R_NDS32_LONGJUMP5", /* name */
1967 FALSE, /* partial_inplace */
1968 0xffffffff, /* src_mask */
1969 0xffffffff, /* dst_mask */
1970 FALSE), /* pcrel_offset */
1971
1972 /* Relax hint for conditional branch sequence. */
1973 HOWTO (R_NDS32_LONGJUMP6, /* type */
1974 0, /* rightshift */
1975 2, /* size (0 = byte, 1 = short, 2 = long) */
1976 32, /* bitsize */
1977 FALSE, /* pc_relative */
1978 0, /* bitpos */
1979 complain_overflow_dont, /* complain_on_overflow */
1980 nds32_elf_ignore_reloc, /* special_function */
1981 "R_NDS32_LONGJUMP6", /* name */
1982 FALSE, /* partial_inplace */
1983 0xffffffff, /* src_mask */
1984 0xffffffff, /* dst_mask */
1985 FALSE), /* pcrel_offset */
1986
1987 /* Relax hint for conditional branch sequence. */
1988 HOWTO (R_NDS32_LONGJUMP7, /* type */
1989 0, /* rightshift */
1990 2, /* size (0 = byte, 1 = short, 2 = long) */
1991 32, /* bitsize */
1992 FALSE, /* pc_relative */
1993 0, /* bitpos */
1994 complain_overflow_dont, /* complain_on_overflow */
1995 nds32_elf_ignore_reloc, /* special_function */
1996 "R_NDS32_LONGJUMP7", /* name */
1997 FALSE, /* partial_inplace */
1998 0xffffffff, /* src_mask */
1999 0xffffffff, /* dst_mask */
2000 FALSE), /* pcrel_offset */
2001 };
2002
2003 /* Relocations used for relaxation. */
2004 static reloc_howto_type nds32_elf_relax_howto_table[] =
2005 {
2006 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
2007 0, /* rightshift */
2008 2, /* size (0 = byte, 1 = short, 2 = long) */
2009 32, /* bitsize */
2010 FALSE, /* pc_relative */
2011 0, /* bitpos */
2012 complain_overflow_dont,/* complain_on_overflow */
2013 nds32_elf_ignore_reloc,/* special_function */
2014 "R_NDS32_RELAX_ENTRY", /* name */
2015 FALSE, /* partial_inplace */
2016 0xffffffff, /* src_mask */
2017 0xffffffff, /* dst_mask */
2018 FALSE), /* pcrel_offset */
2019 HOWTO (R_NDS32_GOT_SUFF, /* type */
2020 0, /* rightshift */
2021 2, /* size (0 = byte, 1 = short, 2 = long) */
2022 32, /* bitsize */
2023 FALSE, /* pc_relative */
2024 0, /* bitpos */
2025 complain_overflow_dont,/* complain_on_overflow */
2026 nds32_elf_ignore_reloc,/* special_function */
2027 "R_NDS32_GOT_SUFF", /* name */
2028 FALSE, /* partial_inplace */
2029 0xffffffff, /* src_mask */
2030 0xffffffff, /* dst_mask */
2031 FALSE), /* pcrel_offset */
2032 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
2033 0, /* rightshift */
2034 2, /* size (0 = byte, 1 = short, 2 = long) */
2035 32, /* bitsize */
2036 FALSE, /* pc_relative */
2037 0, /* bitpos */
2038 complain_overflow_bitfield, /* complain_on_overflow */
2039 nds32_elf_ignore_reloc,/* special_function */
2040 "R_NDS32_GOTOFF_SUFF", /* name */
2041 FALSE, /* partial_inplace */
2042 0xffffffff, /* src_mask */
2043 0xffffffff, /* dst_mask */
2044 FALSE), /* pcrel_offset */
2045 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
2046 0, /* rightshift */
2047 2, /* size (0 = byte, 1 = short, 2 = long) */
2048 32, /* bitsize */
2049 FALSE, /* pc_relative */
2050 0, /* bitpos */
2051 complain_overflow_dont,/* complain_on_overflow */
2052 nds32_elf_ignore_reloc,/* special_function */
2053 "R_NDS32_PLT_GOT_SUFF",/* name */
2054 FALSE, /* partial_inplace */
2055 0xffffffff, /* src_mask */
2056 0xffffffff, /* dst_mask */
2057 FALSE), /* pcrel_offset */
2058 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
2059 0, /* rightshift */
2060 2, /* size (0 = byte, 1 = short, 2 = long) */
2061 32, /* bitsize */
2062 FALSE, /* pc_relative */
2063 0, /* bitpos */
2064 complain_overflow_dont,/* complain_on_overflow */
2065 nds32_elf_ignore_reloc,/* special_function */
2066 "R_NDS32_MULCALL_SUFF",/* name */
2067 FALSE, /* partial_inplace */
2068 0xffffffff, /* src_mask */
2069 0xffffffff, /* dst_mask */
2070 FALSE), /* pcrel_offset */
2071 HOWTO (R_NDS32_PTR, /* type */
2072 0, /* rightshift */
2073 2, /* size (0 = byte, 1 = short, 2 = long) */
2074 32, /* bitsize */
2075 FALSE, /* pc_relative */
2076 0, /* bitpos */
2077 complain_overflow_dont,/* complain_on_overflow */
2078 nds32_elf_ignore_reloc,/* special_function */
2079 "R_NDS32_PTR", /* name */
2080 FALSE, /* partial_inplace */
2081 0xffffffff, /* src_mask */
2082 0xffffffff, /* dst_mask */
2083 FALSE), /* pcrel_offset */
2084 HOWTO (R_NDS32_PTR_COUNT, /* type */
2085 0, /* rightshift */
2086 2, /* size (0 = byte, 1 = short, 2 = long) */
2087 32, /* bitsize */
2088 FALSE, /* pc_relative */
2089 0, /* bitpos */
2090 complain_overflow_dont,/* complain_on_overflow */
2091 nds32_elf_ignore_reloc,/* special_function */
2092 "R_NDS32_PTR_COUNT", /* name */
2093 FALSE, /* partial_inplace */
2094 0xffffffff, /* src_mask */
2095 0xffffffff, /* dst_mask */
2096 FALSE), /* pcrel_offset */
2097 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2098 0, /* rightshift */
2099 2, /* size (0 = byte, 1 = short, 2 = long) */
2100 32, /* bitsize */
2101 FALSE, /* pc_relative */
2102 0, /* bitpos */
2103 complain_overflow_dont,/* complain_on_overflow */
2104 nds32_elf_ignore_reloc,/* special_function */
2105 "R_NDS32_PTR_RESOLVED",/* name */
2106 FALSE, /* partial_inplace */
2107 0xffffffff, /* src_mask */
2108 0xffffffff, /* dst_mask */
2109 FALSE), /* pcrel_offset */
2110 HOWTO (R_NDS32_PLTBLOCK, /* type */
2111 0, /* rightshift */
2112 2, /* size (0 = byte, 1 = short, 2 = long) */
2113 32, /* bitsize */
2114 FALSE, /* pc_relative */
2115 0, /* bitpos */
2116 complain_overflow_dont,/* complain_on_overflow */
2117 nds32_elf_ignore_reloc,/* special_function */
2118 "R_NDS32_PLTBLOCK", /* name */
2119 FALSE, /* partial_inplace */
2120 0xffffffff, /* src_mask */
2121 0xffffffff, /* dst_mask */
2122 FALSE), /* pcrel_offset */
2123 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2124 0, /* rightshift */
2125 2, /* size (0 = byte, 1 = short, 2 = long) */
2126 32, /* bitsize */
2127 FALSE, /* pc_relative */
2128 0, /* bitpos */
2129 complain_overflow_dont,/* complain_on_overflow */
2130 nds32_elf_ignore_reloc,/* special_function */
2131 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2132 FALSE, /* partial_inplace */
2133 0xffffffff, /* src_mask */
2134 0xffffffff, /* dst_mask */
2135 FALSE), /* pcrel_offset */
2136 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2137 0, /* rightshift */
2138 2, /* size (0 = byte, 1 = short, 2 = long) */
2139 32, /* bitsize */
2140 FALSE, /* pc_relative */
2141 0, /* bitpos */
2142 complain_overflow_dont,/* complain_on_overflow */
2143 nds32_elf_ignore_reloc,/* special_function */
2144 "R_NDS32_RELAX_REGION_END", /* name */
2145 FALSE, /* partial_inplace */
2146 0xffffffff, /* src_mask */
2147 0xffffffff, /* dst_mask */
2148 FALSE), /* pcrel_offset */
2149 HOWTO (R_NDS32_MINUEND, /* type */
2150 0, /* rightshift */
2151 2, /* size (0 = byte, 1 = short, 2 = long) */
2152 32, /* bitsize */
2153 FALSE, /* pc_relative */
2154 0, /* bitpos */
2155 complain_overflow_dont,/* complain_on_overflow */
2156 nds32_elf_ignore_reloc,/* special_function */
2157 "R_NDS32_MINUEND", /* name */
2158 FALSE, /* partial_inplace */
2159 0xffffffff, /* src_mask */
2160 0xffffffff, /* dst_mask */
2161 FALSE), /* pcrel_offset */
2162 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2163 0, /* rightshift */
2164 2, /* size (0 = byte, 1 = short, 2 = long) */
2165 32, /* bitsize */
2166 FALSE, /* pc_relative */
2167 0, /* bitpos */
2168 complain_overflow_dont,/* complain_on_overflow */
2169 nds32_elf_ignore_reloc,/* special_function */
2170 "R_NDS32_SUBTRAHEND", /* name */
2171 FALSE, /* partial_inplace */
2172 0xffffffff, /* src_mask */
2173 0xffffffff, /* dst_mask */
2174 FALSE), /* pcrel_offset */
2175 HOWTO (R_NDS32_DIFF8, /* type */
2176 0, /* rightshift */
2177 0, /* size (0 = byte, 1 = short, 2 = long) */
2178 8, /* bitsize */
2179 FALSE, /* pc_relative */
2180 0, /* bitpos */
2181 complain_overflow_dont,/* complain_on_overflow */
2182 nds32_elf_ignore_reloc,/* special_function */
2183 "R_NDS32_DIFF8", /* name */
2184 FALSE, /* partial_inplace */
2185 0x000000ff, /* src_mask */
2186 0x000000ff, /* dst_mask */
2187 FALSE), /* pcrel_offset */
2188 HOWTO (R_NDS32_DIFF16, /* type */
2189 0, /* rightshift */
2190 1, /* size (0 = byte, 1 = short, 2 = long) */
2191 16, /* bitsize */
2192 FALSE, /* pc_relative */
2193 0, /* bitpos */
2194 complain_overflow_dont,/* complain_on_overflow */
2195 nds32_elf_ignore_reloc,/* special_function */
2196 "R_NDS32_DIFF16", /* name */
2197 FALSE, /* partial_inplace */
2198 0x0000ffff, /* src_mask */
2199 0x0000ffff, /* dst_mask */
2200 FALSE), /* pcrel_offset */
2201 HOWTO (R_NDS32_DIFF32, /* type */
2202 0, /* rightshift */
2203 2, /* size (0 = byte, 1 = short, 2 = long) */
2204 32, /* bitsize */
2205 FALSE, /* pc_relative */
2206 0, /* bitpos */
2207 complain_overflow_dont,/* complain_on_overflow */
2208 nds32_elf_ignore_reloc,/* special_function */
2209 "R_NDS32_DIFF32", /* name */
2210 FALSE, /* partial_inplace */
2211 0xffffffff, /* src_mask */
2212 0xffffffff, /* dst_mask */
2213 FALSE), /* pcrel_offset */
2214 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2215 0, /* rightshift */
2216 0, /* size (0 = byte, 1 = short, 2 = long) */
2217 0, /* bitsize */
2218 FALSE, /* pc_relative */
2219 0, /* bitpos */
2220 complain_overflow_dont,/* complain_on_overflow */
2221 nds32_elf_ignore_reloc,/* special_function */
2222 "R_NDS32_DIFF_ULEB128",/* name */
2223 FALSE, /* partial_inplace */
2224 0xffffffff, /* src_mask */
2225 0xffffffff, /* dst_mask */
2226 FALSE), /* pcrel_offset */
2227 HOWTO (R_NDS32_DATA, /* type */
2228 0, /* rightshift */
2229 2, /* size (0 = byte, 1 = short, 2 = long) */
2230 32, /* bitsize */
2231 FALSE, /* pc_relative */
2232 0, /* bitpos */
2233 complain_overflow_dont,/* complain_on_overflow */
2234 nds32_elf_ignore_reloc,/* special_function */
2235 "R_NDS32_DATA", /* name */
2236 FALSE, /* partial_inplace */
2237 0xffffffff, /* src_mask */
2238 0xffffffff, /* dst_mask */
2239 FALSE), /* pcrel_offset */
2240 HOWTO (R_NDS32_TRAN, /* type */
2241 0, /* rightshift */
2242 2, /* size (0 = byte, 1 = short, 2 = long) */
2243 32, /* bitsize */
2244 FALSE, /* pc_relative */
2245 0, /* bitpos */
2246 complain_overflow_dont,/* complain_on_overflow */
2247 nds32_elf_ignore_reloc,/* special_function */
2248 "R_NDS32_TRAN", /* name */
2249 FALSE, /* partial_inplace */
2250 0xffffffff, /* src_mask */
2251 0xffffffff, /* dst_mask */
2252 FALSE), /* pcrel_offset */
2253 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2254 0, /* rightshift */
2255 2, /* size (0 = byte, 1 = short, 2 = long) */
2256 32, /* bitsize */
2257 FALSE, /* pc_relative */
2258 0, /* bitpos */
2259 complain_overflow_dont, /* complain_on_overflow */
2260 nds32_elf_ignore_reloc, /* special_function */
2261 "R_NDS32_TLS_LE_ADD", /* name */
2262 FALSE, /* partial_inplace */
2263 0xffffffff, /* src_mask */
2264 0xffffffff, /* dst_mask */
2265 FALSE), /* pcrel_offset */
2266 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2267 0, /* rightshift */
2268 2, /* size (0 = byte, 1 = short, 2 = long) */
2269 32, /* bitsize */
2270 FALSE, /* pc_relative */
2271 0, /* bitpos */
2272 complain_overflow_dont, /* complain_on_overflow */
2273 nds32_elf_ignore_reloc, /* special_function */
2274 "R_NDS32_TLS_LE_LS", /* name */
2275 FALSE, /* partial_inplace */
2276 0xffffffff, /* src_mask */
2277 0xffffffff, /* dst_mask */
2278 FALSE), /* pcrel_offset */
2279 HOWTO (R_NDS32_EMPTY, /* type */
2280 0, /* rightshift */
2281 2, /* size (0 = byte, 1 = short, 2 = long) */
2282 32, /* bitsize */
2283 FALSE, /* pc_relative */
2284 0, /* bitpos */
2285 complain_overflow_dont, /* complain_on_overflow */
2286 nds32_elf_ignore_reloc, /* special_function */
2287 "R_NDS32_EMPTY", /* name */
2288 FALSE, /* partial_inplace */
2289 0xffffffff, /* src_mask */
2290 0xffffffff, /* dst_mask */
2291 FALSE), /* pcrel_offset */
2292 };
2293
2294 \f
2295 /* nds32_insertion_sort sorts an array with nmemb elements of size size.
2296 This prototype is the same as qsort (). */
2297
2298 void
2299 nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2300 int (*compar) (const void *lhs, const void *rhs))
2301 {
2302 char *ptr = (char *) base;
2303 int i, j;
2304 char *tmp = xmalloc (size);
2305
2306 /* If i is less than j, i is inserted before j.
2307
2308 |---- j ----- i --------------|
2309 \ / \ /
2310 sorted unsorted
2311 */
2312
2313 for (i = 1; i < (int) nmemb; i++)
2314 {
2315 for (j = (i - 1); j >= 0; j--)
2316 if (compar (ptr + i * size, ptr + j * size) >= 0)
2317 break;
2318
2319 j++;
2320
2321 if (i == j)
2322 continue; /* i is in order. */
2323
2324 memcpy (tmp, ptr + i * size, size);
2325 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2326 memcpy (ptr + j * size, tmp, size);
2327 }
2328 free (tmp);
2329 }
2330
2331 /* Sort relocation by r_offset.
2332
2333 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2334 algorithm. Relocations at the same r_offset must keep their order.
2335 For example, RELAX_ENTRY must be the very first relocation entry.
2336
2337 Currently, this function implements insertion-sort.
2338
2339 FIXME: If we already sort them in assembler, why bother sort them
2340 here again? */
2341
2342 static int
2343 compar_reloc (const void *lhs, const void *rhs)
2344 {
2345 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2346 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2347
2348 if (l->r_offset > r->r_offset)
2349 return 1;
2350 else if (l->r_offset == r->r_offset)
2351 return 0;
2352 else
2353 return -1;
2354 }
2355
2356 /* Functions listed below are only used for old relocs.
2357 * nds32_elf_9_pcrel_reloc
2358 * nds32_elf_do_9_pcrel_reloc
2359 * nds32_elf_hi20_reloc
2360 * nds32_elf_relocate_hi20
2361 * nds32_elf_lo12_reloc
2362 * nds32_elf_sda15_reloc
2363 * nds32_elf_generic_reloc
2364 */
2365
2366 /* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2367
2368 static bfd_reloc_status_type
2369 nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2370 void *data, asection *input_section, bfd *output_bfd,
2371 char **error_message ATTRIBUTE_UNUSED)
2372 {
2373 /* This part is from bfd_elf_generic_reloc. */
2374 if (output_bfd != (bfd *) NULL
2375 && (symbol->flags & BSF_SECTION_SYM) == 0
2376 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2377 {
2378 reloc_entry->address += input_section->output_offset;
2379 return bfd_reloc_ok;
2380 }
2381
2382 if (output_bfd != NULL)
2383 {
2384 /* FIXME: See bfd_perform_relocation. Is this right? */
2385 return bfd_reloc_continue;
2386 }
2387
2388 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2389 input_section,
2390 data, reloc_entry->address,
2391 symbol->section,
2392 (symbol->value
2393 + symbol->section->output_section->vma
2394 + symbol->section->output_offset),
2395 reloc_entry->addend);
2396 }
2397
2398 /* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2399 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2400
2401 static bfd_reloc_status_type
2402 nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2403 asection *input_section, bfd_byte *data,
2404 bfd_vma offset,
2405 asection *symbol_section ATTRIBUTE_UNUSED,
2406 bfd_vma symbol_value, bfd_vma addend)
2407 {
2408 bfd_signed_vma relocation;
2409 unsigned short x;
2410 bfd_reloc_status_type status;
2411
2412 /* Sanity check the address (offset in section). */
2413 if (offset > bfd_get_section_limit (abfd, input_section))
2414 return bfd_reloc_outofrange;
2415
2416 relocation = symbol_value + addend;
2417 /* Make it pc relative. */
2418 relocation -= (input_section->output_section->vma
2419 + input_section->output_offset);
2420 /* These jumps mask off the lower two bits of the current address
2421 before doing pcrel calculations. */
2422 relocation -= (offset & -(bfd_vma) 2);
2423
2424 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
2425 status = bfd_reloc_overflow;
2426 else
2427 status = bfd_reloc_ok;
2428
2429 x = bfd_getb16 (data + offset);
2430
2431 relocation >>= howto->rightshift;
2432 relocation <<= howto->bitpos;
2433 x = (x & ~howto->dst_mask)
2434 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2435
2436 bfd_putb16 ((bfd_vma) x, data + offset);
2437
2438 return status;
2439 }
2440
2441 /* Handle the R_NDS32_HI20_[SU]LO relocs.
2442 HI20_SLO is for the add3 and load/store with displacement instructions.
2443 HI20 is for the or3 instruction.
2444 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2445 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2446 we must add one to the high 16 bytes (which will get subtracted off when
2447 the low 16 bits are added).
2448 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2449 because there is a carry from the LO12 to the HI20. Here we just save
2450 the information we need; we do the actual relocation when we see the LO12.
2451 This code is copied from the elf32-mips.c. We also support an arbitrary
2452 number of HI20 relocs to be associated with a single LO12 reloc. The
2453 assembler sorts the relocs to ensure each HI20 immediately precedes its
2454 LO12. However if there are multiple copies, the assembler may not find
2455 the real LO12 so it picks the first one it finds. */
2456
2457 struct nds32_hi20
2458 {
2459 struct nds32_hi20 *next;
2460 bfd_byte *addr;
2461 bfd_vma addend;
2462 };
2463
2464 static struct nds32_hi20 *nds32_hi20_list;
2465
2466 static bfd_reloc_status_type
2467 nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2468 asymbol *symbol, void *data, asection *input_section,
2469 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2470 {
2471 bfd_reloc_status_type ret;
2472 bfd_vma relocation;
2473 struct nds32_hi20 *n;
2474
2475 /* This part is from bfd_elf_generic_reloc.
2476 If we're relocating, and this an external symbol, we don't want
2477 to change anything. */
2478 if (output_bfd != (bfd *) NULL
2479 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2480 {
2481 reloc_entry->address += input_section->output_offset;
2482 return bfd_reloc_ok;
2483 }
2484
2485 /* Sanity check the address (offset in section). */
2486 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2487 return bfd_reloc_outofrange;
2488
2489 ret = bfd_reloc_ok;
2490 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2491 ret = bfd_reloc_undefined;
2492
2493 if (bfd_is_com_section (symbol->section))
2494 relocation = 0;
2495 else
2496 relocation = symbol->value;
2497
2498 relocation += symbol->section->output_section->vma;
2499 relocation += symbol->section->output_offset;
2500 relocation += reloc_entry->addend;
2501
2502 /* Save the information, and let LO12 do the actual relocation. */
2503 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2504 if (n == NULL)
2505 return bfd_reloc_outofrange;
2506
2507 n->addr = (bfd_byte *) data + reloc_entry->address;
2508 n->addend = relocation;
2509 n->next = nds32_hi20_list;
2510 nds32_hi20_list = n;
2511
2512 if (output_bfd != (bfd *) NULL)
2513 reloc_entry->address += input_section->output_offset;
2514
2515 return ret;
2516 }
2517
2518 /* Handle an NDS32 ELF HI20 reloc. */
2519
2520 static void
2521 nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2522 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2523 Elf_Internal_Rela *rello, bfd_byte *contents,
2524 bfd_vma addend)
2525 {
2526 unsigned long insn;
2527 bfd_vma addlo;
2528
2529 insn = bfd_getb32 (contents + relhi->r_offset);
2530
2531 addlo = bfd_getb32 (contents + rello->r_offset);
2532 addlo &= 0xfff;
2533
2534 addend += ((insn & 0xfffff) << 20) + addlo;
2535
2536 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2537 bfd_putb32 (insn, contents + relhi->r_offset);
2538 }
2539
2540 /* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2541 inplace relocation; this function exists in order to do the
2542 R_NDS32_HI20_[SU]LO relocation described above. */
2543
2544 static bfd_reloc_status_type
2545 nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2546 void *data, asection *input_section, bfd *output_bfd,
2547 char **error_message)
2548 {
2549 /* This part is from bfd_elf_generic_reloc.
2550 If we're relocating, and this an external symbol, we don't want
2551 to change anything. */
2552 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2553 && reloc_entry->addend == 0)
2554 {
2555 reloc_entry->address += input_section->output_offset;
2556 return bfd_reloc_ok;
2557 }
2558
2559 if (nds32_hi20_list != NULL)
2560 {
2561 struct nds32_hi20 *l;
2562
2563 l = nds32_hi20_list;
2564 while (l != NULL)
2565 {
2566 unsigned long insn;
2567 unsigned long val;
2568 unsigned long vallo;
2569 struct nds32_hi20 *next;
2570
2571 /* Do the HI20 relocation. Note that we actually don't need
2572 to know anything about the LO12 itself, except where to
2573 find the low 12 bits of the addend needed by the LO12. */
2574 insn = bfd_getb32 (l->addr);
2575 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2576 vallo &= 0xfff;
2577 switch (reloc_entry->howto->type)
2578 {
2579 case R_NDS32_LO12S3:
2580 vallo <<= 3;
2581 break;
2582
2583 case R_NDS32_LO12S2:
2584 vallo <<= 2;
2585 break;
2586
2587 case R_NDS32_LO12S1:
2588 vallo <<= 1;
2589 break;
2590
2591 case R_NDS32_LO12S0:
2592 vallo <<= 0;
2593 break;
2594 }
2595
2596 val = ((insn & 0xfffff) << 12) + vallo;
2597 val += l->addend;
2598
2599 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2600 bfd_putb32 ((bfd_vma) insn, l->addr);
2601
2602 next = l->next;
2603 free (l);
2604 l = next;
2605 }
2606
2607 nds32_hi20_list = NULL;
2608 }
2609
2610 /* Now do the LO12 reloc in the usual way.
2611 ??? It would be nice to call bfd_elf_generic_reloc here,
2612 but we have partial_inplace set. bfd_elf_generic_reloc will
2613 pass the handling back to bfd_install_relocation which will install
2614 a section relative addend which is wrong. */
2615 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2616 input_section, output_bfd, error_message);
2617 }
2618
2619 /* Do generic partial_inplace relocation.
2620 This is a local replacement for bfd_elf_generic_reloc. */
2621
2622 static bfd_reloc_status_type
2623 nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2624 asymbol *symbol, void *data, asection *input_section,
2625 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2626 {
2627 bfd_reloc_status_type ret;
2628 bfd_vma relocation;
2629 bfd_byte *inplace_address;
2630
2631 /* This part is from bfd_elf_generic_reloc.
2632 If we're relocating, and this an external symbol, we don't want
2633 to change anything. */
2634 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2635 && reloc_entry->addend == 0)
2636 {
2637 reloc_entry->address += input_section->output_offset;
2638 return bfd_reloc_ok;
2639 }
2640
2641 /* Now do the reloc in the usual way.
2642 ??? It would be nice to call bfd_elf_generic_reloc here,
2643 but we have partial_inplace set. bfd_elf_generic_reloc will
2644 pass the handling back to bfd_install_relocation which will install
2645 a section relative addend which is wrong. */
2646
2647 /* Sanity check the address (offset in section). */
2648 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2649 return bfd_reloc_outofrange;
2650
2651 ret = bfd_reloc_ok;
2652 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2653 ret = bfd_reloc_undefined;
2654
2655 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2656 relocation = 0;
2657 else
2658 relocation = symbol->value;
2659
2660 /* Only do this for a final link. */
2661 if (output_bfd == (bfd *) NULL)
2662 {
2663 relocation += symbol->section->output_section->vma;
2664 relocation += symbol->section->output_offset;
2665 }
2666
2667 relocation += reloc_entry->addend;
2668 switch (reloc_entry->howto->type)
2669 {
2670 case R_NDS32_LO12S3:
2671 relocation >>= 3;
2672 break;
2673
2674 case R_NDS32_LO12S2:
2675 relocation >>= 2;
2676 break;
2677
2678 case R_NDS32_LO12S1:
2679 relocation >>= 1;
2680 break;
2681
2682 case R_NDS32_LO12S0:
2683 default:
2684 relocation >>= 0;
2685 break;
2686 }
2687
2688 inplace_address = (bfd_byte *) data + reloc_entry->address;
2689
2690 #define DOIT(x) \
2691 x = ((x & ~reloc_entry->howto->dst_mask) | \
2692 (((x & reloc_entry->howto->src_mask) + relocation) & \
2693 reloc_entry->howto->dst_mask))
2694
2695 switch (reloc_entry->howto->size)
2696 {
2697 case 1:
2698 {
2699 short x = bfd_getb16 (inplace_address);
2700
2701 DOIT (x);
2702 bfd_putb16 ((bfd_vma) x, inplace_address);
2703 }
2704 break;
2705 case 2:
2706 {
2707 unsigned long x = bfd_getb32 (inplace_address);
2708
2709 DOIT (x);
2710 bfd_putb32 ((bfd_vma) x, inplace_address);
2711 }
2712 break;
2713 default:
2714 BFD_ASSERT (0);
2715 }
2716
2717 if (output_bfd != (bfd *) NULL)
2718 reloc_entry->address += input_section->output_offset;
2719
2720 return ret;
2721 }
2722
2723 /* Handle the R_NDS32_SDA15 reloc.
2724 This reloc is used to compute the address of objects in the small data area
2725 and to perform loads and stores from that area.
2726 The lower 15 bits are sign extended and added to the register specified
2727 in the instruction, which is assumed to point to _SDA_BASE_.
2728
2729 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2730 the access size, this must be taken care of. */
2731
2732 static bfd_reloc_status_type
2733 nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2734 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2735 asection *input_section, bfd *output_bfd,
2736 char **error_message ATTRIBUTE_UNUSED)
2737 {
2738 /* This part is from bfd_elf_generic_reloc. */
2739 if (output_bfd != (bfd *) NULL
2740 && (symbol->flags & BSF_SECTION_SYM) == 0
2741 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2742 {
2743 reloc_entry->address += input_section->output_offset;
2744 return bfd_reloc_ok;
2745 }
2746
2747 if (output_bfd != NULL)
2748 {
2749 /* FIXME: See bfd_perform_relocation. Is this right? */
2750 return bfd_reloc_continue;
2751 }
2752
2753 /* FIXME: not sure what to do here yet. But then again, the linker
2754 may never call us. */
2755 abort ();
2756 }
2757
2758 /* nds32_elf_ignore_reloc is the special function for
2759 relocation types which don't need to be relocated
2760 like relaxation relocation types.
2761 This function simply return bfd_reloc_ok when it is
2762 invoked. */
2763
2764 static bfd_reloc_status_type
2765 nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2766 asymbol *symbol ATTRIBUTE_UNUSED,
2767 void *data ATTRIBUTE_UNUSED, asection *input_section,
2768 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2769 {
2770 if (output_bfd != NULL)
2771 reloc_entry->address += input_section->output_offset;
2772
2773 return bfd_reloc_ok;
2774 }
2775 \f
2776
2777 /* Map BFD reloc types to NDS32 ELF reloc types. */
2778
2779 struct nds32_reloc_map_entry
2780 {
2781 bfd_reloc_code_real_type bfd_reloc_val;
2782 unsigned char elf_reloc_val;
2783 };
2784
2785 static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2786 {
2787 {BFD_RELOC_NONE, R_NDS32_NONE},
2788 {BFD_RELOC_16, R_NDS32_16_RELA},
2789 {BFD_RELOC_32, R_NDS32_32_RELA},
2790 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2791 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2792 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2793 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2794 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2795 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2796 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2797 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2798 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2799 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2800 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2801 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2802 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2803 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2804 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2805 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2806 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2807 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2808 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2809 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2810
2811 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2812 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2813 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2814 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2815 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2816 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2817 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2818 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2819 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2820 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2821 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2822 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2823 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2824 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2825 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2826 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2827 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2828 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2829 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2830 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2831 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2832 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2833 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2834 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
2835 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2836 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2837 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
2838 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2839 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2840 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
2841 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2842 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2843 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2844 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
2845 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2846 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2847 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2848 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2849 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2850 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2851 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2852 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2853 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2854 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2855 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2856 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2857 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2858 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2859 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2860 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2861 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2862 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2863 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2864 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2865 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2866 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2867 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2868 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2869 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2870 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2871 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2872 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2873 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2874 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2875 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2876 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2877 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2878 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2879 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2880 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2881 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2882 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2883 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2884 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
2885 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
2886
2887 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2888 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2889 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2890 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2891 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2892 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2893 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2894 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2895 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
2896 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2897 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2898 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2899 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2900 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2901 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2902 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2903 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2904 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2905 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2906 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
2907 };
2908
2909 /* Patch tag. */
2910
2911 static reloc_howto_type *
2912 bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2913 const char *r_name)
2914 {
2915 unsigned int i;
2916
2917 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2918 if (nds32_elf_howto_table[i].name != NULL
2919 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2920 return &nds32_elf_howto_table[i];
2921
2922 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2923 if (nds32_elf_relax_howto_table[i].name != NULL
2924 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2925 return &nds32_elf_relax_howto_table[i];
2926
2927 return NULL;
2928 }
2929
2930 static reloc_howto_type *
2931 bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2932 {
2933 if (code < R_NDS32_RELAX_ENTRY)
2934 {
2935 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2936 return &nds32_elf_howto_table[code];
2937 }
2938 else
2939 {
2940 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2941 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2942 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2943 }
2944 }
2945
2946 static reloc_howto_type *
2947 bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2948 bfd_reloc_code_real_type code)
2949 {
2950 unsigned int i;
2951
2952 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2953 {
2954 if (nds32_reloc_map[i].bfd_reloc_val == code)
2955 return bfd_elf32_bfd_reloc_type_table_lookup
2956 (nds32_reloc_map[i].elf_reloc_val);
2957 }
2958
2959 return NULL;
2960 }
2961
2962 /* Set the howto pointer for an NDS32 ELF reloc. */
2963
2964 static void
2965 nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2966 Elf_Internal_Rela *dst)
2967 {
2968 enum elf_nds32_reloc_type r_type;
2969
2970 r_type = ELF32_R_TYPE (dst->r_info);
2971 if (r_type > R_NDS32_GNU_VTENTRY)
2972 {
2973 _bfd_error_handler (_("%B: invalid NDS32 reloc number: %d"), abfd, r_type);
2974 r_type = 0;
2975 }
2976 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2977 }
2978
2979 static void
2980 nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2981 Elf_Internal_Rela *dst)
2982 {
2983 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2984 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2985 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2986 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2987 }
2988
2989 /* Support for core dump NOTE sections.
2990 Reference to include/linux/elfcore.h in Linux. */
2991
2992 static bfd_boolean
2993 nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2994 {
2995 int offset;
2996 size_t size;
2997
2998 switch (note->descsz)
2999 {
3000 case 0x114:
3001 /* Linux/NDS32 32-bit, ABI1 */
3002
3003 /* pr_cursig */
3004 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3005
3006 /* pr_pid */
3007 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3008
3009 /* pr_reg */
3010 offset = 72;
3011 size = 200;
3012 break;
3013
3014 case 0xfc:
3015 /* Linux/NDS32 32-bit */
3016
3017 /* pr_cursig */
3018 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3019
3020 /* pr_pid */
3021 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3022
3023 /* pr_reg */
3024 offset = 72;
3025 size = 176;
3026 break;
3027
3028 default:
3029 return FALSE;
3030 }
3031
3032 /* Make a ".reg" section. */
3033 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3034 size, note->descpos + offset);
3035 }
3036
3037 static bfd_boolean
3038 nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3039 {
3040 switch (note->descsz)
3041 {
3042 case 124:
3043 /* Linux/NDS32 */
3044
3045 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
3046 elf_tdata (abfd)->core->program =
3047 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3048 elf_tdata (abfd)->core->command =
3049 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
3050 break;
3051
3052 default:
3053 return FALSE;
3054 }
3055
3056 /* Note that for some reason, a spurious space is tacked
3057 onto the end of the args in some (at least one anyway)
3058 implementations, so strip it off if it exists. */
3059 {
3060 char *command = elf_tdata (abfd)->core->command;
3061 int n = strlen (command);
3062
3063 if (0 < n && command[n - 1] == ' ')
3064 command[n - 1] = '\0';
3065 }
3066
3067 return TRUE;
3068 }
3069
3070 /* Hook called by the linker routine which adds symbols from an object
3071 file. We must handle the special NDS32 section numbers here.
3072 We also keep watching for whether we need to create the sdata special
3073 linker sections. */
3074
3075 static bfd_boolean
3076 nds32_elf_add_symbol_hook (bfd *abfd,
3077 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3078 Elf_Internal_Sym *sym,
3079 const char **namep ATTRIBUTE_UNUSED,
3080 flagword *flagsp ATTRIBUTE_UNUSED,
3081 asection **secp, bfd_vma *valp)
3082 {
3083 switch (sym->st_shndx)
3084 {
3085 case SHN_COMMON:
3086 /* Common symbols less than the GP size are automatically
3087 treated as SHN_MIPS_SCOMMON symbols. */
3088 if (sym->st_size > elf_gp_size (abfd)
3089 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3090 break;
3091
3092 /* st_value is the alignemnt constraint.
3093 That might be its actual size if it is an array or structure. */
3094 switch (sym->st_value)
3095 {
3096 case 1:
3097 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3098 break;
3099 case 2:
3100 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3101 break;
3102 case 4:
3103 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3104 break;
3105 case 8:
3106 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3107 break;
3108 default:
3109 return TRUE;
3110 }
3111
3112 (*secp)->flags |= SEC_IS_COMMON;
3113 *valp = sym->st_size;
3114 break;
3115 }
3116
3117 return TRUE;
3118 }
3119
3120
3121 /* This function can figure out the best location for a base register to access
3122 data relative to this base register
3123 INPUT:
3124 sda_d0: size of first DOUBLE WORD data section
3125 sda_w0: size of first WORD data section
3126 sda_h0: size of first HALF WORD data section
3127 sda_b : size of BYTE data section
3128 sda_hi: size of second HALF WORD data section
3129 sda_w1: size of second WORD data section
3130 sda_d1: size of second DOUBLE WORD data section
3131 OUTPUT:
3132 offset (always positive) from the beginning of sda_d0 if OK
3133 a negative error value if fail
3134 NOTE:
3135 these 7 sections have to be located back to back if exist
3136 a pass in 0 value for non-existing section */
3137
3138 /* Due to the interpretation of simm15 field of load/store depending on
3139 data accessing size, the organization of base register relative data shall
3140 like the following figure
3141 -------------------------------------------
3142 | DOUBLE WORD sized data (range +/- 128K)
3143 -------------------------------------------
3144 | WORD sized data (range +/- 64K)
3145 -------------------------------------------
3146 | HALF WORD sized data (range +/- 32K)
3147 -------------------------------------------
3148 | BYTE sized data (range +/- 16K)
3149 -------------------------------------------
3150 | HALF WORD sized data (range +/- 32K)
3151 -------------------------------------------
3152 | WORD sized data (range +/- 64K)
3153 -------------------------------------------
3154 | DOUBLE WORD sized data (range +/- 128K)
3155 -------------------------------------------
3156 Its base register shall be set to access these data freely. */
3157
3158 /* We have to figure out the SDA_BASE value, so that we can adjust the
3159 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3160 BFD. If we can't find it, we're stuck. We cache it in the ELF
3161 target data. We don't need to adjust the symbol value for an
3162 external symbol if we are producing relocatable output. */
3163
3164 static asection *sda_rela_sec = NULL;
3165
3166 #define SDA_SECTION_NUM 10
3167
3168 static bfd_reloc_status_type
3169 nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3170 bfd_vma *psb, bfd_boolean add_symbol)
3171 {
3172 int relax_fp_as_gp;
3173 struct elf_nds32_link_hash_table *table;
3174 struct bfd_link_hash_entry *h, *h2;
3175 long unsigned int total = 0;
3176
3177 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3178 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3179 {
3180 asection *first = NULL, *final = NULL, *temp;
3181 bfd_vma sda_base;
3182 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3183 4 byte-aligned. Therefore, it has to set the first section ".data"
3184 4 byte-aligned. */
3185 static const char sec_name[SDA_SECTION_NUM][10] =
3186 {
3187 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
3188 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
3189 };
3190 size_t i = 0;
3191
3192 if (output_bfd->sections == NULL)
3193 {
3194 *psb = elf_gp (output_bfd);
3195 return bfd_reloc_ok;
3196 }
3197
3198 /* Get the first and final section. */
3199 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
3200 {
3201 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3202 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3203 first = temp;
3204 if (temp && (temp->size != 0 || temp->rawsize != 0))
3205 final = temp;
3206
3207 /* Summarize the sections in order to check if joining .bss. */
3208 if (temp && temp->size != 0)
3209 total += temp->size;
3210 else if (temp && temp->rawsize != 0)
3211 total += temp->rawsize;
3212
3213 i++;
3214 }
3215
3216 /* Check .bss size. */
3217 temp = bfd_get_section_by_name (output_bfd, ".bss");
3218 if (temp)
3219 {
3220 if (temp->size != 0)
3221 total += temp->size;
3222 else if (temp->rawsize != 0)
3223 total += temp->rawsize;
3224
3225 if (total < 0x80000)
3226 {
3227 if (!first && (temp->size != 0 || temp->rawsize != 0))
3228 first = temp;
3229 if ((temp->size != 0 || temp->rawsize != 0))
3230 final = temp;
3231 }
3232 }
3233
3234 if (first && final)
3235 {
3236 /* The middle of data region. */
3237 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
3238
3239 /* Find the section sda_base located. */
3240 i = 0;
3241 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
3242 {
3243 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3244 if (final && (final->size != 0 || final->rawsize != 0)
3245 && sda_base >= final->vma)
3246 {
3247 first = final;
3248 i++;
3249 }
3250 else
3251 break;
3252 }
3253 }
3254 else
3255 {
3256 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3257 first output section. */
3258 first = output_bfd->sections;
3259 while (first && first->size == 0 && first->rawsize == 0)
3260 first = first->next;
3261 if (!first)
3262 {
3263 *psb = elf_gp (output_bfd);
3264 return bfd_reloc_ok;
3265 }
3266 sda_base = first->vma + first->rawsize;
3267 }
3268
3269 sda_base -= first->vma;
3270 sda_base = sda_base & (~7);
3271
3272 if (!_bfd_generic_link_add_one_symbol
3273 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3274 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3275 get_elf_backend_data (output_bfd)->collect, &h))
3276 return FALSE;
3277
3278 sda_rela_sec = first;
3279
3280 table = nds32_elf_hash_table (info);
3281 relax_fp_as_gp = table->relax_fp_as_gp;
3282 if (relax_fp_as_gp)
3283 {
3284 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3285 FALSE, FALSE, FALSE);
3286 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3287 And set FP equal to SDA_BASE to do relaxation for
3288 la $fp, _FP_BASE_. */
3289 if (!_bfd_generic_link_add_one_symbol
3290 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3291 first, (bfd_vma) sda_base, (const char *) NULL,
3292 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3293 return FALSE;
3294 }
3295 }
3296
3297 if (add_symbol == TRUE)
3298 {
3299 if (h)
3300 {
3301 /* Now set gp. */
3302 elf_gp (output_bfd) = (h->u.def.value
3303 + h->u.def.section->output_section->vma
3304 + h->u.def.section->output_offset);
3305 }
3306 else
3307 {
3308 _bfd_error_handler (_("error: Can't find symbol: _SDA_BASE_."));
3309 return bfd_reloc_dangerous;
3310 }
3311 }
3312
3313 *psb = h->u.def.value + h->u.def.section->output_section->vma
3314 + h->u.def.section->output_offset;
3315 return bfd_reloc_ok;
3316 }
3317 \f
3318
3319 /* Return size of a PLT entry. */
3320 #define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3321
3322
3323 /* Create an entry in an nds32 ELF linker hash table. */
3324
3325 static struct bfd_hash_entry *
3326 nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3327 struct bfd_hash_table *table,
3328 const char *string)
3329 {
3330 struct elf_nds32_link_hash_entry *ret;
3331
3332 ret = (struct elf_nds32_link_hash_entry *) entry;
3333
3334 /* Allocate the structure if it has not already been allocated by a
3335 subclass. */
3336 if (ret == NULL)
3337 ret = (struct elf_nds32_link_hash_entry *)
3338 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3339
3340 if (ret == NULL)
3341 return (struct bfd_hash_entry *) ret;
3342
3343 /* Call the allocation method of the superclass. */
3344 ret = (struct elf_nds32_link_hash_entry *)
3345 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3346
3347 if (ret != NULL)
3348 {
3349 struct elf_nds32_link_hash_entry *eh;
3350
3351 eh = (struct elf_nds32_link_hash_entry *) ret;
3352 eh->dyn_relocs = NULL;
3353 eh->tls_type = GOT_UNKNOWN;
3354 }
3355
3356 return (struct bfd_hash_entry *) ret;
3357 }
3358
3359 /* Create an nds32 ELF linker hash table. */
3360
3361 static struct bfd_link_hash_table *
3362 nds32_elf_link_hash_table_create (bfd *abfd)
3363 {
3364 struct elf_nds32_link_hash_table *ret;
3365
3366 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3367
3368 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3369 if (ret == NULL)
3370 return NULL;
3371
3372 /* patch tag. */
3373 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3374 nds32_elf_link_hash_newfunc,
3375 sizeof (struct elf_nds32_link_hash_entry),
3376 NDS32_ELF_DATA))
3377 {
3378 free (ret);
3379 return NULL;
3380 }
3381
3382 ret->sgot = NULL;
3383 ret->sgotplt = NULL;
3384 ret->srelgot = NULL;
3385 ret->splt = NULL;
3386 ret->srelplt = NULL;
3387 ret->sdynbss = NULL;
3388 ret->srelbss = NULL;
3389 ret->sym_ld_script = NULL;
3390 ret->ex9_export_file = NULL;
3391 ret->ex9_import_file = NULL;
3392
3393 return &ret->root.root;
3394 }
3395
3396 /* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3397 shortcuts to them in our hash table. */
3398
3399 static bfd_boolean
3400 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3401 {
3402 struct elf_nds32_link_hash_table *htab;
3403
3404 if (!_bfd_elf_create_got_section (dynobj, info))
3405 return FALSE;
3406
3407 htab = nds32_elf_hash_table (info);
3408 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
3409 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3410 if (!htab->sgot || !htab->sgotplt)
3411 abort ();
3412
3413 /* _bfd_elf_create_got_section will create it for us. */
3414 htab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3415 if (htab->srelgot == NULL
3416 || !bfd_set_section_flags (dynobj, htab->srelgot,
3417 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3418 | SEC_IN_MEMORY | SEC_LINKER_CREATED
3419 | SEC_READONLY))
3420 || !bfd_set_section_alignment (dynobj, htab->srelgot, 2))
3421 return FALSE;
3422
3423 return TRUE;
3424 }
3425
3426 /* Create dynamic sections when linking against a dynamic object. */
3427
3428 static bfd_boolean
3429 nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3430 {
3431 struct elf_nds32_link_hash_table *htab;
3432 flagword flags, pltflags;
3433 register asection *s;
3434 const struct elf_backend_data *bed;
3435 int ptralign = 2; /* 32-bit */
3436
3437 bed = get_elf_backend_data (abfd);
3438
3439 htab = nds32_elf_hash_table (info);
3440
3441 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3442 .rel[a].bss sections. */
3443
3444 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3445 | SEC_LINKER_CREATED);
3446
3447 pltflags = flags;
3448 pltflags |= SEC_CODE;
3449 if (bed->plt_not_loaded)
3450 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3451 if (bed->plt_readonly)
3452 pltflags |= SEC_READONLY;
3453
3454 s = bfd_make_section (abfd, ".plt");
3455 htab->splt = s;
3456 if (s == NULL
3457 || !bfd_set_section_flags (abfd, s, pltflags)
3458 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3459 return FALSE;
3460
3461 if (bed->want_plt_sym)
3462 {
3463 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3464 .plt section. */
3465 struct bfd_link_hash_entry *bh = NULL;
3466 struct elf_link_hash_entry *h;
3467
3468 if (!(_bfd_generic_link_add_one_symbol
3469 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3470 (bfd_vma) 0, (const char *) NULL, FALSE,
3471 get_elf_backend_data (abfd)->collect, &bh)))
3472 return FALSE;
3473
3474 h = (struct elf_link_hash_entry *) bh;
3475 h->def_regular = 1;
3476 h->type = STT_OBJECT;
3477
3478 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
3479 return FALSE;
3480 }
3481
3482 s = bfd_make_section (abfd,
3483 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
3484 htab->srelplt = s;
3485 if (s == NULL
3486 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3487 || !bfd_set_section_alignment (abfd, s, ptralign))
3488 return FALSE;
3489
3490 if (htab->sgot == NULL && !create_got_section (abfd, info))
3491 return FALSE;
3492
3493 {
3494 const char *secname;
3495 char *relname;
3496 flagword secflags;
3497 asection *sec;
3498
3499 for (sec = abfd->sections; sec; sec = sec->next)
3500 {
3501 secflags = bfd_get_section_flags (abfd, sec);
3502 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3503 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3504 continue;
3505 secname = bfd_get_section_name (abfd, sec);
3506 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3507 strcpy (relname, ".rela");
3508 strcat (relname, secname);
3509 if (bfd_get_section_by_name (abfd, secname))
3510 continue;
3511 s = bfd_make_section (abfd, relname);
3512 if (s == NULL
3513 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3514 || !bfd_set_section_alignment (abfd, s, ptralign))
3515 return FALSE;
3516 }
3517 }
3518
3519 if (bed->want_dynbss)
3520 {
3521 /* The .dynbss section is a place to put symbols which are defined
3522 by dynamic objects, are referenced by regular objects, and are
3523 not functions. We must allocate space for them in the process
3524 image and use a R_*_COPY reloc to tell the dynamic linker to
3525 initialize them at run time. The linker script puts the .dynbss
3526 section into the .bss section of the final image. */
3527 s = bfd_make_section (abfd, ".dynbss");
3528 htab->sdynbss = s;
3529 if (s == NULL
3530 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3531 return FALSE;
3532 /* The .rel[a].bss section holds copy relocs. This section is not
3533 normally needed. We need to create it here, though, so that the
3534 linker will map it to an output section. We can't just create it
3535 only if we need it, because we will not know whether we need it
3536 until we have seen all the input files, and the first time the
3537 main linker code calls BFD after examining all the input files
3538 (size_dynamic_sections) the input sections have already been
3539 mapped to the output sections. If the section turns out not to
3540 be needed, we can discard it later. We will never need this
3541 section when generating a shared object, since they do not use
3542 copy relocs. */
3543 if (!bfd_link_pic (info))
3544 {
3545 s = bfd_make_section (abfd, (bed->default_use_rela_p
3546 ? ".rela.bss" : ".rel.bss"));
3547 htab->srelbss = s;
3548 if (s == NULL
3549 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3550 || !bfd_set_section_alignment (abfd, s, ptralign))
3551 return FALSE;
3552 }
3553 }
3554
3555 return TRUE;
3556 }
3557
3558 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3559 static void
3560 nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3561 struct elf_link_hash_entry *dir,
3562 struct elf_link_hash_entry *ind)
3563 {
3564 struct elf_nds32_link_hash_entry *edir, *eind;
3565
3566 edir = (struct elf_nds32_link_hash_entry *) dir;
3567 eind = (struct elf_nds32_link_hash_entry *) ind;
3568
3569 if (eind->dyn_relocs != NULL)
3570 {
3571 if (edir->dyn_relocs != NULL)
3572 {
3573 struct elf_nds32_dyn_relocs **pp;
3574 struct elf_nds32_dyn_relocs *p;
3575
3576 if (ind->root.type == bfd_link_hash_indirect)
3577 abort ();
3578
3579 /* Add reloc counts against the weak sym to the strong sym
3580 list. Merge any entries against the same section. */
3581 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3582 {
3583 struct elf_nds32_dyn_relocs *q;
3584
3585 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3586 if (q->sec == p->sec)
3587 {
3588 q->pc_count += p->pc_count;
3589 q->count += p->count;
3590 *pp = p->next;
3591 break;
3592 }
3593 if (q == NULL)
3594 pp = &p->next;
3595 }
3596 *pp = edir->dyn_relocs;
3597 }
3598
3599 edir->dyn_relocs = eind->dyn_relocs;
3600 eind->dyn_relocs = NULL;
3601 }
3602
3603 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3604 }
3605 \f
3606
3607 /* Adjust a symbol defined by a dynamic object and referenced by a
3608 regular object. The current definition is in some section of the
3609 dynamic object, but we're not including those sections. We have to
3610 change the definition to something the rest of the link can
3611 understand. */
3612
3613 static bfd_boolean
3614 nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3615 struct elf_link_hash_entry *h)
3616 {
3617 struct elf_nds32_link_hash_table *htab;
3618 struct elf_nds32_link_hash_entry *eh;
3619 struct elf_nds32_dyn_relocs *p;
3620 bfd *dynobj;
3621 asection *s;
3622 unsigned int power_of_two;
3623
3624 dynobj = elf_hash_table (info)->dynobj;
3625
3626 /* Make sure we know what is going on here. */
3627 BFD_ASSERT (dynobj != NULL
3628 && (h->needs_plt
3629 || h->u.weakdef != NULL
3630 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3631
3632
3633 /* If this is a function, put it in the procedure linkage table. We
3634 will fill in the contents of the procedure linkage table later,
3635 when we know the address of the .got section. */
3636 if (h->type == STT_FUNC || h->needs_plt)
3637 {
3638 if (!bfd_link_pic (info)
3639 && !h->def_dynamic
3640 && !h->ref_dynamic
3641 && h->root.type != bfd_link_hash_undefweak
3642 && h->root.type != bfd_link_hash_undefined)
3643 {
3644 /* This case can occur if we saw a PLT reloc in an input
3645 file, but the symbol was never referred to by a dynamic
3646 object. In such a case, we don't actually need to build
3647 a procedure linkage table, and we can just do a PCREL
3648 reloc instead. */
3649 h->plt.offset = (bfd_vma) - 1;
3650 h->needs_plt = 0;
3651 }
3652
3653 return TRUE;
3654 }
3655 else
3656 h->plt.offset = (bfd_vma) - 1;
3657
3658 /* If this is a weak symbol, and there is a real definition, the
3659 processor independent code will have arranged for us to see the
3660 real definition first, and we can just use the same value. */
3661 if (h->u.weakdef != NULL)
3662 {
3663 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
3664 || h->u.weakdef->root.type == bfd_link_hash_defweak);
3665 h->root.u.def.section = h->u.weakdef->root.u.def.section;
3666 h->root.u.def.value = h->u.weakdef->root.u.def.value;
3667 return TRUE;
3668 }
3669
3670 /* This is a reference to a symbol defined by a dynamic object which
3671 is not a function. */
3672
3673 /* If we are creating a shared library, we must presume that the
3674 only references to the symbol are via the global offset table.
3675 For such cases we need not do anything here; the relocations will
3676 be handled correctly by relocate_section. */
3677 if (bfd_link_pic (info))
3678 return TRUE;
3679
3680 /* If there are no references to this symbol that do not use the
3681 GOT, we don't need to generate a copy reloc. */
3682 if (!h->non_got_ref)
3683 return TRUE;
3684
3685 /* If -z nocopyreloc was given, we won't generate them either. */
3686 if (info->nocopyreloc)
3687 {
3688 h->non_got_ref = 0;
3689 return TRUE;
3690 }
3691
3692 eh = (struct elf_nds32_link_hash_entry *) h;
3693 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3694 {
3695 s = p->sec->output_section;
3696 if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0)
3697 break;
3698 }
3699
3700 /* If we didn't find any dynamic relocs in sections which needs the
3701 copy reloc, then we'll be keeping the dynamic relocs and avoiding
3702 the copy reloc. */
3703 if (p == NULL)
3704 {
3705 h->non_got_ref = 0;
3706 return TRUE;
3707 }
3708
3709 /* We must allocate the symbol in our .dynbss section, which will
3710 become part of the .bss section of the executable. There will be
3711 an entry for this symbol in the .dynsym section. The dynamic
3712 object will contain position independent code, so all references
3713 from the dynamic object to this symbol will go through the global
3714 offset table. The dynamic linker will use the .dynsym entry to
3715 determine the address it must put in the global offset table, so
3716 both the dynamic object and the regular object will refer to the
3717 same memory location for the variable. */
3718
3719 htab = nds32_elf_hash_table (info);
3720 s = htab->sdynbss;
3721 BFD_ASSERT (s != NULL);
3722
3723 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3724 to copy the initial value out of the dynamic object and into the
3725 runtime process image. We need to remember the offset into the
3726 .rela.bss section we are going to use. */
3727 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3728 {
3729 asection *srel;
3730
3731 srel = htab->srelbss;
3732 BFD_ASSERT (srel != NULL);
3733 srel->size += sizeof (Elf32_External_Rela);
3734 h->needs_copy = 1;
3735 }
3736
3737 /* We need to figure out the alignment required for this symbol. I
3738 have no idea how ELF linkers handle this. */
3739 power_of_two = bfd_log2 (h->size);
3740 if (power_of_two > 3)
3741 power_of_two = 3;
3742
3743 /* Apply the required alignment. */
3744 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3745 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3746 {
3747 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3748 return FALSE;
3749 }
3750
3751 /* Define the symbol as being at this point in the section. */
3752 h->root.u.def.section = s;
3753 h->root.u.def.value = s->size;
3754
3755 /* Increment the section size to make room for the symbol. */
3756 s->size += h->size;
3757
3758 return TRUE;
3759 }
3760
3761 /* Allocate space in .plt, .got and associated reloc sections for
3762 dynamic relocs. */
3763
3764 static bfd_boolean
3765 allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3766 {
3767 struct bfd_link_info *info;
3768 struct elf_nds32_link_hash_table *htab;
3769 struct elf_nds32_link_hash_entry *eh;
3770 struct elf_nds32_dyn_relocs *p;
3771
3772 if (h->root.type == bfd_link_hash_indirect)
3773 return TRUE;
3774
3775 if (h->root.type == bfd_link_hash_warning)
3776 /* When warning symbols are created, they **replace** the "real"
3777 entry in the hash table, thus we never get to see the real
3778 symbol in a hash traversal. So look at it now. */
3779 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3780
3781 info = (struct bfd_link_info *) inf;
3782 htab = nds32_elf_hash_table (info);
3783
3784 eh = (struct elf_nds32_link_hash_entry *) h;
3785
3786 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3787 {
3788 /* Make sure this symbol is output as a dynamic symbol.
3789 Undefined weak syms won't yet be marked as dynamic. */
3790 if (h->dynindx == -1 && !h->forced_local)
3791 {
3792 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3793 return FALSE;
3794 }
3795
3796 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
3797 {
3798 asection *s = htab->splt;
3799
3800 /* If this is the first .plt entry, make room for the special
3801 first entry. */
3802 if (s->size == 0)
3803 s->size += PLT_ENTRY_SIZE;
3804
3805 h->plt.offset = s->size;
3806
3807 /* If this symbol is not defined in a regular file, and we are
3808 not generating a shared library, then set the symbol to this
3809 location in the .plt. This is required to make function
3810 pointers compare as equal between the normal executable and
3811 the shared library. */
3812 if (!bfd_link_pic (info) && !h->def_regular)
3813 {
3814 h->root.u.def.section = s;
3815 h->root.u.def.value = h->plt.offset;
3816 }
3817
3818 /* Make room for this entry. */
3819 s->size += PLT_ENTRY_SIZE;
3820
3821 /* We also need to make an entry in the .got.plt section, which
3822 will be placed in the .got section by the linker script. */
3823 htab->sgotplt->size += 4;
3824
3825 /* We also need to make an entry in the .rel.plt section. */
3826 htab->srelplt->size += sizeof (Elf32_External_Rela);
3827 }
3828 else
3829 {
3830 h->plt.offset = (bfd_vma) - 1;
3831 h->needs_plt = 0;
3832 }
3833 }
3834 else
3835 {
3836 h->plt.offset = (bfd_vma) - 1;
3837 h->needs_plt = 0;
3838 }
3839
3840 if (h->got.refcount > 0)
3841 {
3842 asection *s;
3843 bfd_boolean dyn;
3844 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
3845
3846 /* Make sure this symbol is output as a dynamic symbol.
3847 Undefined weak syms won't yet be marked as dynamic. */
3848 if (h->dynindx == -1 && !h->forced_local)
3849 {
3850 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3851 return FALSE;
3852 }
3853
3854 s = htab->sgot;
3855 h->got.offset = s->size;
3856
3857 if (tls_type == GOT_UNKNOWN)
3858 abort ();
3859 else if (tls_type == GOT_NORMAL
3860 || tls_type == GOT_TLS_IE)
3861 /* Need a GOT slot. */
3862 s->size += 4;
3863
3864 dyn = htab->root.dynamic_sections_created;
3865 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
3866 htab->srelgot->size += sizeof (Elf32_External_Rela);
3867 }
3868 else
3869 h->got.offset = (bfd_vma) - 1;
3870
3871 if (eh->dyn_relocs == NULL)
3872 return TRUE;
3873
3874 /* In the shared -Bsymbolic case, discard space allocated for
3875 dynamic pc-relative relocs against symbols which turn out to be
3876 defined in regular objects. For the normal shared case, discard
3877 space for pc-relative relocs that have become local due to symbol
3878 visibility changes. */
3879
3880 if (bfd_link_pic (info))
3881 {
3882 if (h->def_regular && (h->forced_local || info->symbolic))
3883 {
3884 struct elf_nds32_dyn_relocs **pp;
3885
3886 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3887 {
3888 p->count -= p->pc_count;
3889 p->pc_count = 0;
3890 if (p->count == 0)
3891 *pp = p->next;
3892 else
3893 pp = &p->next;
3894 }
3895 }
3896 }
3897 else
3898 {
3899 /* For the non-shared case, discard space for relocs against
3900 symbols which turn out to need copy relocs or are not dynamic. */
3901
3902 if (!h->non_got_ref
3903 && ((h->def_dynamic
3904 && !h->def_regular)
3905 || (htab->root.dynamic_sections_created
3906 && (h->root.type == bfd_link_hash_undefweak
3907 || h->root.type == bfd_link_hash_undefined))))
3908 {
3909 /* Make sure this symbol is output as a dynamic symbol.
3910 Undefined weak syms won't yet be marked as dynamic. */
3911 if (h->dynindx == -1 && !h->forced_local)
3912 {
3913 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3914 return FALSE;
3915 }
3916
3917 /* If that succeeded, we know we'll be keeping all the
3918 relocs. */
3919 if (h->dynindx != -1)
3920 goto keep;
3921 }
3922
3923 eh->dyn_relocs = NULL;
3924
3925 keep:;
3926 }
3927
3928 /* Finally, allocate space. */
3929 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3930 {
3931 asection *sreloc = elf_section_data (p->sec)->sreloc;
3932 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3933 }
3934
3935 return TRUE;
3936 }
3937
3938 /* Find any dynamic relocs that apply to read-only sections. */
3939
3940 static bfd_boolean
3941 readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3942 {
3943 struct elf_nds32_link_hash_entry *eh;
3944 struct elf_nds32_dyn_relocs *p;
3945
3946 if (h->root.type == bfd_link_hash_warning)
3947 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3948
3949 eh = (struct elf_nds32_link_hash_entry *) h;
3950 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3951 {
3952 asection *s = p->sec->output_section;
3953
3954 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3955 {
3956 struct bfd_link_info *info = (struct bfd_link_info *) inf;
3957
3958 info->flags |= DF_TEXTREL;
3959
3960 /* Not an error, just cut short the traversal. */
3961 return FALSE;
3962 }
3963 }
3964 return TRUE;
3965 }
3966
3967 /* Set the sizes of the dynamic sections. */
3968
3969 static bfd_boolean
3970 nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3971 struct bfd_link_info *info)
3972 {
3973 struct elf_nds32_link_hash_table *htab;
3974 bfd *dynobj;
3975 asection *s;
3976 bfd_boolean relocs;
3977 bfd *ibfd;
3978
3979 htab = nds32_elf_hash_table (info);
3980 dynobj = htab->root.dynobj;
3981 BFD_ASSERT (dynobj != NULL);
3982
3983 if (htab->root.dynamic_sections_created)
3984 {
3985 /* Set the contents of the .interp section to the interpreter. */
3986 if (!bfd_link_pic (info) && !info->nointerp)
3987 {
3988 s = bfd_get_section_by_name (dynobj, ".interp");
3989 BFD_ASSERT (s != NULL);
3990 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3991 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3992 }
3993 }
3994
3995 /* Set up .got offsets for local syms, and space for local dynamic
3996 relocs. */
3997 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
3998 {
3999 bfd_signed_vma *local_got;
4000 bfd_signed_vma *end_local_got;
4001 bfd_size_type locsymcount;
4002 Elf_Internal_Shdr *symtab_hdr;
4003 asection *srel;
4004
4005 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
4006 continue;
4007
4008 for (s = ibfd->sections; s != NULL; s = s->next)
4009 {
4010 struct elf_nds32_dyn_relocs *p;
4011
4012 for (p = ((struct elf_nds32_dyn_relocs *)
4013 elf_section_data (s)->local_dynrel);
4014 p != NULL; p = p->next)
4015 {
4016 if (!bfd_is_abs_section (p->sec)
4017 && bfd_is_abs_section (p->sec->output_section))
4018 {
4019 /* Input section has been discarded, either because
4020 it is a copy of a linkonce section or due to
4021 linker script /DISCARD/, so we'll be discarding
4022 the relocs too. */
4023 }
4024 else if (p->count != 0)
4025 {
4026 srel = elf_section_data (p->sec)->sreloc;
4027 srel->size += p->count * sizeof (Elf32_External_Rela);
4028 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
4029 info->flags |= DF_TEXTREL;
4030 }
4031 }
4032 }
4033
4034 local_got = elf_local_got_refcounts (ibfd);
4035 if (!local_got)
4036 continue;
4037
4038 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
4039 locsymcount = symtab_hdr->sh_info;
4040 end_local_got = local_got + locsymcount;
4041 s = htab->sgot;
4042 srel = htab->srelgot;
4043 for (; local_got < end_local_got; ++local_got)
4044 {
4045 if (*local_got > 0)
4046 {
4047 *local_got = s->size;
4048 s->size += 4;
4049 if (bfd_link_pic (info))
4050 srel->size += sizeof (Elf32_External_Rela);
4051 }
4052 else
4053 *local_got = (bfd_vma) - 1;
4054 }
4055 }
4056
4057 /* Allocate global sym .plt and .got entries, and space for global
4058 sym dynamic relocs. */
4059 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4060
4061 /* We now have determined the sizes of the various dynamic sections.
4062 Allocate memory for them. */
4063 relocs = FALSE;
4064 for (s = dynobj->sections; s != NULL; s = s->next)
4065 {
4066 if ((s->flags & SEC_LINKER_CREATED) == 0)
4067 continue;
4068
4069 if (s == htab->splt)
4070 {
4071 /* Strip this section if we don't need it; see the
4072 comment below. */
4073 }
4074 else if (s == htab->sgot)
4075 {
4076 got_size += s->size;
4077 }
4078 else if (s == htab->sgotplt)
4079 {
4080 got_size += s->size;
4081 }
4082 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
4083 {
4084 if (s->size != 0 && s != htab->srelplt)
4085 relocs = TRUE;
4086
4087 /* We use the reloc_count field as a counter if we need
4088 to copy relocs into the output file. */
4089 s->reloc_count = 0;
4090 }
4091 else
4092 {
4093 /* It's not one of our sections, so don't allocate space. */
4094 continue;
4095 }
4096
4097 if (s->size == 0)
4098 {
4099 /* If we don't need this section, strip it from the
4100 output file. This is mostly to handle .rela.bss and
4101 .rela.plt. We must create both sections in
4102 create_dynamic_sections, because they must be created
4103 before the linker maps input sections to output
4104 sections. The linker does that before
4105 adjust_dynamic_symbol is called, and it is that
4106 function which decides whether anything needs to go
4107 into these sections. */
4108 s->flags |= SEC_EXCLUDE;
4109 continue;
4110 }
4111
4112 /* Allocate memory for the section contents. We use bfd_zalloc
4113 here in case unused entries are not reclaimed before the
4114 section's contents are written out. This should not happen,
4115 but this way if it does, we get a R_NDS32_NONE reloc instead
4116 of garbage. */
4117 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4118 if (s->contents == NULL)
4119 return FALSE;
4120 }
4121
4122
4123 if (htab->root.dynamic_sections_created)
4124 {
4125 /* Add some entries to the .dynamic section. We fill in the
4126 values later, in nds32_elf_finish_dynamic_sections, but we
4127 must add the entries now so that we get the correct size for
4128 the .dynamic section. The DT_DEBUG entry is filled in by the
4129 dynamic linker and used by the debugger. */
4130 #define add_dynamic_entry(TAG, VAL) \
4131 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4132
4133 if (!bfd_link_pic (info))
4134 {
4135 if (!add_dynamic_entry (DT_DEBUG, 0))
4136 return FALSE;
4137 }
4138
4139 if (htab->splt->size != 0)
4140 {
4141 if (!add_dynamic_entry (DT_PLTGOT, 0)
4142 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4143 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4144 || !add_dynamic_entry (DT_JMPREL, 0))
4145 return FALSE;
4146 }
4147
4148 if (relocs)
4149 {
4150 if (!add_dynamic_entry (DT_RELA, 0)
4151 || !add_dynamic_entry (DT_RELASZ, 0)
4152 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4153 return FALSE;
4154
4155 /* If any dynamic relocs apply to a read-only section,
4156 then we need a DT_TEXTREL entry. */
4157 if ((info->flags & DF_TEXTREL) == 0)
4158 elf_link_hash_traverse (&htab->root, readonly_dynrelocs,
4159 (void *) info);
4160
4161 if ((info->flags & DF_TEXTREL) != 0)
4162 {
4163 if (!add_dynamic_entry (DT_TEXTREL, 0))
4164 return FALSE;
4165 }
4166 }
4167 }
4168 #undef add_dynamic_entry
4169
4170 return TRUE;
4171 }
4172
4173 static bfd_reloc_status_type
4174 nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4175 bfd_vma relocation, bfd_byte *location)
4176 {
4177 int size;
4178 bfd_vma x = 0;
4179 bfd_reloc_status_type flag;
4180 unsigned int rightshift = howto->rightshift;
4181 unsigned int bitpos = howto->bitpos;
4182
4183 /* If the size is negative, negate RELOCATION. This isn't very
4184 general. */
4185 if (howto->size < 0)
4186 relocation = -relocation;
4187
4188 /* Get the value we are going to relocate. */
4189 size = bfd_get_reloc_size (howto);
4190 switch (size)
4191 {
4192 default:
4193 abort ();
4194 break;
4195 case 0:
4196 return bfd_reloc_ok;
4197 case 2:
4198 x = bfd_getb16 (location);
4199 break;
4200 case 4:
4201 x = bfd_getb32 (location);
4202 break;
4203 }
4204
4205 /* Check for overflow. FIXME: We may drop bits during the addition
4206 which we don't check for. We must either check at every single
4207 operation, which would be tedious, or we must do the computations
4208 in a type larger than bfd_vma, which would be inefficient. */
4209 flag = bfd_reloc_ok;
4210 if (howto->complain_on_overflow != complain_overflow_dont)
4211 {
4212 bfd_vma addrmask, fieldmask, signmask, ss;
4213 bfd_vma a, b, sum;
4214
4215 /* Get the values to be added together. For signed and unsigned
4216 relocations, we assume that all values should be truncated to
4217 the size of an address. For bitfields, all the bits matter.
4218 See also bfd_check_overflow. */
4219 fieldmask = N_ONES (howto->bitsize);
4220 signmask = ~fieldmask;
4221 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4222 a = (relocation & addrmask) >> rightshift;
4223 b = (x & howto->src_mask & addrmask) >> bitpos;
4224
4225 switch (howto->complain_on_overflow)
4226 {
4227 case complain_overflow_signed:
4228 /* If any sign bits are set, all sign bits must be set.
4229 That is, A must be a valid negative address after
4230 shifting. */
4231 signmask = ~(fieldmask >> 1);
4232 /* Fall through. */
4233
4234 case complain_overflow_bitfield:
4235 /* Much like the signed check, but for a field one bit
4236 wider. We allow a bitfield to represent numbers in the
4237 range -2**n to 2**n-1, where n is the number of bits in the
4238 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4239 can't overflow, which is exactly what we want. */
4240 ss = a & signmask;
4241 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4242 flag = bfd_reloc_overflow;
4243
4244 /* We only need this next bit of code if the sign bit of B
4245 is below the sign bit of A. This would only happen if
4246 SRC_MASK had fewer bits than BITSIZE. Note that if
4247 SRC_MASK has more bits than BITSIZE, we can get into
4248 trouble; we would need to verify that B is in range, as
4249 we do for A above. */
4250 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4251 ss >>= bitpos;
4252
4253 /* Set all the bits above the sign bit. */
4254 b = (b ^ ss) - ss;
4255
4256 /* Now we can do the addition. */
4257 sum = a + b;
4258
4259 /* See if the result has the correct sign. Bits above the
4260 sign bit are junk now; ignore them. If the sum is
4261 positive, make sure we did not have all negative inputs;
4262 if the sum is negative, make sure we did not have all
4263 positive inputs. The test below looks only at the sign
4264 bits, and it really just
4265 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4266
4267 We mask with addrmask here to explicitly allow an address
4268 wrap-around. The Linux kernel relies on it, and it is
4269 the only way to write assembler code which can run when
4270 loaded at a location 0x80000000 away from the location at
4271 which it is linked. */
4272 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4273 flag = bfd_reloc_overflow;
4274
4275 break;
4276
4277 case complain_overflow_unsigned:
4278 /* Checking for an unsigned overflow is relatively easy:
4279 trim the addresses and add, and trim the result as well.
4280 Overflow is normally indicated when the result does not
4281 fit in the field. However, we also need to consider the
4282 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4283 input is 0x80000000, and bfd_vma is only 32 bits; then we
4284 will get sum == 0, but there is an overflow, since the
4285 inputs did not fit in the field. Instead of doing a
4286 separate test, we can check for this by or-ing in the
4287 operands when testing for the sum overflowing its final
4288 field. */
4289 sum = (a + b) & addrmask;
4290 if ((a | b | sum) & signmask)
4291 flag = bfd_reloc_overflow;
4292 break;
4293
4294 default:
4295 abort ();
4296 }
4297 }
4298
4299 /* Put RELOCATION in the right bits. */
4300 relocation >>= (bfd_vma) rightshift;
4301 relocation <<= (bfd_vma) bitpos;
4302
4303 /* Add RELOCATION to the right bits of X. */
4304 /* FIXME : 090616
4305 Because the relaxation may generate duplicate relocation at one address,
4306 an addition to immediate in the instruction may cause the relocation added
4307 several times.
4308 This bug should be fixed in assembler, but a check is also needed here. */
4309 if (howto->partial_inplace)
4310 x = ((x & ~howto->dst_mask)
4311 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4312 else
4313 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4314
4315
4316 /* Put the relocated value back in the object file. */
4317 switch (size)
4318 {
4319 default:
4320 case 0:
4321 case 1:
4322 case 8:
4323 abort ();
4324 break;
4325 case 2:
4326 bfd_putb16 (x, location);
4327 break;
4328 case 4:
4329 bfd_putb32 (x, location);
4330 break;
4331 }
4332
4333 return flag;
4334 }
4335
4336 static bfd_reloc_status_type
4337 nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4338 asection *input_section, bfd_byte *contents,
4339 bfd_vma address, bfd_vma value, bfd_vma addend)
4340 {
4341 bfd_vma relocation;
4342
4343 /* Sanity check the address. */
4344 if (address > bfd_get_section_limit (input_bfd, input_section))
4345 return bfd_reloc_outofrange;
4346
4347 /* This function assumes that we are dealing with a basic relocation
4348 against a symbol. We want to compute the value of the symbol to
4349 relocate to. This is just VALUE, the value of the symbol, plus
4350 ADDEND, any addend associated with the reloc. */
4351 relocation = value + addend;
4352
4353 /* If the relocation is PC relative, we want to set RELOCATION to
4354 the distance between the symbol (currently in RELOCATION) and the
4355 location we are relocating. Some targets (e.g., i386-aout)
4356 arrange for the contents of the section to be the negative of the
4357 offset of the location within the section; for such targets
4358 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4359 simply leave the contents of the section as zero; for such
4360 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4361 need to subtract out the offset of the location within the
4362 section (which is just ADDRESS). */
4363 if (howto->pc_relative)
4364 {
4365 relocation -= (input_section->output_section->vma
4366 + input_section->output_offset);
4367 if (howto->pcrel_offset)
4368 relocation -= address;
4369 }
4370
4371 return nds32_relocate_contents (howto, input_bfd, relocation,
4372 contents + address);
4373 }
4374
4375 static bfd_boolean
4376 nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4377 const char *name,
4378 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4379 asection *input_sec,
4380 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4381 {
4382 const char *source;
4383 FILE *sym_ld_script = NULL;
4384 struct elf_nds32_link_hash_table *table;
4385
4386 table = nds32_elf_hash_table (info);
4387 sym_ld_script = table->sym_ld_script;
4388 if (!sym_ld_script)
4389 return TRUE;
4390
4391 if (!h || !name || *name == '\0')
4392 return TRUE;
4393
4394 if (input_sec->flags & SEC_EXCLUDE)
4395 return TRUE;
4396
4397 if (!check_start_export_sym)
4398 {
4399 fprintf (sym_ld_script, "SECTIONS\n{\n");
4400 check_start_export_sym = 1;
4401 }
4402
4403 if (h->root.type == bfd_link_hash_defined
4404 || h->root.type == bfd_link_hash_defweak)
4405 {
4406 if (!h->root.u.def.section->output_section)
4407 return TRUE;
4408
4409 if (bfd_is_const_section (input_sec))
4410 source = input_sec->name;
4411 else
4412 source = input_sec->owner->filename;
4413
4414 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4415 h->root.root.string,
4416 (long) (h->root.u.def.value
4417 + h->root.u.def.section->output_section->vma
4418 + h->root.u.def.section->output_offset), source);
4419 }
4420
4421 return TRUE;
4422 }
4423
4424 /* Relocate an NDS32/D ELF section.
4425 There is some attempt to make this function usable for many architectures,
4426 both for RELA and REL type relocs, if only to serve as a learning tool.
4427
4428 The RELOCATE_SECTION function is called by the new ELF backend linker
4429 to handle the relocations for a section.
4430
4431 The relocs are always passed as Rela structures; if the section
4432 actually uses Rel structures, the r_addend field will always be
4433 zero.
4434
4435 This function is responsible for adjust the section contents as
4436 necessary, and (if using Rela relocs and generating a
4437 relocatable output file) adjusting the reloc addend as
4438 necessary.
4439
4440 This function does not have to worry about setting the reloc
4441 address or the reloc symbol index.
4442
4443 LOCAL_SYMS is a pointer to the swapped in local symbols.
4444
4445 LOCAL_SECTIONS is an array giving the section in the input file
4446 corresponding to the st_shndx field of each local symbol.
4447
4448 The global hash table entry for the global symbols can be found
4449 via elf_sym_hashes (input_bfd).
4450
4451 When generating relocatable output, this function must handle
4452 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4453 going to be the section symbol corresponding to the output
4454 section, which means that the addend must be adjusted
4455 accordingly. */
4456
4457 static bfd_vma
4458 dtpoff_base (struct bfd_link_info *info)
4459 {
4460 /* If tls_sec is NULL, we should have signalled an error already. */
4461 if (elf_hash_table (info)->tls_sec == NULL)
4462 return 0;
4463 return elf_hash_table (info)->tls_sec->vma;
4464 }
4465
4466 static bfd_boolean
4467 nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4468 struct bfd_link_info * info,
4469 bfd * input_bfd,
4470 asection * input_section,
4471 bfd_byte * contents,
4472 Elf_Internal_Rela * relocs,
4473 Elf_Internal_Sym * local_syms,
4474 asection ** local_sections)
4475 {
4476 Elf_Internal_Shdr *symtab_hdr;
4477 struct elf_link_hash_entry **sym_hashes;
4478 Elf_Internal_Rela *rel, *relend;
4479 bfd_boolean ret = TRUE; /* Assume success. */
4480 int align = 0;
4481 bfd_reloc_status_type r;
4482 const char *errmsg = NULL;
4483 bfd_vma gp;
4484 struct elf_nds32_link_hash_table *htab;
4485 bfd *dynobj;
4486 bfd_vma *local_got_offsets;
4487 asection *sgot, *splt, *sreloc;
4488 bfd_vma high_address;
4489 struct elf_nds32_link_hash_table *table;
4490 int eliminate_gc_relocs;
4491 bfd_vma fpbase_addr;
4492
4493 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4494 sym_hashes = elf_sym_hashes (input_bfd);
4495 htab = nds32_elf_hash_table (info);
4496 high_address = bfd_get_section_limit (input_bfd, input_section);
4497
4498 dynobj = htab->root.dynobj;
4499 local_got_offsets = elf_local_got_offsets (input_bfd);
4500
4501 sgot = htab->sgot;
4502 splt = htab->splt;
4503 sreloc = NULL;
4504
4505 rel = relocs;
4506 relend = relocs + input_section->reloc_count;
4507
4508 table = nds32_elf_hash_table (info);
4509 eliminate_gc_relocs = table->eliminate_gc_relocs;
4510 /* By this time, we can adjust the value of _SDA_BASE_. */
4511 if ((!bfd_link_relocatable (info)))
4512 {
4513 is_SDA_BASE_set = 1;
4514 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4515 if (r != bfd_reloc_ok)
4516 return FALSE;
4517 }
4518
4519 if (is_ITB_BASE_set == 0)
4520 {
4521 /* Set the _ITB_BASE_. */
4522 if (!nds32_elf_ex9_itb_base (info))
4523 {
4524 _bfd_error_handler (_("%B: error: Cannot set _ITB_BASE_"),
4525 output_bfd);
4526 bfd_set_error (bfd_error_bad_value);
4527 }
4528 }
4529
4530 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4531 if (!nds32_elf_ifc_reloc ())
4532 _bfd_error_handler (_("error: IFC relocation error."));
4533
4534 /* Relocation for .ex9.itable. */
4535 if (table->target_optimize & NDS32_RELAX_EX9_ON
4536 || (table->ex9_import_file && table->update_ex9_table))
4537 nds32_elf_ex9_reloc_jmp (info);
4538
4539 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4540 the fp value is set as gp, and it has be reverted for instruction
4541 setting fp. */
4542 fpbase_addr = elf_gp (output_bfd);
4543
4544 for (rel = relocs; rel < relend; rel++)
4545 {
4546 enum elf_nds32_reloc_type r_type;
4547 reloc_howto_type *howto = NULL;
4548 unsigned long r_symndx;
4549 struct elf_link_hash_entry *h = NULL;
4550 Elf_Internal_Sym *sym = NULL;
4551 asection *sec;
4552 bfd_vma relocation;
4553
4554 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4555 ensure it's zero (we use REL relocs, not RELA). Therefore this
4556 should be assigning zero to `addend', but for clarity we use
4557 `r_addend'. */
4558
4559 bfd_vma addend = rel->r_addend;
4560 bfd_vma offset = rel->r_offset;
4561
4562 r_type = ELF32_R_TYPE (rel->r_info);
4563 if (r_type >= R_NDS32_max)
4564 {
4565 _bfd_error_handler (_("%B: error: unknown relocation type %d."),
4566 input_bfd, r_type);
4567 bfd_set_error (bfd_error_bad_value);
4568 ret = FALSE;
4569 continue;
4570 }
4571
4572 if (r_type == R_NDS32_GNU_VTENTRY
4573 || r_type == R_NDS32_GNU_VTINHERIT
4574 || r_type == R_NDS32_NONE
4575 || r_type == R_NDS32_RELA_GNU_VTENTRY
4576 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4577 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4578 || r_type == R_NDS32_DATA
4579 || r_type == R_NDS32_TRAN
4580 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
4581 continue;
4582
4583 /* If we enter the fp-as-gp region. Resolve the address
4584 of best fp-base. */
4585 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4586 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4587 {
4588 int dist;
4589
4590 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4591 dist = rel->r_addend >> 16;
4592 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4593 local_syms, symtab_hdr);
4594 }
4595 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4596 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4597 {
4598 fpbase_addr = elf_gp (output_bfd);
4599 }
4600
4601 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4602 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4603 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
4604 continue;
4605
4606 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4607 r_symndx = ELF32_R_SYM (rel->r_info);
4608
4609 /* This is a final link. */
4610 sym = NULL;
4611 sec = NULL;
4612 h = NULL;
4613
4614 if (r_symndx < symtab_hdr->sh_info)
4615 {
4616 /* Local symbol. */
4617 sym = local_syms + r_symndx;
4618 sec = local_sections[r_symndx];
4619
4620 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4621 addend = rel->r_addend;
4622 }
4623 else
4624 {
4625 /* External symbol. */
4626 bfd_boolean warned, ignored, unresolved_reloc;
4627 int symndx = r_symndx - symtab_hdr->sh_info;
4628
4629 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4630 r_symndx, symtab_hdr, sym_hashes, h, sec,
4631 relocation, unresolved_reloc, warned,
4632 ignored);
4633
4634 /* la $fp, _FP_BASE_ is per-function (region).
4635 Handle it specially. */
4636 switch ((int) r_type)
4637 {
4638 case R_NDS32_SDA19S0_RELA:
4639 case R_NDS32_SDA15S0_RELA:
4640 case R_NDS32_20_RELA:
4641 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4642 FP_BASE_NAME) == 0)
4643 {
4644 relocation = fpbase_addr;
4645 break;
4646 }
4647 }
4648
4649 }
4650
4651 if (bfd_link_relocatable (info))
4652 {
4653 /* This is a relocatable link. We don't have to change
4654 anything, unless the reloc is against a section symbol,
4655 in which case we have to adjust according to where the
4656 section symbol winds up in the output section. */
4657 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4658 rel->r_addend += sec->output_offset + sym->st_value;
4659
4660 continue;
4661 }
4662
4663 /* Sanity check the address. */
4664 if (offset > high_address)
4665 {
4666 r = bfd_reloc_outofrange;
4667 goto check_reloc;
4668 }
4669
4670 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4671 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4672 || r_type >= R_NDS32_RELAX_ENTRY)
4673 continue;
4674
4675 switch ((int) r_type)
4676 {
4677 case R_NDS32_GOTOFF:
4678 /* Relocation is relative to the start of the global offset
4679 table (for ld24 rx, #uimm24), e.g. access at label+addend
4680
4681 ld24 rx. #label@GOTOFF + addend
4682 sub rx, r12. */
4683 case R_NDS32_GOTOFF_HI20:
4684 case R_NDS32_GOTOFF_LO12:
4685 case R_NDS32_GOTOFF_LO15:
4686 case R_NDS32_GOTOFF_LO19:
4687 BFD_ASSERT (sgot != NULL);
4688
4689 relocation -= elf_gp (output_bfd);
4690 break;
4691
4692 case R_NDS32_9_PLTREL:
4693 case R_NDS32_25_PLTREL:
4694 /* Relocation is to the entry for this symbol in the
4695 procedure linkage table. */
4696
4697 /* The native assembler will generate a 25_PLTREL reloc
4698 for a local symbol if you assemble a call from one
4699 section to another when using -K pic. */
4700 if (h == NULL)
4701 break;
4702
4703 if (h->forced_local)
4704 break;
4705
4706 /* We didn't make a PLT entry for this symbol. This
4707 happens when statically linking PIC code, or when
4708 using -Bsymbolic. */
4709 if (h->plt.offset == (bfd_vma) - 1)
4710 break;
4711
4712 relocation = (splt->output_section->vma
4713 + splt->output_offset + h->plt.offset);
4714 break;
4715
4716 case R_NDS32_PLT_GOTREL_HI20:
4717 case R_NDS32_PLT_GOTREL_LO12:
4718 case R_NDS32_PLT_GOTREL_LO15:
4719 case R_NDS32_PLT_GOTREL_LO19:
4720 case R_NDS32_PLT_GOTREL_LO20:
4721 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4722 {
4723 /* We didn't make a PLT entry for this symbol. This
4724 happens when statically linking PIC code, or when
4725 using -Bsymbolic. */
4726 relocation -= elf_gp (output_bfd);
4727 break;
4728 }
4729
4730 relocation = (splt->output_section->vma
4731 + splt->output_offset + h->plt.offset);
4732
4733 relocation -= elf_gp (output_bfd);
4734 break;
4735
4736 case R_NDS32_PLTREL_HI20:
4737 case R_NDS32_PLTREL_LO12:
4738
4739 /* Relocation is to the entry for this symbol in the
4740 procedure linkage table. */
4741
4742 /* The native assembler will generate a 25_PLTREL reloc
4743 for a local symbol if you assemble a call from one
4744 section to another when using -K pic. */
4745 if (h == NULL)
4746 break;
4747
4748 if (h->forced_local)
4749 break;
4750
4751 if (h->plt.offset == (bfd_vma) - 1)
4752 /* We didn't make a PLT entry for this symbol. This
4753 happens when statically linking PIC code, or when
4754 using -Bsymbolic. */
4755 break;
4756
4757 if (splt == NULL)
4758 break;
4759
4760 relocation = (splt->output_section->vma
4761 + splt->output_offset
4762 + h->plt.offset + 4)
4763 - (input_section->output_section->vma
4764 + input_section->output_offset
4765 + rel->r_offset);
4766
4767 break;
4768
4769 case R_NDS32_GOTPC20:
4770 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4771 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4772 relocation = elf_gp (output_bfd);
4773 break;
4774
4775 case R_NDS32_GOTPC_HI20:
4776 case R_NDS32_GOTPC_LO12:
4777 {
4778 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4779 bl .+4
4780 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4781 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4782 or
4783 bl .+4
4784 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4785 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4786 */
4787 relocation = elf_gp (output_bfd);
4788 relocation -= (input_section->output_section->vma
4789 + input_section->output_offset + rel->r_offset);
4790 break;
4791 }
4792
4793 case R_NDS32_GOT20:
4794 /* Fall through. */
4795 case R_NDS32_GOT_HI20:
4796 case R_NDS32_GOT_LO12:
4797 case R_NDS32_GOT_LO15:
4798 case R_NDS32_GOT_LO19:
4799 /* Relocation is to the entry for this symbol in the global
4800 offset table. */
4801 BFD_ASSERT (sgot != NULL);
4802
4803 if (h != NULL)
4804 {
4805 bfd_boolean dyn;
4806 bfd_vma off;
4807
4808 off = h->got.offset;
4809 BFD_ASSERT (off != (bfd_vma) - 1);
4810 dyn = htab->root.dynamic_sections_created;
4811 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4812 bfd_link_pic (info),
4813 h)
4814 || (bfd_link_pic (info)
4815 && (info->symbolic
4816 || h->dynindx == -1
4817 || h->forced_local) && h->def_regular))
4818 {
4819 /* This is actually a static link, or it is a
4820 -Bsymbolic link and the symbol is defined
4821 locally, or the symbol was forced to be local
4822 because of a version file. We must initialize
4823 this entry in the global offset table. Since the
4824 offset must always be a multiple of 4, we use the
4825 least significant bit to record whether we have
4826 initialized it already.
4827
4828 When doing a dynamic link, we create a .rela.got
4829 relocation entry to initialize the value. This
4830 is done in the finish_dynamic_symbol routine. */
4831 if ((off & 1) != 0)
4832 off &= ~1;
4833 else
4834 {
4835 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4836 h->got.offset |= 1;
4837 }
4838 }
4839 relocation = sgot->output_section->vma + sgot->output_offset + off
4840 - elf_gp (output_bfd);
4841 }
4842 else
4843 {
4844 bfd_vma off;
4845 bfd_byte *loc;
4846
4847 BFD_ASSERT (local_got_offsets != NULL
4848 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4849
4850 off = local_got_offsets[r_symndx];
4851
4852 /* The offset must always be a multiple of 4. We use
4853 the least significant bit to record whether we have
4854 already processed this entry. */
4855 if ((off & 1) != 0)
4856 off &= ~1;
4857 else
4858 {
4859 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4860
4861 if (bfd_link_pic (info))
4862 {
4863 asection *srelgot;
4864 Elf_Internal_Rela outrel;
4865
4866 /* We need to generate a R_NDS32_RELATIVE reloc
4867 for the dynamic linker. */
4868 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
4869 BFD_ASSERT (srelgot != NULL);
4870
4871 outrel.r_offset = (elf_gp (output_bfd)
4872 + sgot->output_offset + off);
4873 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4874 outrel.r_addend = relocation;
4875 loc = srelgot->contents;
4876 loc +=
4877 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4878 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4879 ++srelgot->reloc_count;
4880 }
4881 local_got_offsets[r_symndx] |= 1;
4882 }
4883 relocation = sgot->output_section->vma + sgot->output_offset + off
4884 - elf_gp (output_bfd);
4885 }
4886
4887 break;
4888
4889 case R_NDS32_16_RELA:
4890 case R_NDS32_20_RELA:
4891 case R_NDS32_5_RELA:
4892 case R_NDS32_32_RELA:
4893 case R_NDS32_9_PCREL_RELA:
4894 case R_NDS32_WORD_9_PCREL_RELA:
4895 case R_NDS32_10_UPCREL_RELA:
4896 case R_NDS32_15_PCREL_RELA:
4897 case R_NDS32_17_PCREL_RELA:
4898 case R_NDS32_25_PCREL_RELA:
4899 case R_NDS32_HI20_RELA:
4900 case R_NDS32_LO12S3_RELA:
4901 case R_NDS32_LO12S2_RELA:
4902 case R_NDS32_LO12S2_DP_RELA:
4903 case R_NDS32_LO12S2_SP_RELA:
4904 case R_NDS32_LO12S1_RELA:
4905 case R_NDS32_LO12S0_RELA:
4906 case R_NDS32_LO12S0_ORI_RELA:
4907 if (bfd_link_pic (info) && r_symndx != 0
4908 && (input_section->flags & SEC_ALLOC) != 0
4909 && (eliminate_gc_relocs == 0
4910 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4911 && ((r_type != R_NDS32_9_PCREL_RELA
4912 && r_type != R_NDS32_WORD_9_PCREL_RELA
4913 && r_type != R_NDS32_10_UPCREL_RELA
4914 && r_type != R_NDS32_15_PCREL_RELA
4915 && r_type != R_NDS32_17_PCREL_RELA
4916 && r_type != R_NDS32_25_PCREL_RELA
4917 && !(r_type == R_NDS32_32_RELA
4918 && strcmp (input_section->name, ".eh_frame") == 0))
4919 || (h != NULL && h->dynindx != -1
4920 && (!info->symbolic || !h->def_regular))))
4921 {
4922 Elf_Internal_Rela outrel;
4923 bfd_boolean skip, relocate;
4924 bfd_byte *loc;
4925
4926 /* When generating a shared object, these relocations
4927 are copied into the output file to be resolved at run
4928 time. */
4929
4930 if (sreloc == NULL)
4931 {
4932 const char *name;
4933
4934 name = bfd_elf_string_from_elf_section
4935 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4936 elf_section_data (input_section)->rela.hdr->sh_name);
4937 if (name == NULL)
4938 return FALSE;
4939
4940 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4941 && strcmp (bfd_get_section_name (input_bfd,
4942 input_section),
4943 name + 5) == 0);
4944
4945 sreloc = bfd_get_section_by_name (dynobj, name);
4946 BFD_ASSERT (sreloc != NULL);
4947 }
4948
4949 skip = FALSE;
4950 relocate = FALSE;
4951
4952 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4953 info,
4954 input_section,
4955 rel->r_offset);
4956 if (outrel.r_offset == (bfd_vma) - 1)
4957 skip = TRUE;
4958 else if (outrel.r_offset == (bfd_vma) - 2)
4959 skip = TRUE, relocate = TRUE;
4960 outrel.r_offset += (input_section->output_section->vma
4961 + input_section->output_offset);
4962
4963 if (skip)
4964 memset (&outrel, 0, sizeof outrel);
4965 else if (r_type == R_NDS32_17_PCREL_RELA
4966 || r_type == R_NDS32_15_PCREL_RELA
4967 || r_type == R_NDS32_25_PCREL_RELA)
4968 {
4969 BFD_ASSERT (h != NULL && h->dynindx != -1);
4970 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4971 outrel.r_addend = rel->r_addend;
4972 }
4973 else
4974 {
4975 /* h->dynindx may be -1 if this symbol was marked to
4976 become local. */
4977 if (h == NULL
4978 || ((info->symbolic || h->dynindx == -1)
4979 && h->def_regular))
4980 {
4981 relocate = TRUE;
4982 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4983 outrel.r_addend = relocation + rel->r_addend;
4984 }
4985 else
4986 {
4987 BFD_ASSERT (h->dynindx != -1);
4988 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4989 outrel.r_addend = rel->r_addend;
4990 }
4991 }
4992
4993 loc = sreloc->contents;
4994 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4995 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4996 ++sreloc->reloc_count;
4997
4998 /* If this reloc is against an external symbol, we do
4999 not want to fiddle with the addend. Otherwise, we
5000 need to include the symbol value so that it becomes
5001 an addend for the dynamic reloc. */
5002 if (!relocate)
5003 continue;
5004 }
5005 break;
5006
5007 case R_NDS32_25_ABS_RELA:
5008 if (bfd_link_pic (info))
5009 {
5010 _bfd_error_handler
5011 (_("%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
5012 "mode."), bfd_get_filename (input_bfd));
5013 return FALSE;
5014 }
5015 break;
5016
5017 case R_NDS32_9_PCREL:
5018 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
5019 contents, offset,
5020 sec, relocation, addend);
5021 goto check_reloc;
5022
5023 case R_NDS32_HI20:
5024 {
5025 Elf_Internal_Rela *lorel;
5026
5027 /* We allow an arbitrary number of HI20 relocs before the
5028 LO12 reloc. This permits gcc to emit the HI and LO relocs
5029 itself. */
5030 for (lorel = rel + 1;
5031 (lorel < relend
5032 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
5033 continue;
5034 if (lorel < relend
5035 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
5036 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
5037 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
5038 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
5039 {
5040 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5041 contents, relocation + addend);
5042 r = bfd_reloc_ok;
5043 }
5044 else
5045 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5046 contents, offset, relocation,
5047 addend);
5048 }
5049
5050 goto check_reloc;
5051
5052 case R_NDS32_GOT17S2_RELA:
5053 case R_NDS32_GOT15S2_RELA:
5054 {
5055 bfd_vma off;
5056
5057 BFD_ASSERT (sgot != NULL);
5058
5059 if (h != NULL)
5060 {
5061 bfd_boolean dyn;
5062
5063 off = h->got.offset;
5064 BFD_ASSERT (off != (bfd_vma) - 1);
5065
5066 dyn = htab->root.dynamic_sections_created;
5067 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
5068 (dyn, bfd_link_pic (info), h)
5069 || (bfd_link_pic (info)
5070 && (info->symbolic
5071 || h->dynindx == -1
5072 || h->forced_local)
5073 && h->def_regular))
5074 {
5075 /* This is actually a static link, or it is a
5076 -Bsymbolic link and the symbol is defined
5077 locally, or the symbol was forced to be local
5078 because of a version file. We must initialize
5079 this entry in the global offset table. Since the
5080 offset must always be a multiple of 4, we use the
5081 least significant bit to record whether we have
5082 initialized it already.
5083
5084 When doing a dynamic link, we create a .rela.got
5085 relocation entry to initialize the value. This
5086 is done in the finish_dynamic_symbol routine. */
5087 if ((off & 1) != 0)
5088 off &= ~1;
5089 else
5090 {
5091 bfd_put_32 (output_bfd, relocation,
5092 sgot->contents + off);
5093 h->got.offset |= 1;
5094 }
5095 }
5096 }
5097 else
5098 {
5099 bfd_byte *loc;
5100
5101 BFD_ASSERT (local_got_offsets != NULL
5102 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5103
5104 off = local_got_offsets[r_symndx];
5105
5106 /* The offset must always be a multiple of 4. We use
5107 the least significant bit to record whether we have
5108 already processed this entry. */
5109 if ((off & 1) != 0)
5110 off &= ~1;
5111 else
5112 {
5113 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5114
5115 if (bfd_link_pic (info))
5116 {
5117 asection *srelgot;
5118 Elf_Internal_Rela outrel;
5119
5120 /* We need to generate a R_NDS32_RELATIVE reloc
5121 for the dynamic linker. */
5122 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
5123 BFD_ASSERT (srelgot != NULL);
5124
5125 outrel.r_offset = (elf_gp (output_bfd)
5126 + sgot->output_offset + off);
5127 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5128 outrel.r_addend = relocation;
5129 loc = srelgot->contents;
5130 loc +=
5131 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5132 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5133 ++srelgot->reloc_count;
5134 }
5135 local_got_offsets[r_symndx] |= 1;
5136 }
5137 }
5138 relocation = sgot->output_section->vma + sgot->output_offset + off
5139 - elf_gp (output_bfd);
5140 }
5141 if (relocation & align)
5142 {
5143 /* Incorrect alignment. */
5144 _bfd_error_handler
5145 (_("%B: warning: unaligned access to GOT entry."), input_bfd);
5146 ret = FALSE;
5147 r = bfd_reloc_dangerous;
5148 goto check_reloc;
5149 }
5150 break;
5151
5152 case R_NDS32_SDA16S3_RELA:
5153 case R_NDS32_SDA15S3_RELA:
5154 case R_NDS32_SDA15S3:
5155 align = 0x7;
5156 goto handle_sda;
5157
5158 case R_NDS32_SDA17S2_RELA:
5159 case R_NDS32_SDA15S2_RELA:
5160 case R_NDS32_SDA12S2_SP_RELA:
5161 case R_NDS32_SDA12S2_DP_RELA:
5162 case R_NDS32_SDA15S2:
5163 case R_NDS32_SDA_FP7U2_RELA:
5164 align = 0x3;
5165 goto handle_sda;
5166
5167 case R_NDS32_SDA18S1_RELA:
5168 case R_NDS32_SDA15S1_RELA:
5169 case R_NDS32_SDA15S1:
5170 align = 0x1;
5171 goto handle_sda;
5172
5173 case R_NDS32_SDA19S0_RELA:
5174 case R_NDS32_SDA15S0_RELA:
5175 case R_NDS32_SDA15S0:
5176 {
5177 align = 0x0;
5178 handle_sda:
5179 BFD_ASSERT (sec != NULL);
5180
5181 /* If the symbol is in the abs section, the out_bfd will be null.
5182 This happens when the relocation has a symbol@GOTOFF. */
5183 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5184 if (r != bfd_reloc_ok)
5185 {
5186 _bfd_error_handler
5187 (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
5188 ret = FALSE;
5189 goto check_reloc;
5190 }
5191
5192 /* At this point `relocation' contains the object's
5193 address. */
5194 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5195 {
5196 relocation -= fpbase_addr;
5197 }
5198 else
5199 relocation -= gp;
5200 /* Now it contains the offset from _SDA_BASE_. */
5201
5202 /* Make sure alignment is correct. */
5203
5204 if (relocation & align)
5205 {
5206 /* Incorrect alignment. */
5207 _bfd_error_handler
5208 (_("%B(%A): warning: unaligned small data access of type %d."),
5209 input_bfd, input_section, r_type);
5210 ret = FALSE;
5211 goto check_reloc;
5212 }
5213 }
5214
5215 break;
5216 case R_NDS32_17IFC_PCREL_RELA:
5217 case R_NDS32_10IFCU_PCREL_RELA:
5218 /* do nothing */
5219 break;
5220
5221 case R_NDS32_TLS_LE_HI20:
5222 case R_NDS32_TLS_LE_LO12:
5223 case R_NDS32_TLS_LE_20:
5224 case R_NDS32_TLS_LE_15S0:
5225 case R_NDS32_TLS_LE_15S1:
5226 case R_NDS32_TLS_LE_15S2:
5227 if (elf_hash_table (info)->tls_sec != NULL)
5228 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5229 break;
5230 case R_NDS32_TLS_IE_HI20:
5231 case R_NDS32_TLS_IE_LO12S2:
5232 {
5233 /* Relocation is to the entry for this symbol in the global
5234 offset table. */
5235 unsigned int tls_type;
5236 asection *srelgot;
5237 Elf_Internal_Rela outrel;
5238 bfd_vma off;
5239 bfd_byte *loc;
5240 int indx = 0;
5241
5242 BFD_ASSERT (sgot != NULL);
5243 if (h != NULL)
5244 {
5245 bfd_boolean dyn;
5246
5247 off = h->got.offset;
5248 BFD_ASSERT (off != (bfd_vma) - 1);
5249 dyn = htab->root.dynamic_sections_created;
5250 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
5251 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5252 && (!bfd_link_pic (info)
5253 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5254 indx = h->dynindx;
5255 }
5256 else
5257 {
5258 /* Never happen currently. */
5259 BFD_ASSERT (local_got_offsets != NULL
5260 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5261
5262 off = local_got_offsets[r_symndx];
5263
5264 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5265 }
5266 relocation = sgot->output_section->vma + sgot->output_offset + off;
5267
5268 if (r_type == R_NDS32_TLS_IE_LO12S2)
5269 break;
5270
5271 /* The offset must always be a multiple of 4. We use
5272 the least significant bit to record whether we have
5273 already processed this entry. */
5274 if ((off & 1) != 0)
5275 off &= ~1;
5276 else
5277 {
5278 bfd_boolean need_relocs = FALSE;
5279 srelgot = htab->srelgot;
5280 if ((bfd_link_pic (info) || indx != 0)
5281 && (h == NULL
5282 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5283 || h->root.type != bfd_link_hash_undefweak))
5284 {
5285 need_relocs = TRUE;
5286 BFD_ASSERT (srelgot != NULL);
5287 }
5288 if (tls_type & GOT_TLS_IE)
5289 {
5290 if (need_relocs)
5291 {
5292 if (h->dynindx == 0)
5293 outrel.r_addend = relocation - dtpoff_base (info);
5294 else
5295 outrel.r_addend = 0;
5296 outrel.r_offset = (sgot->output_section->vma
5297 + sgot->output_offset
5298 + off);
5299 outrel.r_info =
5300 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5301
5302 loc = srelgot->contents;
5303 loc +=
5304 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5305 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5306 ++srelgot->reloc_count;
5307 }
5308 else
5309 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5310 sgot->contents + off);
5311 }
5312 }
5313 }
5314 break;
5315
5316 /* DON'T fall through. */
5317
5318 default:
5319 /* OLD_NDS32_RELOC. */
5320
5321 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5322 contents, offset, relocation, addend);
5323 goto check_reloc;
5324 }
5325
5326 switch ((int) r_type)
5327 {
5328 case R_NDS32_20_RELA:
5329 case R_NDS32_5_RELA:
5330 case R_NDS32_9_PCREL_RELA:
5331 case R_NDS32_WORD_9_PCREL_RELA:
5332 case R_NDS32_10_UPCREL_RELA:
5333 case R_NDS32_15_PCREL_RELA:
5334 case R_NDS32_17_PCREL_RELA:
5335 case R_NDS32_25_PCREL_RELA:
5336 case R_NDS32_25_ABS_RELA:
5337 case R_NDS32_HI20_RELA:
5338 case R_NDS32_LO12S3_RELA:
5339 case R_NDS32_LO12S2_RELA:
5340 case R_NDS32_LO12S2_DP_RELA:
5341 case R_NDS32_LO12S2_SP_RELA:
5342 case R_NDS32_LO12S1_RELA:
5343 case R_NDS32_LO12S0_RELA:
5344 case R_NDS32_LO12S0_ORI_RELA:
5345 case R_NDS32_SDA16S3_RELA:
5346 case R_NDS32_SDA17S2_RELA:
5347 case R_NDS32_SDA18S1_RELA:
5348 case R_NDS32_SDA19S0_RELA:
5349 case R_NDS32_SDA15S3_RELA:
5350 case R_NDS32_SDA15S2_RELA:
5351 case R_NDS32_SDA12S2_DP_RELA:
5352 case R_NDS32_SDA12S2_SP_RELA:
5353 case R_NDS32_SDA15S1_RELA:
5354 case R_NDS32_SDA15S0_RELA:
5355 case R_NDS32_SDA_FP7U2_RELA:
5356 case R_NDS32_9_PLTREL:
5357 case R_NDS32_25_PLTREL:
5358 case R_NDS32_GOT20:
5359 case R_NDS32_GOT_HI20:
5360 case R_NDS32_GOT_LO12:
5361 case R_NDS32_GOT_LO15:
5362 case R_NDS32_GOT_LO19:
5363 case R_NDS32_GOT15S2_RELA:
5364 case R_NDS32_GOT17S2_RELA:
5365 case R_NDS32_GOTPC20:
5366 case R_NDS32_GOTPC_HI20:
5367 case R_NDS32_GOTPC_LO12:
5368 case R_NDS32_GOTOFF:
5369 case R_NDS32_GOTOFF_HI20:
5370 case R_NDS32_GOTOFF_LO12:
5371 case R_NDS32_GOTOFF_LO15:
5372 case R_NDS32_GOTOFF_LO19:
5373 case R_NDS32_PLTREL_HI20:
5374 case R_NDS32_PLTREL_LO12:
5375 case R_NDS32_PLT_GOTREL_HI20:
5376 case R_NDS32_PLT_GOTREL_LO12:
5377 case R_NDS32_PLT_GOTREL_LO15:
5378 case R_NDS32_PLT_GOTREL_LO19:
5379 case R_NDS32_PLT_GOTREL_LO20:
5380 case R_NDS32_17IFC_PCREL_RELA:
5381 case R_NDS32_10IFCU_PCREL_RELA:
5382 case R_NDS32_TLS_LE_HI20:
5383 case R_NDS32_TLS_LE_LO12:
5384 case R_NDS32_TLS_IE_HI20:
5385 case R_NDS32_TLS_IE_LO12S2:
5386 case R_NDS32_TLS_LE_20:
5387 case R_NDS32_TLS_LE_15S0:
5388 case R_NDS32_TLS_LE_15S1:
5389 case R_NDS32_TLS_LE_15S2:
5390 /* Instruction related relocs must handle endian properly. */
5391 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
5392 r = nds32_elf_final_link_relocate (howto, input_bfd,
5393 input_section, contents,
5394 rel->r_offset, relocation,
5395 rel->r_addend);
5396 break;
5397
5398 default:
5399 /* All other relocs can use default handler. */
5400 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5401 contents, rel->r_offset,
5402 relocation, rel->r_addend);
5403 break;
5404 }
5405
5406 check_reloc:
5407
5408 if (r != bfd_reloc_ok)
5409 {
5410 /* FIXME: This should be generic enough to go in a utility. */
5411 const char *name;
5412
5413 if (h != NULL)
5414 name = h->root.root.string;
5415 else
5416 {
5417 name = bfd_elf_string_from_elf_section
5418 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5419 if (name == NULL || *name == '\0')
5420 name = bfd_section_name (input_bfd, sec);
5421 }
5422
5423 if (errmsg != NULL)
5424 goto common_error;
5425
5426 switch (r)
5427 {
5428 case bfd_reloc_overflow:
5429 (*info->callbacks->reloc_overflow)
5430 (info, (h ? &h->root : NULL), name, howto->name,
5431 (bfd_vma) 0, input_bfd, input_section, offset);
5432 break;
5433
5434 case bfd_reloc_undefined:
5435 (*info->callbacks->undefined_symbol)
5436 (info, name, input_bfd, input_section, offset, TRUE);
5437 break;
5438
5439 case bfd_reloc_outofrange:
5440 errmsg = _("internal error: out of range error");
5441 goto common_error;
5442
5443 case bfd_reloc_notsupported:
5444 errmsg = _("internal error: unsupported relocation error");
5445 goto common_error;
5446
5447 case bfd_reloc_dangerous:
5448 errmsg = _("internal error: dangerous error");
5449 goto common_error;
5450
5451 default:
5452 errmsg = _("internal error: unknown error");
5453 /* Fall through. */
5454
5455 common_error:
5456 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
5457 input_section, offset);
5458 break;
5459 }
5460 }
5461 }
5462
5463 return ret;
5464 }
5465
5466 /* Finish up dynamic symbol handling. We set the contents of various
5467 dynamic sections here. */
5468
5469 static bfd_boolean
5470 nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5471 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5472 {
5473 struct elf_nds32_link_hash_table *htab;
5474 bfd_byte *loc;
5475
5476 htab = nds32_elf_hash_table (info);
5477
5478 if (h->plt.offset != (bfd_vma) - 1)
5479 {
5480 asection *splt;
5481 asection *sgot;
5482 asection *srela;
5483
5484 bfd_vma plt_index;
5485 bfd_vma got_offset;
5486 bfd_vma local_plt_offset;
5487 Elf_Internal_Rela rela;
5488
5489 /* This symbol has an entry in the procedure linkage table. Set
5490 it up. */
5491
5492 BFD_ASSERT (h->dynindx != -1);
5493
5494 splt = htab->splt;
5495 sgot = htab->sgotplt;
5496 srela = htab->srelplt;
5497 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5498
5499 /* Get the index in the procedure linkage table which
5500 corresponds to this symbol. This is the index of this symbol
5501 in all the symbols for which we are making plt entries. The
5502 first entry in the procedure linkage table is reserved. */
5503 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5504
5505 /* Get the offset into the .got table of the entry that
5506 corresponds to this function. Each .got entry is 4 bytes.
5507 The first three are reserved. */
5508 got_offset = (plt_index + 3) * 4;
5509
5510 /* Fill in the entry in the procedure linkage table. */
5511 if (!bfd_link_pic (info))
5512 {
5513 unsigned long insn;
5514
5515 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5516 + sgot->output_offset + got_offset) >> 12)
5517 & 0xfffff);
5518 bfd_putb32 (insn, splt->contents + h->plt.offset);
5519
5520 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5521 + sgot->output_offset + got_offset) & 0x0fff)
5522 >> 2);
5523 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5524
5525 insn = PLT_ENTRY_WORD2;
5526 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5527
5528 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5529 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5530
5531 insn = PLT_ENTRY_WORD4
5532 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5533 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5534 local_plt_offset = 12;
5535 }
5536 else
5537 {
5538 /* sda_base must be set at this time. */
5539 unsigned long insn;
5540 long offset;
5541
5542 /* FIXME, sda_base is 65536, it will damage opcode. */
5543 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5544 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5545 - elf_gp (output_bfd);
5546 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5547 bfd_putb32 (insn, splt->contents + h->plt.offset);
5548
5549 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5550 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5551
5552 insn = PLT_PIC_ENTRY_WORD2;
5553 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5554
5555 insn = PLT_PIC_ENTRY_WORD3;
5556 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5557
5558 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5559 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5560
5561 insn = PLT_PIC_ENTRY_WORD5
5562 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5563 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5564
5565 local_plt_offset = 16;
5566 }
5567
5568 /* Fill in the entry in the global offset table,
5569 so it will fall through to the next instruction for the first time. */
5570 bfd_put_32 (output_bfd,
5571 (splt->output_section->vma + splt->output_offset
5572 + h->plt.offset + local_plt_offset),
5573 sgot->contents + got_offset);
5574
5575 /* Fill in the entry in the .rela.plt section. */
5576 rela.r_offset = (sgot->output_section->vma
5577 + sgot->output_offset + got_offset);
5578 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5579 rela.r_addend = 0;
5580 loc = srela->contents;
5581 loc += plt_index * sizeof (Elf32_External_Rela);
5582 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5583
5584 if (!h->def_regular)
5585 {
5586 /* Mark the symbol as undefined, rather than as defined in
5587 the .plt section. Leave the value alone. */
5588 sym->st_shndx = SHN_UNDEF;
5589 if (!h->ref_regular_nonweak)
5590 sym->st_value = 0;
5591 }
5592 }
5593
5594 if (h->got.offset != (bfd_vma) - 1)
5595 {
5596 asection *sgot;
5597 asection *srela;
5598 Elf_Internal_Rela rela;
5599
5600 /* This symbol has an entry in the global offset table.
5601 Set it up. */
5602
5603 sgot = htab->sgot;
5604 srela = htab->srelgot;
5605 BFD_ASSERT (sgot != NULL && srela != NULL);
5606
5607 rela.r_offset = (sgot->output_section->vma
5608 + sgot->output_offset + (h->got.offset & ~1));
5609
5610 /* If this is a -Bsymbolic link, and the symbol is defined
5611 locally, we just want to emit a RELATIVE reloc. Likewise if
5612 the symbol was forced to be local because of a version file.
5613 The entry in the global offset table will already have been
5614 initialized in the relocate_section function. */
5615 if (bfd_link_pic (info)
5616 && (info->symbolic
5617 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5618 {
5619 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5620 rela.r_addend = (h->root.u.def.value
5621 + h->root.u.def.section->output_section->vma
5622 + h->root.u.def.section->output_offset);
5623 }
5624 else
5625 {
5626 BFD_ASSERT ((h->got.offset & 1) == 0);
5627 bfd_put_32 (output_bfd, (bfd_vma) 0,
5628 sgot->contents + h->got.offset);
5629 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5630 rela.r_addend = 0;
5631 }
5632
5633 loc = srela->contents;
5634 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5635 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5636 ++srela->reloc_count;
5637 }
5638
5639 if (h->needs_copy)
5640 {
5641 asection *s;
5642 Elf_Internal_Rela rela;
5643
5644 /* This symbols needs a copy reloc. Set it up. */
5645
5646 BFD_ASSERT (h->dynindx != -1
5647 && (h->root.type == bfd_link_hash_defined
5648 || h->root.type == bfd_link_hash_defweak));
5649
5650 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5651 BFD_ASSERT (s != NULL);
5652
5653 rela.r_offset = (h->root.u.def.value
5654 + h->root.u.def.section->output_section->vma
5655 + h->root.u.def.section->output_offset);
5656 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5657 rela.r_addend = 0;
5658 loc = s->contents;
5659 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5660 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5661 ++s->reloc_count;
5662 }
5663
5664 /* Mark some specially defined symbols as absolute. */
5665 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5666 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5667 sym->st_shndx = SHN_ABS;
5668
5669 return TRUE;
5670 }
5671
5672
5673 /* Finish up the dynamic sections. */
5674
5675 static bfd_boolean
5676 nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5677 {
5678 struct elf_nds32_link_hash_table *htab;
5679 bfd *dynobj;
5680 asection *sdyn;
5681 asection *sgot;
5682
5683 htab = nds32_elf_hash_table (info);
5684 dynobj = htab->root.dynobj;
5685
5686 sgot = htab->sgotplt;
5687 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5688
5689 if (htab->root.dynamic_sections_created)
5690 {
5691 asection *splt;
5692 Elf32_External_Dyn *dyncon, *dynconend;
5693
5694 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5695
5696 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5697 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5698
5699 for (; dyncon < dynconend; dyncon++)
5700 {
5701 Elf_Internal_Dyn dyn;
5702 asection *s;
5703
5704 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5705
5706 switch (dyn.d_tag)
5707 {
5708 default:
5709 break;
5710
5711 case DT_PLTGOT:
5712 s = htab->sgotplt;
5713 goto get_vma;
5714 case DT_JMPREL:
5715 s = htab->srelplt;
5716 get_vma:
5717 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
5718 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5719 break;
5720
5721 case DT_PLTRELSZ:
5722 s = htab->srelplt;
5723 dyn.d_un.d_val = s->size;
5724 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5725 break;
5726
5727 case DT_RELASZ:
5728 /* My reading of the SVR4 ABI indicates that the
5729 procedure linkage table relocs (DT_JMPREL) should be
5730 included in the overall relocs (DT_RELA). This is
5731 what Solaris does. However, UnixWare can not handle
5732 that case. Therefore, we override the DT_RELASZ entry
5733 here to make it not include the JMPREL relocs. Since
5734 the linker script arranges for .rela.plt to follow all
5735 other relocation sections, we don't have to worry
5736 about changing the DT_RELA entry. */
5737 if (htab->srelplt != NULL)
5738 {
5739 s = htab->srelplt;
5740 dyn.d_un.d_val -= s->size;
5741 }
5742 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5743 break;
5744 }
5745 }
5746
5747 /* Fill in the first entry in the procedure linkage table. */
5748 splt = htab->splt;
5749 if (splt && splt->size > 0)
5750 {
5751 if (bfd_link_pic (info))
5752 {
5753 unsigned long insn;
5754 long offset;
5755
5756 /* FIXME, sda_base is 65536, it will damage opcode. */
5757 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5758 offset = sgot->output_section->vma + sgot->output_offset + 4
5759 - elf_gp (output_bfd);
5760 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5761 bfd_putb32 (insn, splt->contents);
5762
5763 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5764 /* here has a typo? */
5765 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5766 bfd_putb32 (insn, splt->contents + 4);
5767
5768 insn = PLT0_PIC_ENTRY_WORD2;
5769 bfd_putb32 (insn, splt->contents + 8);
5770
5771 insn = PLT0_PIC_ENTRY_WORD3;
5772 bfd_putb32 (insn, splt->contents + 12);
5773
5774 insn = PLT0_PIC_ENTRY_WORD4;
5775 bfd_putb32 (insn, splt->contents + 16);
5776
5777 insn = PLT0_PIC_ENTRY_WORD5;
5778 bfd_putb32 (insn, splt->contents + 20);
5779 }
5780 else
5781 {
5782 unsigned long insn;
5783 unsigned long addr;
5784
5785 /* addr = .got + 4 */
5786 addr = sgot->output_section->vma + sgot->output_offset + 4;
5787 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5788 bfd_putb32 (insn, splt->contents);
5789
5790 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5791 bfd_putb32 (insn, splt->contents + 4);
5792
5793 insn = PLT0_ENTRY_WORD2;
5794 bfd_putb32 (insn, splt->contents + 8);
5795
5796 insn = PLT0_ENTRY_WORD3;
5797 bfd_putb32 (insn, splt->contents + 12);
5798
5799 insn = PLT0_ENTRY_WORD4;
5800 bfd_putb32 (insn, splt->contents + 16);
5801 }
5802
5803 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5804 PLT_ENTRY_SIZE;
5805 }
5806 }
5807
5808 /* Fill in the first three entries in the global offset table. */
5809 if (sgot && sgot->size > 0)
5810 {
5811 if (sdyn == NULL)
5812 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5813 else
5814 bfd_put_32 (output_bfd,
5815 sdyn->output_section->vma + sdyn->output_offset,
5816 sgot->contents);
5817 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5818 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5819
5820 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5821 }
5822
5823 return TRUE;
5824 }
5825 \f
5826
5827 /* Set the right machine number. */
5828
5829 static bfd_boolean
5830 nds32_elf_object_p (bfd *abfd)
5831 {
5832 static unsigned int cur_arch = 0;
5833
5834 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5835 {
5836 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5837 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5838 }
5839
5840 switch (cur_arch)
5841 {
5842 default:
5843 case E_N1_ARCH:
5844 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5845 break;
5846 case E_N1H_ARCH:
5847 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5848 break;
5849 case E_NDS_ARCH_STAR_V2_0:
5850 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5851 break;
5852 case E_NDS_ARCH_STAR_V3_0:
5853 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5854 break;
5855 case E_NDS_ARCH_STAR_V3_M:
5856 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5857 break;
5858 }
5859
5860 return TRUE;
5861 }
5862
5863 /* Store the machine number in the flags field. */
5864
5865 static void
5866 nds32_elf_final_write_processing (bfd *abfd,
5867 bfd_boolean linker ATTRIBUTE_UNUSED)
5868 {
5869 unsigned long val;
5870 static unsigned int cur_mach = 0;
5871
5872 if (bfd_mach_n1 != bfd_get_mach (abfd))
5873 {
5874 cur_mach = bfd_get_mach (abfd);
5875 }
5876
5877 switch (cur_mach)
5878 {
5879 case bfd_mach_n1:
5880 /* Only happen when object is empty, since the case is abandon. */
5881 val = E_N1_ARCH;
5882 val |= E_NDS_ABI_AABI;
5883 val |= E_NDS32_ELF_VER_1_4;
5884 break;
5885 case bfd_mach_n1h:
5886 val = E_N1H_ARCH;
5887 break;
5888 case bfd_mach_n1h_v2:
5889 val = E_NDS_ARCH_STAR_V2_0;
5890 break;
5891 case bfd_mach_n1h_v3:
5892 val = E_NDS_ARCH_STAR_V3_0;
5893 break;
5894 case bfd_mach_n1h_v3m:
5895 val = E_NDS_ARCH_STAR_V3_M;
5896 break;
5897 default:
5898 val = 0;
5899 break;
5900 }
5901
5902 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5903 elf_elfheader (abfd)->e_flags |= val;
5904 }
5905
5906 /* Function to keep NDS32 specific file flags. */
5907
5908 static bfd_boolean
5909 nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5910 {
5911 BFD_ASSERT (!elf_flags_init (abfd)
5912 || elf_elfheader (abfd)->e_flags == flags);
5913
5914 elf_elfheader (abfd)->e_flags = flags;
5915 elf_flags_init (abfd) = TRUE;
5916 return TRUE;
5917 }
5918
5919 static unsigned int
5920 convert_e_flags (unsigned int e_flags, unsigned int arch)
5921 {
5922 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5923 {
5924 /* From 0.9 to 1.0. */
5925 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5926
5927 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5928 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5929 if (arch == E_NDS_ARCH_STAR_V1_0)
5930 {
5931 /* Done. */
5932 return e_flags;
5933 }
5934 }
5935
5936 /* From 1.0 to 2.0. */
5937 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5938
5939 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5940 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5941
5942 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5943 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5944 return e_flags;
5945 }
5946
5947 static bfd_boolean
5948 nds32_check_vec_size (bfd *ibfd)
5949 {
5950 static unsigned int nds32_vec_size = 0;
5951
5952 asection *sec_t = NULL;
5953 bfd_byte *contents = NULL;
5954
5955 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5956
5957 if (sec_t && sec_t->size >= 4)
5958 {
5959 /* Get vec_size in file. */
5960 unsigned int flag_t;
5961
5962 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
5963 flag_t = bfd_get_32 (ibfd, contents);
5964
5965 /* The value could only be 4 or 16. */
5966
5967 if (!nds32_vec_size)
5968 /* Set if not set yet. */
5969 nds32_vec_size = (flag_t & 0x3);
5970 else if (nds32_vec_size != (flag_t & 0x3))
5971 {
5972 _bfd_error_handler
5973 (_("%B: ISR vector size mismatch"
5974 " with previous modules, previous %u-byte, current %u-byte"),
5975 ibfd,
5976 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5977 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
5978 return FALSE;
5979 }
5980 else
5981 /* Only keep the first vec_size section. */
5982 sec_t->flags |= SEC_EXCLUDE;
5983 }
5984
5985 return TRUE;
5986 }
5987
5988 /* Merge backend specific data from an object file to the output
5989 object file when linking. */
5990
5991 static bfd_boolean
5992 nds32_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
5993 {
5994 bfd *obfd = info->output_bfd;
5995 flagword out_flags;
5996 flagword in_flags;
5997 flagword out_16regs;
5998 flagword in_no_mac;
5999 flagword out_no_mac;
6000 flagword in_16regs;
6001 flagword out_version;
6002 flagword in_version;
6003 flagword out_fpu_config;
6004 flagword in_fpu_config;
6005
6006 /* TODO: Revise to use object-attributes instead. */
6007 if (!nds32_check_vec_size (ibfd))
6008 return FALSE;
6009
6010 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
6011 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
6012 return TRUE;
6013
6014 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
6015 {
6016 _bfd_error_handler
6017 (_("%B: warning: Endian mismatch with previous modules."), ibfd);
6018
6019 bfd_set_error (bfd_error_bad_value);
6020 return FALSE;
6021 }
6022
6023 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
6024 if (in_version == E_NDS32_ELF_VER_1_2)
6025 {
6026 _bfd_error_handler
6027 (_("%B: warning: Older version of object file encountered, "
6028 "Please recompile with current tool chain."), ibfd);
6029 }
6030
6031 /* We may need to merge V1 and V2 arch object files to V2. */
6032 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6033 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6034 {
6035 /* Need to convert version. */
6036 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6037 == E_NDS_ARCH_STAR_RESERVED)
6038 {
6039 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6040 }
6041 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
6042 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6043 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6044 {
6045 elf_elfheader (obfd)->e_flags =
6046 convert_e_flags (elf_elfheader (obfd)->e_flags,
6047 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
6048 }
6049 else
6050 {
6051 elf_elfheader (ibfd)->e_flags =
6052 convert_e_flags (elf_elfheader (ibfd)->e_flags,
6053 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
6054 }
6055 }
6056
6057 /* Extract some flags. */
6058 in_flags = elf_elfheader (ibfd)->e_flags
6059 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6060 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6061
6062 /* The following flags need special treatment. */
6063 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6064 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6065 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6066
6067 /* Extract some flags. */
6068 out_flags = elf_elfheader (obfd)->e_flags
6069 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6070 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6071
6072 /* The following flags need special treatment. */
6073 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6074 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6075 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6076 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6077 if (!elf_flags_init (obfd))
6078 {
6079 /* If the input is the default architecture then do not
6080 bother setting the flags for the output architecture,
6081 instead allow future merges to do this. If no future
6082 merges ever set these flags then they will retain their
6083 unitialised values, which surprise surprise, correspond
6084 to the default values. */
6085 if (bfd_get_arch_info (ibfd)->the_default)
6086 return TRUE;
6087
6088 elf_flags_init (obfd) = TRUE;
6089 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6090
6091 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6092 && bfd_get_arch_info (obfd)->the_default)
6093 {
6094 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6095 bfd_get_mach (ibfd));
6096 }
6097
6098 return TRUE;
6099 }
6100
6101 /* Check flag compatibility. */
6102 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
6103 {
6104 _bfd_error_handler
6105 (_("%B: error: ABI mismatch with previous modules."), ibfd);
6106
6107 bfd_set_error (bfd_error_bad_value);
6108 return FALSE;
6109 }
6110
6111 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6112 {
6113 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6114 {
6115 _bfd_error_handler
6116 (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
6117
6118 bfd_set_error (bfd_error_bad_value);
6119 return FALSE;
6120 }
6121 }
6122
6123 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6124 and perf ext1 and DIV are mergerd to perf ext1. */
6125 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6126 {
6127 elf_elfheader (obfd)->e_flags =
6128 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6129 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6130 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6131 ? E_NDS32_HAS_EXT_INST : 0)
6132 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6133 ? E_NDS32_HAS_EXT_INST : 0)
6134 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6135 | ((in_version > out_version) ? out_version : in_version);
6136 }
6137 else
6138 {
6139 if (in_version != out_version)
6140 _bfd_error_handler
6141 (_("%B: warning: Incompatible elf-versions %s and %s."),
6142 ibfd, nds32_elfver_strtab[out_version],
6143 nds32_elfver_strtab[in_version]);
6144
6145 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6146 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6147 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6148 | (in_version > out_version ? out_version : in_version);
6149 }
6150
6151 return TRUE;
6152 }
6153
6154 /* Display the flags field. */
6155
6156 static bfd_boolean
6157 nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6158 {
6159 FILE *file = (FILE *) ptr;
6160
6161 BFD_ASSERT (abfd != NULL && ptr != NULL);
6162
6163 _bfd_elf_print_private_bfd_data (abfd, ptr);
6164
6165 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6166
6167 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6168 {
6169 default:
6170 case E_N1_ARCH:
6171 fprintf (file, _(": n1 instructions"));
6172 break;
6173 case E_N1H_ARCH:
6174 fprintf (file, _(": n1h instructions"));
6175 break;
6176 }
6177
6178 fputc ('\n', file);
6179
6180 return TRUE;
6181 }
6182
6183 static unsigned int
6184 nds32_elf_action_discarded (asection *sec)
6185 {
6186
6187 if (strncmp
6188 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6189 return 0;
6190
6191 return _bfd_elf_default_action_discarded (sec);
6192 }
6193
6194 static asection *
6195 nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6196 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6197 Elf_Internal_Sym *sym)
6198 {
6199 if (h != NULL)
6200 switch (ELF32_R_TYPE (rel->r_info))
6201 {
6202 case R_NDS32_GNU_VTINHERIT:
6203 case R_NDS32_GNU_VTENTRY:
6204 case R_NDS32_RELA_GNU_VTINHERIT:
6205 case R_NDS32_RELA_GNU_VTENTRY:
6206 return NULL;
6207 }
6208
6209 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6210 }
6211
6212 static bfd_boolean
6213 nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec,
6214 const Elf_Internal_Rela *relocs)
6215 {
6216 /* Update the got entry reference counts for the section being removed. */
6217 Elf_Internal_Shdr *symtab_hdr;
6218 struct elf_link_hash_entry **sym_hashes;
6219 bfd_signed_vma *local_got_refcounts;
6220 const Elf_Internal_Rela *rel, *relend;
6221
6222 elf_section_data (sec)->local_dynrel = NULL;
6223
6224 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6225 sym_hashes = elf_sym_hashes (abfd);
6226 local_got_refcounts = elf_local_got_refcounts (abfd);
6227
6228 relend = relocs + sec->reloc_count;
6229 for (rel = relocs; rel < relend; rel++)
6230 {
6231 unsigned long r_symndx;
6232 struct elf_link_hash_entry *h = NULL;
6233
6234 r_symndx = ELF32_R_SYM (rel->r_info);
6235 if (r_symndx >= symtab_hdr->sh_info)
6236 {
6237 /* External symbol. */
6238 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6239 while (h->root.type == bfd_link_hash_indirect
6240 || h->root.type == bfd_link_hash_warning)
6241 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6242 }
6243
6244 switch (ELF32_R_TYPE (rel->r_info))
6245 {
6246 case R_NDS32_GOT_HI20:
6247 case R_NDS32_GOT_LO12:
6248 case R_NDS32_GOT_LO15:
6249 case R_NDS32_GOT_LO19:
6250 case R_NDS32_GOT17S2_RELA:
6251 case R_NDS32_GOT15S2_RELA:
6252 case R_NDS32_GOTOFF:
6253 case R_NDS32_GOTOFF_HI20:
6254 case R_NDS32_GOTOFF_LO12:
6255 case R_NDS32_GOTOFF_LO15:
6256 case R_NDS32_GOTOFF_LO19:
6257 case R_NDS32_GOT20:
6258 case R_NDS32_GOTPC_HI20:
6259 case R_NDS32_GOTPC_LO12:
6260 case R_NDS32_GOTPC20:
6261 if (h != NULL)
6262 {
6263 if (h->got.refcount > 0)
6264 h->got.refcount--;
6265 }
6266 else
6267 {
6268 if (local_got_refcounts && local_got_refcounts[r_symndx] > 0)
6269 local_got_refcounts[r_symndx]--;
6270 }
6271 break;
6272
6273 case R_NDS32_16_RELA:
6274 case R_NDS32_20_RELA:
6275 case R_NDS32_5_RELA:
6276 case R_NDS32_32_RELA:
6277 case R_NDS32_HI20_RELA:
6278 case R_NDS32_LO12S3_RELA:
6279 case R_NDS32_LO12S2_RELA:
6280 case R_NDS32_LO12S2_DP_RELA:
6281 case R_NDS32_LO12S2_SP_RELA:
6282 case R_NDS32_LO12S1_RELA:
6283 case R_NDS32_LO12S0_RELA:
6284 case R_NDS32_LO12S0_ORI_RELA:
6285 case R_NDS32_SDA16S3_RELA:
6286 case R_NDS32_SDA17S2_RELA:
6287 case R_NDS32_SDA18S1_RELA:
6288 case R_NDS32_SDA19S0_RELA:
6289 case R_NDS32_SDA15S3_RELA:
6290 case R_NDS32_SDA15S2_RELA:
6291 case R_NDS32_SDA12S2_DP_RELA:
6292 case R_NDS32_SDA12S2_SP_RELA:
6293 case R_NDS32_SDA15S1_RELA:
6294 case R_NDS32_SDA15S0_RELA:
6295 case R_NDS32_SDA_FP7U2_RELA:
6296 case R_NDS32_15_PCREL_RELA:
6297 case R_NDS32_17_PCREL_RELA:
6298 case R_NDS32_25_PCREL_RELA:
6299 if (h != NULL)
6300 {
6301 struct elf_nds32_link_hash_entry *eh;
6302 struct elf_nds32_dyn_relocs **pp;
6303 struct elf_nds32_dyn_relocs *p;
6304
6305 if (!bfd_link_pic (info) && h->plt.refcount > 0)
6306 h->plt.refcount -= 1;
6307
6308 eh = (struct elf_nds32_link_hash_entry *) h;
6309
6310 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
6311 if (p->sec == sec)
6312 {
6313 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6314 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
6315 || ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA)
6316 p->pc_count -= 1;
6317 p->count -= 1;
6318 if (p->count == 0)
6319 *pp = p->next;
6320 break;
6321 }
6322 }
6323 break;
6324
6325 case R_NDS32_9_PLTREL:
6326 case R_NDS32_25_PLTREL:
6327 if (h != NULL)
6328 {
6329 if (h->plt.refcount > 0)
6330 h->plt.refcount--;
6331 }
6332 break;
6333
6334 default:
6335 break;
6336 }
6337 }
6338
6339 return TRUE;
6340 }
6341
6342 /* Look through the relocs for a section during the first phase.
6343 Since we don't do .gots or .plts, we just need to consider the
6344 virtual table relocs for gc. */
6345
6346 static bfd_boolean
6347 nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6348 asection *sec, const Elf_Internal_Rela *relocs)
6349 {
6350 Elf_Internal_Shdr *symtab_hdr;
6351 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6352 const Elf_Internal_Rela *rel;
6353 const Elf_Internal_Rela *rel_end;
6354 struct elf_nds32_link_hash_table *htab;
6355 bfd *dynobj;
6356 asection *sreloc = NULL;
6357
6358 if (bfd_link_relocatable (info))
6359 return TRUE;
6360
6361 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6362 sym_hashes = elf_sym_hashes (abfd);
6363 sym_hashes_end =
6364 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6365 if (!elf_bad_symtab (abfd))
6366 sym_hashes_end -= symtab_hdr->sh_info;
6367
6368 htab = nds32_elf_hash_table (info);
6369 dynobj = htab->root.dynobj;
6370
6371 rel_end = relocs + sec->reloc_count;
6372 for (rel = relocs; rel < rel_end; rel++)
6373 {
6374 enum elf_nds32_reloc_type r_type;
6375 struct elf_link_hash_entry *h;
6376 unsigned long r_symndx;
6377 int tls_type, old_tls_type;
6378
6379 r_symndx = ELF32_R_SYM (rel->r_info);
6380 r_type = ELF32_R_TYPE (rel->r_info);
6381 if (r_symndx < symtab_hdr->sh_info)
6382 h = NULL;
6383 else
6384 {
6385 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6386 while (h->root.type == bfd_link_hash_indirect
6387 || h->root.type == bfd_link_hash_warning)
6388 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6389 }
6390
6391 /* Some relocs require a global offset table. We create
6392 got section here, since these relocation need got section
6393 and it is not created yet. */
6394 if (htab->sgot == NULL)
6395 {
6396 switch (r_type)
6397 {
6398 case R_NDS32_GOT_HI20:
6399 case R_NDS32_GOT_LO12:
6400 case R_NDS32_GOT_LO15:
6401 case R_NDS32_GOT_LO19:
6402 case R_NDS32_GOT17S2_RELA:
6403 case R_NDS32_GOT15S2_RELA:
6404 case R_NDS32_GOTOFF:
6405 case R_NDS32_GOTOFF_HI20:
6406 case R_NDS32_GOTOFF_LO12:
6407 case R_NDS32_GOTOFF_LO15:
6408 case R_NDS32_GOTOFF_LO19:
6409 case R_NDS32_GOTPC20:
6410 case R_NDS32_GOTPC_HI20:
6411 case R_NDS32_GOTPC_LO12:
6412 case R_NDS32_GOT20:
6413 case R_NDS32_TLS_IE_HI20:
6414 case R_NDS32_TLS_IE_LO12S2:
6415 if (dynobj == NULL)
6416 htab->root.dynobj = dynobj = abfd;
6417 if (!create_got_section (dynobj, info))
6418 return FALSE;
6419 break;
6420
6421 default:
6422 break;
6423 }
6424 }
6425
6426 switch ((int) r_type)
6427 {
6428 case R_NDS32_GOT_HI20:
6429 case R_NDS32_GOT_LO12:
6430 case R_NDS32_GOT_LO15:
6431 case R_NDS32_GOT_LO19:
6432 case R_NDS32_GOT20:
6433 case R_NDS32_TLS_IE_HI20:
6434 case R_NDS32_TLS_IE_LO12S2:
6435 switch (r_type)
6436 {
6437 case R_NDS32_TLS_IE_HI20:
6438 case R_NDS32_TLS_IE_LO12S2:
6439 tls_type = GOT_TLS_IE;
6440 break;
6441 default:
6442 tls_type = GOT_NORMAL;
6443 break;
6444 }
6445 if (h != NULL)
6446 {
6447 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6448 h->got.refcount += 1;
6449 }
6450 else
6451 {
6452 bfd_signed_vma *local_got_refcounts;
6453
6454 /* This is a global offset table entry for a local
6455 symbol. */
6456 local_got_refcounts = elf_local_got_refcounts (abfd);
6457 if (local_got_refcounts == NULL)
6458 {
6459 bfd_size_type size;
6460
6461 size = symtab_hdr->sh_info;
6462 size *= sizeof (bfd_signed_vma);
6463 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6464 if (local_got_refcounts == NULL)
6465 return FALSE;
6466 elf_local_got_refcounts (abfd) = local_got_refcounts;
6467 }
6468 local_got_refcounts[r_symndx] += 1;
6469 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
6470 }
6471
6472 /* We will already have issued an error message if there
6473 is a TLS/non-TLS mismatch, based on the symbol
6474 type. So just combine any TLS types needed. */
6475 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6476 && tls_type != GOT_NORMAL)
6477 tls_type |= old_tls_type;
6478
6479 if (old_tls_type != tls_type)
6480 {
6481 if (h != NULL)
6482 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6483 else
6484 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6485 }
6486 break;
6487 case R_NDS32_9_PLTREL:
6488 case R_NDS32_25_PLTREL:
6489 case R_NDS32_PLTREL_HI20:
6490 case R_NDS32_PLTREL_LO12:
6491 case R_NDS32_PLT_GOTREL_HI20:
6492 case R_NDS32_PLT_GOTREL_LO12:
6493 case R_NDS32_PLT_GOTREL_LO15:
6494 case R_NDS32_PLT_GOTREL_LO19:
6495 case R_NDS32_PLT_GOTREL_LO20:
6496
6497 /* This symbol requires a procedure linkage table entry. We
6498 actually build the entry in adjust_dynamic_symbol,
6499 because this might be a case of linking PIC code without
6500 linking in any dynamic objects, in which case we don't
6501 need to generate a procedure linkage table after all. */
6502
6503 /* If this is a local symbol, we resolve it directly without
6504 creating a procedure linkage table entry. */
6505 if (h == NULL)
6506 continue;
6507
6508 if (h->forced_local)
6509 break;
6510
6511 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
6512 h->needs_plt = 1;
6513 h->plt.refcount += 1;
6514 break;
6515
6516 case R_NDS32_16_RELA:
6517 case R_NDS32_20_RELA:
6518 case R_NDS32_5_RELA:
6519 case R_NDS32_32_RELA:
6520 case R_NDS32_HI20_RELA:
6521 case R_NDS32_LO12S3_RELA:
6522 case R_NDS32_LO12S2_RELA:
6523 case R_NDS32_LO12S2_DP_RELA:
6524 case R_NDS32_LO12S2_SP_RELA:
6525 case R_NDS32_LO12S1_RELA:
6526 case R_NDS32_LO12S0_RELA:
6527 case R_NDS32_LO12S0_ORI_RELA:
6528 case R_NDS32_SDA16S3_RELA:
6529 case R_NDS32_SDA17S2_RELA:
6530 case R_NDS32_SDA18S1_RELA:
6531 case R_NDS32_SDA19S0_RELA:
6532 case R_NDS32_SDA15S3_RELA:
6533 case R_NDS32_SDA15S2_RELA:
6534 case R_NDS32_SDA12S2_DP_RELA:
6535 case R_NDS32_SDA12S2_SP_RELA:
6536 case R_NDS32_SDA15S1_RELA:
6537 case R_NDS32_SDA15S0_RELA:
6538 case R_NDS32_SDA_FP7U2_RELA:
6539 case R_NDS32_15_PCREL_RELA:
6540 case R_NDS32_17_PCREL_RELA:
6541 case R_NDS32_25_PCREL_RELA:
6542
6543 if (h != NULL && !bfd_link_pic (info))
6544 {
6545 h->non_got_ref = 1;
6546 h->plt.refcount += 1;
6547 }
6548
6549 /* If we are creating a shared library, and this is a reloc against
6550 a global symbol, or a non PC relative reloc against a local
6551 symbol, then we need to copy the reloc into the shared library.
6552 However, if we are linking with -Bsymbolic, we do not need to
6553 copy a reloc against a global symbol which is defined in an
6554 object we are including in the link (i.e., DEF_REGULAR is set).
6555 At this point we have not seen all the input files, so it is
6556 possible that DEF_REGULAR is not set now but will be set later
6557 (it is never cleared). We account for that possibility below by
6558 storing information in the dyn_relocs field of the hash table
6559 entry. A similar situation occurs when creating shared libraries
6560 and symbol visibility changes render the symbol local.
6561
6562 If on the other hand, we are creating an executable, we may need
6563 to keep relocations for symbols satisfied by a dynamic library
6564 if we manage to avoid copy relocs for the symbol. */
6565 if ((bfd_link_pic (info)
6566 && (sec->flags & SEC_ALLOC) != 0
6567 && ((r_type != R_NDS32_25_PCREL_RELA
6568 && r_type != R_NDS32_15_PCREL_RELA
6569 && r_type != R_NDS32_17_PCREL_RELA
6570 && !(r_type == R_NDS32_32_RELA
6571 && strcmp (sec->name, ".eh_frame") == 0))
6572 || (h != NULL
6573 && (!info->symbolic
6574 || h->root.type == bfd_link_hash_defweak
6575 || !h->def_regular))))
6576 || (!bfd_link_pic (info)
6577 && (sec->flags & SEC_ALLOC) != 0
6578 && h != NULL
6579 && (h->root.type == bfd_link_hash_defweak
6580 || !h->def_regular)))
6581 {
6582 struct elf_nds32_dyn_relocs *p;
6583 struct elf_nds32_dyn_relocs **head;
6584
6585 if (dynobj == NULL)
6586 htab->root.dynobj = dynobj = abfd;
6587
6588 /* When creating a shared object, we must copy these
6589 relocs into the output file. We create a reloc
6590 section in dynobj and make room for the reloc. */
6591 if (sreloc == NULL)
6592 {
6593 const char *name;
6594
6595 name = bfd_elf_string_from_elf_section
6596 (abfd, elf_elfheader (abfd)->e_shstrndx,
6597 elf_section_data (sec)->rela.hdr->sh_name);
6598 if (name == NULL)
6599 return FALSE;
6600
6601 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6602 && strcmp (bfd_get_section_name (abfd, sec),
6603 name + 5) == 0);
6604
6605 sreloc = bfd_get_section_by_name (dynobj, name);
6606 if (sreloc == NULL)
6607 {
6608 flagword flags;
6609
6610 sreloc = bfd_make_section (dynobj, name);
6611 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6612 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6613 if ((sec->flags & SEC_ALLOC) != 0)
6614 flags |= SEC_ALLOC | SEC_LOAD;
6615 if (sreloc == NULL
6616 || !bfd_set_section_flags (dynobj, sreloc, flags)
6617 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6618 return FALSE;
6619
6620 elf_section_type (sreloc) = SHT_RELA;
6621 }
6622 elf_section_data (sec)->sreloc = sreloc;
6623 }
6624
6625 /* If this is a global symbol, we count the number of
6626 relocations we need for this symbol. */
6627 if (h != NULL)
6628 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6629 else
6630 {
6631 asection *s;
6632 void *vpp;
6633
6634 Elf_Internal_Sym *isym;
6635 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6636 if (isym == NULL)
6637 return FALSE;
6638
6639 /* Track dynamic relocs needed for local syms too. */
6640 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6641 if (s == NULL)
6642 return FALSE;
6643
6644 vpp = &elf_section_data (s)->local_dynrel;
6645 head = (struct elf_nds32_dyn_relocs **) vpp;
6646 }
6647
6648 p = *head;
6649 if (p == NULL || p->sec != sec)
6650 {
6651 bfd_size_type amt = sizeof (*p);
6652 p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt);
6653 if (p == NULL)
6654 return FALSE;
6655 p->next = *head;
6656 *head = p;
6657 p->sec = sec;
6658 p->count = 0;
6659 p->pc_count = 0;
6660 }
6661
6662 p->count += 1;
6663 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6664 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6665 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6666 p->pc_count += 1;
6667 }
6668 break;
6669
6670 /* This relocation describes the C++ object vtable hierarchy.
6671 Reconstruct it for later use during GC. */
6672 case R_NDS32_RELA_GNU_VTINHERIT:
6673 case R_NDS32_GNU_VTINHERIT:
6674 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6675 return FALSE;
6676 break;
6677
6678 /* This relocation describes which C++ vtable entries are actually
6679 used. Record for later use during GC. */
6680 case R_NDS32_GNU_VTENTRY:
6681 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6682 return FALSE;
6683 break;
6684 case R_NDS32_RELA_GNU_VTENTRY:
6685 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6686 return FALSE;
6687 break;
6688 }
6689 }
6690
6691 return TRUE;
6692 }
6693
6694 /* Write VAL in uleb128 format to P, returning a pointer to the
6695 following byte.
6696 This code is copied from elf-attr.c. */
6697
6698 static bfd_byte *
6699 write_uleb128 (bfd_byte *p, unsigned int val)
6700 {
6701 bfd_byte c;
6702 do
6703 {
6704 c = val & 0x7f;
6705 val >>= 7;
6706 if (val)
6707 c |= 0x80;
6708 *(p++) = c;
6709 }
6710 while (val);
6711 return p;
6712 }
6713
6714 static bfd_signed_vma
6715 calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6716 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6717 int *pic_ext_target)
6718 {
6719 bfd_signed_vma foff;
6720 bfd_vma symval, addend;
6721 asection *sym_sec;
6722
6723 /* Get the value of the symbol referred to by the reloc. */
6724 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6725 {
6726 Elf_Internal_Sym *isym;
6727
6728 /* A local symbol. */
6729 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6730
6731 if (isym->st_shndx == SHN_UNDEF)
6732 sym_sec = bfd_und_section_ptr;
6733 else if (isym->st_shndx == SHN_ABS)
6734 sym_sec = bfd_abs_section_ptr;
6735 else if (isym->st_shndx == SHN_COMMON)
6736 sym_sec = bfd_com_section_ptr;
6737 else
6738 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6739 symval = isym->st_value + sym_sec->output_section->vma
6740 + sym_sec->output_offset;
6741 }
6742 else
6743 {
6744 unsigned long indx;
6745 struct elf_link_hash_entry *h;
6746 bfd *owner;
6747
6748 /* An external symbol. */
6749 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6750 h = elf_sym_hashes (abfd)[indx];
6751 BFD_ASSERT (h != NULL);
6752
6753 if (h->root.type != bfd_link_hash_defined
6754 && h->root.type != bfd_link_hash_defweak)
6755 /* This appears to be a reference to an undefined
6756 symbol. Just ignore it--it will be caught by the
6757 regular reloc processing. */
6758 return 0;
6759 owner = h->root.u.def.section->owner;
6760 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6761 *pic_ext_target = 1;
6762
6763 if (h->root.u.def.section->flags & SEC_MERGE)
6764 {
6765 sym_sec = h->root.u.def.section;
6766 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6767 elf_section_data (sym_sec)->sec_info,
6768 h->root.u.def.value);
6769 symval = symval + sym_sec->output_section->vma
6770 + sym_sec->output_offset;
6771 }
6772 else
6773 symval = (h->root.u.def.value
6774 + h->root.u.def.section->output_section->vma
6775 + h->root.u.def.section->output_offset);
6776 }
6777
6778 addend = irel->r_addend;
6779
6780 foff = (symval + addend
6781 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6782 return foff;
6783 }
6784
6785 static bfd_vma
6786 calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6787 Elf_Internal_Sym *isymbuf,
6788 Elf_Internal_Rela *irel,
6789 Elf_Internal_Shdr *symtab_hdr)
6790 {
6791 bfd_vma symval;
6792
6793 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6794 {
6795 Elf_Internal_Sym *isym;
6796 asection *sym_sec;
6797 /* A local symbol. */
6798 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6799
6800 if (isym->st_shndx == SHN_UNDEF)
6801 sym_sec = bfd_und_section_ptr;
6802 else if (isym->st_shndx == SHN_ABS)
6803 sym_sec = bfd_abs_section_ptr;
6804 else if (isym->st_shndx == SHN_COMMON)
6805 sym_sec = bfd_com_section_ptr;
6806 else
6807 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6808 symval = isym->st_value + sym_sec->output_section->vma
6809 + sym_sec->output_offset;
6810 }
6811 else
6812 {
6813 unsigned long indx;
6814 struct elf_link_hash_entry *h;
6815 struct elf_nds32_link_hash_table *htab;
6816 asection *splt;
6817
6818 /* An external symbol. */
6819 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6820 h = elf_sym_hashes (abfd)[indx];
6821 BFD_ASSERT (h != NULL);
6822 htab = nds32_elf_hash_table (link_info);
6823 splt = htab->splt;
6824
6825 while (h->root.type == bfd_link_hash_indirect
6826 || h->root.type == bfd_link_hash_warning)
6827 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6828
6829 if (h->plt.offset == (bfd_vma) - 1)
6830 {
6831 if (h->root.type != bfd_link_hash_defined
6832 && h->root.type != bfd_link_hash_defweak)
6833 /* This appears to be a reference to an undefined
6834 * symbol. Just ignore it--it will be caught by the
6835 * regular reloc processing. */
6836 return 0;
6837 symval = (h->root.u.def.value
6838 + h->root.u.def.section->output_section->vma
6839 + h->root.u.def.section->output_offset);
6840 }
6841 else
6842 symval = splt->output_section->vma + h->plt.offset;
6843 }
6844
6845 return symval;
6846 }
6847
6848 static bfd_signed_vma
6849 calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6850 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6851 Elf_Internal_Shdr *symtab_hdr)
6852 {
6853 bfd_vma foff;
6854 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6855 symtab_hdr)) == 0)
6856 return 0;
6857 else
6858 return foff - (irel->r_offset
6859 + sec->output_section->vma + sec->output_offset);
6860 }
6861 \f
6862 /* Convert a 32-bit instruction to 16-bit one.
6863 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6864 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6865 type of INSN16. Return 1 if successful. */
6866
6867 static int
6868 nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6869 int *pinsn_type)
6870 {
6871 uint16_t insn16 = 0;
6872 int insn_type = 0;
6873 unsigned long mach = bfd_get_mach (abfd);
6874
6875 if (N32_SH5 (insn) != 0)
6876 return 0;
6877
6878 switch (N32_SUB5 (insn))
6879 {
6880 case N32_ALU1_ADD_SLLI:
6881 case N32_ALU1_ADD_SRLI:
6882 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6883 {
6884 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6885 N32_RB5 (insn));
6886 insn_type = NDS32_INSN_ADD333;
6887 }
6888 else if (N32_IS_RT4 (insn))
6889 {
6890 if (N32_RT5 (insn) == N32_RA5 (insn))
6891 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6892 else if (N32_RT5 (insn) == N32_RB5 (insn))
6893 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6894 insn_type = NDS32_INSN_ADD45;
6895 }
6896 break;
6897
6898 case N32_ALU1_SUB_SLLI:
6899 case N32_ALU1_SUB_SRLI:
6900 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6901 {
6902 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6903 N32_RB5 (insn));
6904 insn_type = NDS32_INSN_SUB333;
6905 }
6906 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6907 {
6908 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6909 insn_type = NDS32_INSN_SUB45;
6910 }
6911 break;
6912
6913 case N32_ALU1_AND_SLLI:
6914 case N32_ALU1_AND_SRLI:
6915 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6916 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6917 && N32_IS_RB3 (insn))
6918 {
6919 if (N32_RT5 (insn) == N32_RA5 (insn))
6920 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6921 else if (N32_RT5 (insn) == N32_RB5 (insn))
6922 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6923 if (insn16)
6924 insn_type = NDS32_INSN_AND33;
6925 }
6926 break;
6927
6928 case N32_ALU1_XOR_SLLI:
6929 case N32_ALU1_XOR_SRLI:
6930 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6931 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6932 && N32_IS_RB3 (insn))
6933 {
6934 if (N32_RT5 (insn) == N32_RA5 (insn))
6935 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6936 else if (N32_RT5 (insn) == N32_RB5 (insn))
6937 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6938 if (insn16)
6939 insn_type = NDS32_INSN_XOR33;
6940 }
6941 break;
6942
6943 case N32_ALU1_OR_SLLI:
6944 case N32_ALU1_OR_SRLI:
6945 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6946 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6947 && N32_IS_RB3 (insn))
6948 {
6949 if (N32_RT5 (insn) == N32_RA5 (insn))
6950 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6951 else if (N32_RT5 (insn) == N32_RB5 (insn))
6952 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6953 if (insn16)
6954 insn_type = NDS32_INSN_OR33;
6955 }
6956 break;
6957 case N32_ALU1_NOR:
6958 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6959 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6960 && N32_RA5 (insn) == N32_RB5 (insn))
6961 {
6962 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6963 insn_type = NDS32_INSN_NOT33;
6964 }
6965 break;
6966 case N32_ALU1_SRAI:
6967 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6968 {
6969 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6970 insn_type = NDS32_INSN_SRAI45;
6971 }
6972 break;
6973
6974 case N32_ALU1_SRLI:
6975 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6976 {
6977 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6978 insn_type = NDS32_INSN_SRLI45;
6979 }
6980 break;
6981
6982 case N32_ALU1_SLLI:
6983 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6984 {
6985 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6986 N32_UB5 (insn));
6987 insn_type = NDS32_INSN_SLLI333;
6988 }
6989 break;
6990
6991 case N32_ALU1_ZEH:
6992 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6993 {
6994 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6995 insn_type = NDS32_INSN_ZEH33;
6996 }
6997 break;
6998
6999 case N32_ALU1_SEB:
7000 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7001 {
7002 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
7003 insn_type = NDS32_INSN_SEB33;
7004 }
7005 break;
7006
7007 case N32_ALU1_SEH:
7008 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7009 {
7010 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
7011 insn_type = NDS32_INSN_SEH33;
7012 }
7013 break;
7014
7015 case N32_ALU1_SLT:
7016 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7017 {
7018 /* Implicit r15. */
7019 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
7020 insn_type = NDS32_INSN_SLT45;
7021 }
7022 break;
7023
7024 case N32_ALU1_SLTS:
7025 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7026 {
7027 /* Implicit r15. */
7028 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
7029 insn_type = NDS32_INSN_SLTS45;
7030 }
7031 break;
7032 }
7033
7034 if ((insn16 & 0x8000) == 0)
7035 return 0;
7036
7037 if (pinsn16)
7038 *pinsn16 = insn16;
7039 if (pinsn_type)
7040 *pinsn_type = insn_type;
7041 return 1;
7042 }
7043
7044 static int
7045 nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7046 int *pinsn_type)
7047 {
7048 uint16_t insn16 = 0;
7049 int insn_type;
7050 unsigned long mach = bfd_get_mach (abfd);
7051
7052 /* TODO: bset, bclr, btgl, btst. */
7053 if (__GF (insn, 6, 4) != 0)
7054 return 0;
7055
7056 switch (N32_IMMU (insn, 6))
7057 {
7058 case N32_ALU2_MUL:
7059 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7060 && N32_IS_RB3 (insn))
7061 {
7062 if (N32_RT5 (insn) == N32_RA5 (insn))
7063 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
7064 else if (N32_RT5 (insn) == N32_RB5 (insn))
7065 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
7066 if (insn16)
7067 insn_type = NDS32_INSN_MUL33;
7068 }
7069 }
7070
7071 if ((insn16 & 0x8000) == 0)
7072 return 0;
7073
7074 if (pinsn16)
7075 *pinsn16 = insn16;
7076 if (pinsn_type)
7077 *pinsn_type = insn_type;
7078 return 1;
7079 }
7080
7081 int
7082 nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7083 int *pinsn_type)
7084 {
7085 int op6;
7086 uint16_t insn16 = 0;
7087 int insn_type;
7088 unsigned long mach = bfd_get_mach (abfd);
7089
7090 /* Decode 32-bit instruction. */
7091 if (insn & 0x80000000)
7092 {
7093 /* Not 32-bit insn. */
7094 return 0;
7095 }
7096
7097 op6 = N32_OP6 (insn);
7098
7099 /* Convert it to 16-bit instruction. */
7100 switch (op6)
7101 {
7102 case N32_OP6_MOVI:
7103 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
7104 {
7105 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
7106 insn_type = NDS32_INSN_MOVI55;
7107 }
7108 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
7109 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
7110 {
7111 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
7112 N32_IMM20S (insn) - 16);
7113 insn_type = NDS32_INSN_MOVPI45;
7114 }
7115 break;
7116
7117 case N32_OP6_ADDI:
7118 if (N32_IMM15S (insn) == 0)
7119 {
7120 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
7121 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7122 if (mach <= MACH_V2
7123 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7124 {
7125 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7126 insn_type = NDS32_INSN_MOV55;
7127 }
7128 }
7129 else if (N32_IMM15S (insn) > 0)
7130 {
7131 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
7132 {
7133 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
7134 N32_IMM15S (insn));
7135 insn_type = NDS32_INSN_ADDI333;
7136 }
7137 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7138 && N32_IMM15S (insn) < 32)
7139 {
7140 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
7141 insn_type = NDS32_INSN_ADDI45;
7142 }
7143 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7144 && N32_RT5 (insn) == N32_RA5 (insn)
7145 && N32_IMM15S (insn) < 512)
7146 {
7147 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7148 insn_type = NDS32_INSN_ADDI10_SP;
7149 }
7150 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7151 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
7152 && (N32_IMM15S (insn) % 4 == 0))
7153 {
7154 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
7155 N32_IMM15S (insn) >> 2);
7156 insn_type = NDS32_INSN_ADDRI36_SP;
7157 }
7158 }
7159 else
7160 {
7161 /* Less than 0. */
7162 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
7163 {
7164 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
7165 0 - N32_IMM15S (insn));
7166 insn_type = NDS32_INSN_SUBI333;
7167 }
7168 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7169 && N32_IMM15S (insn) > -32)
7170 {
7171 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
7172 0 - N32_IMM15S (insn));
7173 insn_type = NDS32_INSN_SUBI45;
7174 }
7175 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7176 && N32_RT5 (insn) == N32_RA5 (insn)
7177 && N32_IMM15S (insn) >= -512)
7178 {
7179 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7180 insn_type = NDS32_INSN_ADDI10_SP;
7181 }
7182 }
7183 break;
7184
7185 case N32_OP6_ORI:
7186 if (N32_IMM15S (insn) == 0)
7187 {
7188 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7189 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7190 if (mach <= MACH_V2
7191 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7192 {
7193 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7194 insn_type = NDS32_INSN_MOV55;
7195 }
7196 }
7197 break;
7198
7199 case N32_OP6_SUBRI:
7200 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7201 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7202 {
7203 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7204 insn_type = NDS32_INSN_NEG33;
7205 }
7206 break;
7207
7208 case N32_OP6_ANDI:
7209 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7210 {
7211 if (N32_IMM15U (insn) == 1)
7212 {
7213 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7214 insn_type = NDS32_INSN_XLSB33;
7215 }
7216 else if (N32_IMM15U (insn) == 0x7ff)
7217 {
7218 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7219 insn_type = NDS32_INSN_X11B33;
7220 }
7221 else if (N32_IMM15U (insn) == 0xff)
7222 {
7223 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7224 insn_type = NDS32_INSN_ZEB33;
7225 }
7226 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7227 && N32_IMM15U (insn) < 256)
7228 {
7229 int imm15u = N32_IMM15U (insn);
7230
7231 if (__builtin_popcount (imm15u) == 1)
7232 {
7233 /* BMSKI33 */
7234 int imm3u = __builtin_ctz (imm15u);
7235
7236 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7237 insn_type = NDS32_INSN_BMSKI33;
7238 }
7239 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7240 {
7241 /* FEXTI33 */
7242 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7243
7244 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7245 insn_type = NDS32_INSN_FEXTI33;
7246 }
7247 }
7248 }
7249 break;
7250
7251 case N32_OP6_SLTI:
7252 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7253 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7254 {
7255 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7256 insn_type = NDS32_INSN_SLTI45;
7257 }
7258 break;
7259
7260 case N32_OP6_SLTSI:
7261 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7262 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7263 {
7264 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7265 insn_type = NDS32_INSN_SLTSI45;
7266 }
7267 break;
7268
7269 case N32_OP6_LWI:
7270 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7271 {
7272 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7273 insn_type = NDS32_INSN_LWI450;
7274 }
7275 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7276 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7277 {
7278 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7279 N32_IMM15S (insn));
7280 insn_type = NDS32_INSN_LWI333;
7281 }
7282 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7283 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7284 {
7285 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7286 insn_type = NDS32_INSN_LWI37;
7287 }
7288 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7289 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7290 {
7291 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7292 insn_type = NDS32_INSN_LWI37_SP;
7293 }
7294 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7295 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7296 {
7297 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7298 N32_IMM15S (insn) + 32);
7299 insn_type = NDS32_INSN_LWI45_FE;
7300 }
7301 break;
7302
7303 case N32_OP6_SWI:
7304 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7305 {
7306 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7307 insn_type = NDS32_INSN_SWI450;
7308 }
7309 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7310 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7311 {
7312 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7313 N32_IMM15S (insn));
7314 insn_type = NDS32_INSN_SWI333;
7315 }
7316 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7317 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7318 {
7319 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7320 insn_type = NDS32_INSN_SWI37;
7321 }
7322 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7323 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7324 {
7325 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7326 insn_type = NDS32_INSN_SWI37_SP;
7327 }
7328 break;
7329
7330 case N32_OP6_LWI_BI:
7331 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7332 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7333 {
7334 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7335 N32_IMM15S (insn));
7336 insn_type = NDS32_INSN_LWI333_BI;
7337 }
7338 break;
7339
7340 case N32_OP6_SWI_BI:
7341 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7342 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7343 {
7344 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7345 N32_IMM15S (insn));
7346 insn_type = NDS32_INSN_SWI333_BI;
7347 }
7348 break;
7349
7350 case N32_OP6_LHI:
7351 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7352 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7353 {
7354 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7355 N32_IMM15S (insn));
7356 insn_type = NDS32_INSN_LHI333;
7357 }
7358 break;
7359
7360 case N32_OP6_SHI:
7361 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7362 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7363 {
7364 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7365 N32_IMM15S (insn));
7366 insn_type = NDS32_INSN_SHI333;
7367 }
7368 break;
7369
7370 case N32_OP6_LBI:
7371 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7372 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7373 {
7374 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7375 N32_IMM15S (insn));
7376 insn_type = NDS32_INSN_LBI333;
7377 }
7378 break;
7379
7380 case N32_OP6_SBI:
7381 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7382 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7383 {
7384 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7385 N32_IMM15S (insn));
7386 insn_type = NDS32_INSN_SBI333;
7387 }
7388 break;
7389
7390 case N32_OP6_ALU1:
7391 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7392
7393 case N32_OP6_ALU2:
7394 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7395
7396 case N32_OP6_BR1:
7397 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7398 goto done;
7399
7400 if ((insn & __BIT (14)) == 0)
7401 {
7402 /* N32_BR1_BEQ */
7403 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7404 && N32_RT5 (insn) != REG_R5)
7405 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7406 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7407 && N32_RA5 (insn) != REG_R5)
7408 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7409 insn_type = NDS32_INSN_BEQS38;
7410 break;
7411 }
7412 else
7413 {
7414 /* N32_BR1_BNE */
7415 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7416 && N32_RT5 (insn) != REG_R5)
7417 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7418 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7419 && N32_RA5 (insn) != REG_R5)
7420 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7421 insn_type = NDS32_INSN_BNES38;
7422 break;
7423 }
7424 break;
7425
7426 case N32_OP6_BR2:
7427 switch (N32_BR2_SUB (insn))
7428 {
7429 case N32_BR2_BEQZ:
7430 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7431 {
7432 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7433 insn_type = NDS32_INSN_BEQZ38;
7434 }
7435 else if (N32_RT5 (insn) == REG_R15
7436 && IS_WITHIN_S (N32_IMM16S (insn), 8))
7437 {
7438 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7439 insn_type = NDS32_INSN_BEQZS8;
7440 }
7441 break;
7442
7443 case N32_BR2_BNEZ:
7444 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7445 {
7446 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7447 insn_type = NDS32_INSN_BNEZ38;
7448 }
7449 else if (N32_RT5 (insn) == REG_R15
7450 && IS_WITHIN_S (N32_IMM16S (insn), 8))
7451 {
7452 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7453 insn_type = NDS32_INSN_BNEZS8;
7454 }
7455 break;
7456
7457 case N32_BR2_IFCALL:
7458 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7459 {
7460 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7461 insn_type = NDS32_INSN_IFCALL9;
7462 }
7463 break;
7464 }
7465 break;
7466
7467 case N32_OP6_JI:
7468 if ((insn & __BIT (24)) == 0)
7469 {
7470 /* N32_JI_J */
7471 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7472 {
7473 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7474 insn_type = NDS32_INSN_J8;
7475 }
7476 }
7477 break;
7478
7479 case N32_OP6_JREG:
7480 if (__GF (insn, 8, 2) != 0)
7481 goto done;
7482
7483 switch (N32_IMMU (insn, 5))
7484 {
7485 case N32_JREG_JR:
7486 if (N32_JREG_HINT (insn) == 0)
7487 {
7488 /* jr */
7489 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7490 insn_type = NDS32_INSN_JR5;
7491 }
7492 else if (N32_JREG_HINT (insn) == 1)
7493 {
7494 /* ret */
7495 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7496 insn_type = NDS32_INSN_RET5;
7497 }
7498 else if (N32_JREG_HINT (insn) == 3)
7499 {
7500 /* ifret = mov55 $sp, $sp */
7501 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7502 insn_type = NDS32_INSN_IFRET;
7503 }
7504 break;
7505
7506 case N32_JREG_JRAL:
7507 /* It's convertible when return rt5 is $lp and address
7508 translation is kept. */
7509 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7510 {
7511 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7512 insn_type = NDS32_INSN_JRAL5;
7513 }
7514 break;
7515 }
7516 break;
7517
7518 case N32_OP6_MISC:
7519 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7520 {
7521 /* For v3, swid above 31 are used for ex9.it. */
7522 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7523 insn_type = NDS32_INSN_BREAK16;
7524 }
7525 break;
7526
7527 default:
7528 /* This instruction has no 16-bit variant. */
7529 goto done;
7530 }
7531
7532 done:
7533 /* Bit-15 of insn16 should be set for a valid instruction. */
7534 if ((insn16 & 0x8000) == 0)
7535 return 0;
7536
7537 if (pinsn16)
7538 *pinsn16 = insn16;
7539 if (pinsn_type)
7540 *pinsn_type = insn_type;
7541 return 1;
7542 }
7543
7544 static int
7545 special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7546 Elf_Internal_Rela *reloc)
7547 {
7548 uint16_t insn16 = 0;
7549
7550 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7551 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7552 return 0;
7553
7554 if (!N32_IS_RT3 (insn))
7555 return 0;
7556
7557 switch (N32_OP6 (insn))
7558 {
7559 case N32_OP6_LWI:
7560 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7561 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7562 break;
7563 case N32_OP6_SWI:
7564 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7565 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7566 break;
7567 case N32_OP6_HWGP:
7568 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7569 break;
7570
7571 if (__GF (insn, 17, 3) == 6)
7572 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7573 else if (__GF (insn, 17, 3) == 7)
7574 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7575 break;
7576 }
7577
7578 if ((insn16 & 0x8000) == 0)
7579 return 0;
7580
7581 *pinsn16 = insn16;
7582 return 1;
7583 }
7584
7585 /* Convert a 16-bit instruction to 32-bit one.
7586 INSN16 it the input and PINSN it the point to output.
7587 Return non-zero on successful. Otherwise 0 is returned. */
7588
7589 int
7590 nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7591 {
7592 uint32_t insn = 0xffffffff;
7593 unsigned long mach = bfd_get_mach (abfd);
7594
7595 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7596
7597 switch (__GF (insn16, 9, 6))
7598 {
7599 case 0x4: /* add45 */
7600 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7601 N16_RA5 (insn16));
7602 goto done;
7603 case 0x5: /* sub45 */
7604 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7605 N16_RA5 (insn16));
7606 goto done;
7607 case 0x6: /* addi45 */
7608 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7609 N16_IMM5U (insn16));
7610 goto done;
7611 case 0x7: /* subi45 */
7612 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7613 -N16_IMM5U (insn16));
7614 goto done;
7615 case 0x8: /* srai45 */
7616 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7617 N16_IMM5U (insn16));
7618 goto done;
7619 case 0x9: /* srli45 */
7620 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7621 N16_IMM5U (insn16));
7622 goto done;
7623 case 0xa: /* slli333 */
7624 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7625 N16_IMM3U (insn16));
7626 goto done;
7627 case 0xc: /* add333 */
7628 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7629 N16_RB3 (insn16));
7630 goto done;
7631 case 0xd: /* sub333 */
7632 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7633 N16_RB3 (insn16));
7634 goto done;
7635 case 0xe: /* addi333 */
7636 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7637 N16_IMM3U (insn16));
7638 goto done;
7639 case 0xf: /* subi333 */
7640 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7641 -N16_IMM3U (insn16));
7642 goto done;
7643 case 0x10: /* lwi333 */
7644 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7645 N16_IMM3U (insn16));
7646 goto done;
7647 case 0x12: /* lhi333 */
7648 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7649 N16_IMM3U (insn16));
7650 goto done;
7651 case 0x13: /* lbi333 */
7652 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7653 N16_IMM3U (insn16));
7654 goto done;
7655 case 0x11: /* lwi333.bi */
7656 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7657 N16_IMM3U (insn16));
7658 goto done;
7659 case 0x14: /* swi333 */
7660 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7661 N16_IMM3U (insn16));
7662 goto done;
7663 case 0x16: /* shi333 */
7664 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7665 N16_IMM3U (insn16));
7666 goto done;
7667 case 0x17: /* sbi333 */
7668 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7669 N16_IMM3U (insn16));
7670 goto done;
7671 case 0x15: /* swi333.bi */
7672 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7673 N16_IMM3U (insn16));
7674 goto done;
7675 case 0x18: /* addri36.sp */
7676 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7677 N16_IMM6U (insn16) << 2);
7678 goto done;
7679 case 0x19: /* lwi45.fe */
7680 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7681 (N16_IMM5U (insn16) - 32));
7682 goto done;
7683 case 0x1a: /* lwi450 */
7684 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7685 goto done;
7686 case 0x1b: /* swi450 */
7687 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7688 goto done;
7689
7690 /* These are r15 implied instructions. */
7691 case 0x30: /* slts45 */
7692 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7693 goto done;
7694 case 0x31: /* slt45 */
7695 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7696 goto done;
7697 case 0x32: /* sltsi45 */
7698 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7699 goto done;
7700 case 0x33: /* slti45 */
7701 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7702 goto done;
7703 case 0x34: /* beqzs8, bnezs8 */
7704 if (insn16 & __BIT (8))
7705 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7706 else
7707 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7708 goto done;
7709
7710 case 0x35: /* break16, ex9.it */
7711 /* Only consider range of v3 break16. */
7712 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7713 goto done;
7714
7715 case 0x3c: /* ifcall9 */
7716 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7717 goto done;
7718 case 0x3d: /* movpi45 */
7719 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7720 goto done;
7721
7722 case 0x3f: /* MISC33 */
7723 switch (insn16 & 0x7)
7724 {
7725 case 2: /* neg33 */
7726 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7727 break;
7728 case 3: /* not33 */
7729 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7730 N16_RA3 (insn16));
7731 break;
7732 case 4: /* mul33 */
7733 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7734 N16_RA3 (insn16));
7735 break;
7736 case 5: /* xor33 */
7737 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7738 N16_RA3 (insn16));
7739 break;
7740 case 6: /* and33 */
7741 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7742 N16_RA3 (insn16));
7743 break;
7744 case 7: /* or33 */
7745 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7746 N16_RA3 (insn16));
7747 break;
7748 }
7749 goto done;
7750
7751 case 0xb:
7752 switch (insn16 & 0x7)
7753 {
7754 case 0: /* zeb33 */
7755 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7756 break;
7757 case 1: /* zeh33 */
7758 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7759 break;
7760 case 2: /* seb33 */
7761 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7762 break;
7763 case 3: /* seh33 */
7764 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7765 break;
7766 case 4: /* xlsb33 */
7767 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7768 break;
7769 case 5: /* x11b33 */
7770 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7771 break;
7772 case 6: /* bmski33 */
7773 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7774 1 << __GF (insn16, 3, 3));
7775 break;
7776 case 7: /* fexti33 */
7777 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7778 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
7779 break;
7780 }
7781 goto done;
7782 }
7783
7784 switch (__GF (insn16, 10, 5))
7785 {
7786 case 0x0: /* mov55 or ifret16 */
7787 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7788 && N16_RT5 (insn16) == N16_RA5 (insn16))
7789 insn = N32_JREG (JR, 0, 0, 0, 3);
7790 else
7791 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
7792 goto done;
7793 case 0x1: /* movi55 */
7794 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7795 goto done;
7796 case 0x1b: /* addi10s (V2) */
7797 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7798 goto done;
7799 }
7800
7801 switch (__GF (insn16, 11, 4))
7802 {
7803 case 0x7: /* lwi37.fp/swi37.fp */
7804 if (insn16 & __BIT (7)) /* swi37.fp */
7805 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7806 else /* lwi37.fp */
7807 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7808 goto done;
7809 case 0x8: /* beqz38 */
7810 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7811 goto done;
7812 case 0x9: /* bnez38 */
7813 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7814 goto done;
7815 case 0xa: /* beqs38/j8, implied r5 */
7816 if (N16_RT38 (insn16) == 5)
7817 insn = N32_JI (J, N16_IMM8S (insn16));
7818 else
7819 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7820 goto done;
7821 case 0xb: /* bnes38 and others */
7822 if (N16_RT38 (insn16) == 5)
7823 {
7824 switch (__GF (insn16, 5, 3))
7825 {
7826 case 0: /* jr5 */
7827 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7828 break;
7829 case 4: /* ret5 */
7830 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7831 break;
7832 case 1: /* jral5 */
7833 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7834 break;
7835 case 2: /* ex9.it imm5 */
7836 /* ex9.it had no 32-bit variantl. */
7837 break;
7838 case 5: /* add5.pc */
7839 /* add5.pc had no 32-bit variantl. */
7840 break;
7841 }
7842 }
7843 else /* bnes38 */
7844 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7845 goto done;
7846 case 0xe: /* lwi37/swi37 */
7847 if (insn16 & (1 << 7)) /* swi37.sp */
7848 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7849 else /* lwi37.sp */
7850 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7851 goto done;
7852 }
7853
7854 done:
7855 if (insn & 0x80000000)
7856 return 0;
7857
7858 if (pinsn)
7859 *pinsn = insn;
7860 return 1;
7861 }
7862 \f
7863 static bfd_boolean
7864 is_sda_access_insn (unsigned long insn)
7865 {
7866 switch (N32_OP6 (insn))
7867 {
7868 case N32_OP6_LWI:
7869 case N32_OP6_LHI:
7870 case N32_OP6_LHSI:
7871 case N32_OP6_LBI:
7872 case N32_OP6_LBSI:
7873 case N32_OP6_SWI:
7874 case N32_OP6_SHI:
7875 case N32_OP6_SBI:
7876 case N32_OP6_LWC:
7877 case N32_OP6_LDC:
7878 case N32_OP6_SWC:
7879 case N32_OP6_SDC:
7880 return TRUE;
7881 default:
7882 ;
7883 }
7884 return FALSE;
7885 }
7886
7887 static unsigned long
7888 turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7889 {
7890 uint32_t oinsn = 0;
7891
7892 switch (type)
7893 {
7894 case R_NDS32_GOT_LO12:
7895 case R_NDS32_GOTOFF_LO12:
7896 case R_NDS32_PLTREL_LO12:
7897 case R_NDS32_PLT_GOTREL_LO12:
7898 case R_NDS32_LO12S0_RELA:
7899 switch (N32_OP6 (insn))
7900 {
7901 case N32_OP6_LBI:
7902 /* lbi.gp */
7903 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7904 break;
7905 case N32_OP6_LBSI:
7906 /* lbsi.gp */
7907 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
7908 break;
7909 case N32_OP6_SBI:
7910 /* sbi.gp */
7911 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7912 break;
7913 case N32_OP6_ORI:
7914 /* addi.gp */
7915 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
7916 break;
7917 }
7918 break;
7919
7920 case R_NDS32_LO12S1_RELA:
7921 switch (N32_OP6 (insn))
7922 {
7923 case N32_OP6_LHI:
7924 /* lhi.gp */
7925 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7926 break;
7927 case N32_OP6_LHSI:
7928 /* lhsi.gp */
7929 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
7930 break;
7931 case N32_OP6_SHI:
7932 /* shi.gp */
7933 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
7934 break;
7935 }
7936 break;
7937
7938 case R_NDS32_LO12S2_RELA:
7939 switch (N32_OP6 (insn))
7940 {
7941 case N32_OP6_LWI:
7942 /* lwi.gp */
7943 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7944 break;
7945 case N32_OP6_SWI:
7946 /* swi.gp */
7947 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7948 break;
7949 }
7950 break;
7951
7952 case R_NDS32_LO12S2_DP_RELA:
7953 case R_NDS32_LO12S2_SP_RELA:
7954 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7955 break;
7956 }
7957
7958 if (oinsn)
7959 *pinsn = oinsn;
7960
7961 return oinsn != 0;
7962 }
7963
7964 /* Linker hasn't found the correct merge section for non-section symbol
7965 in relax time, this work is left to the function elf_link_input_bfd().
7966 So for non-section symbol, _bfd_merged_section_offset is also needed
7967 to find the correct symbol address. */
7968
7969 static bfd_vma
7970 nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7971 asection **psec, Elf_Internal_Rela *rel)
7972 {
7973 asection *sec = *psec;
7974 bfd_vma relocation;
7975
7976 relocation = (sec->output_section->vma
7977 + sec->output_offset + sym->st_value);
7978 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7979 {
7980 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7981 rel->r_addend =
7982 _bfd_merged_section_offset (abfd, psec,
7983 elf_section_data (sec)->sec_info,
7984 sym->st_value + rel->r_addend);
7985 else
7986 rel->r_addend =
7987 _bfd_merged_section_offset (abfd, psec,
7988 elf_section_data (sec)->sec_info,
7989 sym->st_value) + rel->r_addend;
7990
7991 if (sec != *psec)
7992 {
7993 /* If we have changed the section, and our original section is
7994 marked with SEC_EXCLUDE, it means that the original
7995 SEC_MERGE section has been completely subsumed in some
7996 other SEC_MERGE section. In this case, we need to leave
7997 some info around for --emit-relocs. */
7998 if ((sec->flags & SEC_EXCLUDE) != 0)
7999 sec->kept_section = *psec;
8000 sec = *psec;
8001 }
8002 rel->r_addend -= relocation;
8003 rel->r_addend += sec->output_section->vma + sec->output_offset;
8004 }
8005 return relocation;
8006 }
8007
8008 static bfd_vma
8009 calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
8010 Elf_Internal_Sym *isymbuf,
8011 Elf_Internal_Shdr *symtab_hdr)
8012 {
8013 bfd_signed_vma foff;
8014 bfd_vma symval, addend;
8015 Elf_Internal_Rela irel_fn;
8016 Elf_Internal_Sym *isym;
8017 asection *sym_sec;
8018
8019 /* Get the value of the symbol referred to by the reloc. */
8020 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
8021 {
8022 /* A local symbol. */
8023 isym = isymbuf + ELF32_R_SYM (irel->r_info);
8024
8025 if (isym->st_shndx == SHN_UNDEF)
8026 sym_sec = bfd_und_section_ptr;
8027 else if (isym->st_shndx == SHN_ABS)
8028 sym_sec = bfd_abs_section_ptr;
8029 else if (isym->st_shndx == SHN_COMMON)
8030 sym_sec = bfd_com_section_ptr;
8031 else
8032 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8033 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
8034 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
8035 addend = irel_fn.r_addend;
8036 }
8037 else
8038 {
8039 unsigned long indx;
8040 struct elf_link_hash_entry *h;
8041
8042 /* An external symbol. */
8043 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8044 h = elf_sym_hashes (abfd)[indx];
8045 BFD_ASSERT (h != NULL);
8046
8047 while (h->root.type == bfd_link_hash_indirect
8048 || h->root.type == bfd_link_hash_warning)
8049 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8050
8051 if (h->root.type != bfd_link_hash_defined
8052 && h->root.type != bfd_link_hash_defweak)
8053 /* This appears to be a reference to an undefined
8054 symbol. Just ignore it--it will be caught by the
8055 regular reloc processing. */
8056 return 0;
8057
8058 if (h->root.u.def.section->flags & SEC_MERGE)
8059 {
8060 sym_sec = h->root.u.def.section;
8061 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
8062 (sym_sec)->sec_info, h->root.u.def.value);
8063 symval = symval + sym_sec->output_section->vma
8064 + sym_sec->output_offset;
8065 }
8066 else
8067 symval = (h->root.u.def.value
8068 + h->root.u.def.section->output_section->vma
8069 + h->root.u.def.section->output_offset);
8070 addend = irel->r_addend;
8071 }
8072
8073 foff = symval + addend;
8074
8075 return foff;
8076 }
8077
8078 static bfd_vma
8079 calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
8080 Elf_Internal_Rela *irel,
8081 Elf_Internal_Shdr *symtab_hdr)
8082 {
8083 int symndx;
8084 bfd_vma *local_got_offsets;
8085 /* Get the value of the symbol referred to by the reloc. */
8086 struct elf_link_hash_entry *h;
8087 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
8088
8089 /* An external symbol. */
8090 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8091 h = elf_sym_hashes (abfd)[symndx];
8092 while (h->root.type == bfd_link_hash_indirect
8093 || h->root.type == bfd_link_hash_warning)
8094 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8095
8096 if (symndx >= 0)
8097 {
8098 BFD_ASSERT (h != NULL);
8099 return htab->sgot->output_section->vma + htab->sgot->output_offset
8100 + h->got.offset;
8101 }
8102 else
8103 {
8104 local_got_offsets = elf_local_got_offsets (abfd);
8105 BFD_ASSERT (local_got_offsets != NULL);
8106 return htab->sgot->output_section->vma + htab->sgot->output_offset
8107 + local_got_offsets[ELF32_R_SYM (irel->r_info)];
8108 }
8109
8110 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
8111 /* The check of h->root.type is passed. */
8112 }
8113
8114 static int
8115 is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
8116 asection *sec, Elf_Internal_Rela *rel)
8117 {
8118 bfd_byte *contents;
8119 unsigned short insn16;
8120
8121 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
8122 return FALSE;
8123 contents = elf_section_data (sec)->this_hdr.contents;
8124 insn16 = bfd_getb16 (contents + rel->r_offset);
8125 if (insn16 == NDS32_NOP16)
8126 return TRUE;
8127 return FALSE;
8128 }
8129
8130 /* It checks whether the instruction could be converted to
8131 16-bit form and returns the converted one.
8132
8133 `internal_relocs' is supposed to be sorted. */
8134
8135 static int
8136 is_convert_32_to_16 (bfd *abfd, asection *sec,
8137 Elf_Internal_Rela *reloc,
8138 Elf_Internal_Rela *internal_relocs,
8139 Elf_Internal_Rela *irelend,
8140 uint16_t *insn16)
8141 {
8142 #define NORMAL_32_TO_16 (1 << 0)
8143 #define SPECIAL_32_TO_16 (1 << 1)
8144 bfd_byte *contents = NULL;
8145 bfd_signed_vma off;
8146 bfd_vma mem_addr;
8147 uint32_t insn = 0;
8148 Elf_Internal_Rela *pc_rel;
8149 int pic_ext_target = 0;
8150 Elf_Internal_Shdr *symtab_hdr;
8151 Elf_Internal_Sym *isymbuf = NULL;
8152 int convert_type;
8153 bfd_vma offset;
8154
8155 if (reloc->r_offset + 4 > sec->size)
8156 return FALSE;
8157
8158 offset = reloc->r_offset;
8159
8160 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
8161 return FALSE;
8162 insn = bfd_getb32 (contents + offset);
8163
8164 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
8165 convert_type = NORMAL_32_TO_16;
8166 else if (special_convert_32_to_16 (insn, insn16, reloc))
8167 convert_type = SPECIAL_32_TO_16;
8168 else
8169 return FALSE;
8170
8171 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8172 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
8173 return FALSE;
8174
8175 /* Find the first relocation of the same relocation-type,
8176 so we iteratie them forward. */
8177 pc_rel = reloc;
8178 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
8179 pc_rel--;
8180
8181 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8182 {
8183 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8184 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8185 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8186 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8187 {
8188 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8189 &pic_ext_target);
8190 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8191 || off == 0)
8192 return FALSE;
8193 break;
8194 }
8195 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8196 {
8197 /* movi => movi55 */
8198 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8199 symtab_hdr);
8200 /* mem_addr is unsigned, but the value should
8201 be between [-16, 15]. */
8202 if ((mem_addr + 0x10) >> 5)
8203 return FALSE;
8204 break;
8205 }
8206 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8207 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8208 {
8209 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8210 because it can be relaxed to addi for TLS_LE_ADD. */
8211 return FALSE;
8212 }
8213 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8214 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8215 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8216 && convert_type == SPECIAL_32_TO_16)
8217 {
8218 /* fp-as-gp
8219 We've selected a best fp-base for this access, so we can
8220 always resolve it anyway. Do nothing. */
8221 break;
8222 }
8223 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8224 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8225 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8226 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8227 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8228 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8229 {
8230 /* Prevent unresolved addi instruction translate
8231 to addi45 or addi333. */
8232 return FALSE;
8233 }
8234 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8235 {
8236 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8237 &pic_ext_target);
8238 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
8239 return FALSE;
8240 break;
8241 }
8242 }
8243
8244 return TRUE;
8245 }
8246
8247 static void
8248 nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8249 Elf_Internal_Rela *reloc,
8250 Elf_Internal_Rela *internal_relocs,
8251 Elf_Internal_Rela *irelend,
8252 unsigned short insn16)
8253 {
8254 Elf_Internal_Rela *pc_rel;
8255 bfd_vma offset;
8256
8257 offset = reloc->r_offset;
8258 bfd_putb16 (insn16, contents + offset);
8259 /* Find the first relocation of the same relocation-type,
8260 so we iteratie them forward. */
8261 pc_rel = reloc;
8262 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8263 pc_rel--;
8264
8265 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8266 {
8267 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8268 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8269 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8270 {
8271 pc_rel->r_info =
8272 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8273 }
8274 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8275 pc_rel->r_info =
8276 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8277 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8278 pc_rel->r_info =
8279 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8280 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8281 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8282 pc_rel->r_info =
8283 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
8284 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8285 pc_rel->r_info =
8286 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
8287 }
8288 }
8289
8290 /* Find a relocation of type specified by `reloc_type'
8291 of the same r_offset with reloc.
8292 If not found, return irelend.
8293
8294 Assuming relocations are sorted by r_offset,
8295 we find the relocation from `reloc' backward untill relocs,
8296 or find it from `reloc' forward untill irelend. */
8297
8298 static Elf_Internal_Rela *
8299 find_relocs_at_address (Elf_Internal_Rela *reloc,
8300 Elf_Internal_Rela *relocs,
8301 Elf_Internal_Rela *irelend,
8302 enum elf_nds32_reloc_type reloc_type)
8303 {
8304 Elf_Internal_Rela *rel_t;
8305
8306 /* Find backward. */
8307 for (rel_t = reloc;
8308 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8309 rel_t--)
8310 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8311 return rel_t;
8312
8313 /* We didn't find it backward. Try find it forward. */
8314 for (rel_t = reloc;
8315 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8316 rel_t++)
8317 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8318 return rel_t;
8319
8320 return irelend;
8321 }
8322
8323 /* Find a relocation of specified type and offset.
8324 `reloc' is just a refence point to find a relocation at specified offset.
8325 If not found, return irelend.
8326
8327 Assuming relocations are sorted by r_offset,
8328 we find the relocation from `reloc' backward untill relocs,
8329 or find it from `reloc' forward untill irelend. */
8330
8331 static Elf_Internal_Rela *
8332 find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8333 Elf_Internal_Rela *relocs,
8334 Elf_Internal_Rela *irelend,
8335 enum elf_nds32_reloc_type reloc_type,
8336 bfd_vma offset_p)
8337 {
8338 Elf_Internal_Rela *rel_t = NULL;
8339
8340 /* First, we try to find a relocation of offset `offset_p',
8341 and then we use find_relocs_at_address to find specific type. */
8342
8343 if (reloc->r_offset > offset_p)
8344 {
8345 /* Find backward. */
8346 for (rel_t = reloc;
8347 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8348 /* Do nothing. */;
8349 }
8350 else if (reloc->r_offset < offset_p)
8351 {
8352 /* Find forward. */
8353 for (rel_t = reloc;
8354 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8355 /* Do nothing. */;
8356 }
8357 else
8358 rel_t = reloc;
8359
8360 /* Not found? */
8361 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8362 return irelend;
8363
8364 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8365 }
8366
8367 static bfd_boolean
8368 nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8369 Elf_Internal_Rela *internal_relocs,
8370 Elf_Internal_Rela *irelend,
8371 unsigned char reloc_type)
8372 {
8373 Elf_Internal_Rela *rel_t;
8374
8375 for (rel_t = reloc;
8376 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8377 rel_t--)
8378 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8379 {
8380 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8381 && rel_t->r_addend == reloc->r_addend)
8382 continue;
8383 return TRUE;
8384 }
8385
8386 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8387 rel_t++)
8388 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8389 {
8390 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8391 && rel_t->r_addend == reloc->r_addend)
8392 continue;
8393 return TRUE;
8394 }
8395
8396 return FALSE;
8397 }
8398
8399 typedef struct nds32_elf_blank nds32_elf_blank_t;
8400 struct nds32_elf_blank
8401 {
8402 /* Where the blank begins. */
8403 bfd_vma offset;
8404 /* The size of the blank. */
8405 bfd_vma size;
8406 /* The accumulative size before this blank. */
8407 bfd_vma total_size;
8408 nds32_elf_blank_t *next;
8409 nds32_elf_blank_t *prev;
8410 };
8411
8412 static nds32_elf_blank_t *blank_free_list = NULL;
8413
8414 static nds32_elf_blank_t *
8415 create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8416 {
8417 nds32_elf_blank_t *blank_t;
8418
8419 if (blank_free_list)
8420 {
8421 blank_t = blank_free_list;
8422 blank_free_list = blank_free_list->next;
8423 }
8424 else
8425 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8426
8427 if (blank_t == NULL)
8428 return NULL;
8429
8430 blank_t->offset = offset_p;
8431 blank_t->size = size_p;
8432 blank_t->total_size = 0;
8433 blank_t->next = NULL;
8434 blank_t->prev = NULL;
8435
8436 return blank_t;
8437 }
8438
8439 static void
8440 remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8441 {
8442 if (blank_free_list)
8443 {
8444 blank_free_list->prev = blank_p;
8445 blank_p->next = blank_free_list;
8446 }
8447 else
8448 blank_p->next = NULL;
8449
8450 blank_p->prev = NULL;
8451 blank_free_list = blank_p;
8452 }
8453
8454 static void
8455 clean_nds32_elf_blank (void)
8456 {
8457 nds32_elf_blank_t *blank_t;
8458
8459 while (blank_free_list)
8460 {
8461 blank_t = blank_free_list;
8462 blank_free_list = blank_free_list->next;
8463 free (blank_t);
8464 }
8465 }
8466
8467 static nds32_elf_blank_t *
8468 search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8469 {
8470 nds32_elf_blank_t *blank_t;
8471
8472 if (!blank_p)
8473 return NULL;
8474 blank_t = blank_p;
8475
8476 while (blank_t && addr < blank_t->offset)
8477 blank_t = blank_t->prev;
8478 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8479 blank_t = blank_t->next;
8480
8481 return blank_t;
8482 }
8483
8484 static bfd_vma
8485 get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8486 int overwrite)
8487 {
8488 nds32_elf_blank_t *blank_t;
8489
8490 blank_t = search_nds32_elf_blank (*blank_p, addr);
8491 if (!blank_t)
8492 return 0;
8493
8494 if (overwrite)
8495 *blank_p = blank_t;
8496
8497 if (addr < blank_t->offset + blank_t->size)
8498 return blank_t->total_size + (addr - blank_t->offset);
8499 else
8500 return blank_t->total_size + blank_t->size;
8501 }
8502
8503 static bfd_boolean
8504 insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8505 {
8506 nds32_elf_blank_t *blank_t, *blank_t2;
8507
8508 if (!*blank_p)
8509 {
8510 *blank_p = create_nds32_elf_blank (addr, len);
8511 return *blank_p ? TRUE : FALSE;
8512 }
8513
8514 blank_t = search_nds32_elf_blank (*blank_p, addr);
8515
8516 if (blank_t == NULL)
8517 {
8518 blank_t = create_nds32_elf_blank (addr, len);
8519 if (!blank_t)
8520 return FALSE;
8521 while ((*blank_p)->prev != NULL)
8522 *blank_p = (*blank_p)->prev;
8523 blank_t->next = *blank_p;
8524 (*blank_p)->prev = blank_t;
8525 (*blank_p) = blank_t;
8526 return TRUE;
8527 }
8528
8529 if (addr < blank_t->offset + blank_t->size)
8530 {
8531 if (addr > blank_t->offset + blank_t->size)
8532 blank_t->size = addr - blank_t->offset;
8533 }
8534 else
8535 {
8536 blank_t2 = create_nds32_elf_blank (addr, len);
8537 if (!blank_t2)
8538 return FALSE;
8539 if (blank_t->next)
8540 {
8541 blank_t->next->prev = blank_t2;
8542 blank_t2->next = blank_t->next;
8543 }
8544 blank_t2->prev = blank_t;
8545 blank_t->next = blank_t2;
8546 *blank_p = blank_t2;
8547 }
8548
8549 return TRUE;
8550 }
8551
8552 static bfd_boolean
8553 insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8554 bfd_vma len)
8555 {
8556 nds32_elf_blank_t *blank_t;
8557
8558 if (!insert_nds32_elf_blank (blank_p, addr, len))
8559 return FALSE;
8560
8561 blank_t = *blank_p;
8562
8563 if (!blank_t->prev)
8564 {
8565 blank_t->total_size = 0;
8566 blank_t = blank_t->next;
8567 }
8568
8569 while (blank_t)
8570 {
8571 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8572 blank_t = blank_t->next;
8573 }
8574
8575 return TRUE;
8576 }
8577
8578 static void
8579 calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8580 {
8581 nds32_elf_blank_t *blank_t;
8582 bfd_vma total_size = 0;
8583
8584 if (!blank_p)
8585 return;
8586
8587 blank_t = blank_p;
8588 while (blank_t->prev)
8589 blank_t = blank_t->prev;
8590 while (blank_t)
8591 {
8592 blank_t->total_size = total_size;
8593 total_size += blank_t->size;
8594 blank_t = blank_t->next;
8595 }
8596 }
8597
8598 static bfd_boolean
8599 nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8600 nds32_elf_blank_t *blank_p)
8601 {
8602 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
8603 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
8604 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8605 unsigned int sec_shndx; /* The section the be relaxed. */
8606 bfd_byte *contents; /* Contents data of iterating section. */
8607 Elf_Internal_Rela *internal_relocs;
8608 Elf_Internal_Rela *irel;
8609 Elf_Internal_Rela *irelend;
8610 struct elf_link_hash_entry **sym_hashes;
8611 struct elf_link_hash_entry **end_hashes;
8612 unsigned int symcount;
8613 asection *sect;
8614 nds32_elf_blank_t *blank_t;
8615 nds32_elf_blank_t *blank_t2;
8616 nds32_elf_blank_t *blank_head;
8617
8618 blank_head = blank_t = blank_p;
8619 while (blank_head->prev != NULL)
8620 blank_head = blank_head->prev;
8621 while (blank_t->next != NULL)
8622 blank_t = blank_t->next;
8623
8624 if (blank_t->offset + blank_t->size <= sec->size)
8625 {
8626 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8627 blank_t->next->prev = blank_t;
8628 }
8629 if (blank_head->offset > 0)
8630 {
8631 blank_head->prev = create_nds32_elf_blank (0, 0);
8632 blank_head->prev->next = blank_head;
8633 blank_head = blank_head->prev;
8634 }
8635
8636 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8637
8638 /* The deletion must stop at the next ALIGN reloc for an alignment
8639 power larger than the number of bytes we are deleting. */
8640
8641 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8642 if (!nds32_get_local_syms (abfd, sec, &isym))
8643 return FALSE;
8644
8645 if (isym == NULL)
8646 {
8647 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8648 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8649 symtab_hdr->contents = (bfd_byte *) isym;
8650 }
8651
8652 if (isym == NULL || symtab_hdr->sh_info == 0)
8653 return FALSE;
8654
8655 blank_t = blank_head;
8656 calc_nds32_blank_total (blank_head);
8657
8658 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8659 {
8660 /* Adjust all the relocs. */
8661
8662 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8663 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8664 TRUE /* keep_memory */);
8665 irelend = internal_relocs + sect->reloc_count;
8666
8667 blank_t = blank_head;
8668 blank_t2 = blank_head;
8669
8670 if (!(sect->flags & SEC_RELOC))
8671 continue;
8672
8673 nds32_get_section_contents (abfd, sect, &contents, TRUE);
8674
8675 for (irel = internal_relocs; irel < irelend; irel++)
8676 {
8677 bfd_vma raddr;
8678
8679 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8680 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8681 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8682 {
8683 unsigned long val = 0;
8684 unsigned long mask;
8685 long before, between;
8686 long offset = 0;
8687
8688 switch (ELF32_R_TYPE (irel->r_info))
8689 {
8690 case R_NDS32_DIFF8:
8691 offset = bfd_get_8 (abfd, contents + irel->r_offset);
8692 break;
8693 case R_NDS32_DIFF16:
8694 offset = bfd_get_16 (abfd, contents + irel->r_offset);
8695 break;
8696 case R_NDS32_DIFF32:
8697 val = bfd_get_32 (abfd, contents + irel->r_offset);
8698 /* Get the signed bit and mask for the high part. The
8699 gcc will alarm when right shift 32-bit since the
8700 type size of long may be 32-bit. */
8701 mask = 0 - (val >> 31);
8702 if (mask)
8703 offset = (val | (mask - 0xffffffff));
8704 else
8705 offset = val;
8706 break;
8707 default:
8708 BFD_ASSERT (0);
8709 }
8710
8711 /* DIFF value
8712 0 |encoded in location|
8713 |------------|-------------------|---------
8714 sym+off(addend)
8715 -- before ---| *****************
8716 --------------------- between ---|
8717
8718 We only care how much data are relax between DIFF,
8719 marked as ***. */
8720
8721 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8722 between = get_nds32_elf_blank_total (&blank_t,
8723 irel->r_addend + offset, 0);
8724 if (between == before)
8725 goto done_adjust_diff;
8726
8727 switch (ELF32_R_TYPE (irel->r_info))
8728 {
8729 case R_NDS32_DIFF8:
8730 bfd_put_8 (abfd, offset - (between - before),
8731 contents + irel->r_offset);
8732 break;
8733 case R_NDS32_DIFF16:
8734 bfd_put_16 (abfd, offset - (between - before),
8735 contents + irel->r_offset);
8736 break;
8737 case R_NDS32_DIFF32:
8738 bfd_put_32 (abfd, offset - (between - before),
8739 contents + irel->r_offset);
8740 break;
8741 }
8742 }
8743 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8744 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8745 {
8746 bfd_vma val = 0;
8747 unsigned int len = 0;
8748 unsigned long before, between;
8749 bfd_byte *endp, *p;
8750
8751 val = read_unsigned_leb128 (abfd, contents + irel->r_offset,
8752 &len);
8753
8754 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8755 between = get_nds32_elf_blank_total (&blank_t,
8756 irel->r_addend + val, 0);
8757 if (between == before)
8758 goto done_adjust_diff;
8759
8760 p = contents + irel->r_offset;
8761 endp = p + len -1;
8762 memset (p, 0x80, len);
8763 *(endp) = 0;
8764 p = write_uleb128 (p, val - (between - before)) - 1;
8765 if (p < endp)
8766 *p |= 0x80;
8767 }
8768 done_adjust_diff:
8769
8770 if (sec == sect)
8771 {
8772 raddr = irel->r_offset;
8773 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8774 irel->r_offset, 1);
8775
8776 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8777 continue;
8778 if (blank_t2 && blank_t2->next
8779 && (blank_t2->offset > raddr
8780 || blank_t2->next->offset <= raddr))
8781 _bfd_error_handler
8782 (_("%B: %s\n"), abfd,
8783 "Error: search_nds32_elf_blank reports wrong node");
8784
8785 /* Mark reloc in deleted portion as NONE.
8786 For some relocs like R_NDS32_LABEL that doesn't modify the
8787 content in the section. R_NDS32_LABEL doesn't belong to the
8788 instruction in the section, so we should preserve it. */
8789 if (raddr >= blank_t2->offset
8790 && raddr < blank_t2->offset + blank_t2->size
8791 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8792 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8793 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8794 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8795 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8796 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8797 {
8798 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8799 R_NDS32_NONE);
8800 continue;
8801 }
8802 }
8803
8804 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8805 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8806 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8807 continue;
8808
8809 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8810 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8811 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8812 {
8813 if (irel->r_addend <= sec->size)
8814 irel->r_addend -=
8815 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8816 }
8817 }
8818 }
8819
8820 /* Adjust the local symbols defined in this section. */
8821 blank_t = blank_head;
8822 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8823 {
8824 if (isym->st_shndx == sec_shndx)
8825 {
8826 if (isym->st_value <= sec->size)
8827 {
8828 bfd_vma ahead;
8829 bfd_vma orig_addr = isym->st_value;
8830
8831 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8832 isym->st_value -= ahead;
8833
8834 /* Adjust function size. */
8835 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8836 && isym->st_size > 0)
8837 isym->st_size -=
8838 get_nds32_elf_blank_total
8839 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
8840 }
8841 }
8842 }
8843
8844 /* Now adjust the global symbols defined in this section. */
8845 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8846 - symtab_hdr->sh_info);
8847 sym_hashes = elf_sym_hashes (abfd);
8848 end_hashes = sym_hashes + symcount;
8849 blank_t = blank_head;
8850 for (; sym_hashes < end_hashes; sym_hashes++)
8851 {
8852 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8853
8854 if ((sym_hash->root.type == bfd_link_hash_defined
8855 || sym_hash->root.type == bfd_link_hash_defweak)
8856 && sym_hash->root.u.def.section == sec)
8857 {
8858 if (sym_hash->root.u.def.value <= sec->size)
8859 {
8860 bfd_vma ahead;
8861 bfd_vma orig_addr = sym_hash->root.u.def.value;
8862
8863 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8864 sym_hash->root.u.def.value -= ahead;
8865
8866 /* Adjust function size. */
8867 if (sym_hash->type == STT_FUNC)
8868 sym_hash->size -=
8869 get_nds32_elf_blank_total
8870 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
8871
8872 }
8873 }
8874 }
8875
8876 contents = elf_section_data (sec)->this_hdr.contents;
8877 blank_t = blank_head;
8878 while (blank_t->next)
8879 {
8880 /* Actually delete the bytes. */
8881
8882 /* If current blank is the last blank overlap with current section,
8883 go to finish process. */
8884 if (sec->size <= (blank_t->next->offset))
8885 break;
8886
8887 memmove (contents + blank_t->offset - blank_t->total_size,
8888 contents + blank_t->offset + blank_t->size,
8889 blank_t->next->offset - (blank_t->offset + blank_t->size));
8890
8891 blank_t = blank_t->next;
8892 }
8893
8894 if (sec->size > (blank_t->offset + blank_t->size))
8895 {
8896 /* There are remaining code between blank and section boundary.
8897 Move the remaining code to appropriate location. */
8898 memmove (contents + blank_t->offset - blank_t->total_size,
8899 contents + blank_t->offset + blank_t->size,
8900 sec->size - (blank_t->offset + blank_t->size));
8901 sec->size -= blank_t->total_size + blank_t->size;
8902 }
8903 else
8904 /* This blank is not entirely included in the section,
8905 reduce the section size by only part of the blank size. */
8906 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8907
8908 while (blank_head)
8909 {
8910 blank_t = blank_head;
8911 blank_head = blank_head->next;
8912 remove_nds32_elf_blank (blank_t);
8913 }
8914
8915 return TRUE;
8916 }
8917
8918 /* Get the contents of a section. */
8919
8920 static int
8921 nds32_get_section_contents (bfd *abfd, asection *sec,
8922 bfd_byte **contents_p, bfd_boolean cache)
8923 {
8924 /* Get the section contents. */
8925 if (elf_section_data (sec)->this_hdr.contents != NULL)
8926 *contents_p = elf_section_data (sec)->this_hdr.contents;
8927 else
8928 {
8929 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8930 return FALSE;
8931 if (cache)
8932 elf_section_data (sec)->this_hdr.contents = *contents_p;
8933 }
8934
8935 return TRUE;
8936 }
8937
8938 /* Get the contents of the internal symbol of abfd. */
8939
8940 static int
8941 nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8942 Elf_Internal_Sym **isymbuf_p)
8943 {
8944 Elf_Internal_Shdr *symtab_hdr;
8945 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8946
8947 /* Read this BFD's local symbols if we haven't done so already. */
8948 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8949 {
8950 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8951 if (*isymbuf_p == NULL)
8952 {
8953 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8954 symtab_hdr->sh_info, 0,
8955 NULL, NULL, NULL);
8956 if (*isymbuf_p == NULL)
8957 return FALSE;
8958 }
8959 }
8960 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8961
8962 return TRUE;
8963 }
8964
8965 /* Range of small data. */
8966 static bfd_vma sdata_range[2][2];
8967 static bfd_vma const sdata_init_range[2] =
8968 { ACCURATE_12BIT_S1, ACCURATE_19BIT };
8969
8970 static int
8971 nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8972 bfd_byte *contents, bfd_vma addr)
8973 {
8974 unsigned long insn = bfd_getb32 (contents + addr);
8975
8976 if (insn & 0x80000000)
8977 return 2;
8978
8979 return 4;
8980 }
8981
8982 /* Set the gp relax range. We have to measure the safe range
8983 to do gp relaxation. */
8984
8985 static void
8986 relax_range_measurement (bfd *abfd)
8987 {
8988 asection *sec_f, *sec_b;
8989 /* For upper bound. */
8990 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8991 bfd_vma align;
8992 static int decide_relax_range = 0;
8993 int i;
8994 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
8995
8996 if (decide_relax_range)
8997 return;
8998 decide_relax_range = 1;
8999
9000 if (sda_rela_sec == NULL)
9001 {
9002 /* Since there is no data sections, we assume the range is page size. */
9003 for (i = 0; i < range_number; i++)
9004 {
9005 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
9006 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
9007 }
9008 return;
9009 }
9010
9011 /* Get the biggest alignment power after the gp located section. */
9012 sec_f = sda_rela_sec->output_section;
9013 sec_b = sec_f->next;
9014 align = 0;
9015 while (sec_b != NULL)
9016 {
9017 if ((unsigned)(1 << sec_b->alignment_power) > align)
9018 align = (1 << sec_b->alignment_power);
9019 sec_b = sec_b->next;
9020 }
9021
9022 /* I guess we can not determine the section before
9023 gp located section, so we assume the align is max page size. */
9024 for (i = 0; i < range_number; i++)
9025 {
9026 sdata_range[i][1] = sdata_init_range[i] - align;
9027 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
9028 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
9029 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
9030 }
9031 }
9032
9033 /* These are macros used to check flags encoded in r_addend.
9034 They are only used by nds32_elf_relax_section (). */
9035 #define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
9036 #define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
9037 #define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
9038 #define IS_16BIT_ON(addend) ((addend) & 0x20000000)
9039
9040 /* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
9041
9042 static bfd_boolean
9043 nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9044 Elf_Internal_Rela *internal_relocs, int *insn_len,
9045 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9046 Elf_Internal_Shdr *symtab_hdr)
9047 {
9048 /* There are 3 variations for LONGCALL1
9049 case 4-4-2; 16-bit on, optimize off or optimize for space
9050 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9051 ori ta, ta, lo12(symbol) ; LO12S0
9052 jral5 ta ;
9053
9054 case 4-4-4; 16-bit off, optimize don't care
9055 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9056 ori ta, ta, lo12(symbol) ; LO12S0
9057 jral ta ;
9058
9059 case 4-4-4; 16-bit on, optimize for speed
9060 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9061 ori ta, ta, lo12(symbol) ; LO12S0
9062 jral ta ;
9063 Check code for -mlong-calls output. */
9064
9065 /* Get the reloc for the address from which the register is
9066 being loaded. This reloc will tell us which function is
9067 actually being called. */
9068
9069 bfd_vma laddr;
9070 int seq_len; /* Original length of instruction sequence. */
9071 uint32_t insn;
9072 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9073 int pic_ext_target = 0;
9074 bfd_signed_vma foff;
9075 uint16_t insn16;
9076
9077 irelend = internal_relocs + sec->reloc_count;
9078 seq_len = GET_SEQ_LEN (irel->r_addend);
9079 laddr = irel->r_offset;
9080 *insn_len = seq_len;
9081
9082 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9083 R_NDS32_HI20_RELA, laddr);
9084 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9085 R_NDS32_LO12S0_ORI_RELA,
9086 laddr + 4);
9087
9088 if (hi_irelfn == irelend || lo_irelfn == irelend)
9089 {
9090 _bfd_error_handler
9091 ("%B: warning: R_NDS32_LONGCALL1 points to unrecognized"
9092 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9093 return FALSE;
9094 }
9095
9096 /* Get the value of the symbol referred to by the reloc. */
9097 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9098 &pic_ext_target);
9099
9100 /* This condition only happened when symbol is undefined. */
9101 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9102 || foff >= CONSERVATIVE_24BIT_S1)
9103 return FALSE;
9104
9105 /* Relax to: jal symbol; 25_PCREL */
9106 /* For simplicity of coding, we are going to modify the section
9107 contents, the section relocs, and the BFD symbol table. We
9108 must tell the rest of the code not to free up this
9109 information. It would be possible to instead create a table
9110 of changes which have to be made, as is done in coff-mips.c;
9111 that would be more work, but would require less memory when
9112 the linker is run. */
9113
9114 /* Replace the long call with a jal. */
9115 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9116 R_NDS32_25_PCREL_RELA);
9117 irel->r_addend = hi_irelfn->r_addend;
9118
9119 /* We don't resolve this here but resolve it in relocate_section. */
9120 insn = INSN_JAL;
9121 bfd_putb32 (insn, contents + irel->r_offset);
9122
9123 hi_irelfn->r_info =
9124 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9125 lo_irelfn->r_info =
9126 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9127 *insn_len = 4;
9128
9129 if (seq_len & 0x2)
9130 {
9131 insn16 = NDS32_NOP16;
9132 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9133 lo_irelfn->r_info =
9134 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9135 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9136 *insn_len += 2;
9137 }
9138 return TRUE;
9139 }
9140
9141 #define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
9142 /* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
9143
9144 static bfd_boolean
9145 nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9146 Elf_Internal_Rela *internal_relocs, int *insn_len,
9147 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9148 Elf_Internal_Shdr *symtab_hdr)
9149 {
9150 /* bltz rt, .L1 ; LONGCALL2
9151 jal symbol ; 25_PCREL
9152 .L1: */
9153
9154 /* Get the reloc for the address from which the register is
9155 being loaded. This reloc will tell us which function is
9156 actually being called. */
9157
9158 bfd_vma laddr;
9159 uint32_t insn;
9160 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
9161 int pic_ext_target = 0;
9162 bfd_signed_vma foff;
9163
9164 irelend = internal_relocs + sec->reloc_count;
9165 laddr = irel->r_offset;
9166 i1_irelfn =
9167 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9168 R_NDS32_25_PCREL_RELA, laddr + 4);
9169
9170 if (i1_irelfn == irelend)
9171 {
9172 _bfd_error_handler
9173 ("%B: warning: R_NDS32_LONGCALL2 points to unrecognized"
9174 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9175 return FALSE;
9176 }
9177
9178 insn = bfd_getb32 (contents + laddr);
9179
9180 /* Get the value of the symbol referred to by the reloc. */
9181 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
9182 &pic_ext_target);
9183
9184 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9185 || foff >= CONSERVATIVE_16BIT_S1)
9186 return FALSE;
9187
9188 /* Relax to bgezal rt, label ; 17_PCREL
9189 or bltzal rt, label ; 17_PCREL */
9190
9191 /* Convert to complimentary conditional call. */
9192 insn = CONVERT_CONDITION_CALL (insn);
9193
9194 /* For simplicity of coding, we are going to modify the section
9195 contents, the section relocs, and the BFD symbol table. We
9196 must tell the rest of the code not to free up this
9197 information. It would be possible to instead create a table
9198 of changes which have to be made, as is done in coff-mips.c;
9199 that would be more work, but would require less memory when
9200 the linker is run. */
9201
9202 /* Clean unnessary relocations. */
9203 i1_irelfn->r_info =
9204 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9205 cond_irelfn =
9206 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9207 R_NDS32_17_PCREL_RELA, laddr);
9208 if (cond_irelfn != irelend)
9209 cond_irelfn->r_info =
9210 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9211
9212 /* Replace the long call with a bgezal. */
9213 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9214 R_NDS32_17_PCREL_RELA);
9215 irel->r_addend = i1_irelfn->r_addend;
9216
9217 bfd_putb32 (insn, contents + irel->r_offset);
9218
9219 *insn_len = 4;
9220 return TRUE;
9221 }
9222
9223 /* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
9224
9225 static bfd_boolean
9226 nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9227 Elf_Internal_Rela *internal_relocs, int *insn_len,
9228 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9229 Elf_Internal_Shdr *symtab_hdr)
9230 {
9231 /* There are 3 variations for LONGCALL3
9232 case 4-4-4-2; 16-bit on, optimize off or optimize for space
9233 bltz rt, $1 ; LONGCALL3
9234 sethi ta, hi20(symbol) ; HI20
9235 ori ta, ta, lo12(symbol) ; LO12S0
9236 jral5 ta ;
9237 $1
9238
9239 case 4-4-4-4; 16-bit off, optimize don't care
9240 bltz rt, $1 ; LONGCALL3
9241 sethi ta, hi20(symbol) ; HI20
9242 ori ta, ta, lo12(symbol) ; LO12S0
9243 jral ta ;
9244 $1
9245
9246 case 4-4-4-4; 16-bit on, optimize for speed
9247 bltz rt, $1 ; LONGCALL3
9248 sethi ta, hi20(symbol) ; HI20
9249 ori ta, ta, lo12(symbol) ; LO12S0
9250 jral ta ;
9251 $1 */
9252
9253 /* Get the reloc for the address from which the register is
9254 being loaded. This reloc will tell us which function is
9255 actually being called. */
9256
9257 bfd_vma laddr;
9258 int seq_len; /* Original length of instruction sequence. */
9259 uint32_t insn;
9260 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9261 int pic_ext_target = 0;
9262 bfd_signed_vma foff;
9263 uint16_t insn16;
9264
9265 irelend = internal_relocs + sec->reloc_count;
9266 seq_len = GET_SEQ_LEN (irel->r_addend);
9267 laddr = irel->r_offset;
9268 *insn_len = seq_len;
9269
9270 hi_irelfn =
9271 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9272 R_NDS32_HI20_RELA, laddr + 4);
9273 lo_irelfn =
9274 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9275 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9276
9277 if (hi_irelfn == irelend || lo_irelfn == irelend)
9278 {
9279 _bfd_error_handler
9280 ("%B: warning: R_NDS32_LONGCALL3 points to unrecognized"
9281 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9282 return FALSE;
9283 }
9284
9285 /* Get the value of the symbol referred to by the reloc. */
9286 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9287 &pic_ext_target);
9288
9289 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9290 || foff >= CONSERVATIVE_24BIT_S1)
9291 return FALSE;
9292
9293 insn = bfd_getb32 (contents + laddr);
9294 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
9295 {
9296 /* Relax to bgezal rt, label ; 17_PCREL
9297 or bltzal rt, label ; 17_PCREL */
9298
9299 /* Convert to complimentary conditional call. */
9300 insn = CONVERT_CONDITION_CALL (insn);
9301 bfd_putb32 (insn, contents + irel->r_offset);
9302
9303 *insn_len = 4;
9304 irel->r_info =
9305 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9306 hi_irelfn->r_info =
9307 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9308 lo_irelfn->r_info =
9309 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9310
9311 cond_irelfn =
9312 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9313 R_NDS32_17_PCREL_RELA, laddr);
9314 if (cond_irelfn != irelend)
9315 {
9316 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9317 R_NDS32_17_PCREL_RELA);
9318 cond_irelfn->r_addend = hi_irelfn->r_addend;
9319 }
9320
9321 if (seq_len & 0x2)
9322 {
9323 insn16 = NDS32_NOP16;
9324 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9325 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9326 R_NDS32_INSN16);
9327 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9328 insn_len += 2;
9329 }
9330 }
9331 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9332 {
9333 /* Relax to the following instruction sequence
9334 bltz rt, $1 ; LONGCALL2
9335 jal symbol ; 25_PCREL
9336 $1 */
9337 *insn_len = 8;
9338 insn = INSN_JAL;
9339 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9340
9341 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9342 R_NDS32_25_PCREL_RELA);
9343 irel->r_info =
9344 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9345
9346 lo_irelfn->r_info =
9347 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9348
9349 if (seq_len & 0x2)
9350 {
9351 insn16 = NDS32_NOP16;
9352 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9353 lo_irelfn->r_info =
9354 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9355 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9356 insn_len += 2;
9357 }
9358 }
9359 return TRUE;
9360 }
9361
9362 /* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
9363
9364 static bfd_boolean
9365 nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9366 Elf_Internal_Rela *internal_relocs, int *insn_len,
9367 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9368 Elf_Internal_Shdr *symtab_hdr)
9369 {
9370 /* There are 3 variations for LONGJUMP1
9371 case 4-4-2; 16-bit bit on, optimize off or optimize for space
9372 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9373 ori ta, ta, lo12(symbol) ; LO12S0
9374 jr5 ta ;
9375
9376 case 4-4-4; 16-bit off, optimize don't care
9377 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9378 ori ta, ta, lo12(symbol) ; LO12S0
9379 jr ta ;
9380
9381 case 4-4-4; 16-bit on, optimize for speed
9382 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9383 ori ta, ta, lo12(symbol) ; LO12S0
9384 jr ta ; */
9385
9386 /* Get the reloc for the address from which the register is
9387 being loaded. This reloc will tell us which function is
9388 actually being called. */
9389
9390 bfd_vma laddr;
9391 int seq_len; /* Original length of instruction sequence. */
9392 int insn16_on; /* 16-bit on/off. */
9393 uint32_t insn;
9394 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9395 int pic_ext_target = 0;
9396 bfd_signed_vma foff;
9397 uint16_t insn16;
9398 unsigned long reloc;
9399
9400 irelend = internal_relocs + sec->reloc_count;
9401 seq_len = GET_SEQ_LEN (irel->r_addend);
9402 laddr = irel->r_offset;
9403 *insn_len = seq_len;
9404 insn16_on = IS_16BIT_ON (irel->r_addend);
9405
9406 hi_irelfn =
9407 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9408 R_NDS32_HI20_RELA, laddr);
9409 lo_irelfn =
9410 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9411 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9412 if (hi_irelfn == irelend || lo_irelfn == irelend)
9413 {
9414 _bfd_error_handler
9415 ("%B: warning: R_NDS32_LONGJUMP1 points to unrecognized"
9416 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9417 return FALSE;
9418 }
9419
9420 /* Get the value of the symbol referred to by the reloc. */
9421 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9422 &pic_ext_target);
9423
9424 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9425 || foff < -CONSERVATIVE_24BIT_S1)
9426 return FALSE;
9427
9428 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9429 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9430 {
9431 /* j8 label */
9432 /* 16-bit on, but not optimized for speed. */
9433 reloc = R_NDS32_9_PCREL_RELA;
9434 insn16 = INSN_J8;
9435 bfd_putb16 (insn16, contents + irel->r_offset);
9436 *insn_len = 2;
9437 irel->r_info =
9438 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9439 }
9440 else
9441 {
9442 /* j label */
9443 reloc = R_NDS32_25_PCREL_RELA;
9444 insn = INSN_J;
9445 bfd_putb32 (insn, contents + irel->r_offset);
9446 *insn_len = 4;
9447 irel->r_info =
9448 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9449 irel->r_addend = 0;
9450 }
9451
9452 hi_irelfn->r_info =
9453 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9454 lo_irelfn->r_info =
9455 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9456
9457 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9458 {
9459 insn16 = NDS32_NOP16;
9460 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9461 lo_irelfn->r_info =
9462 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9463 R_NDS32_INSN16);
9464 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9465 *insn_len += 2;
9466 }
9467 return TRUE;
9468 }
9469
9470 /* Revert condition branch. This function does not check if the input
9471 instruction is condition branch or not. */
9472
9473 static void
9474 nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9475 uint16_t *re_insn16, uint32_t *re_insn)
9476 {
9477 uint32_t comp_insn = 0;
9478 uint16_t comp_insn16 = 0;
9479
9480 if (insn)
9481 {
9482 if (N32_OP6 (insn) == N32_OP6_BR1)
9483 {
9484 /* beqs label. */
9485 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9486 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
9487 {
9488 /* Insn can be contracted to 16-bit implied r5. */
9489 comp_insn16 =
9490 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9491 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9492 }
9493 }
9494 else if (N32_OP6 (insn) == N32_OP6_BR3)
9495 {
9496 /* bnec $ta, imm11, label. */
9497 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9498 }
9499 else
9500 {
9501 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9502 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9503 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
9504 {
9505 if (N32_IS_RT3 (insn))
9506 {
9507 /* Insn can be contracted to 16-bit. */
9508 comp_insn16 =
9509 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9510 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9511 }
9512 else if (N32_RT5 (insn) == REG_R15)
9513 {
9514 /* Insn can be contracted to 16-bit. */
9515 comp_insn16 =
9516 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
9517 }
9518 }
9519 }
9520 }
9521 else
9522 {
9523 switch ((insn16 & 0xf000) >> 12)
9524 {
9525 case 0xc:
9526 /* beqz38 or bnez38 */
9527 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9528 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9529 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9530 break;
9531
9532 case 0xd:
9533 /* beqs38 or bnes38 */
9534 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9535 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9536 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9537 | (REG_R5 << 15);
9538 break;
9539
9540 case 0xe:
9541 /* beqzS8 or bnezS8 */
9542 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9543 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9544 comp_insn |= REG_R15 << 20;
9545 break;
9546
9547 default:
9548 break;
9549 }
9550 }
9551 if (comp_insn && re_insn)
9552 *re_insn = comp_insn;
9553 if (comp_insn16 && re_insn16)
9554 *re_insn16 = comp_insn16;
9555 }
9556
9557 /* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
9558
9559 static bfd_boolean
9560 nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9561 Elf_Internal_Rela *internal_relocs, int *insn_len,
9562 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9563 Elf_Internal_Shdr *symtab_hdr)
9564 {
9565 /* There are 3 variations for LONGJUMP2
9566 case 2-4; 1st insn convertible, 16-bit on,
9567 optimize off or optimize for space
9568 bnes38 rt, ra, $1 ; LONGJUMP2
9569 j label ; 25_PCREL
9570 $1:
9571
9572 case 4-4; 1st insn not convertible
9573 bne rt, ra, $1 ; LONGJUMP2
9574 j label ; 25_PCREL
9575 $1:
9576
9577 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9578 bne rt, ra, $1 ; LONGJUMP2
9579 j label ; 25_PCREL
9580 $1: */
9581
9582 /* Get the reloc for the address from which the register is
9583 being loaded. This reloc will tell us which function is
9584 actually being called. */
9585
9586 bfd_vma laddr;
9587 int seq_len; /* Original length of instruction sequence. */
9588 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9589 int pic_ext_target = 0, first_size;
9590 unsigned int i;
9591 bfd_signed_vma foff;
9592 uint32_t insn, re_insn = 0;
9593 uint16_t insn16, re_insn16 = 0;
9594 unsigned long reloc, cond_reloc;
9595
9596 enum elf_nds32_reloc_type checked_types[] =
9597 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9598
9599 irelend = internal_relocs + sec->reloc_count;
9600 seq_len = GET_SEQ_LEN (irel->r_addend);
9601 laddr = irel->r_offset;
9602 *insn_len = seq_len;
9603 first_size = (seq_len == 6) ? 2 : 4;
9604
9605 i2_irelfn =
9606 find_relocs_at_address_addr (irel, internal_relocs,
9607 irelend, R_NDS32_25_PCREL_RELA,
9608 laddr + first_size);
9609
9610 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9611 {
9612 cond_irelfn =
9613 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9614 checked_types[i], laddr);
9615 if (cond_irelfn != irelend)
9616 break;
9617 }
9618
9619 if (i2_irelfn == irelend || cond_irelfn == irelend)
9620 {
9621 _bfd_error_handler
9622 ("%B: warning: R_NDS32_LONGJUMP2 points to unrecognized"
9623 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9624 return FALSE;
9625 }
9626
9627 /* Get the value of the symbol referred to by the reloc. */
9628 foff =
9629 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9630 &pic_ext_target);
9631 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9632 || foff >= CONSERVATIVE_16BIT_S1)
9633 return FALSE;
9634
9635 /* Get the all corresponding instructions. */
9636 if (first_size == 4)
9637 {
9638 insn = bfd_getb32 (contents + laddr);
9639 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9640 }
9641 else
9642 {
9643 insn16 = bfd_getb16 (contents + laddr);
9644 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9645 }
9646
9647 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9648 && foff < ACCURATE_8BIT_S1 - first_size)
9649 {
9650 if (first_size == 4)
9651 {
9652 /* Don't convert it to 16-bit now, keep this as relaxable for
9653 ``label reloc; INSN16''. */
9654
9655 /* Save comp_insn32 to buffer. */
9656 bfd_putb32 (re_insn, contents + irel->r_offset);
9657 *insn_len = 4;
9658 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9659 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9660 cond_reloc = R_NDS32_INSN16;
9661 }
9662 else
9663 {
9664 bfd_putb16 (re_insn16, contents + irel->r_offset);
9665 *insn_len = 2;
9666 reloc = R_NDS32_9_PCREL_RELA;
9667 cond_reloc = R_NDS32_NONE;
9668 }
9669 }
9670 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9671 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9672 && foff < ACCURATE_14BIT_S1 - first_size))
9673 {
9674 /* beqs label ; 15_PCREL */
9675 bfd_putb32 (re_insn, contents + irel->r_offset);
9676 *insn_len = 4;
9677 reloc = R_NDS32_15_PCREL_RELA;
9678 cond_reloc = R_NDS32_NONE;
9679 }
9680 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9681 && foff >= -CONSERVATIVE_16BIT_S1
9682 && foff < CONSERVATIVE_16BIT_S1)
9683 {
9684 /* beqz label ; 17_PCREL */
9685 bfd_putb32 (re_insn, contents + irel->r_offset);
9686 *insn_len = 4;
9687 reloc = R_NDS32_17_PCREL_RELA;
9688 cond_reloc = R_NDS32_NONE;
9689 }
9690 else
9691 return FALSE;
9692
9693 /* Set all relocations. */
9694 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9695 irel->r_addend = i2_irelfn->r_addend;
9696
9697 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9698 cond_reloc);
9699 cond_irelfn->r_addend = 0;
9700
9701 if ((seq_len ^ *insn_len ) & 0x2)
9702 {
9703 insn16 = NDS32_NOP16;
9704 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9705 i2_irelfn->r_offset = 4;
9706 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9707 R_NDS32_INSN16);
9708 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9709 *insn_len += 2;
9710 }
9711 else
9712 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9713 R_NDS32_NONE);
9714 return TRUE;
9715 }
9716
9717 /* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
9718
9719 static bfd_boolean
9720 nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9721 Elf_Internal_Rela *internal_relocs, int *insn_len,
9722 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9723 Elf_Internal_Shdr *symtab_hdr)
9724 {
9725 /* There are 5 variations for LONGJUMP3
9726 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9727 optimize off or optimize for space
9728 bnes38 rt, ra, $1 ; LONGJUMP3
9729 sethi ta, hi20(symbol) ; HI20
9730 ori ta, ta, lo12(symbol) ; LO12S0
9731 jr5 ta ;
9732 $1: ;
9733
9734 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9735 bnes38 rt, ra, $1 ; LONGJUMP3
9736 sethi ta, hi20(symbol) ; HI20
9737 ori ta, ta, lo12(symbol) ; LO12S0
9738 jr5 ta ;
9739 $1: ; LABEL
9740
9741 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9742 optimize off or optimize for space
9743 bne rt, ra, $1 ; LONGJUMP3
9744 sethi ta, hi20(symbol) ; HI20
9745 ori ta, ta, lo12(symbol) ; LO12S0
9746 jr5 ta ;
9747 $1: ;
9748
9749 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9750 16-bit off if no INSN16
9751 bne rt, ra, $1 ; LONGJUMP3
9752 sethi ta, hi20(symbol) ; HI20
9753 ori ta, ta, lo12(symbol) ; LO12S0
9754 jr ta ;
9755 $1: ;
9756
9757 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9758 16-bit off if no INSN16
9759 bne rt, ra, $1 ; LONGJUMP3
9760 sethi ta, hi20(symbol) ; HI20
9761 ori ta, ta, lo12(symbol) ; LO12S0
9762 jr ta ;
9763 $1: ; LABEL */
9764
9765 /* Get the reloc for the address from which the register is
9766 being loaded. This reloc will tell us which function is
9767 actually being called. */
9768 enum elf_nds32_reloc_type checked_types[] =
9769 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9770
9771 int reloc_off = 0, cond_removed = 0, convertible;
9772 bfd_vma laddr;
9773 int seq_len; /* Original length of instruction sequence. */
9774 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9775 int pic_ext_target = 0, first_size;
9776 unsigned int i;
9777 bfd_signed_vma foff;
9778 uint32_t insn, re_insn = 0;
9779 uint16_t insn16, re_insn16 = 0;
9780 unsigned long reloc, cond_reloc;
9781
9782 irelend = internal_relocs + sec->reloc_count;
9783 seq_len = GET_SEQ_LEN (irel->r_addend);
9784 laddr = irel->r_offset;
9785 *insn_len = seq_len;
9786
9787 convertible = IS_1ST_CONVERT (irel->r_addend);
9788
9789 if (convertible)
9790 first_size = 2;
9791 else
9792 first_size = 4;
9793
9794 /* Get all needed relocations. */
9795 hi_irelfn =
9796 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9797 R_NDS32_HI20_RELA, laddr + first_size);
9798 lo_irelfn =
9799 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9800 R_NDS32_LO12S0_ORI_RELA,
9801 laddr + first_size + 4);
9802
9803 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9804 {
9805 cond_irelfn =
9806 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9807 checked_types[i], laddr);
9808 if (cond_irelfn != irelend)
9809 break;
9810 }
9811
9812 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9813 {
9814 _bfd_error_handler
9815 ("%B: warning: R_NDS32_LONGJUMP3 points to unrecognized"
9816 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9817 return FALSE;
9818 }
9819
9820 /* Get the value of the symbol referred to by the reloc. */
9821 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9822 &pic_ext_target);
9823
9824 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9825 || foff >= CONSERVATIVE_24BIT_S1)
9826 return FALSE;
9827
9828 /* Get the all corresponding instructions. */
9829 if (first_size == 4)
9830 {
9831 insn = bfd_getb32 (contents + laddr);
9832 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9833 }
9834 else
9835 {
9836 insn16 = bfd_getb16 (contents + laddr);
9837 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9838 }
9839
9840 /* For simplicity of coding, we are going to modify the section
9841 contents, the section relocs, and the BFD symbol table. We
9842 must tell the rest of the code not to free up this
9843 information. It would be possible to instead create a table
9844 of changes which have to be made, as is done in coff-mips.c;
9845 that would be more work, but would require less memory when
9846 the linker is run. */
9847
9848 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9849 && foff < ACCURATE_8BIT_S1 - first_size)
9850 {
9851 if (!(seq_len & 0x2))
9852 {
9853 /* Don't convert it to 16-bit now, keep this as relaxable
9854 for ``label reloc; INSN1a''6. */
9855 /* Save comp_insn32 to buffer. */
9856 bfd_putb32 (re_insn, contents + irel->r_offset);
9857 *insn_len = 4;
9858 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9859 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9860 cond_reloc = R_NDS32_INSN16;
9861 }
9862 else
9863 {
9864 /* Not optimize for speed; convert sequence to 16-bit. */
9865 /* Save comp_insn16 to buffer. */
9866 bfd_putb16 (re_insn16, contents + irel->r_offset);
9867 *insn_len = 2;
9868 reloc = R_NDS32_9_PCREL_RELA;
9869 cond_reloc = R_NDS32_NONE;
9870 }
9871 cond_removed = 1;
9872 }
9873 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9874 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9875 && foff < ACCURATE_14BIT_S1 - first_size))
9876 {
9877 /* beqs label ; 15_PCREL */
9878 bfd_putb32 (re_insn, contents + irel->r_offset);
9879 *insn_len = 4;
9880 reloc = R_NDS32_15_PCREL_RELA;
9881 cond_reloc = R_NDS32_NONE;
9882 cond_removed = 1;
9883 }
9884 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9885 && foff >= -CONSERVATIVE_16BIT_S1
9886 && foff < CONSERVATIVE_16BIT_S1)
9887 {
9888 /* beqz label ; 17_PCREL */
9889 bfd_putb32 (re_insn, contents + irel->r_offset);
9890 *insn_len = 4;
9891 reloc = R_NDS32_17_PCREL_RELA;
9892 cond_reloc = R_NDS32_NONE;
9893 cond_removed = 1;
9894 }
9895 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9896 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9897 {
9898 /* Relax to one of the following 3 variations
9899
9900 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9901 for space
9902 bnes38 rt, $1 ; LONGJUMP2
9903 j label ; 25_PCREL
9904 $1
9905
9906 case 4-4; 1st insn not convertible, others don't care
9907 bne rt, ra, $1 ; LONGJUMP2
9908 j label ; 25_PCREL
9909 $1
9910
9911 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9912 bne rt, ra, $1 ; LONGJUMP2
9913 j label ; 25_PCREL
9914 $1 */
9915
9916 /* Offset for first instruction. */
9917
9918 /* Use j label as second instruction. */
9919 *insn_len = 4 + first_size;
9920 insn = INSN_J;
9921 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9922 reloc = R_NDS32_LONGJUMP2;
9923 cond_reloc = R_NDS32_25_PLTREL;
9924 }
9925 else
9926 return FALSE;
9927
9928 if (cond_removed == 1)
9929 {
9930 /* Set all relocations. */
9931 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9932 irel->r_addend = hi_irelfn->r_addend;
9933
9934 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9935 cond_reloc);
9936 cond_irelfn->r_addend = 0;
9937 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9938 R_NDS32_NONE);
9939 }
9940 else
9941 {
9942 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
9943 irel->r_addend = irel->r_addend;
9944 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9945 cond_reloc);
9946 }
9947
9948 if ((seq_len ^ *insn_len ) & 0x2)
9949 {
9950 insn16 = NDS32_NOP16;
9951 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9952 lo_irelfn->r_offset = *insn_len;
9953 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9954 R_NDS32_INSN16);
9955 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9956 *insn_len += 2;
9957 }
9958 else
9959 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9960 R_NDS32_NONE);
9961 return TRUE;
9962 }
9963
9964 /* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
9965
9966 static bfd_boolean
9967 nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9968 Elf_Internal_Rela *internal_relocs, int *insn_len,
9969 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9970 Elf_Internal_Shdr *symtab_hdr)
9971 {
9972 /* The pattern for LONGCALL4. Support for function cse.
9973 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9974 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9975 jral ta ; PTR_RES/EMPTY/INSN16 */
9976
9977 bfd_vma laddr;
9978 uint32_t insn;
9979 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9980 Elf_Internal_Rela *irelend;
9981 int pic_ext_target = 0;
9982 bfd_signed_vma foff;
9983
9984 irelend = internal_relocs + sec->reloc_count;
9985 laddr = irel->r_offset;
9986
9987 /* Get the reloc for the address from which the register is
9988 being loaded. This reloc will tell us which function is
9989 actually being called. */
9990 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9991 R_NDS32_HI20_RELA, laddr);
9992
9993 if (hi_irel == irelend)
9994 {
9995 _bfd_error_handler
9996 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
9997 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9998 return FALSE;
9999 }
10000
10001 /* Get the value of the symbol referred to by the reloc. */
10002 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10003 &pic_ext_target);
10004
10005 /* This condition only happened when symbol is undefined. */
10006 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10007 || foff >= CONSERVATIVE_24BIT_S1)
10008 return FALSE;
10009
10010 /* Relax to: jal symbol; 25_PCREL */
10011 /* For simplicity of coding, we are going to modify the section
10012 contents, the section relocs, and the BFD symbol table. We
10013 must tell the rest of the code not to free up this
10014 information. It would be possible to instead create a table
10015 of changes which have to be made, as is done in coff-mips.c;
10016 that would be more work, but would require less memory when
10017 the linker is run. */
10018
10019 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10020 R_NDS32_PTR_RESOLVED, irel->r_addend);
10021 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10022 R_NDS32_EMPTY, irel->r_addend);
10023
10024 if (ptr_irel == irelend || em_irel == irelend)
10025 {
10026 _bfd_error_handler
10027 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
10028 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10029 return FALSE;
10030 }
10031 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10032 insn = bfd_getb32 (contents + irel->r_addend);
10033 if (insn & 0x80000000)
10034 return FALSE;
10035
10036 /* Replace the long call with a jal. */
10037 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10038 R_NDS32_25_PCREL_RELA);
10039 ptr_irel->r_addend = 1;
10040
10041 /* We don't resolve this here but resolve it in relocate_section. */
10042 insn = INSN_JAL;
10043 bfd_putb32 (insn, contents + em_irel->r_offset);
10044
10045 irel->r_info =
10046 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10047
10048 /* If there is function cse, HI20 can not remove now. */
10049 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10050 R_NDS32_LONGCALL4, laddr);
10051 if (call_irel == irelend)
10052 {
10053 *insn_len = 0;
10054 hi_irel->r_info =
10055 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10056 }
10057
10058 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10059 R_NDS32_INSN16, irel->r_addend);
10060 if (insn_irel != irelend)
10061 insn_irel->r_info =
10062 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10063
10064 return TRUE;
10065 }
10066
10067 /* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
10068
10069 static bfd_boolean
10070 nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10071 Elf_Internal_Rela *internal_relocs, int *insn_len,
10072 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10073 Elf_Internal_Shdr *symtab_hdr)
10074 {
10075 /* The pattern for LONGCALL5.
10076 bltz rt, .L1 ; LONGCALL5/17_PCREL
10077 jal symbol ; 25_PCREL
10078 .L1: */
10079
10080 bfd_vma laddr;
10081 uint32_t insn;
10082 Elf_Internal_Rela *cond_irel, *irelend;
10083 int pic_ext_target = 0;
10084 bfd_signed_vma foff;
10085
10086 irelend = internal_relocs + sec->reloc_count;
10087 laddr = irel->r_offset;
10088 insn = bfd_getb32 (contents + laddr);
10089
10090 /* Get the reloc for the address from which the register is
10091 being loaded. This reloc will tell us which function is
10092 actually being called. */
10093 cond_irel =
10094 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10095 R_NDS32_25_PCREL_RELA, irel->r_addend);
10096 if (cond_irel == irelend)
10097 {
10098 _bfd_error_handler
10099 ("%B: warning: R_NDS32_LONGCALL5 points to unrecognized"
10100 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10101 return FALSE;
10102 }
10103
10104 /* Get the value of the symbol referred to by the reloc. */
10105 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10106 &pic_ext_target);
10107
10108 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10109 || foff >= CONSERVATIVE_16BIT_S1)
10110 return FALSE;
10111
10112 /* Relax to bgezal rt, label ; 17_PCREL
10113 or bltzal rt, label ; 17_PCREL */
10114
10115 /* Convert to complimentary conditional call. */
10116 insn = CONVERT_CONDITION_CALL (insn);
10117
10118 /* For simplicity of coding, we are going to modify the section
10119 contents, the section relocs, and the BFD symbol table. We
10120 must tell the rest of the code not to free up this
10121 information. It would be possible to instead create a table
10122 of changes which have to be made, as is done in coff-mips.c;
10123 that would be more work, but would require less memory when
10124 the linker is run. */
10125
10126 /* Modify relocation and contents. */
10127 cond_irel->r_info =
10128 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
10129
10130 /* Replace the long call with a bgezal. */
10131 bfd_putb32 (insn, contents + cond_irel->r_offset);
10132 *insn_len = 0;
10133
10134 /* Clean unnessary relocations. */
10135 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10136
10137 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10138 R_NDS32_17_PCREL_RELA, laddr);
10139 cond_irel->r_info =
10140 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10141
10142 return TRUE;
10143 }
10144
10145 /* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
10146
10147 static bfd_boolean
10148 nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10149 Elf_Internal_Rela *internal_relocs, int *insn_len,
10150 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10151 Elf_Internal_Shdr *symtab_hdr)
10152 {
10153 /* The pattern for LONGCALL6.
10154 bltz rt, .L1 ; LONGCALL6/17_PCREL
10155 sethi ta, hi20(symbol) ; HI20/PTR
10156 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10157 jral ta ; PTR_RES/EMPTY/INSN16
10158 .L1 */
10159
10160 bfd_vma laddr;
10161 uint32_t insn;
10162 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
10163 int pic_ext_target = 0;
10164 bfd_signed_vma foff;
10165
10166 irelend = internal_relocs + sec->reloc_count;
10167 laddr = irel->r_offset;
10168
10169 /* Get the reloc for the address from which the register is
10170 being loaded. This reloc will tell us which function is
10171 actually being called. */
10172 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10173 R_NDS32_EMPTY, irel->r_addend);
10174
10175 if (em_irel == irelend)
10176 {
10177 _bfd_error_handler
10178 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10179 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10180 return FALSE;
10181 }
10182
10183 /* Get the value of the symbol referred to by the reloc. */
10184 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10185 &pic_ext_target);
10186
10187 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10188 || foff >= CONSERVATIVE_24BIT_S1)
10189 return FALSE;
10190
10191 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10192 insn = bfd_getb32 (contents + irel->r_addend);
10193 if (insn & 0x80000000)
10194 return FALSE;
10195
10196 insn = bfd_getb32 (contents + laddr);
10197 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10198 {
10199 /* Relax to bgezal rt, label ; 17_PCREL
10200 or bltzal rt, label ; 17_PCREL */
10201
10202 /* Convert to complimentary conditional call. */
10203 *insn_len = 0;
10204 insn = CONVERT_CONDITION_CALL (insn);
10205 bfd_putb32 (insn, contents + em_irel->r_offset);
10206
10207 em_irel->r_info =
10208 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10209
10210 /* Set resolved relocation. */
10211 cond_irel =
10212 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10213 R_NDS32_PTR_RESOLVED, irel->r_addend);
10214 if (cond_irel == irelend)
10215 {
10216 _bfd_error_handler
10217 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10218 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10219 return FALSE;
10220 }
10221 cond_irel->r_addend = 1;
10222
10223 /* Clear relocations. */
10224
10225 irel->r_info =
10226 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10227
10228 cond_irel =
10229 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10230 R_NDS32_17_PCREL_RELA, laddr);
10231 if (cond_irel != irelend)
10232 cond_irel->r_info =
10233 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10234
10235 cond_irel =
10236 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10237 R_NDS32_INSN16, irel->r_addend);
10238 if (cond_irel != irelend)
10239 cond_irel->r_info =
10240 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10241
10242 }
10243 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10244 {
10245 /* Relax to the following instruction sequence
10246 bltz rt, .L1 ; LONGCALL2/17_PCREL
10247 jal symbol ; 25_PCREL/PTR_RES
10248 .L1 */
10249 *insn_len = 4;
10250 /* Convert instruction. */
10251 insn = INSN_JAL;
10252 bfd_putb32 (insn, contents + em_irel->r_offset);
10253
10254 /* Convert relocations. */
10255 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10256 R_NDS32_25_PCREL_RELA);
10257 irel->r_info =
10258 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
10259
10260 /* Set resolved relocation. */
10261 cond_irel =
10262 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10263 R_NDS32_PTR_RESOLVED, irel->r_addend);
10264 if (cond_irel == irelend)
10265 {
10266 _bfd_error_handler
10267 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10268 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10269 return FALSE;
10270 }
10271 cond_irel->r_addend = 1;
10272
10273 cond_irel =
10274 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10275 R_NDS32_INSN16, irel->r_addend);
10276 if (cond_irel != irelend)
10277 cond_irel->r_info =
10278 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10279 }
10280 return TRUE;
10281 }
10282
10283 /* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
10284
10285 static bfd_boolean
10286 nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10287 Elf_Internal_Rela *internal_relocs, int *insn_len,
10288 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10289 Elf_Internal_Shdr *symtab_hdr)
10290 {
10291 /* The pattern for LONGJUMP4.
10292 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10293 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10294 jr ta ; PTR_RES/INSN16/EMPTY */
10295
10296 bfd_vma laddr;
10297 int seq_len; /* Original length of instruction sequence. */
10298 uint32_t insn;
10299 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10300 int pic_ext_target = 0;
10301 bfd_signed_vma foff;
10302
10303 irelend = internal_relocs + sec->reloc_count;
10304 seq_len = GET_SEQ_LEN (irel->r_addend);
10305 laddr = irel->r_offset;
10306 *insn_len = seq_len;
10307
10308 /* Get the reloc for the address from which the register is
10309 being loaded. This reloc will tell us which function is
10310 actually being called. */
10311
10312 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10313 R_NDS32_HI20_RELA, laddr);
10314
10315 if (hi_irel == irelend)
10316 {
10317 _bfd_error_handler
10318 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10319 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10320 return FALSE;
10321 }
10322
10323 /* Get the value of the symbol referred to by the reloc. */
10324 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10325 &pic_ext_target);
10326
10327 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10328 || foff < -CONSERVATIVE_24BIT_S1)
10329 return FALSE;
10330
10331 /* Convert it to "j label", it may be converted to j8 in the final
10332 pass of relaxation. Therefore, we do not consider this currently. */
10333 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10334 R_NDS32_PTR_RESOLVED, irel->r_addend);
10335 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10336 R_NDS32_EMPTY, irel->r_addend);
10337
10338 if (ptr_irel == irelend || em_irel == irelend)
10339 {
10340 _bfd_error_handler
10341 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10342 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10343 return FALSE;
10344 }
10345
10346 em_irel->r_info =
10347 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10348 ptr_irel->r_addend = 1;
10349
10350 /* Write instruction. */
10351 insn = INSN_J;
10352 bfd_putb32 (insn, contents + em_irel->r_offset);
10353
10354 /* Clear relocations. */
10355 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10356
10357 /* If there is function cse, HI20 can not remove now. */
10358 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10359 R_NDS32_LONGJUMP4, laddr);
10360 if (call_irel == irelend)
10361 {
10362 *insn_len = 0;
10363 hi_irel->r_info =
10364 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10365 }
10366
10367 return TRUE;
10368 }
10369
10370 /* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
10371
10372 static bfd_boolean
10373 nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10374 Elf_Internal_Rela *internal_relocs, int *insn_len,
10375 int *seq_len, bfd_byte *contents,
10376 Elf_Internal_Sym *isymbuf,
10377 Elf_Internal_Shdr *symtab_hdr)
10378 {
10379 /* There are 2 variations for LONGJUMP5
10380 case 2-4; 1st insn convertible, 16-bit on.
10381 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10382 j label ; 25_PCREL/INSN16
10383 $1:
10384
10385 case 4-4; 1st insn not convertible
10386 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10387 j label ; 25_PCREL/INSN16
10388 .L1: */
10389
10390 bfd_vma laddr;
10391 Elf_Internal_Rela *cond_irel, *irelend;
10392 int pic_ext_target = 0;
10393 unsigned int i;
10394 bfd_signed_vma foff;
10395 uint32_t insn, re_insn = 0;
10396 uint16_t insn16, re_insn16 = 0;
10397 unsigned long reloc;
10398
10399 enum elf_nds32_reloc_type checked_types[] =
10400 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10401 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10402
10403 irelend = internal_relocs + sec->reloc_count;
10404 laddr = irel->r_offset;
10405
10406 /* Get the reloc for the address from which the register is
10407 being loaded. This reloc will tell us which function is
10408 actually being called. */
10409
10410 cond_irel =
10411 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10412 R_NDS32_25_PCREL_RELA, irel->r_addend);
10413 if (cond_irel == irelend)
10414 {
10415 _bfd_error_handler
10416 ("%B: warning: R_NDS32_LONGJUMP5 points to unrecognized"
10417 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10418 return FALSE;
10419 }
10420
10421 /* Get the value of the symbol referred to by the reloc. */
10422 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10423 &pic_ext_target);
10424
10425 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10426 || foff >= CONSERVATIVE_16BIT_S1)
10427 return FALSE;
10428
10429 /* Get the all corresponding instructions. */
10430 insn = bfd_getb32 (contents + laddr);
10431 /* Check instruction size. */
10432 if (insn & 0x80000000)
10433 {
10434 *seq_len = 0;
10435 insn16 = insn >> 16;
10436 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10437 }
10438 else
10439 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10440
10441 if (N32_OP6 (re_insn) == N32_OP6_BR1
10442 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10443 {
10444 /* beqs label ; 15_PCREL. */
10445 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10446 reloc = R_NDS32_15_PCREL_RELA;
10447 }
10448 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10449 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10450 {
10451 /* beqz label ; 17_PCREL. */
10452 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10453 reloc = R_NDS32_17_PCREL_RELA;
10454 }
10455 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10456 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10457 {
10458 /* beqc label ; 9_PCREL. */
10459 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10460 reloc = R_NDS32_WORD_9_PCREL_RELA;
10461 }
10462 else
10463 return FALSE;
10464
10465 /* Set all relocations. */
10466 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
10467
10468 /* Clean relocations. */
10469 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10470 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10471 {
10472 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10473 checked_types[i], laddr);
10474 if (cond_irel != irelend)
10475 {
10476 if (*seq_len == 0
10477 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10478 {
10479 /* If the branch instruction is 2 byte, it cannot remove
10480 directly. Only convert it to nop16 and remove it after
10481 checking alignment issue. */
10482 insn16 = NDS32_NOP16;
10483 bfd_putb16 (insn16, contents + laddr);
10484 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10485 }
10486 else
10487 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10488 R_NDS32_NONE);
10489 }
10490 }
10491 *insn_len = 0;
10492
10493 return TRUE;
10494 }
10495
10496 /* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
10497
10498 static bfd_boolean
10499 nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10500 Elf_Internal_Rela *internal_relocs, int *insn_len,
10501 int *seq_len, bfd_byte *contents,
10502 Elf_Internal_Sym *isymbuf,
10503 Elf_Internal_Shdr *symtab_hdr)
10504 {
10505 /* There are 5 variations for LONGJUMP6
10506 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10507 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10508 sethi ta, hi20(symbol) ; HI20/PTR
10509 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10510 jr ta ; PTR_RES/INSN16/EMPTY
10511 .L1:
10512
10513 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10514 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10515 sethi ta, hi20(symbol) ; HI20/PTR
10516 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10517 jr ta ; PTR_RES/INSN16/EMPTY
10518 .L1: */
10519
10520 enum elf_nds32_reloc_type checked_types[] =
10521 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10522 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10523
10524 int reloc_off = 0, cond_removed = 0;
10525 bfd_vma laddr;
10526 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10527 int pic_ext_target = 0;
10528 unsigned int i;
10529 bfd_signed_vma foff;
10530 uint32_t insn, re_insn = 0;
10531 uint16_t insn16, re_insn16 = 0;
10532 unsigned long reloc;
10533
10534 irelend = internal_relocs + sec->reloc_count;
10535 laddr = irel->r_offset;
10536
10537 /* Get the reloc for the address from which the register is
10538 being loaded. This reloc will tell us which function is
10539 actually being called. */
10540 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10541 R_NDS32_EMPTY, irel->r_addend);
10542
10543 if (em_irel == irelend)
10544 {
10545 _bfd_error_handler
10546 ("%B: warning: R_NDS32_LONGJUMP6 points to unrecognized"
10547 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10548 return FALSE;
10549 }
10550
10551 /* Get the value of the symbol referred to by the reloc. */
10552 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10553 &pic_ext_target);
10554
10555 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10556 || foff >= CONSERVATIVE_24BIT_S1)
10557 return FALSE;
10558
10559 insn = bfd_getb32 (contents + laddr);
10560 /* Check instruction size. */
10561 if (insn & 0x80000000)
10562 {
10563 *seq_len = 0;
10564 insn16 = insn >> 16;
10565 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10566 }
10567 else
10568 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10569
10570 /* For simplicity of coding, we are going to modify the section
10571 contents, the section relocs, and the BFD symbol table. We
10572 must tell the rest of the code not to free up this
10573 information. It would be possible to instead create a table
10574 of changes which have to be made, as is done in coff-mips.c;
10575 that would be more work, but would require less memory when
10576 the linker is run. */
10577
10578 if (N32_OP6 (re_insn) == N32_OP6_BR1
10579 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10580 {
10581 /* beqs label ; 15_PCREL */
10582 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10583 reloc = R_NDS32_15_PCREL_RELA;
10584 cond_removed = 1;
10585 }
10586 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10587 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10588 {
10589 /* beqz label ; 17_PCREL */
10590 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10591 reloc = R_NDS32_17_PCREL_RELA;
10592 cond_removed = 1;
10593 }
10594 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10595 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10596 {
10597 /* Relax to one of the following 2 variations
10598
10599 case 2-4; 1st insn convertible, 16-bit on.
10600 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10601 j label ; 25_PCREL/INSN16
10602 $1:
10603
10604 case 4-4; 1st insn not convertible
10605 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10606 j label ; 25_PCREL/INSN16
10607 .L1: */
10608
10609 /* Use j label as second instruction. */
10610 insn = INSN_J;
10611 reloc = R_NDS32_25_PCREL_RELA;
10612 bfd_putb32 (insn, contents + em_irel->r_offset);
10613 }
10614 else
10615 return FALSE;
10616
10617 /* Set all relocations. */
10618 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
10619
10620 cond_irel =
10621 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10622 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10623 cond_irel->r_addend = 1;
10624
10625 /* Use INSN16 of first branch instruction to distinguish if keeping
10626 INSN16 of final instruction or not. */
10627 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10628 R_NDS32_INSN16, irel->r_offset);
10629 if (insn_irel == irelend)
10630 {
10631 /* Clean the final INSN16. */
10632 insn_irel =
10633 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10634 R_NDS32_INSN16, em_irel->r_offset);
10635 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10636 R_NDS32_NONE);
10637 }
10638
10639 if (cond_removed == 1)
10640 {
10641 *insn_len = 0;
10642
10643 /* Clear relocations. */
10644 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10645
10646 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10647 {
10648 cond_irel =
10649 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10650 checked_types[i], laddr);
10651 if (cond_irel != irelend)
10652 {
10653 if (*seq_len == 0
10654 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10655 {
10656 /* If the branch instruction is 2 byte, it cannot remove
10657 directly. Only convert it to nop16 and remove it after
10658 checking alignment issue. */
10659 insn16 = NDS32_NOP16;
10660 bfd_putb16 (insn16, contents + laddr);
10661 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10662 }
10663 else
10664 cond_irel->r_info =
10665 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10666 }
10667 }
10668 }
10669 else
10670 {
10671 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10672 R_NDS32_LONGJUMP5);
10673 }
10674
10675 return TRUE;
10676 }
10677
10678 /* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
10679
10680 static bfd_boolean
10681 nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10682 Elf_Internal_Rela *internal_relocs, int *insn_len,
10683 int *seq_len, bfd_byte *contents,
10684 Elf_Internal_Sym *isymbuf,
10685 Elf_Internal_Shdr *symtab_hdr)
10686 {
10687 /* There are 2 variations for LONGJUMP5
10688 case 2-4; 1st insn convertible, 16-bit on.
10689 movi55 ta, imm11 ; LONGJUMP7/INSN16
10690 beq rt, ta, label ; 15_PCREL
10691
10692 case 4-4; 1st insn not convertible
10693 movi55 ta, imm11 ; LONGJUMP7/INSN16
10694 beq rt, ta, label ; 15_PCREL */
10695
10696 bfd_vma laddr;
10697 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10698 int pic_ext_target = 0;
10699 bfd_signed_vma foff;
10700 uint32_t insn, re_insn = 0;
10701 uint16_t insn16;
10702 uint32_t imm11;
10703
10704 irelend = internal_relocs + sec->reloc_count;
10705 laddr = irel->r_offset;
10706
10707 /* Get the reloc for the address from which the register is
10708 being loaded. This reloc will tell us which function is
10709 actually being called. */
10710
10711 cond_irel =
10712 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10713 R_NDS32_15_PCREL_RELA, irel->r_addend);
10714 if (cond_irel == irelend)
10715 {
10716 _bfd_error_handler
10717 ("%B: warning: R_NDS32_LONGJUMP7 points to unrecognized"
10718 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10719 return FALSE;
10720 }
10721
10722 /* Get the value of the symbol referred to by the reloc. */
10723 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10724 &pic_ext_target);
10725
10726 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10727 || foff >= CONSERVATIVE_8BIT_S1)
10728 return FALSE;
10729
10730 /* Get the first instruction for its size. */
10731 insn = bfd_getb32 (contents + laddr);
10732 if (insn & 0x80000000)
10733 {
10734 *seq_len = 0;
10735 /* Get the immediate from movi55. */
10736 imm11 = N16_IMM5S (insn >> 16);
10737 }
10738 else
10739 {
10740 /* Get the immediate from movi. */
10741 imm11 = N32_IMM20S (insn);
10742 }
10743
10744 /* Get the branch instruction. */
10745 insn = bfd_getb32 (contents + irel->r_addend);
10746 /* Convert instruction to BR3. */
10747 if ((insn >> 14) & 0x1)
10748 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10749 else
10750 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
10751
10752 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10753
10754 /* Set all relocations. */
10755 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10756 R_NDS32_WORD_9_PCREL_RELA);
10757
10758 /* Clean relocations. */
10759 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10760 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10761 R_NDS32_INSN16, irel->r_offset);
10762 if (insn_irel != irelend)
10763 {
10764 if (*seq_len == 0)
10765 {
10766 /* If the first insntruction is 16bit, convert it to nop16. */
10767 insn16 = NDS32_NOP16;
10768 bfd_putb16 (insn16, contents + laddr);
10769 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10770 }
10771 else
10772 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10773 R_NDS32_NONE);
10774 }
10775 *insn_len = 0;
10776
10777 return TRUE;
10778 }
10779
10780 #define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
10781
10782 /* Relax LOADSTORE relocation for nds32_elf_relax_section. */
10783
10784 static bfd_boolean
10785 nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10786 asection *sec, Elf_Internal_Rela *irel,
10787 Elf_Internal_Rela *internal_relocs, int *insn_len,
10788 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10789 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10790 {
10791 int eliminate_sethi = 0, range_type;
10792 unsigned int i;
10793 bfd_vma local_sda, laddr;
10794 int seq_len; /* Original length of instruction sequence. */
10795 uint32_t insn;
10796 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10797 bfd_vma access_addr = 0;
10798 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10799 enum elf_nds32_reloc_type checked_types[] =
10800 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10801 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10802 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10803 R_NDS32_TLS_LE_HI20
10804 };
10805
10806 irelend = internal_relocs + sec->reloc_count;
10807 seq_len = GET_SEQ_LEN (irel->r_addend);
10808 laddr = irel->r_offset;
10809 *insn_len = seq_len;
10810
10811 /* Get the high part relocation. */
10812 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
10813 {
10814 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10815 checked_types[i], laddr);
10816 if (hi_irelfn != irelend)
10817 break;
10818 }
10819
10820 if (hi_irelfn == irelend)
10821 {
10822 _bfd_error_handler
10823 ("%B: warning: R_NDS32_LOADSTORE points to unrecognized"
10824 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10825 return FALSE;
10826 }
10827
10828 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10829 nds32_elf_final_sda_base (sec->output_section->owner,
10830 link_info, &local_sda, FALSE);
10831
10832 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10833 {
10834 case R_NDS32_HI20_RELA:
10835 insn = bfd_getb32 (contents + laddr);
10836 access_addr =
10837 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10838
10839 if (range_type == NDS32_LOADSTORE_IMM)
10840 {
10841 struct elf_link_hash_entry *h = NULL;
10842 int indx;
10843
10844 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
10845 {
10846 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10847 h = elf_sym_hashes (abfd)[indx];
10848 }
10849
10850 if ((access_addr < CONSERVATIVE_20BIT)
10851 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10852 {
10853 eliminate_sethi = 1;
10854 break;
10855 }
10856
10857 /* This is avoid to relax symbol address which is fixed
10858 relocations. Ex: _stack. */
10859 if (h && bfd_is_abs_section (h->root.u.def.section))
10860 return FALSE;
10861 }
10862
10863 if (!load_store_relax)
10864 return FALSE;
10865
10866 /* Case for set gp register. */
10867 if (N32_RT5 (insn) == REG_GP)
10868 break;
10869
10870 if (range_type == NDS32_LOADSTORE_FLOAT_S
10871 || range_type == NDS32_LOADSTORE_FLOAT_S)
10872 {
10873 range_l = sdata_range[0][0];
10874 range_h = sdata_range[0][1];
10875 }
10876 else
10877 {
10878 range_l = sdata_range[1][0];
10879 range_h = sdata_range[1][1];
10880 }
10881 break;
10882
10883 case R_NDS32_GOT_HI20:
10884 access_addr =
10885 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10886
10887 /* If this symbol is not in .got, the return value will be -1.
10888 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10889 a negative offset is allowed. */
10890 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10891 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10892 eliminate_sethi = 1;
10893 break;
10894
10895 case R_NDS32_PLT_GOTREL_HI20:
10896 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10897 hi_irelfn, symtab_hdr);
10898
10899 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10900 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10901 eliminate_sethi = 1;
10902 break;
10903
10904 case R_NDS32_GOTOFF_HI20:
10905 access_addr =
10906 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10907
10908 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10909 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10910 eliminate_sethi = 1;
10911 break;
10912
10913 case R_NDS32_GOTPC_HI20:
10914 /* The access_addr must consider r_addend of hi_irel. */
10915 access_addr = sec->output_section->vma + sec->output_offset
10916 + irel->r_offset + hi_irelfn->r_addend;
10917
10918 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10919 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10920 eliminate_sethi = 1;
10921 break;
10922
10923 case R_NDS32_TLS_LE_HI20:
10924 access_addr =
10925 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10926 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10927 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10928 if ((range_type == NDS32_LOADSTORE_IMM)
10929 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10930 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10931 eliminate_sethi = 1;
10932 break;
10933
10934 default:
10935 return FALSE;
10936 }
10937
10938 /* Delete sethi instruction. */
10939 if (eliminate_sethi == 1
10940 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10941 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10942 {
10943 hi_irelfn->r_info =
10944 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10945 irel->r_info =
10946 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10947 *insn_len = 0;
10948 }
10949 return TRUE;
10950 }
10951
10952 /* Relax LO12 relocation for nds32_elf_relax_section. */
10953
10954 static void
10955 nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10956 asection *sec, Elf_Internal_Rela *irel,
10957 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10958 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10959 {
10960 uint32_t insn;
10961 bfd_vma local_sda, laddr;
10962 unsigned long reloc;
10963 bfd_vma access_addr;
10964 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10965 Elf_Internal_Rela *irelfn = NULL, *irelend;
10966 struct elf_link_hash_entry *h = NULL;
10967 int indx;
10968
10969 /* For SDA base relative relaxation. */
10970 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10971 &local_sda, FALSE);
10972
10973 irelend = internal_relocs + sec->reloc_count;
10974 laddr = irel->r_offset;
10975 insn = bfd_getb32 (contents + laddr);
10976
10977 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10978 return;
10979
10980 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10981
10982 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10983 {
10984 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10985 h = elf_sym_hashes (abfd)[indx];
10986 }
10987
10988 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10989 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10990 {
10991 reloc = R_NDS32_20_RELA;
10992 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10993 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10994 bfd_putb32 (insn, contents + laddr);
10995 }
10996 /* This is avoid to relax symbol address which is fixed
10997 relocations. Ex: _stack. */
10998 else if (N32_OP6 (insn) == N32_OP6_ORI
10999 && h && bfd_is_abs_section (h->root.u.def.section))
11000 return;
11001 else
11002 {
11003 range_l = sdata_range[1][0];
11004 range_h = sdata_range[1][1];
11005 switch (ELF32_R_TYPE (irel->r_info))
11006 {
11007 case R_NDS32_LO12S0_RELA:
11008 reloc = R_NDS32_SDA19S0_RELA;
11009 break;
11010 case R_NDS32_LO12S1_RELA:
11011 reloc = R_NDS32_SDA18S1_RELA;
11012 break;
11013 case R_NDS32_LO12S2_RELA:
11014 reloc = R_NDS32_SDA17S2_RELA;
11015 break;
11016 case R_NDS32_LO12S2_DP_RELA:
11017 range_l = sdata_range[0][0];
11018 range_h = sdata_range[0][1];
11019 reloc = R_NDS32_SDA12S2_DP_RELA;
11020 break;
11021 case R_NDS32_LO12S2_SP_RELA:
11022 range_l = sdata_range[0][0];
11023 range_h = sdata_range[0][1];
11024 reloc = R_NDS32_SDA12S2_SP_RELA;
11025 break;
11026 default:
11027 return;
11028 }
11029
11030 /* There are range_h and range_l because linker has to promise
11031 all sections move cross one page together. */
11032 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
11033 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
11034 {
11035 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
11036 {
11037 /* Maybe we should add R_NDS32_INSN16 reloc type here
11038 or manually do some optimization. sethi can't be
11039 eliminated when updating $gp so the relative ori
11040 needs to be preserved. */
11041 return;
11042 }
11043 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
11044 &insn))
11045 return;
11046 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11047 bfd_putb32 (insn, contents + laddr);
11048
11049 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11050 R_NDS32_INSN16);
11051 /* SDA17 must keep INSN16 for converting fp_as_gp. */
11052 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
11053 irelfn->r_info =
11054 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
11055
11056 }
11057 }
11058 return;
11059 }
11060
11061 /* Relax low part of PIC instruction pattern. */
11062
11063 static void
11064 nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
11065 asection *sec, Elf_Internal_Rela *irel,
11066 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11067 Elf_Internal_Shdr *symtab_hdr)
11068 {
11069 uint32_t insn;
11070 bfd_vma local_sda, laddr;
11071 bfd_signed_vma foff;
11072 unsigned long reloc;
11073
11074 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11075 &local_sda, FALSE);
11076 laddr = irel->r_offset;
11077 insn = bfd_getb32 (contents + laddr);
11078
11079 if (N32_OP6 (insn) != N32_OP6_ORI)
11080 return;
11081
11082 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
11083 {
11084 foff = calculate_got_memory_address (abfd, link_info, irel,
11085 symtab_hdr) - local_sda;
11086 reloc = R_NDS32_GOT20;
11087 }
11088 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
11089 {
11090 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
11091 symtab_hdr) - local_sda;
11092 reloc = R_NDS32_PLT_GOTREL_LO20;
11093 }
11094 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
11095 {
11096 foff = calculate_memory_address (abfd, irel, isymbuf,
11097 symtab_hdr) - local_sda;
11098 reloc = R_NDS32_GOTOFF;
11099 }
11100 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
11101 {
11102 foff = local_sda - sec->output_section->vma + sec->output_offset
11103 + irel->r_offset + irel->r_addend;
11104 reloc = R_NDS32_GOTPC20;
11105 }
11106 else
11107 return;
11108
11109 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
11110 {
11111 /* Turn into MOVI. */
11112 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11113 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11114 bfd_putb32 (insn, contents + laddr);
11115 }
11116 }
11117
11118 /* Relax low part of LE TLS instruction pattern. */
11119
11120 static void
11121 nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
11122 Elf_Internal_Rela *irel,
11123 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11124 Elf_Internal_Shdr *symtab_hdr)
11125 {
11126 uint32_t insn;
11127 bfd_vma laddr;
11128 bfd_signed_vma foff;
11129 unsigned long reloc;
11130
11131 laddr = irel->r_offset;
11132 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11133 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11134 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11135 insn = bfd_getb32 (contents + laddr);
11136
11137 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
11138 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
11139 {
11140 /* Pattern sethi-ori transform to movi. */
11141 reloc = R_NDS32_TLS_LE_20;
11142 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11143 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11144 bfd_putb32 (insn, contents + laddr);
11145 }
11146 }
11147
11148 /* Relax LE TLS calculate address instruction pattern. */
11149
11150 static void
11151 nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
11152 asection *sec, Elf_Internal_Rela *irel,
11153 Elf_Internal_Rela *internal_relocs,
11154 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11155 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11156 {
11157 /* Local TLS non-pic
11158 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
11159 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
11160 add ra, ta, tp ; TLS_LE_ADD */
11161
11162 uint32_t insn;
11163 bfd_vma laddr;
11164 bfd_signed_vma foff;
11165 Elf_Internal_Rela *i1_irelfn, *irelend;
11166
11167 irelend = internal_relocs + sec->reloc_count;
11168 laddr = irel->r_offset;
11169 insn = bfd_getb32 (contents + laddr);
11170 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11171 R_NDS32_PTR_RESOLVED);
11172 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11173 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11174 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11175
11176 /* The range is +/-16k. */
11177 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11178 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11179 {
11180 /* Transform add to addi. */
11181 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
11182 irel->r_info =
11183 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11184
11185 bfd_putb32 (insn, contents + laddr);
11186 if (i1_irelfn != irelend)
11187 {
11188 i1_irelfn->r_addend |= 1;
11189 *again = TRUE;
11190 }
11191 }
11192 }
11193
11194 /* Relax LE TLS load store instruction pattern. */
11195
11196 static void
11197 nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
11198 asection *sec, Elf_Internal_Rela *irel,
11199 Elf_Internal_Rela *internal_relocs,
11200 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11201 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11202 {
11203
11204 uint32_t insn;
11205 bfd_vma laddr;
11206 bfd_signed_vma foff;
11207 Elf_Internal_Rela *i1_irelfn, *irelend;
11208 int success = 0;
11209
11210 irelend = internal_relocs + sec->reloc_count;
11211 laddr = irel->r_offset;
11212 insn = bfd_getb32 (contents + laddr);
11213 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11214 R_NDS32_PTR_RESOLVED);
11215 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11216 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11217 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11218
11219 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
11220 {
11221 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11222 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11223 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11224 /* The range is +/-16k. */
11225 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11226 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11227 {
11228 insn =
11229 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11230 irel->r_info =
11231 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11232 success = 1;
11233 break;
11234 }
11235 /* Fall through. */
11236 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11237 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11238 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11239 /* The range is +/-32k. */
11240 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
11241 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
11242 {
11243 insn =
11244 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11245 irel->r_info =
11246 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
11247 success = 1;
11248 break;
11249 }
11250 /* Fall through. */
11251 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11252 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11253 /* The range is +/-64k. */
11254 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
11255 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
11256 {
11257 insn =
11258 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11259 irel->r_info =
11260 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
11261 success = 1;
11262 break;
11263 }
11264 /* Fall through. */
11265 default:
11266 break;
11267 }
11268
11269 if (success)
11270 {
11271 bfd_putb32 (insn, contents + laddr);
11272 if (i1_irelfn != irelend)
11273 {
11274 i1_irelfn->r_addend |= 1;
11275 *again = TRUE;
11276 }
11277 }
11278 }
11279
11280 /* Relax PTR relocation for nds32_elf_relax_section. */
11281
11282 static bfd_boolean
11283 nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11284 Elf_Internal_Rela *internal_relocs, int *insn_len,
11285 int *seq_len, bfd_byte *contents)
11286 {
11287 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
11288
11289 irelend = internal_relocs + sec->reloc_count;
11290
11291 re_irel =
11292 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11293 R_NDS32_PTR_RESOLVED, irel->r_addend);
11294
11295 if (re_irel == irelend)
11296 {
11297 _bfd_error_handler
11298 ("%B: warning: R_NDS32_PTR points to unrecognized reloc at 0x%lx.",
11299 abfd, (long) irel->r_offset);
11300 return FALSE;
11301 }
11302
11303 if (re_irel->r_addend != 1)
11304 return FALSE;
11305
11306 /* Pointed target is relaxed and no longer needs this void *,
11307 change the type to NONE. */
11308 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11309
11310 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11311 not exist, it means only count 1 and remove it directly. */
11312 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11313 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11314 R_NDS32_PTR_COUNT);
11315 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11316 R_NDS32_PTR);
11317 if (count_irel != irelend)
11318 {
11319 if (--count_irel->r_addend > 0)
11320 return FALSE;
11321 }
11322
11323 if (ptr_irel != irelend)
11324 return FALSE;
11325
11326 /* If the PTR_COUNT is already 0, remove current instruction. */
11327 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11328 *insn_len = 0;
11329 return TRUE;
11330 }
11331
11332 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11333
11334 static void
11335 nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11336 asection *sec, Elf_Internal_Rela *irel,
11337 Elf_Internal_Rela *internal_relocs,
11338 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11339 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11340 {
11341 uint32_t insn;
11342 bfd_signed_vma foff;
11343 Elf_Internal_Rela *i1_irelfn, *irelend;
11344 bfd_vma local_sda, laddr;
11345
11346 irelend = internal_relocs + sec->reloc_count;
11347 laddr = irel->r_offset;
11348 insn = bfd_getb32 (contents + laddr);
11349
11350 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11351 we need additional space. It might be help if we could
11352 borrow some space from instructions to be eliminated
11353 such as sethi, ori, add. */
11354 if (insn & 0x80000000)
11355 return;
11356
11357 if (nds32_elf_check_dup_relocs
11358 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11359 return;
11360
11361 i1_irelfn =
11362 find_relocs_at_address (irel, internal_relocs, irelend,
11363 R_NDS32_PTR_RESOLVED);
11364
11365 /* FIXIT 090606
11366 The boundary should be reduced since the .plt section hasn't
11367 been created and the address of specific entry is still unknown
11368 Maybe the range between the function call and the begin of the
11369 .text section can be used to decide if the .plt is in the range
11370 of function call. */
11371
11372 if (N32_OP6 (insn) == N32_OP6_ALU1
11373 && N32_SUB5 (insn) == N32_ALU1_ADD)
11374 {
11375 /* Get the value of the symbol referred to by the reloc. */
11376 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11377 &local_sda, FALSE);
11378 foff = (bfd_signed_vma) (calculate_plt_memory_address
11379 (abfd, link_info, isymbuf, irel,
11380 symtab_hdr) - local_sda);
11381 /* This condition only happened when symbol is undefined. */
11382 if (foff == 0)
11383 return;
11384
11385 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11386 return;
11387 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11388 R_NDS32_PLT_GOTREL_LO19);
11389 /* addi.gp */
11390 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11391 }
11392 else if (N32_OP6 (insn) == N32_OP6_JREG
11393 && N32_SUB5 (insn) == N32_JREG_JRAL)
11394 {
11395 /* Get the value of the symbol referred to by the reloc. */
11396 foff =
11397 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11398 /* This condition only happened when symbol is undefined. */
11399 if (foff == 0)
11400 return;
11401 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11402 return;
11403 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11404 insn = INSN_JAL;
11405 }
11406 else
11407 return;
11408
11409 bfd_putb32 (insn, contents + laddr);
11410 if (i1_irelfn != irelend)
11411 {
11412 i1_irelfn->r_addend |= 1;
11413 *again = TRUE;
11414 }
11415 }
11416
11417 /* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11418
11419 static void
11420 nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11421 asection *sec, Elf_Internal_Rela *irel,
11422 Elf_Internal_Rela *internal_relocs,
11423 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11424 bfd_boolean *again)
11425 {
11426 uint32_t insn;
11427 bfd_signed_vma foff;
11428 Elf_Internal_Rela *i1_irelfn, *irelend;
11429 bfd_vma local_sda, laddr;
11430
11431 irelend = internal_relocs + sec->reloc_count;
11432 laddr = irel->r_offset;
11433 insn = bfd_getb32 (contents + laddr);
11434 if (insn & 0x80000000)
11435 return;
11436
11437 if (nds32_elf_check_dup_relocs
11438 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11439 return;
11440
11441 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11442 R_NDS32_PTR_RESOLVED);
11443
11444 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11445 &local_sda, FALSE);
11446 foff = calculate_got_memory_address (abfd, link_info, irel,
11447 symtab_hdr) - local_sda;
11448
11449 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11450 {
11451 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11452 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11453 irel->r_info =
11454 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11455 bfd_putb32 (insn, contents + laddr);
11456 if (i1_irelfn != irelend)
11457 {
11458 i1_irelfn->r_addend |= 1;
11459 *again = TRUE;
11460 }
11461 }
11462 }
11463
11464 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11465
11466 static void
11467 nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11468 asection *sec, Elf_Internal_Rela *irel,
11469 Elf_Internal_Rela *internal_relocs,
11470 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11471 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11472 {
11473 int opc_insn_gotoff;
11474 uint32_t insn;
11475 bfd_signed_vma foff;
11476 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11477 bfd_vma local_sda, laddr;
11478
11479 irelend = internal_relocs + sec->reloc_count;
11480 laddr = irel->r_offset;
11481 insn = bfd_getb32 (contents + laddr);
11482
11483 if (insn & 0x80000000)
11484 return;
11485
11486 if (nds32_elf_check_dup_relocs
11487 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11488 return;
11489
11490 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11491 R_NDS32_PTR_RESOLVED);
11492 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11493 &local_sda, FALSE);
11494 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11495 foff = foff - local_sda;
11496
11497 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11498 return;
11499
11500 /* Concatenate opcode and sub-opcode for switch case.
11501 It may be MEM or ALU1. */
11502 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11503 switch (opc_insn_gotoff)
11504 {
11505 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11506 /* 4-byte aligned. */
11507 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11508 irel->r_info =
11509 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11510 break;
11511 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11512 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11513 irel->r_info =
11514 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11515 break;
11516 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11517 /* 2-byte aligned. */
11518 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11519 irel->r_info =
11520 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11521 break;
11522 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11523 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
11524 irel->r_info =
11525 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11526 break;
11527 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11528 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
11529 irel->r_info =
11530 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11531 break;
11532 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11533 /* 1-byte aligned. */
11534 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11535 irel->r_info =
11536 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11537 break;
11538 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11539 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
11540 irel->r_info =
11541 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11542 break;
11543 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11544 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11545 irel->r_info =
11546 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11547 break;
11548 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
11549 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11550 irel->r_info =
11551 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11552 break;
11553 default:
11554 return;
11555 }
11556
11557 bfd_putb32 (insn, contents + laddr);
11558 if (i1_irelfn != irelend)
11559 {
11560 i1_irelfn->r_addend |= 1;
11561 *again = TRUE;
11562 }
11563 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11564 R_NDS32_INSN16)) != irelend)
11565 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11566
11567 }
11568
11569 static bfd_boolean
11570 nds32_relax_adjust_label (bfd *abfd, asection *sec,
11571 Elf_Internal_Rela *internal_relocs,
11572 bfd_byte *contents,
11573 nds32_elf_blank_t **relax_blank_list,
11574 int optimize, int opt_size)
11575 {
11576 /* This code block is used to adjust 4-byte alignment by relax a pair
11577 of instruction a time.
11578
11579 It recognizes three types of relocations.
11580 1. R_NDS32_LABEL - a aligment.
11581 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11582 3. is_16bit_NOP () - remove a 16-bit instruction. */
11583
11584 /* TODO: It seems currently implementation only support 4-byte aligment.
11585 We should handle any-aligment. */
11586
11587 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11588 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11589 Elf_Internal_Rela rel_temp;
11590 Elf_Internal_Rela *irelend;
11591 bfd_vma address;
11592 uint16_t insn16;
11593
11594 /* Checking for branch relaxation relies on the relocations to
11595 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11596 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11597 sizeof (Elf_Internal_Rela), compar_reloc);
11598
11599 irelend = internal_relocs + sec->reloc_count;
11600
11601 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11602 /* FIXME: Can we generate the right order in assembler?
11603 So we don't have to swapping them here. */
11604
11605 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11606 label_rel < irelend; label_rel++)
11607 {
11608 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11609 continue;
11610
11611 /* Find the first reloc has the same offset with label_rel. */
11612 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11613 insn_rel++;
11614
11615 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11616 insn_rel++)
11617 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11618 address. */
11619 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11620 break;
11621
11622 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11623 && insn_rel < label_rel)
11624 {
11625 /* Swap the two reloc if the R_NDS32_INSN16 is
11626 before R_NDS32_LABEL. */
11627 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11628 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11629 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11630 }
11631 }
11632
11633 label_rel = NULL;
11634 insn_rel = NULL;
11635 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11636 or higher, remove other R_NDS32_LABEL with lower alignment.
11637 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11638 then the R_NDS32_LABEL sequence is broke. */
11639 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11640 {
11641 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11642 {
11643 if (label_rel == NULL)
11644 {
11645 if (tmp_rel->r_addend < 2)
11646 label_rel = tmp_rel;
11647 continue;
11648 }
11649 else if (tmp_rel->r_addend > 1)
11650 {
11651 /* Remove all LABEL relocation from label_rel to tmp_rel
11652 including relocations with same offset as tmp_rel. */
11653 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11654 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11655 {
11656 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11657 && tmp2_rel->r_addend < 2)
11658 tmp2_rel->r_info =
11659 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11660 R_NDS32_NONE);
11661 }
11662 label_rel = NULL;
11663 }
11664 }
11665 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11666 {
11667 /* A new INSN16 which can be converted, so clear label_rel. */
11668 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11669 irelend, &insn16)
11670 || is_16bit_NOP (abfd, sec, tmp_rel))
11671 label_rel = NULL;
11672 }
11673 }
11674
11675 label_rel = NULL;
11676 insn_rel = NULL;
11677 /* Optimized for speed and nothing has not been relaxed.
11678 It's time to align labels.
11679 We may convert a 16-bit instruction right before a label to
11680 32-bit, in order to align the label if necessary
11681 all reloc entries has been sorted by r_offset. */
11682 for (irel = internal_relocs; irel < irelend; irel++)
11683 {
11684 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11685 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11686 continue;
11687
11688 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11689 {
11690 /* A new INSN16 found, resize the old one. */
11691 if (is_convert_32_to_16
11692 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11693 || is_16bit_NOP (abfd, sec, irel))
11694 {
11695 if (insn_rel)
11696 {
11697 /* Previous INSN16 reloc exists, reduce its
11698 size to 16-bit. */
11699 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11700 irelend, &insn16))
11701 {
11702 nds32_elf_write_16 (abfd, contents, insn_rel,
11703 internal_relocs, irelend, insn16);
11704
11705 if (!insert_nds32_elf_blank_recalc_total
11706 (relax_blank_list, insn_rel->r_offset + 2, 2))
11707 return FALSE;
11708 }
11709 else if (is_16bit_NOP (abfd, sec, insn_rel))
11710 {
11711 if (!insert_nds32_elf_blank_recalc_total
11712 (relax_blank_list, insn_rel->r_offset, 2))
11713 return FALSE;
11714 }
11715 insn_rel->r_info =
11716 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11717 }
11718 /* Save the new one for later use. */
11719 insn_rel = irel;
11720 }
11721 else
11722 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11723 R_NDS32_NONE);
11724 }
11725 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11726 {
11727 /* Search for label. */
11728 int force_relax = 0;
11729
11730 /* Label on 16-bit instruction or optimization
11731 needless, just reset this reloc. */
11732 insn16 = bfd_getb16 (contents + irel->r_offset);
11733 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11734 {
11735 irel->r_info =
11736 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11737 continue;
11738 }
11739
11740 address =
11741 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11742 irel->r_offset, 1);
11743
11744 if (!insn_rel)
11745 {
11746 /* Check if there is case which can not be aligned. */
11747 if (irel->r_addend == 2 && address & 0x2)
11748 return FALSE;
11749 continue;
11750 }
11751
11752 /* Try to align this label. */
11753
11754 if ((irel->r_addend & 0x1f) < 2)
11755 {
11756 /* Check if there is a INSN16 at the same address.
11757 Label_rel always seats before insn_rel after
11758 our sort. */
11759
11760 /* Search for INSN16 at LABEL location. If INSN16 is at
11761 same location and this LABEL alignment is lower than 2,
11762 the INSN16 can be converted to 2-byte. */
11763 for (tmp_rel = irel;
11764 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11765 tmp_rel++)
11766 {
11767 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11768 && (is_convert_32_to_16
11769 (abfd, sec, tmp_rel, internal_relocs,
11770 irelend, &insn16)
11771 || is_16bit_NOP (abfd, sec, tmp_rel)))
11772 {
11773 force_relax = 1;
11774 break;
11775 }
11776 }
11777 }
11778
11779 if (force_relax || irel->r_addend == 1 || address & 0x2)
11780 {
11781 /* Label not aligned. */
11782 /* Previous reloc exists, reduce its size to 16-bit. */
11783 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11784 internal_relocs, irelend, &insn16))
11785 {
11786 nds32_elf_write_16 (abfd, contents, insn_rel,
11787 internal_relocs, irelend, insn16);
11788
11789 if (!insert_nds32_elf_blank_recalc_total
11790 (relax_blank_list, insn_rel->r_offset + 2, 2))
11791 return FALSE;
11792 }
11793 else if (is_16bit_NOP (abfd, sec, insn_rel))
11794 {
11795 if (!insert_nds32_elf_blank_recalc_total
11796 (relax_blank_list, insn_rel->r_offset, 2))
11797 return FALSE;
11798 }
11799
11800 }
11801 /* INSN16 reloc is used. */
11802 insn_rel = NULL;
11803 }
11804 }
11805
11806 address =
11807 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11808 if (insn_rel && (address & 0x2 || opt_size))
11809 {
11810 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11811 irelend, &insn16))
11812 {
11813 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11814 irelend, insn16);
11815 if (!insert_nds32_elf_blank_recalc_total
11816 (relax_blank_list, insn_rel->r_offset + 2, 2))
11817 return FALSE;
11818 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11819 R_NDS32_NONE);
11820 }
11821 else if (is_16bit_NOP (abfd, sec, insn_rel))
11822 {
11823 if (!insert_nds32_elf_blank_recalc_total
11824 (relax_blank_list, insn_rel->r_offset, 2))
11825 return FALSE;
11826 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11827 R_NDS32_NONE);
11828 }
11829 }
11830 insn_rel = NULL;
11831 return TRUE;
11832 }
11833
11834 /* Pick relaxation round. */
11835
11836 static int
11837 nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11838 struct elf_nds32_link_hash_table *table,
11839 struct bfd_link_info *link_info)
11840 {
11841 static asection *final_sec, *first_sec = NULL;
11842 static bfd_boolean normal_again = FALSE;
11843 static bfd_boolean set = FALSE;
11844 static bfd_boolean first = TRUE;
11845 int round_table[] = {
11846 NDS32_RELAX_NORMAL_ROUND,
11847 NDS32_RELAX_JUMP_IFC_ROUND,
11848 NDS32_RELAX_EX9_BUILD_ROUND,
11849 NDS32_RELAX_EX9_REPLACE_ROUND,
11850 };
11851 static int pass = 0;
11852 static int relax_round;
11853
11854 /* The new round. */
11855 if (init && first_sec == sec)
11856 {
11857 set = TRUE;
11858 normal_again = FALSE;
11859 }
11860
11861 if (first)
11862 {
11863 /* Run an empty run to get the final section. */
11864 relax_round = NDS32_RELAX_EMPTY_ROUND;
11865
11866 /* It has to enter relax again because we can
11867 not make sure what the final turn is. */
11868 *again = TRUE;
11869
11870 first = FALSE;
11871 first_sec = sec;
11872 }
11873
11874 if (!set)
11875 {
11876 /* Not reenter yet. */
11877 final_sec = sec;
11878 return relax_round;
11879 }
11880
11881 relax_round = round_table[pass];
11882
11883 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11884 normal_again = TRUE;
11885
11886 if (!init && final_sec == sec)
11887 {
11888 switch (relax_round)
11889 {
11890 case NDS32_RELAX_NORMAL_ROUND:
11891 if (!normal_again)
11892 {
11893 /* Normal relaxation done. */
11894 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11895 {
11896 pass++;
11897 *again = TRUE;
11898 }
11899 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11900 {
11901 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11902 *again = TRUE;
11903 }
11904 else if (table->ex9_import_file)
11905 {
11906 /* Import ex9 table. */
11907 if (table->update_ex9_table)
11908 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11909 else
11910 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11911 nds32_elf_ex9_import_table (link_info);
11912 *again = TRUE;
11913 }
11914 }
11915 break;
11916 case NDS32_RELAX_JUMP_IFC_ROUND:
11917 if (!nds32_elf_ifc_finish (link_info))
11918 _bfd_error_handler (_("error: Jump IFC Fail."));
11919 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11920 {
11921 pass++;
11922 *again = TRUE;
11923 }
11924 break;
11925 case NDS32_RELAX_EX9_BUILD_ROUND:
11926 nds32_elf_ex9_finish (link_info);
11927 pass++;
11928 *again = TRUE;
11929 break;
11930 case NDS32_RELAX_EX9_REPLACE_ROUND:
11931 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11932 {
11933 /* Do jump IFC optimization again. */
11934 if (!nds32_elf_ifc_finish (link_info))
11935 _bfd_error_handler (_("error: Jump IFC Fail."));
11936 }
11937 break;
11938 default:
11939 break;
11940 }
11941 }
11942
11943 return relax_round;
11944 }
11945
11946 static bfd_boolean
11947 nds32_elf_relax_section (bfd *abfd, asection *sec,
11948 struct bfd_link_info *link_info, bfd_boolean *again)
11949 {
11950 nds32_elf_blank_t *relax_blank_list = NULL;
11951 Elf_Internal_Shdr *symtab_hdr;
11952 Elf_Internal_Rela *internal_relocs;
11953 Elf_Internal_Rela *irel;
11954 Elf_Internal_Rela *irelend;
11955 Elf_Internal_Sym *isymbuf = NULL;
11956 bfd_byte *contents = NULL;
11957 bfd_boolean result = TRUE;
11958 int optimize = 0;
11959 int opt_size = 0;
11960 uint32_t insn;
11961 uint16_t insn16;
11962
11963 /* Target dependnet option. */
11964 struct elf_nds32_link_hash_table *table;
11965 int load_store_relax;
11966 int relax_round;
11967
11968 relax_blank_list = NULL;
11969
11970 *again = FALSE;
11971
11972 /* Nothing to do for
11973 * relocatable link or
11974 * non-relocatable section or
11975 * non-code section or
11976 * empty content or
11977 * no reloc entry. */
11978 if (bfd_link_relocatable (link_info)
11979 || (sec->flags & SEC_RELOC) == 0
11980 || (sec->flags & SEC_EXCLUDE) == 1
11981 || (sec->flags & SEC_CODE) == 0
11982 || sec->size == 0)
11983 return TRUE;
11984
11985 /* 09.12.11 Workaround. */
11986 /* We have to adjust align for R_NDS32_LABEL if needed.
11987 The adjust approach only can fix 2-byte align once. */
11988 if (sec->alignment_power > 2)
11989 return TRUE;
11990
11991 /* The optimization type to do. */
11992
11993 table = nds32_elf_hash_table (link_info);
11994 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11995 switch (relax_round)
11996 {
11997 case NDS32_RELAX_JUMP_IFC_ROUND:
11998 /* Here is the entrance of ifc jump relaxation. */
11999 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
12000 return FALSE;
12001 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12002 return TRUE;
12003
12004 case NDS32_RELAX_EX9_BUILD_ROUND:
12005 /* Here is the entrance of ex9 relaxation. There are two pass of
12006 ex9 relaxation. The one is to traverse all instructions and build
12007 the hash table. The other one is to compare instructions and replace
12008 it by ex9.it. */
12009 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
12010 return FALSE;
12011 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12012 return TRUE;
12013
12014 case NDS32_RELAX_EX9_REPLACE_ROUND:
12015 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
12016 return FALSE;
12017 return TRUE;
12018
12019 case NDS32_RELAX_EMPTY_ROUND:
12020 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12021 return TRUE;
12022
12023 case NDS32_RELAX_NORMAL_ROUND:
12024 default:
12025 if (sec->reloc_count == 0)
12026 return TRUE;
12027 break;
12028 }
12029
12030 /* The begining of general relaxation. */
12031
12032 if (is_SDA_BASE_set == 0)
12033 {
12034 bfd_vma gp;
12035 is_SDA_BASE_set = 1;
12036 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
12037 &gp, FALSE);
12038 relax_range_measurement (abfd);
12039 }
12040
12041 if (is_ITB_BASE_set == 0)
12042 {
12043 /* Set the _ITB_BASE_. */
12044 if (!nds32_elf_ex9_itb_base (link_info))
12045 {
12046 _bfd_error_handler (_("%B: error: Cannot set _ITB_BASE_"), abfd);
12047 bfd_set_error (bfd_error_bad_value);
12048 }
12049 }
12050
12051 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12052 /* Relocations MUST be kept in memory, because relaxation adjust them. */
12053 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12054 TRUE /* keep_memory */);
12055 if (internal_relocs == NULL)
12056 goto error_return;
12057
12058 irelend = internal_relocs + sec->reloc_count;
12059 irel = find_relocs_at_address (internal_relocs, internal_relocs,
12060 irelend, R_NDS32_RELAX_ENTRY);
12061
12062 if (irel == irelend)
12063 return TRUE;
12064
12065 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
12066 {
12067 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
12068 {
12069 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12070 return TRUE;
12071 }
12072
12073 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
12074 optimize = 1;
12075
12076 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
12077 opt_size = 1;
12078 }
12079
12080 load_store_relax = table->load_store_relax;
12081
12082 /* Get symbol table and section content. */
12083 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
12084 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12085 goto error_return;
12086
12087 /* Do relax loop only when finalize is not done.
12088 Take care of relaxable relocs except INSN16. */
12089 for (irel = internal_relocs; irel < irelend; irel++)
12090 {
12091 int seq_len; /* Original length of instruction sequence. */
12092 int insn_len = 0; /* Final length of instruction sequence. */
12093 bfd_boolean removed;
12094
12095 insn = 0;
12096 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12097 && (irel->r_addend & 0x1f) >= 2)
12098 optimize = 1;
12099
12100 /* Relocation Types
12101 R_NDS32_LONGCALL1 53
12102 R_NDS32_LONGCALL2 54
12103 R_NDS32_LONGCALL3 55
12104 R_NDS32_LONGJUMP1 56
12105 R_NDS32_LONGJUMP2 57
12106 R_NDS32_LONGJUMP3 58
12107 R_NDS32_LOADSTORE 59 */
12108 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
12109 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
12110 seq_len = GET_SEQ_LEN (irel->r_addend);
12111
12112 /* Relocation Types
12113 R_NDS32_LONGCALL4 107
12114 R_NDS32_LONGCALL5 108
12115 R_NDS32_LONGCALL6 109
12116 R_NDS32_LONGJUMP4 110
12117 R_NDS32_LONGJUMP5 111
12118 R_NDS32_LONGJUMP6 112
12119 R_NDS32_LONGJUMP7 113 */
12120 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
12121 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
12122 seq_len = 4;
12123
12124 /* Relocation Types
12125 R_NDS32_LO12S0_RELA 30
12126 R_NDS32_LO12S1_RELA 29
12127 R_NDS32_LO12S2_RELA 28
12128 R_NDS32_LO12S2_SP_RELA 71
12129 R_NDS32_LO12S2_DP_RELA 70
12130 R_NDS32_GOT_LO12 46
12131 R_NDS32_GOTOFF_LO12 50
12132 R_NDS32_PLTREL_LO12 65
12133 R_NDS32_PLT_GOTREL_LO12 67
12134 R_NDS32_17IFC_PCREL_RELA 96
12135 R_NDS32_GOT_SUFF 193
12136 R_NDS32_GOTOFF_SUFF 194
12137 R_NDS32_PLT_GOT_SUFF 195
12138 R_NDS32_MULCALL_SUFF 196
12139 R_NDS32_PTR 197 */
12140 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
12141 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
12142 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
12143 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
12144 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
12145 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
12146 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
12147 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
12148 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
12149 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
12150 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
12151 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12152 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
12153 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
12154 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
12155 seq_len = 0;
12156 else
12157 continue;
12158
12159 insn_len = seq_len;
12160 removed = FALSE;
12161
12162 switch (ELF32_R_TYPE (irel->r_info))
12163 {
12164 case R_NDS32_LONGCALL1:
12165 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
12166 &insn_len, contents, isymbuf,
12167 symtab_hdr);
12168 break;
12169 case R_NDS32_LONGCALL2:
12170 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
12171 &insn_len, contents, isymbuf,
12172 symtab_hdr);
12173 break;
12174 case R_NDS32_LONGCALL3:
12175 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
12176 &insn_len, contents, isymbuf,
12177 symtab_hdr);
12178 break;
12179 case R_NDS32_LONGJUMP1:
12180 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
12181 &insn_len, contents, isymbuf,
12182 symtab_hdr);
12183 break;
12184 case R_NDS32_LONGJUMP2:
12185 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
12186 &insn_len, contents, isymbuf,
12187 symtab_hdr);
12188 break;
12189 case R_NDS32_LONGJUMP3:
12190 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
12191 &insn_len, contents, isymbuf,
12192 symtab_hdr);
12193 break;
12194 case R_NDS32_LONGCALL4:
12195 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
12196 &insn_len, contents, isymbuf,
12197 symtab_hdr);
12198 break;
12199 case R_NDS32_LONGCALL5:
12200 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12201 &insn_len, contents, isymbuf,
12202 symtab_hdr);
12203 break;
12204 case R_NDS32_LONGCALL6:
12205 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12206 &insn_len, contents, isymbuf,
12207 symtab_hdr);
12208 break;
12209 case R_NDS32_LONGJUMP4:
12210 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12211 &insn_len, contents, isymbuf,
12212 symtab_hdr);
12213 break;
12214 case R_NDS32_LONGJUMP5:
12215 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12216 &insn_len, &seq_len, contents,
12217 isymbuf, symtab_hdr);
12218 break;
12219 case R_NDS32_LONGJUMP6:
12220 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12221 &insn_len, &seq_len, contents,
12222 isymbuf, symtab_hdr);
12223 break;
12224 case R_NDS32_LONGJUMP7:
12225 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12226 &insn_len, &seq_len, contents,
12227 isymbuf, symtab_hdr);
12228 break;
12229 case R_NDS32_LOADSTORE:
12230 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12231 internal_relocs, &insn_len,
12232 contents, isymbuf, symtab_hdr,
12233 load_store_relax);
12234 break;
12235 case R_NDS32_LO12S0_RELA:
12236 case R_NDS32_LO12S1_RELA:
12237 case R_NDS32_LO12S2_DP_RELA:
12238 case R_NDS32_LO12S2_SP_RELA:
12239 case R_NDS32_LO12S2_RELA:
12240 /* Relax for low part. */
12241 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
12242 contents, isymbuf, symtab_hdr);
12243
12244 /* It is impossible to delete blank, so just continue. */
12245 continue;
12246 case R_NDS32_GOT_LO12:
12247 case R_NDS32_GOTOFF_LO12:
12248 case R_NDS32_PLTREL_LO12:
12249 case R_NDS32_PLT_GOTREL_LO12:
12250 case R_NDS32_GOTPC_LO12:
12251 /* Relax for PIC gp-relative low part. */
12252 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
12253 isymbuf, symtab_hdr);
12254
12255 /* It is impossible to delete blank, so just continue. */
12256 continue;
12257 case R_NDS32_TLS_LE_LO12:
12258 /* Relax for LE TLS low part. */
12259 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
12260 isymbuf, symtab_hdr);
12261
12262 /* It is impossible to delete blank, so just continue. */
12263 continue;
12264 case R_NDS32_TLS_LE_ADD:
12265 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12266 contents, isymbuf, symtab_hdr, again);
12267 /* It is impossible to delete blank, so just continue. */
12268 continue;
12269 case R_NDS32_TLS_LE_LS:
12270 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12271 contents, isymbuf, symtab_hdr, again);
12272 continue;
12273 case R_NDS32_PTR:
12274 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12275 &insn_len, &seq_len, contents);
12276 break;
12277 case R_NDS32_PLT_GOT_SUFF:
12278 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12279 internal_relocs, contents,
12280 isymbuf, symtab_hdr, again);
12281 /* It is impossible to delete blank, so just continue. */
12282 continue;
12283 case R_NDS32_GOT_SUFF:
12284 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12285 internal_relocs, contents,
12286 symtab_hdr, again);
12287 /* It is impossible to delete blank, so just continue. */
12288 continue;
12289 case R_NDS32_GOTOFF_SUFF:
12290 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12291 internal_relocs, contents,
12292 isymbuf, symtab_hdr, again);
12293 /* It is impossible to delete blank, so just continue. */
12294 continue;
12295 default:
12296 continue;
12297
12298 }
12299 if (removed && seq_len - insn_len > 0)
12300 {
12301 if (!insert_nds32_elf_blank
12302 (&relax_blank_list, irel->r_offset + insn_len,
12303 seq_len - insn_len))
12304 goto error_return;
12305 *again = TRUE;
12306 }
12307 }
12308
12309 calc_nds32_blank_total (relax_blank_list);
12310
12311 if (table->relax_fp_as_gp)
12312 {
12313 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12314 irelend, isymbuf))
12315 goto error_return;
12316
12317 if (*again == FALSE)
12318 {
12319 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12320 irelend))
12321 goto error_return;
12322 }
12323 }
12324
12325 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12326
12327 if (*again == FALSE)
12328 {
12329 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12330 &relax_blank_list, optimize, opt_size))
12331 goto error_return;
12332 }
12333
12334 /* It doesn't matter optimize_for_space_no_align anymore.
12335 If object file is assembled with flag '-Os',
12336 the we don't adjust jump-destination on 4-byte boundary. */
12337
12338 if (relax_blank_list)
12339 {
12340 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12341 relax_blank_list = NULL;
12342 }
12343
12344 if (*again == FALSE)
12345 {
12346 /* Closing the section, so we don't relax it anymore. */
12347 bfd_vma sec_size_align;
12348 Elf_Internal_Rela *tmp_rel;
12349
12350 /* Pad to alignment boundary. Only handle current section alignment. */
12351 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12352 & ((-1U) << sec->alignment_power);
12353 if ((sec_size_align - sec->size) & 0x2)
12354 {
12355 insn16 = NDS32_NOP16;
12356 bfd_putb16 (insn16, contents + sec->size);
12357 sec->size += 2;
12358 }
12359
12360 while (sec_size_align != sec->size)
12361 {
12362 insn = NDS32_NOP32;
12363 bfd_putb32 (insn, contents + sec->size);
12364 sec->size += 4;
12365 }
12366
12367 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12368 irelend, R_NDS32_RELAX_ENTRY);
12369 if (tmp_rel != irelend)
12370 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12371
12372 clean_nds32_elf_blank ();
12373 }
12374
12375 finish:
12376 if (internal_relocs != NULL
12377 && elf_section_data (sec)->relocs != internal_relocs)
12378 free (internal_relocs);
12379
12380 if (contents != NULL
12381 && elf_section_data (sec)->this_hdr.contents != contents)
12382 free (contents);
12383
12384 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12385 free (isymbuf);
12386
12387 return result;
12388
12389 error_return:
12390 result = FALSE;
12391 goto finish;
12392 }
12393
12394 static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12395 {
12396 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12397 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12398 {NULL, 0, 0, 0, 0}
12399 };
12400
12401 static bfd_boolean
12402 nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12403 struct bfd_link_info *info,
12404 void *finfo ATTRIBUTE_UNUSED,
12405 bfd_boolean (*func) (void *, const char *,
12406 Elf_Internal_Sym *,
12407 asection *,
12408 struct elf_link_hash_entry *)
12409 ATTRIBUTE_UNUSED)
12410 {
12411 FILE *sym_ld_script = NULL;
12412 struct elf_nds32_link_hash_table *table;
12413
12414 table = nds32_elf_hash_table (info);
12415 sym_ld_script = table->sym_ld_script;
12416
12417 if (check_start_export_sym)
12418 fprintf (sym_ld_script, "}\n");
12419
12420 return TRUE;
12421 }
12422
12423 static enum elf_reloc_type_class
12424 nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12425 const asection *rel_sec ATTRIBUTE_UNUSED,
12426 const Elf_Internal_Rela *rela)
12427 {
12428 switch ((int) ELF32_R_TYPE (rela->r_info))
12429 {
12430 case R_NDS32_RELATIVE:
12431 return reloc_class_relative;
12432 case R_NDS32_JMP_SLOT:
12433 return reloc_class_plt;
12434 case R_NDS32_COPY:
12435 return reloc_class_copy;
12436 default:
12437 return reloc_class_normal;
12438 }
12439 }
12440
12441 /* Put target dependent option into info hash table. */
12442 void
12443 bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12444 int relax_fp_as_gp,
12445 int eliminate_gc_relocs,
12446 FILE * sym_ld_script, int load_store_relax,
12447 int target_optimize, int relax_status,
12448 int relax_round, FILE * ex9_export_file,
12449 FILE * ex9_import_file,
12450 int update_ex9_table, int ex9_limit,
12451 bfd_boolean ex9_loop_aware,
12452 bfd_boolean ifc_loop_aware)
12453 {
12454 struct elf_nds32_link_hash_table *table;
12455
12456 table = nds32_elf_hash_table (link_info);
12457 if (table == NULL)
12458 return;
12459
12460 table->relax_fp_as_gp = relax_fp_as_gp;
12461 table->eliminate_gc_relocs = eliminate_gc_relocs;
12462 table->sym_ld_script = sym_ld_script;
12463 table ->load_store_relax = load_store_relax;
12464 table->target_optimize = target_optimize;
12465 table->relax_status = relax_status;
12466 table->relax_round = relax_round;
12467 table->ex9_export_file = ex9_export_file;
12468 table->ex9_import_file = ex9_import_file;
12469 table->update_ex9_table = update_ex9_table;
12470 table->ex9_limit = ex9_limit;
12471 table->ex9_loop_aware = ex9_loop_aware;
12472 table->ifc_loop_aware = ifc_loop_aware;
12473 }
12474 \f
12475 /* These functions and data-structures are used for fp-as-gp
12476 optimization. */
12477
12478 #define FAG_THRESHOLD 3 /* At least 3 gp-access. */
12479 /* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12480 the read-only section and read-write section. */
12481 #define FAG_WINDOW (508 - 32)
12482
12483 /* An nds32_fag represent a gp-relative access.
12484 We find best fp-base by using a sliding window
12485 to find a base address which can cover most gp-access. */
12486 struct nds32_fag
12487 {
12488 struct nds32_fag *next; /* NULL-teminated linked list. */
12489 bfd_vma addr; /* The address of this fag. */
12490 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12491 It is used for applying FP7U2_FLAG. */
12492 int count; /* How many times this address is referred.
12493 There should be exactly `count' relocations
12494 in relas. */
12495 int relas_capcity; /* The buffer size of relas.
12496 We use an array instead of linked-list,
12497 and realloc is used to adjust buffer size. */
12498 };
12499
12500 static void
12501 nds32_fag_init (struct nds32_fag *head)
12502 {
12503 memset (head, 0, sizeof (struct nds32_fag));
12504 }
12505
12506 static void
12507 nds32_fag_verify (struct nds32_fag *head)
12508 {
12509 struct nds32_fag *iter;
12510 struct nds32_fag *prev;
12511
12512 prev = NULL;
12513 iter = head->next;
12514 while (iter)
12515 {
12516 if (prev && prev->addr >= iter->addr)
12517 puts ("Bug in fp-as-gp insertion.");
12518 prev = iter;
12519 iter = iter->next;
12520 }
12521 }
12522
12523 /* Insert a fag in ascending order.
12524 If a fag of the same address already exists,
12525 they are chained by relas array. */
12526
12527 static void
12528 nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12529 Elf_Internal_Rela * rel)
12530 {
12531 struct nds32_fag *iter;
12532 struct nds32_fag *new_fag;
12533 const int INIT_RELAS_CAP = 4;
12534
12535 for (iter = head;
12536 iter->next && iter->next->addr <= addr;
12537 iter = iter->next)
12538 /* Find somewhere to insert. */ ;
12539
12540 /* `iter' will be equal to `head' if the list is empty. */
12541 if (iter != head && iter->addr == addr)
12542 {
12543 /* The address exists in the list.
12544 Insert `rel' into relocation list, relas. */
12545
12546 /* Check whether relas is big enough. */
12547 if (iter->count >= iter->relas_capcity)
12548 {
12549 iter->relas_capcity *= 2;
12550 iter->relas = bfd_realloc
12551 (iter->relas, iter->relas_capcity * sizeof (void *));
12552 }
12553 iter->relas[iter->count++] = rel;
12554 return;
12555 }
12556
12557 /* This is a new address. Create a fag node for it. */
12558 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12559 memset (new_fag, 0, sizeof (*new_fag));
12560 new_fag->addr = addr;
12561 new_fag->count = 1;
12562 new_fag->next = iter->next;
12563 new_fag->relas_capcity = INIT_RELAS_CAP;
12564 new_fag->relas = (Elf_Internal_Rela **)
12565 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12566 new_fag->relas[0] = rel;
12567 iter->next = new_fag;
12568
12569 nds32_fag_verify (head);
12570 }
12571
12572 static void
12573 nds32_fag_free_list (struct nds32_fag *head)
12574 {
12575 struct nds32_fag *iter;
12576
12577 iter = head->next;
12578 while (iter)
12579 {
12580 struct nds32_fag *tmp = iter;
12581 iter = iter->next;
12582 free (tmp->relas);
12583 tmp->relas = NULL;
12584 free (tmp);
12585 }
12586 }
12587
12588 /* Find the best fp-base address.
12589 The relocation associated with that address is returned,
12590 so we can track the symbol instead of a fixed address.
12591
12592 When relaxation, the address of an datum may change,
12593 because a text section is shrinked, so the data section
12594 moves forward. If the aligments of text and data section
12595 are different, their distance may change too.
12596 Therefore, tracking a fixed address is not appriate. */
12597
12598 static int
12599 nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12600 {
12601 struct nds32_fag *base; /* First fag in the window. */
12602 struct nds32_fag *last; /* First fag outside the window. */
12603 int accu = 0; /* Usage accumulation. */
12604 struct nds32_fag *best; /* Best fag. */
12605 int baccu = 0; /* Best accumulation. */
12606
12607 /* Use first fag for initial, and find the last fag in the window.
12608
12609 In each iteration, we could simply subtract previous fag
12610 and accumulate following fags which are inside the window,
12611 untill we each the end. */
12612
12613 if (head->next == NULL)
12614 {
12615 *bestpp = NULL;
12616 return 0;
12617 }
12618
12619 /* Initialize base. */
12620 base = head->next;
12621 best = base;
12622 for (last = base;
12623 last && last->addr < base->addr + FAG_WINDOW;
12624 last = last->next)
12625 accu += last->count;
12626
12627 baccu = accu;
12628
12629 /* Record the best base in each iteration. */
12630 while (base->next)
12631 {
12632 accu -= base->count;
12633 base = base->next;
12634 /* Account fags in window. */
12635 for (/* Nothing. */;
12636 last && last->addr < base->addr + FAG_WINDOW;
12637 last = last->next)
12638 accu += last->count;
12639
12640 /* A better fp-base? */
12641 if (accu > baccu)
12642 {
12643 best = base;
12644 baccu = accu;
12645 }
12646 }
12647
12648 if (bestpp)
12649 *bestpp = best;
12650 return baccu;
12651 }
12652
12653 /* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12654 so we can convert it fo fp-relative access later.
12655 `best_fag' is the best fp-base. Only those inside the window
12656 of best_fag is applied the flag. */
12657
12658 static bfd_boolean
12659 nds32_fag_mark_relax (struct bfd_link_info *link_info,
12660 bfd *abfd, struct nds32_fag *best_fag,
12661 Elf_Internal_Rela *internal_relocs,
12662 Elf_Internal_Rela *irelend)
12663 {
12664 struct nds32_fag *ifag;
12665 bfd_vma best_fpbase, gp;
12666 bfd *output_bfd;
12667
12668 output_bfd = abfd->sections->output_section->owner;
12669 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12670 best_fpbase = best_fag->addr;
12671
12672 if (best_fpbase > gp + sdata_range[1][1]
12673 || best_fpbase < gp - sdata_range[1][0])
12674 return FALSE;
12675
12676 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12677 so we know they can be converted to lwi37.fp. */
12678 for (ifag = best_fag;
12679 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12680 {
12681 int i;
12682
12683 for (i = 0; i < ifag->count; i++)
12684 {
12685 Elf_Internal_Rela *insn16_rel;
12686 Elf_Internal_Rela *fag_rel;
12687
12688 fag_rel = ifag->relas[i];
12689
12690 /* Only if this is within the WINDOWS, FP7U2_FLAG
12691 is applied. */
12692
12693 insn16_rel = find_relocs_at_address
12694 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12695
12696 if (insn16_rel != irelend)
12697 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12698 }
12699 }
12700 return TRUE;
12701 }
12702
12703 /* Reset INSN16 to clean fp as gp. */
12704
12705 static void
12706 nds32_fag_unmark_relax (struct nds32_fag *fag,
12707 Elf_Internal_Rela *internal_relocs,
12708 Elf_Internal_Rela *irelend)
12709 {
12710 struct nds32_fag *ifag;
12711 int i;
12712 Elf_Internal_Rela *insn16_rel;
12713 Elf_Internal_Rela *fag_rel;
12714
12715 for (ifag = fag; ifag; ifag = ifag->next)
12716 {
12717 for (i = 0; i < ifag->count; i++)
12718 {
12719 fag_rel = ifag->relas[i];
12720
12721 /* Restore the INSN16 relocation. */
12722 insn16_rel = find_relocs_at_address
12723 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12724
12725 if (insn16_rel != irelend)
12726 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12727 }
12728 }
12729 }
12730
12731 /* This is the main function of fp-as-gp optimization.
12732 It should be called by relax_section. */
12733
12734 static bfd_boolean
12735 nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12736 bfd *abfd, asection *sec,
12737 Elf_Internal_Rela *internal_relocs,
12738 Elf_Internal_Rela *irelend,
12739 Elf_Internal_Sym *isymbuf)
12740 {
12741 Elf_Internal_Rela *begin_rel = NULL;
12742 Elf_Internal_Rela *irel;
12743 struct nds32_fag fag_head;
12744 Elf_Internal_Shdr *symtab_hdr;
12745 bfd_byte *contents;
12746 bfd_boolean ifc_inside = FALSE;
12747
12748 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12749
12750 /* Per-function fp-base selection.
12751 1. Create a list for all the gp-relative access.
12752 2. Base on those gp-relative address,
12753 find a fp-base which can cover most access.
12754 3. Use the fp-base for fp-as-gp relaxation.
12755
12756 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12757 we should
12758 1. delete the `la $fp, _FP_BASE_' instruction and
12759 2. not convert lwi.gp to lwi37.fp.
12760
12761 To delete the _FP_BASE_ instruction, we simply apply
12762 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12763
12764 To suppress the conversion, we simply NOT to apply
12765 R_NDS32_INSN16_FP7U2_FLAG flag. */
12766
12767 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12768
12769 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
12770 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12771 return FALSE;
12772
12773 /* Check whether it is worth for fp-as-gp optimization,
12774 i.e., at least 3 gp-load.
12775
12776 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12777 apply this optimization. */
12778
12779 for (irel = internal_relocs; irel < irelend; irel++)
12780 {
12781 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12782 One we enter the begin of the region, we track all the LW/ST
12783 instructions, so when we leave the region, we try to find
12784 the best fp-base address for those LW/ST instructions. */
12785
12786 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12787 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12788 {
12789 /* Begin of the region. */
12790 if (begin_rel)
12791 _bfd_error_handler (_("%B: Nested OMIT_FP in %A."), abfd, sec);
12792
12793 begin_rel = irel;
12794 nds32_fag_init (&fag_head);
12795 ifc_inside = FALSE;
12796 }
12797 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12798 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12799 {
12800 int accu;
12801 struct nds32_fag *best_fag, *tmp_fag;
12802 int dist;
12803
12804 /* End of the region.
12805 Check whether it is worth to do fp-as-gp. */
12806
12807 if (begin_rel == NULL)
12808 {
12809 _bfd_error_handler (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
12810 continue;
12811 }
12812
12813 accu = nds32_fag_find_base (&fag_head, &best_fag);
12814
12815 /* Clean FP7U2_FLAG because they may set ever. */
12816 tmp_fag = fag_head.next;
12817 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12818
12819 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12820 if (accu < FAG_THRESHOLD
12821 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12822 internal_relocs, irelend))
12823 {
12824 /* Not worth to do fp-as-gp. */
12825 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12826 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12827 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12828 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12829 nds32_fag_free_list (&fag_head);
12830 begin_rel = NULL;
12831 continue;
12832 }
12833
12834 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12835 so we use it to record the distance to the reloction of best
12836 fp-base. */
12837 dist = best_fag->relas[0] - begin_rel;
12838 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12839 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12840 relocation. And get the base value when relocating. */
12841 begin_rel->r_addend &= (0x1 << 16) - 1;
12842 begin_rel->r_addend |= dist << 16;
12843
12844 nds32_fag_free_list (&fag_head);
12845 begin_rel = NULL;
12846 }
12847
12848 if (begin_rel == NULL || ifc_inside)
12849 /* Skip if we are not in the region of fp-as-gp. */
12850 continue;
12851
12852 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12853 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12854 {
12855 bfd_vma addr;
12856 uint32_t insn;
12857
12858 /* A gp-relative access is found. Insert it to the fag-list. */
12859
12860 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12861 insn = bfd_getb32 (contents + irel->r_offset);
12862 if (!N32_IS_RT3 (insn))
12863 continue;
12864
12865 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12866 nds32_fag_insert (&fag_head, addr, irel);
12867 }
12868 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12869 {
12870 begin_rel = NULL;
12871 }
12872 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12873 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12874 {
12875 /* Suppress fp as gp when encounter ifc. */
12876 ifc_inside = TRUE;
12877 }
12878 }
12879
12880 return TRUE;
12881 }
12882
12883 /* Remove unused `la $fp, _FD_BASE_' instruction. */
12884
12885 static bfd_boolean
12886 nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12887 Elf_Internal_Rela *internal_relocs,
12888 Elf_Internal_Rela *irelend)
12889 {
12890 Elf_Internal_Rela *irel;
12891 Elf_Internal_Shdr *symtab_hdr;
12892 bfd_byte *contents = NULL;
12893 nds32_elf_blank_t *relax_blank_list = NULL;
12894 bfd_boolean result = TRUE;
12895 bfd_boolean unused_region = FALSE;
12896
12897 /*
12898 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12899 * R_NDS32_17IFC_PCREL_RELA
12900 * R_NDS32_10IFCU_PCREL_RELA
12901
12902 CASE??????????????
12903 */
12904
12905 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12906 nds32_get_section_contents (abfd, sec, &contents, TRUE);
12907
12908 for (irel = internal_relocs; irel < irelend; irel++)
12909 {
12910 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12911 we marked to in previous pass.
12912 DO NOT scan relocations again, since we've alreadly decided it
12913 and set the flag. */
12914 const char *syname;
12915 int syndx;
12916 uint32_t insn;
12917
12918 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12919 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12920 unused_region = TRUE;
12921 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12922 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12923 unused_region = FALSE;
12924
12925 /* We're not in the region. */
12926 if (!unused_region)
12927 continue;
12928
12929 /* _FP_BASE_ must be a GLOBAL symbol. */
12930 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12931 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12932 continue;
12933
12934 /* The symbol name must be _FP_BASE_. */
12935 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12936 if (strcmp (syname, FP_BASE_NAME) != 0)
12937 continue;
12938
12939 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12940 {
12941 /* addi.gp $fp, -256 */
12942 insn = bfd_getb32 (contents + irel->r_offset);
12943 if (insn != INSN_ADDIGP_TO_FP)
12944 continue;
12945 }
12946 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12947 {
12948 /* addi $fp, $gp, -256 */
12949 insn = bfd_getb32 (contents + irel->r_offset);
12950 if (insn != INSN_ADDI_GP_TO_FP)
12951 continue;
12952 }
12953 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12954 {
12955 /* movi $fp, FP_BASE */
12956 insn = bfd_getb32 (contents + irel->r_offset);
12957 if (insn != INSN_MOVI_TO_FP)
12958 continue;
12959 }
12960 else
12961 continue;
12962
12963 /* We got here because a FP_BASE instruction is found. */
12964 if (!insert_nds32_elf_blank_recalc_total
12965 (&relax_blank_list, irel->r_offset, 4))
12966 goto error_return;
12967 }
12968
12969 finish:
12970 if (relax_blank_list)
12971 {
12972 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12973 relax_blank_list = NULL;
12974 }
12975 return result;
12976
12977 error_return:
12978 result = FALSE;
12979 goto finish;
12980 }
12981
12982 /* This is a version of bfd_generic_get_relocated_section_contents.
12983 We need this variety because relaxation will modify the dwarf
12984 infomation. When there is undefined symbol reference error mesage,
12985 linker need to dump line number where the symbol be used. However
12986 the address is be relaxed, it can not get the original dwarf contents.
12987 The variety only modify function call for reading in the section. */
12988
12989 static bfd_byte *
12990 nds32_elf_get_relocated_section_contents (bfd *abfd,
12991 struct bfd_link_info *link_info,
12992 struct bfd_link_order *link_order,
12993 bfd_byte *data,
12994 bfd_boolean relocatable,
12995 asymbol **symbols)
12996 {
12997 bfd *input_bfd = link_order->u.indirect.section->owner;
12998 asection *input_section = link_order->u.indirect.section;
12999 long reloc_size;
13000 arelent **reloc_vector;
13001 long reloc_count;
13002
13003 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
13004 if (reloc_size < 0)
13005 return NULL;
13006
13007 /* Read in the section. */
13008 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
13009 return NULL;
13010
13011 if (reloc_size == 0)
13012 return data;
13013
13014 reloc_vector = (arelent **) bfd_malloc (reloc_size);
13015 if (reloc_vector == NULL)
13016 return NULL;
13017
13018 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
13019 reloc_vector, symbols);
13020 if (reloc_count < 0)
13021 goto error_return;
13022
13023 if (reloc_count > 0)
13024 {
13025 arelent **parent;
13026 for (parent = reloc_vector; *parent != NULL; parent++)
13027 {
13028 char *error_message = NULL;
13029 asymbol *symbol;
13030 bfd_reloc_status_type r;
13031
13032 symbol = *(*parent)->sym_ptr_ptr;
13033 if (symbol->section && discarded_section (symbol->section))
13034 {
13035 bfd_byte *p;
13036 static reloc_howto_type none_howto
13037 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
13038 "unused", FALSE, 0, 0, FALSE);
13039
13040 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
13041 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
13042 p);
13043 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
13044 (*parent)->addend = 0;
13045 (*parent)->howto = &none_howto;
13046 r = bfd_reloc_ok;
13047 }
13048 else
13049 r = bfd_perform_relocation (input_bfd, *parent, data,
13050 input_section,
13051 relocatable ? abfd : NULL,
13052 &error_message);
13053
13054 if (relocatable)
13055 {
13056 asection *os = input_section->output_section;
13057
13058 /* A partial link, so keep the relocs. */
13059 os->orelocation[os->reloc_count] = *parent;
13060 os->reloc_count++;
13061 }
13062
13063 if (r != bfd_reloc_ok)
13064 {
13065 switch (r)
13066 {
13067 case bfd_reloc_undefined:
13068 (*link_info->callbacks->undefined_symbol)
13069 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13070 input_bfd, input_section, (*parent)->address, TRUE);
13071 break;
13072 case bfd_reloc_dangerous:
13073 BFD_ASSERT (error_message != NULL);
13074 (*link_info->callbacks->reloc_dangerous)
13075 (link_info, error_message,
13076 input_bfd, input_section, (*parent)->address);
13077 break;
13078 case bfd_reloc_overflow:
13079 (*link_info->callbacks->reloc_overflow)
13080 (link_info, NULL,
13081 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13082 (*parent)->howto->name, (*parent)->addend,
13083 input_bfd, input_section, (*parent)->address);
13084 break;
13085 case bfd_reloc_outofrange:
13086 /* PR ld/13730:
13087 This error can result when processing some partially
13088 complete binaries. Do not abort, but issue an error
13089 message instead. */
13090 link_info->callbacks->einfo
13091 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
13092 abfd, input_section, * parent);
13093 goto error_return;
13094
13095 default:
13096 abort ();
13097 break;
13098 }
13099 }
13100 }
13101 }
13102
13103 free (reloc_vector);
13104 return data;
13105
13106 error_return:
13107 free (reloc_vector);
13108 return NULL;
13109 }
13110 \f
13111 /* Link-time IFC relaxation.
13112 In this optimization, we chains jump instructions
13113 of the same destination with ifcall. */
13114
13115
13116 /* List to save jal and j relocation. */
13117 struct elf_nds32_ifc_symbol_entry
13118 {
13119 asection *sec;
13120 struct elf_link_hash_entry *h;
13121 struct elf_nds32_ifc_irel_list *irel_head;
13122 unsigned long insn;
13123 int times;
13124 int enable; /* Apply ifc. */
13125 int ex9_enable; /* Apply ifc after ex9. */
13126 struct elf_nds32_ifc_symbol_entry *next;
13127 };
13128
13129 struct elf_nds32_ifc_irel_list
13130 {
13131 Elf_Internal_Rela *irel;
13132 asection *sec;
13133 bfd_vma addr;
13134 /* If this is set, then it is the last instruction for
13135 ifc-chain, so it must be keep for the actual branching. */
13136 int keep;
13137 struct elf_nds32_ifc_irel_list *next;
13138 };
13139
13140 static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
13141
13142 /* Insert symbol of jal and j for ifc. */
13143
13144 static void
13145 nds32_elf_ifc_insert_symbol (asection *sec,
13146 struct elf_link_hash_entry *h,
13147 Elf_Internal_Rela *irel,
13148 unsigned long insn)
13149 {
13150 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13151
13152 /* Check there is target of existing entry the same as the new one. */
13153 while (ptr != NULL)
13154 {
13155 if (((h == NULL && ptr->sec == sec
13156 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
13157 && ptr->irel_head->irel->r_addend == irel->r_addend)
13158 || h != NULL)
13159 && ptr->h == h
13160 && ptr->insn == insn)
13161 {
13162 /* The same target exist, so insert into list. */
13163 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
13164
13165 while (irel_list->next != NULL)
13166 irel_list = irel_list->next;
13167 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13168 irel_list = irel_list->next;
13169 irel_list->irel = irel;
13170 irel_list->keep = 1;
13171
13172 if (h == NULL)
13173 irel_list->sec = NULL;
13174 else
13175 irel_list->sec = sec;
13176 irel_list->next = NULL;
13177 return;
13178 }
13179 if (ptr->next == NULL)
13180 break;
13181 ptr = ptr->next;
13182 }
13183
13184 /* There is no same target entry, so build a new one. */
13185 if (ifc_symbol_head == NULL)
13186 {
13187 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13188 ptr = ifc_symbol_head;
13189 }
13190 else
13191 {
13192 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13193 ptr = ptr->next;
13194 }
13195
13196 ptr->h = h;
13197 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13198 ptr->irel_head->irel = irel;
13199 ptr->insn = insn;
13200 ptr->irel_head->keep = 1;
13201
13202 if (h == NULL)
13203 {
13204 /* Local symbols. */
13205 ptr->sec = sec;
13206 ptr->irel_head->sec = NULL;
13207 }
13208 else
13209 {
13210 /* Global symbol. */
13211 ptr->sec = NULL;
13212 ptr->irel_head->sec = sec;
13213 }
13214
13215 ptr->irel_head->next = NULL;
13216 ptr->times = 0;
13217 ptr->enable = 0;
13218 ptr->ex9_enable = 0;
13219 ptr->next = NULL;
13220 }
13221
13222 /* Gather all jal and j instructions. */
13223
13224 static bfd_boolean
13225 nds32_elf_ifc_calc (struct bfd_link_info *info,
13226 bfd *abfd, asection *sec)
13227 {
13228 Elf_Internal_Rela *internal_relocs;
13229 Elf_Internal_Rela *irelend;
13230 Elf_Internal_Rela *irel;
13231 Elf_Internal_Shdr *symtab_hdr;
13232 bfd_byte *contents = NULL;
13233 uint32_t insn, insn_with_reg;
13234 unsigned long r_symndx;
13235 struct elf_link_hash_entry *h;
13236 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
13237 struct elf_nds32_link_hash_table *table;
13238 bfd_boolean ifc_loop_aware;
13239
13240 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
13241 TRUE /* keep_memory */);
13242 irelend = internal_relocs + sec->reloc_count;
13243 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13244
13245 /* Check if the object enable ifc. */
13246 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13247 R_NDS32_RELAX_ENTRY);
13248
13249 if (irel == NULL
13250 || irel >= irelend
13251 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13252 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13253 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
13254 return TRUE;
13255
13256 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
13257 return FALSE;
13258
13259 table = nds32_elf_hash_table (info);
13260 ifc_loop_aware = table->ifc_loop_aware;
13261 while (irel != NULL && irel < irelend)
13262 {
13263 /* Traverse all relocation and gather all of them to build the list. */
13264
13265 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13266 {
13267 if (ifc_loop_aware == 1
13268 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13269 {
13270 /* Check the region if loop or not. If it is true and
13271 ifc-loop-aware is true, ignore the region till region end. */
13272 while (irel != NULL
13273 && irel < irelend
13274 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13275 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13276 irel++;
13277 }
13278 }
13279
13280 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13281 {
13282 insn = bfd_getb32 (contents + irel->r_offset);
13283 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13284 r_symndx = ELF32_R_SYM (irel->r_info);
13285 if (r_symndx < symtab_hdr->sh_info)
13286 {
13287 /* Local symbol. */
13288 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13289 }
13290 else
13291 {
13292 /* External symbol. */
13293 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13294 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13295 }
13296 }
13297 irel++;
13298 }
13299 return TRUE;
13300 }
13301
13302 /* Determine whether j and jal should be substituted. */
13303
13304 static void
13305 nds32_elf_ifc_filter (struct bfd_link_info *info)
13306 {
13307 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13308 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13309 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13310 struct elf_nds32_link_hash_table *table;
13311 int target_optimize;
13312 bfd_vma address;
13313
13314 table = nds32_elf_hash_table (info);
13315 target_optimize = table->target_optimize;
13316 while (ptr)
13317 {
13318 irel_ptr = ptr->irel_head;
13319 if (ptr->h == NULL)
13320 {
13321 /* Local symbol. */
13322 irel_keeper = irel_ptr;
13323 while (irel_ptr && irel_ptr->next)
13324 {
13325 /* Check there is jump target can be used. */
13326 if ((irel_ptr->next->irel->r_offset
13327 - irel_keeper->irel->r_offset) > 1022)
13328 irel_keeper = irel_ptr->next;
13329 else
13330 {
13331 ptr->enable = 1;
13332 irel_ptr->keep = 0;
13333 }
13334 irel_ptr = irel_ptr->next;
13335 }
13336 }
13337 else
13338 {
13339 /* Global symbol. */
13340 /* We have to get the absolute address and decide
13341 whether to keep it or not. */
13342 while (irel_ptr)
13343 {
13344 address = (irel_ptr->irel->r_offset
13345 + irel_ptr->sec->output_section->vma
13346 + irel_ptr->sec->output_offset);
13347 irel_ptr->addr = address;
13348 irel_ptr = irel_ptr->next;
13349 }
13350
13351 irel_ptr = ptr->irel_head;
13352 while (irel_ptr)
13353 {
13354 /* Sort by address. */
13355 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13356 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13357 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13358 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13359
13360 /* Get the smallest one. */
13361 while (irel_temp->next)
13362 {
13363 if (irel_temp->next->addr < irel_dest->addr)
13364 {
13365 irel_dest_prev = irel_temp;
13366 irel_dest = irel_temp->next;
13367 }
13368 irel_temp = irel_temp->next;
13369 }
13370
13371 if (irel_dest != irel_ptr)
13372 {
13373 if (irel_ptr_prev)
13374 irel_ptr_prev->next = irel_dest;
13375 if (irel_dest_prev)
13376 irel_dest_prev->next = irel_ptr;
13377 irel_temp = irel_ptr->next;
13378 irel_ptr->next = irel_dest->next;
13379 irel_dest->next = irel_temp;
13380 }
13381 irel_ptr_prev = irel_ptr;
13382 irel_ptr = irel_ptr->next;
13383 }
13384
13385 irel_ptr = ptr->irel_head;
13386 irel_keeper = irel_ptr;
13387 while (irel_ptr && irel_ptr->next)
13388 {
13389 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13390 irel_keeper = irel_ptr->next;
13391 else
13392 {
13393 ptr->enable = 1;
13394 irel_ptr->keep = 0;
13395 }
13396 irel_ptr = irel_ptr->next;
13397 }
13398 }
13399
13400 /* Ex9 enable. Reserve it for ex9. */
13401 if ((target_optimize & NDS32_RELAX_EX9_ON)
13402 && ptr->irel_head != irel_keeper)
13403 ptr->enable = 0;
13404 ptr = ptr->next;
13405 }
13406 }
13407
13408 /* Determine whether j and jal should be substituted after ex9 done. */
13409
13410 static void
13411 nds32_elf_ifc_filter_after_ex9 (void)
13412 {
13413 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13414 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13415
13416 while (ptr)
13417 {
13418 if (ptr->enable == 0)
13419 {
13420 /* Check whether ifc is applied or not. */
13421 irel_ptr = ptr->irel_head;
13422 ptr->ex9_enable = 1;
13423 while (irel_ptr)
13424 {
13425 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13426 {
13427 /* Ex9 already. */
13428 ptr->ex9_enable = 0;
13429 break;
13430 }
13431 irel_ptr = irel_ptr->next;
13432 }
13433 }
13434 ptr = ptr->next;
13435 }
13436 }
13437
13438 /* Wrapper to do ifc relaxation. */
13439
13440 bfd_boolean
13441 nds32_elf_ifc_finish (struct bfd_link_info *info)
13442 {
13443 int relax_status;
13444 struct elf_nds32_link_hash_table *table;
13445
13446 table = nds32_elf_hash_table (info);
13447 relax_status = table->relax_status;
13448
13449 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13450 nds32_elf_ifc_filter (info);
13451 else
13452 nds32_elf_ifc_filter_after_ex9 ();
13453
13454 if (!nds32_elf_ifc_replace (info))
13455 return FALSE;
13456
13457 if (table)
13458 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13459 return TRUE;
13460 }
13461
13462 /* Traverse the result of ifc filter and replace it with ifcall9. */
13463
13464 static bfd_boolean
13465 nds32_elf_ifc_replace (struct bfd_link_info *info)
13466 {
13467 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13468 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13469 nds32_elf_blank_t *relax_blank_list = NULL;
13470 bfd_byte *contents = NULL;
13471 Elf_Internal_Rela *internal_relocs;
13472 Elf_Internal_Rela *irel;
13473 Elf_Internal_Rela *irelend;
13474 unsigned short insn16 = INSN_IFCALL9;
13475 struct elf_nds32_link_hash_table *table;
13476 int relax_status;
13477
13478 table = nds32_elf_hash_table (info);
13479 relax_status = table->relax_status;
13480
13481 while (ptr)
13482 {
13483 /* Traverse the ifc gather list, and replace the
13484 filter entries by ifcall9. */
13485 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
13486 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13487 && ptr->ex9_enable == 1))
13488 {
13489 irel_ptr = ptr->irel_head;
13490 if (ptr->h == NULL)
13491 {
13492 /* Local symbol. */
13493 internal_relocs = _bfd_elf_link_read_relocs
13494 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13495 irelend = internal_relocs + ptr->sec->reloc_count;
13496
13497 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13498 &contents, TRUE))
13499 return FALSE;
13500
13501 while (irel_ptr)
13502 {
13503 if (irel_ptr->keep == 0 && irel_ptr->next)
13504 {
13505 /* The one can be replaced. We have to check whether
13506 there is any alignment point in the region. */
13507 irel = irel_ptr->irel;
13508 while (((irel_ptr->next->keep == 0
13509 && irel < irel_ptr->next->irel)
13510 || (irel_ptr->next->keep == 1 && irel < irelend))
13511 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13512 && (irel->r_addend & 0x1f) == 2))
13513 irel++;
13514 if (irel >= irelend
13515 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13516 && (irel->r_addend & 0x1f) == 2
13517 && ((irel->r_offset - get_nds32_elf_blank_total
13518 (&relax_blank_list, irel->r_offset, 1))
13519 & 0x02) == 0))
13520 {
13521 /* Replace by ifcall9. */
13522 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13523 if (!insert_nds32_elf_blank_recalc_total
13524 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13525 return FALSE;
13526 irel_ptr->irel->r_info =
13527 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13528 R_NDS32_10IFCU_PCREL_RELA);
13529 }
13530 }
13531 irel_ptr = irel_ptr->next;
13532 }
13533
13534 /* Delete the redundant code. */
13535 if (relax_blank_list)
13536 {
13537 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13538 relax_blank_list);
13539 relax_blank_list = NULL;
13540 }
13541 }
13542 else
13543 {
13544 /* Global symbol. */
13545 while (irel_ptr)
13546 {
13547 if (irel_ptr->keep == 0 && irel_ptr->next)
13548 {
13549 /* The one can be replaced, and we have to check
13550 whether there is any alignment point in the region. */
13551 internal_relocs = _bfd_elf_link_read_relocs
13552 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13553 TRUE /* keep_memory */);
13554 irelend = internal_relocs + irel_ptr->sec->reloc_count;
13555 if (!nds32_get_section_contents (irel_ptr->sec->owner,
13556 irel_ptr->sec, &contents,
13557 TRUE))
13558 return FALSE;
13559
13560 irel = irel_ptr->irel;
13561 while (((irel_ptr->sec == irel_ptr->next->sec
13562 && irel_ptr->next->keep == 0
13563 && irel < irel_ptr->next->irel)
13564 || ((irel_ptr->sec != irel_ptr->next->sec
13565 || irel_ptr->next->keep == 1)
13566 && irel < irelend))
13567 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13568 && (irel->r_addend & 0x1f) == 2))
13569 irel++;
13570 if (irel >= irelend
13571 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13572 && (irel->r_addend & 0x1f) == 2
13573 && ((irel->r_offset
13574 - get_nds32_elf_blank_total (&relax_blank_list,
13575 irel->r_offset, 1)) & 0x02) == 0))
13576 {
13577 /* Replace by ifcall9. */
13578 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13579 if (!insert_nds32_elf_blank_recalc_total
13580 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13581 return FALSE;
13582
13583 /* Delete the redundant code, and clear the relocation. */
13584 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13585 irel_ptr->sec,
13586 relax_blank_list);
13587 irel_ptr->irel->r_info =
13588 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13589 R_NDS32_10IFCU_PCREL_RELA);
13590 relax_blank_list = NULL;
13591 }
13592 }
13593
13594 irel_ptr = irel_ptr->next;
13595 }
13596 }
13597 }
13598 ptr = ptr->next;
13599 }
13600
13601 return TRUE;
13602 }
13603
13604 /* Relocate ifcall. */
13605
13606 static bfd_boolean
13607 nds32_elf_ifc_reloc (void)
13608 {
13609 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13610 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13611 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13612 bfd_vma relocation, address;
13613 unsigned short insn16;
13614 bfd_byte *contents = NULL;
13615 static bfd_boolean done = FALSE;
13616
13617 if (done)
13618 return TRUE;
13619
13620 done = TRUE;
13621
13622 while (ptr)
13623 {
13624 /* Check the entry is enable ifcall. */
13625 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13626 {
13627 /* Get the reserve jump. */
13628 irel_ptr = ptr->irel_head;
13629 while (irel_ptr)
13630 {
13631 if (irel_ptr->keep == 1)
13632 {
13633 irel_keeper = irel_ptr;
13634 break;
13635 }
13636 irel_ptr = irel_ptr->next;
13637 }
13638
13639 irel_ptr = ptr->irel_head;
13640 if (ptr->h == NULL)
13641 {
13642 /* Local symbol. */
13643 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13644 &contents, TRUE))
13645 return FALSE;
13646
13647 while (irel_ptr)
13648 {
13649 if (irel_ptr->keep == 0
13650 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
13651 {
13652 relocation = irel_keeper->irel->r_offset;
13653 relocation = relocation - irel_ptr->irel->r_offset;
13654 while (irel_keeper && relocation > 1022)
13655 {
13656 irel_keeper = irel_keeper->next;
13657 if (irel_keeper && irel_keeper->keep == 1)
13658 {
13659 relocation = irel_keeper->irel->r_offset;
13660 relocation = relocation - irel_ptr->irel->r_offset;
13661 }
13662 }
13663 if (relocation > 1022)
13664 {
13665 /* Double check. */
13666 irel_keeper = ptr->irel_head;
13667 while (irel_keeper)
13668 {
13669 if (irel_keeper->keep == 1)
13670 {
13671 relocation = irel_keeper->irel->r_offset;
13672 relocation = relocation - irel_ptr->irel->r_offset;
13673 }
13674 if (relocation <= 1022)
13675 break;
13676 irel_keeper = irel_keeper->next;
13677 }
13678 if (!irel_keeper)
13679 return FALSE;
13680 }
13681 irel_ptr->irel->r_info =
13682 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13683 R_NDS32_NONE);
13684 insn16 = INSN_IFCALL9 | (relocation >> 1);
13685 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13686 }
13687 irel_ptr = irel_ptr->next;
13688 }
13689 }
13690 else
13691 {
13692 /* Global symbol. */
13693 while (irel_ptr)
13694 {
13695 if (irel_ptr->keep == 0
13696 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
13697 {
13698 /* Get the distance between ifcall and jump. */
13699 relocation = (irel_keeper->irel->r_offset
13700 + irel_keeper->sec->output_section->vma
13701 + irel_keeper->sec->output_offset);
13702 address = (irel_ptr->irel->r_offset
13703 + irel_ptr->sec->output_section->vma
13704 + irel_ptr->sec->output_offset);
13705 relocation = relocation - address;
13706
13707 /* The distance is over ragne, find callee again. */
13708 while (irel_keeper && relocation > 1022)
13709 {
13710 irel_keeper = irel_keeper->next;
13711 if (irel_keeper && irel_keeper->keep ==1)
13712 {
13713 relocation = (irel_keeper->irel->r_offset
13714 + irel_keeper->sec->output_section->vma
13715 + irel_keeper->sec->output_offset);
13716 relocation = relocation - address;
13717 }
13718 }
13719
13720 if (relocation > 1022)
13721 {
13722 /* Double check. */
13723 irel_keeper = ptr->irel_head;
13724 while (irel_keeper)
13725 {
13726 if (irel_keeper->keep == 1)
13727 {
13728
13729 relocation = (irel_keeper->irel->r_offset
13730 + irel_keeper->sec->output_section->vma
13731 + irel_keeper->sec->output_offset);
13732 relocation = relocation - address;
13733 }
13734 if (relocation <= 1022)
13735 break;
13736 irel_keeper = irel_keeper->next;
13737 }
13738 if (!irel_keeper)
13739 return FALSE;
13740 }
13741 if (!nds32_get_section_contents
13742 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
13743 return FALSE;
13744 insn16 = INSN_IFCALL9 | (relocation >> 1);
13745 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13746 irel_ptr->irel->r_info =
13747 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13748 R_NDS32_NONE);
13749 }
13750 irel_ptr =irel_ptr->next;
13751 }
13752 }
13753 }
13754 ptr = ptr->next;
13755 }
13756
13757 return TRUE;
13758 }
13759
13760 /* End of IFC relaxation. */
13761 \f
13762 /* EX9 Instruction Table Relaxation. */
13763
13764 /* Global hash list. */
13765 struct elf_link_hash_entry_list
13766 {
13767 struct elf_link_hash_entry *h;
13768 struct elf_link_hash_entry_list *next;
13769 };
13770
13771 /* Save different destination but same insn. */
13772 struct elf_link_hash_entry_mul_list
13773 {
13774 /* Global symbol times. */
13775 int times;
13776 /* Save relocation for each global symbol but useful?? */
13777 Elf_Internal_Rela *irel;
13778 /* For sethi, two sethi may have the same high-part but different low-parts. */
13779 Elf_Internal_Rela rel_backup;
13780 struct elf_link_hash_entry_list *h_list;
13781 struct elf_link_hash_entry_mul_list *next;
13782 };
13783
13784 /* Instruction hash table. */
13785 struct elf_nds32_code_hash_entry
13786 {
13787 struct bfd_hash_entry root;
13788 int times;
13789 /* For insn that can use relocation or constant ex: sethi. */
13790 int const_insn;
13791 asection *sec;
13792 struct elf_link_hash_entry_mul_list *m_list;
13793 /* Using r_addend. */
13794 Elf_Internal_Rela *irel;
13795 /* Using r_info. */
13796 Elf_Internal_Rela rel_backup;
13797 };
13798
13799 /* Instruction count list. */
13800 struct elf_nds32_insn_times_entry
13801 {
13802 const char *string;
13803 int times;
13804 int order;
13805 asection *sec;
13806 struct elf_link_hash_entry_mul_list *m_list;
13807 Elf_Internal_Rela *irel;
13808 Elf_Internal_Rela rel_backup;
13809 struct elf_nds32_insn_times_entry *next;
13810 };
13811
13812 /* J and JAL symbol list. */
13813 struct elf_nds32_symbol_entry
13814 {
13815 char *string;
13816 unsigned long insn;
13817 struct elf_nds32_symbol_entry *next;
13818 };
13819
13820 /* Relocation list. */
13821 struct elf_nds32_irel_entry
13822 {
13823 Elf_Internal_Rela *irel;
13824 struct elf_nds32_irel_entry *next;
13825 };
13826
13827 /* ex9.it insn need to be fixed. */
13828 struct elf_nds32_ex9_refix
13829 {
13830 Elf_Internal_Rela *irel;
13831 asection *sec;
13832 struct elf_link_hash_entry *h;
13833 int order;
13834 struct elf_nds32_ex9_refix *next;
13835 };
13836
13837 static struct bfd_hash_table ex9_code_table;
13838 static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13839 static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13840
13841 /* EX9 hash function. */
13842
13843 static struct bfd_hash_entry *
13844 nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13845 struct bfd_hash_table *table,
13846 const char *string)
13847 {
13848 struct elf_nds32_code_hash_entry *ret;
13849
13850 /* Allocate the structure if it has not already been allocated by a
13851 subclass. */
13852 if (entry == NULL)
13853 {
13854 entry = (struct bfd_hash_entry *)
13855 bfd_hash_allocate (table, sizeof (*ret));
13856 if (entry == NULL)
13857 return entry;
13858 }
13859
13860 /* Call the allocation method of the superclass. */
13861 entry = bfd_hash_newfunc (entry, table, string);
13862 if (entry == NULL)
13863 return entry;
13864
13865 ret = (struct elf_nds32_code_hash_entry*) entry;
13866 ret->times = 0;
13867 ret->const_insn = 0;
13868 ret->m_list = NULL;
13869 ret->sec = NULL;
13870 ret->irel = NULL;
13871 return &ret->root;
13872 }
13873
13874 /* Insert ex9 entry
13875 this insert must be stable sorted by times. */
13876
13877 static void
13878 nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13879 {
13880 struct elf_nds32_insn_times_entry *temp;
13881 struct elf_nds32_insn_times_entry *temp2;
13882
13883 if (ex9_insn_head == NULL)
13884 {
13885 ex9_insn_head = ptr;
13886 ptr->next = NULL;
13887 }
13888 else
13889 {
13890 temp = ex9_insn_head;
13891 temp2 = ex9_insn_head;
13892 while (temp->next &&
13893 (temp->next->times >= ptr->times
13894 || temp->times == -1))
13895 {
13896 if (temp->times == -1)
13897 temp2 = temp;
13898 temp = temp->next;
13899 }
13900 if (ptr->times > temp->times && temp->times != -1)
13901 {
13902 ptr->next = temp;
13903 if (temp2->times == -1)
13904 temp2->next = ptr;
13905 else
13906 ex9_insn_head = ptr;
13907 }
13908 else if (temp->next == NULL)
13909 {
13910 temp->next = ptr;
13911 ptr->next = NULL;
13912 }
13913 else
13914 {
13915 ptr->next = temp->next;
13916 temp->next = ptr;
13917 }
13918 }
13919 }
13920
13921 /* Examine each insn times in hash table.
13922 Handle multi-link hash entry.
13923
13924 TODO: This function doesn't assign so much info since it is fake. */
13925
13926 static int
13927 nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13928 {
13929 struct elf_nds32_insn_times_entry *ptr;
13930 int times;
13931
13932 if (h->m_list == NULL)
13933 {
13934 /* Local symbol insn or insn without relocation. */
13935 if (h->times < 3)
13936 return TRUE;
13937
13938 ptr = (struct elf_nds32_insn_times_entry *)
13939 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13940 ptr->times = h->times;
13941 ptr->string = h->root.string;
13942 ptr->m_list = NULL;
13943 ptr->sec = h->sec;
13944 ptr->irel = h->irel;
13945 ptr->rel_backup = h->rel_backup;
13946 nds32_elf_ex9_insert_entry (ptr);
13947 }
13948 else
13949 {
13950 /* Global symbol insn. */
13951 /* Only sethi insn has multiple m_list. */
13952 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13953
13954 times = 0;
13955 while (m_list)
13956 {
13957 times += m_list->times;
13958 m_list = m_list->next;
13959 }
13960 if (times >= 3)
13961 {
13962 m_list = h->m_list;
13963 ptr = (struct elf_nds32_insn_times_entry *)
13964 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13965 ptr->times = times; /* Use the total times. */
13966 ptr->string = h->root.string;
13967 ptr->m_list = m_list;
13968 ptr->sec = h->sec;
13969 ptr->irel = m_list->irel;
13970 ptr->rel_backup = m_list->rel_backup;
13971 nds32_elf_ex9_insert_entry (ptr);
13972 }
13973 if (h->const_insn == 1)
13974 {
13975 /* sethi with constant value. */
13976 if (h->times < 3)
13977 return TRUE;
13978
13979 ptr = (struct elf_nds32_insn_times_entry *)
13980 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13981 ptr->times = h->times;
13982 ptr->string = h->root.string;
13983 ptr->m_list = NULL;
13984 ptr->sec = NULL;
13985 ptr->irel = NULL;
13986 ptr->rel_backup = h->rel_backup;
13987 nds32_elf_ex9_insert_entry (ptr);
13988 }
13989 }
13990 return TRUE;
13991 }
13992
13993 /* Count each insn times in hash table.
13994 Handle multi-link hash entry. */
13995
13996 static int
13997 nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13998 {
13999 int reservation, times;
14000 unsigned long relocation, min_relocation;
14001 struct elf_nds32_insn_times_entry *ptr;
14002
14003 if (h->m_list == NULL)
14004 {
14005 /* Local symbol insn or insn without relocation. */
14006 if (h->times < 3)
14007 return TRUE;
14008 ptr = (struct elf_nds32_insn_times_entry *)
14009 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14010 ptr->times = h->times;
14011 ptr->string = h->root.string;
14012 ptr->m_list = NULL;
14013 ptr->sec = h->sec;
14014 ptr->irel = h->irel;
14015 ptr->rel_backup = h->rel_backup;
14016 nds32_elf_ex9_insert_entry (ptr);
14017 }
14018 else
14019 {
14020 /* Global symbol insn. */
14021 /* Only sethi insn has multiple m_list. */
14022 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
14023
14024 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
14025 && m_list->next != NULL)
14026 {
14027 /* Sethi insn has different symbol or addend but has same hi20. */
14028 times = 0;
14029 reservation = 1;
14030 relocation = 0;
14031 min_relocation = 0xffffffff;
14032 while (m_list)
14033 {
14034 /* Get the minimum sethi address
14035 and calculate how many entry the sethi-list have to use. */
14036 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
14037 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
14038 && (m_list->h_list->h->root.u.def.section != NULL
14039 && m_list->h_list->h->root.u.def.section->output_section != NULL))
14040 {
14041 relocation = (m_list->h_list->h->root.u.def.value +
14042 m_list->h_list->h->root.u.def.section->output_section->vma +
14043 m_list->h_list->h->root.u.def.section->output_offset);
14044 relocation += m_list->irel->r_addend;
14045 }
14046 else
14047 relocation = 0;
14048 if (relocation < min_relocation)
14049 min_relocation = relocation;
14050 times += m_list->times;
14051 m_list = m_list->next;
14052 }
14053 if (min_relocation < ex9_relax_size)
14054 reservation = (min_relocation >> 12) + 1;
14055 else
14056 reservation = (min_relocation >> 12)
14057 - ((min_relocation - ex9_relax_size) >> 12) + 1;
14058 if (reservation < (times / 3))
14059 {
14060 /* Efficient enough to use ex9. */
14061 int i;
14062
14063 for (i = reservation ; i > 0; i--)
14064 {
14065 /* Allocate number of reservation ex9 entry. */
14066 ptr = (struct elf_nds32_insn_times_entry *)
14067 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14068 ptr->times = h->m_list->times / reservation;
14069 ptr->string = h->root.string;
14070 ptr->m_list = h->m_list;
14071 ptr->sec = h->sec;
14072 ptr->irel = h->m_list->irel;
14073 ptr->rel_backup = h->m_list->rel_backup;
14074 nds32_elf_ex9_insert_entry (ptr);
14075 }
14076 }
14077 }
14078 else
14079 {
14080 /* Normal global symbol that means no different address symbol
14081 using same ex9 entry. */
14082 if (m_list->times >= 3)
14083 {
14084 ptr = (struct elf_nds32_insn_times_entry *)
14085 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14086 ptr->times = m_list->times;
14087 ptr->string = h->root.string;
14088 ptr->m_list = h->m_list;
14089 ptr->sec = h->sec;
14090 ptr->irel = h->m_list->irel;
14091 ptr->rel_backup = h->m_list->rel_backup;
14092 nds32_elf_ex9_insert_entry (ptr);
14093 }
14094 }
14095
14096 if (h->const_insn == 1)
14097 {
14098 /* sethi with constant value. */
14099 if (h->times < 3)
14100 return TRUE;
14101
14102 ptr = (struct elf_nds32_insn_times_entry *)
14103 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14104 ptr->times = h->times;
14105 ptr->string = h->root.string;
14106 ptr->m_list = NULL;
14107 ptr->sec = NULL;
14108 ptr->irel = NULL;
14109 ptr->rel_backup = h->rel_backup;
14110 nds32_elf_ex9_insert_entry (ptr);
14111 }
14112 }
14113
14114 return TRUE;
14115 }
14116
14117 /* Hash table traverse function. */
14118
14119 static void
14120 nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
14121 {
14122 unsigned int i;
14123
14124 ex9_code_table.frozen = 1;
14125 for (i = 0; i < ex9_code_table.size; i++)
14126 {
14127 struct bfd_hash_entry *p;
14128
14129 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
14130 if (!func ((struct elf_nds32_code_hash_entry *) p))
14131 goto out;
14132 }
14133 out:
14134 ex9_code_table.frozen = 0;
14135 }
14136
14137
14138 /* Give order number to insn list. */
14139
14140 static void
14141 nds32_elf_order_insn_times (struct bfd_link_info *info)
14142 {
14143 struct elf_nds32_insn_times_entry *ex9_insn;
14144 struct elf_nds32_insn_times_entry *temp = NULL;
14145 struct elf_nds32_link_hash_table *table;
14146 int ex9_limit;
14147 int number = 0;
14148
14149 if (ex9_insn_head == NULL)
14150 return;
14151
14152 /* The max number of entries is 512. */
14153 ex9_insn = ex9_insn_head;
14154 table = nds32_elf_hash_table (info);
14155 ex9_limit = table->ex9_limit;
14156
14157 ex9_insn = ex9_insn_head;
14158
14159 while (ex9_insn != NULL && number < ex9_limit)
14160 {
14161 ex9_insn->order = number;
14162 number++;
14163 temp = ex9_insn;
14164 ex9_insn = ex9_insn->next;
14165 }
14166
14167 if (ex9_insn && temp)
14168 temp->next = NULL;
14169
14170 while (ex9_insn != NULL)
14171 {
14172 /* Free useless entry. */
14173 temp = ex9_insn;
14174 ex9_insn = ex9_insn->next;
14175 free (temp);
14176 }
14177 }
14178
14179 /* Build .ex9.itable section. */
14180
14181 static void
14182 nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
14183 {
14184 asection *table_sec;
14185 struct elf_nds32_insn_times_entry *ptr;
14186 bfd *it_abfd;
14187 int number = 0;
14188 bfd_byte *contents = NULL;
14189
14190 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
14191 it_abfd = it_abfd->link.next)
14192 {
14193 /* Find the section .ex9.itable, and put all entries into it. */
14194 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14195 if (table_sec != NULL)
14196 {
14197 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
14198 return;
14199
14200 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14201 number++;
14202
14203 table_sec->size = number * 4;
14204
14205 if (number == 0)
14206 return;
14207
14208 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
14209 number = 0;
14210 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14211 {
14212 long val;
14213
14214 val = strtol (ptr->string, NULL, 16);
14215 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
14216 number++;
14217 }
14218 break;
14219 }
14220 }
14221 }
14222
14223 /* Get insn with regs according to relocation type. */
14224
14225 static void
14226 nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
14227 uint32_t insn, uint32_t *insn_with_reg)
14228 {
14229 reloc_howto_type *howto = NULL;
14230
14231 if (irel == NULL
14232 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14233 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14234 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14235 {
14236 *insn_with_reg = insn;
14237 return;
14238 }
14239
14240 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14241 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
14242 }
14243
14244 /* Mask number of address bits according to relocation. */
14245
14246 static unsigned long
14247 nds32_elf_irel_mask (Elf_Internal_Rela *irel)
14248 {
14249 reloc_howto_type *howto = NULL;
14250
14251 if (irel == NULL
14252 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14253 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14254 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14255 return 0;
14256
14257 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14258 return howto->dst_mask;
14259 }
14260
14261 static void
14262 nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14263 struct elf_nds32_irel_entry *irel_ptr)
14264 {
14265 if (*irel_list == NULL)
14266 {
14267 *irel_list = irel_ptr;
14268 irel_ptr->next = NULL;
14269 }
14270 else
14271 {
14272 irel_ptr->next = *irel_list;
14273 *irel_list = irel_ptr;
14274 }
14275 }
14276
14277 static void
14278 nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14279 struct elf_link_hash_entry *h, int order)
14280 {
14281 struct elf_nds32_ex9_refix *ptr;
14282
14283 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14284 ptr->sec = sec;
14285 ptr->irel = irel;
14286 ptr->h = h;
14287 ptr->order = order;
14288 ptr->next = NULL;
14289
14290 if (ex9_refix_head == NULL)
14291 ex9_refix_head = ptr;
14292 else
14293 {
14294 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14295
14296 while (temp->next != NULL)
14297 temp = temp->next;
14298 temp->next = ptr;
14299 }
14300 }
14301
14302 enum
14303 {
14304 DATA_EXIST = 1,
14305 CLEAN_PRE = 1 << 1,
14306 PUSH_PRE = 1 << 2
14307 };
14308
14309 /* Check relocation type if supporting for ex9. */
14310
14311 static int
14312 nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14313 Elf_Internal_Rela **irel,
14314 Elf_Internal_Rela *irelend,
14315 nds32_elf_blank_t *relax_blank_list,
14316 asection *sec,bfd_vma *off,
14317 bfd_byte *contents)
14318 {
14319 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14320 bfd_boolean nested_ex9, nested_loop;
14321 bfd_boolean ex9_loop_aware;
14322 /* We use the highest 1 byte of result to record
14323 how many bytes location counter has to move. */
14324 int result = 0;
14325 Elf_Internal_Rela *irel_save = NULL;
14326 struct elf_nds32_link_hash_table *table;
14327
14328 table = nds32_elf_hash_table (info);
14329 ex9_loop_aware = table->ex9_loop_aware;
14330
14331 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14332 {
14333 switch (ELF32_R_TYPE ((*irel)->r_info))
14334 {
14335 case R_NDS32_RELAX_REGION_BEGIN:
14336 /* Ignore code block. */
14337 nested_ex9 = FALSE;
14338 nested_loop = FALSE;
14339 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14340 || (ex9_loop_aware
14341 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14342 {
14343 /* Check the region if loop or not. If it is true and
14344 ex9-loop-aware is true, ignore the region till region end. */
14345 /* To save the status for in .no_relax ex9 region and
14346 loop region to conform the block can do ex9 relaxation. */
14347 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14348 nested_loop = (ex9_loop_aware
14349 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14350 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14351 {
14352 (*irel)++;
14353 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14354 {
14355 /* There may be nested region. */
14356 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14357 nested_ex9 = TRUE;
14358 else if (ex9_loop_aware
14359 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14360 nested_loop = TRUE;
14361 }
14362 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14363 {
14364 /* The end of region. */
14365 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14366 nested_ex9 = FALSE;
14367 else if (ex9_loop_aware
14368 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14369 nested_loop = FALSE;
14370 }
14371 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
14372 && ((*irel)->r_addend & 0x1f) == 2)
14373 {
14374 /* Alignment exist in the region. */
14375 result |= CLEAN_PRE;
14376 if (((*irel)->r_offset -
14377 get_nds32_elf_blank_total (&relax_blank_list,
14378 (*irel)->r_offset, 0)) & 0x02)
14379 result |= PUSH_PRE;
14380 }
14381 }
14382 if ((*irel) >= irelend)
14383 *off = sec->size;
14384 else
14385 *off = (*irel)->r_offset;
14386
14387 /* The final instruction in the region, regard this one as data to ignore it. */
14388 result |= DATA_EXIST;
14389 return result;
14390 }
14391 break;
14392
14393 case R_NDS32_LABEL:
14394 if (((*irel)->r_addend & 0x1f) == 2)
14395 {
14396 /* Check this point is align and decide to do ex9 or not. */
14397 result |= CLEAN_PRE;
14398 if (((*irel)->r_offset -
14399 get_nds32_elf_blank_total (&relax_blank_list,
14400 (*irel)->r_offset, 0)) & 0x02)
14401 result |= PUSH_PRE;
14402 }
14403 break;
14404 case R_NDS32_32_RELA:
14405 /* Data. */
14406 result |= (4 << 24);
14407 result |= DATA_EXIST;
14408 break;
14409 case R_NDS32_16_RELA:
14410 /* Data. */
14411 result |= (2 << 24);
14412 result |= DATA_EXIST;
14413 break;
14414 case R_NDS32_DATA:
14415 /* Data. */
14416 /* The least code alignment is 2. If the data is only one byte,
14417 we have to shift one more byte. */
14418 if ((*irel)->r_addend == 1)
14419 result |= ((*irel)->r_addend << 25) ;
14420 else
14421 result |= ((*irel)->r_addend << 24) ;
14422
14423 result |= DATA_EXIST;
14424 break;
14425
14426 case R_NDS32_25_PCREL_RELA:
14427 case R_NDS32_SDA16S3_RELA:
14428 case R_NDS32_SDA15S3_RELA:
14429 case R_NDS32_SDA15S3:
14430 case R_NDS32_SDA17S2_RELA:
14431 case R_NDS32_SDA15S2_RELA:
14432 case R_NDS32_SDA12S2_SP_RELA:
14433 case R_NDS32_SDA12S2_DP_RELA:
14434 case R_NDS32_SDA15S2:
14435 case R_NDS32_SDA18S1_RELA:
14436 case R_NDS32_SDA15S1_RELA:
14437 case R_NDS32_SDA15S1:
14438 case R_NDS32_SDA19S0_RELA:
14439 case R_NDS32_SDA15S0_RELA:
14440 case R_NDS32_SDA15S0:
14441 case R_NDS32_HI20_RELA:
14442 case R_NDS32_LO12S0_ORI_RELA:
14443 case R_NDS32_LO12S0_RELA:
14444 case R_NDS32_LO12S1_RELA:
14445 case R_NDS32_LO12S2_RELA:
14446 /* These relocation is supported ex9 relaxation currently. */
14447 /* We have to save the relocation for using later, since we have
14448 to check there is any alignment in the same address. */
14449 irel_save = *irel;
14450 break;
14451 default:
14452 /* Not support relocations. */
14453 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
14454 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14455 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
14456 {
14457 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14458 But we have to consider if there is any side-effect. */
14459 if (!(result & DATA_EXIST))
14460 {
14461 /* We have to confirm there is no data relocation in the
14462 same address. In general case, this won't happen. */
14463 /* We have to do ex9 conservative, for those relocation not
14464 considerd we ignore instruction. */
14465 result |= DATA_EXIST;
14466 if (*(contents + *off) & 0x80)
14467 result |= (2 << 24);
14468 else
14469 result |= (4 << 24);
14470 break;
14471 }
14472 }
14473 }
14474 if ((*irel) < irelend
14475 && ((*irel) + 1) < irelend
14476 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14477 /* There are relocations pointing to the same address, we have to
14478 check all of them. */
14479 (*irel)++;
14480 else
14481 {
14482 if (irel_save)
14483 *irel = irel_save;
14484 return result;
14485 }
14486 }
14487 return result;
14488 }
14489
14490 /* Replace with ex9 instruction. */
14491
14492 static bfd_boolean
14493 nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14494 nds32_elf_blank_t **relax_blank_list,
14495 struct elf_nds32_irel_entry *pre_irel_ptr,
14496 struct elf_nds32_irel_entry **irel_list)
14497 {
14498 if (insn16 != 0)
14499 {
14500 /* Implement the ex9 relaxation. */
14501 bfd_putb16 (insn16, contents + pre_off);
14502 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14503 pre_off + 2, 2))
14504 return FALSE;
14505 if (pre_irel_ptr != NULL)
14506 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14507 }
14508 return TRUE;
14509 }
14510
14511 /* Replace input file instruction which is in ex9 itable. */
14512
14513 static bfd_boolean
14514 nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14515 {
14516 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14517 bfd_byte *contents = NULL;
14518 bfd_vma off;
14519 uint16_t insn16, insn_ex9;
14520 /* `pre_*' are used to track previous instruction that can use ex9.it. */
14521 bfd_vma pre_off = -1;
14522 uint16_t pre_insn16 = 0;
14523 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14524 Elf_Internal_Rela *internal_relocs;
14525 Elf_Internal_Rela *irel;
14526 Elf_Internal_Rela *irelend;
14527 Elf_Internal_Shdr *symtab_hdr;
14528 Elf_Internal_Sym *isym = NULL;
14529 nds32_elf_blank_t *relax_blank_list = NULL;
14530 uint32_t insn = 0;
14531 uint32_t insn_with_reg = 0;
14532 uint32_t it_insn;
14533 uint32_t it_insn_with_reg;
14534 unsigned long r_symndx;
14535 asection *isec;
14536 struct elf_nds32_irel_entry *irel_list = NULL;
14537 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14538 int data_flag, do_replace, save_irel;
14539 struct elf_link_hash_entry_list *h_list;
14540
14541
14542 /* Load section instructions, relocations, and symbol table. */
14543 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
14544 || !nds32_get_local_syms (abfd, sec, &isym))
14545 return FALSE;
14546 internal_relocs =
14547 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
14548 irelend = internal_relocs + sec->reloc_count;
14549 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14550
14551 off = 0;
14552
14553 /* Check if the object enable ex9. */
14554 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14555 irelend, R_NDS32_RELAX_ENTRY);
14556
14557 /* Check this section trigger ex9 relaxation. */
14558 if (irel == NULL
14559 || irel >= irelend
14560 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14561 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14562 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14563 return TRUE;
14564
14565 irel = internal_relocs;
14566
14567 /* Check alignment and fetch proper relocation. */
14568 while (off < sec->size)
14569 {
14570 struct elf_link_hash_entry *h = NULL;
14571 struct elf_nds32_irel_entry *irel_ptr = NULL;
14572
14573 /* Syn the instruction and the relocation. */
14574 while (irel != NULL && irel < irelend && irel->r_offset < off)
14575 irel++;
14576
14577 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14578 relax_blank_list, sec,
14579 &off, contents);
14580 if (data_flag & PUSH_PRE)
14581 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14582 &relax_blank_list, pre_irel_ptr,
14583 &irel_list))
14584 return FALSE;
14585
14586 if (data_flag & CLEAN_PRE)
14587 {
14588 pre_off = 0;
14589 pre_insn16 = 0;
14590 pre_irel_ptr = NULL;
14591 }
14592 if (data_flag & DATA_EXIST)
14593 {
14594 /* We save the move offset in the highest byte. */
14595 off += (data_flag >> 24);
14596 continue;
14597 }
14598
14599 if (*(contents + off) & 0x80)
14600 {
14601 /* 2-byte instruction. */
14602 off += 2;
14603 continue;
14604 }
14605
14606 /* Load the instruction and its opcode with register for comparing. */
14607 ex9_insn = ex9_insn_head;
14608 insn = bfd_getb32 (contents + off);
14609 insn_with_reg = 0;
14610 while (ex9_insn)
14611 {
14612 it_insn = strtol (ex9_insn->string, NULL, 16);
14613 it_insn_with_reg = 0;
14614 do_replace = 0;
14615 save_irel = 0;
14616
14617 if (irel != NULL && irel < irelend && irel->r_offset == off)
14618 {
14619 /* Insn with relocation. */
14620 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14621
14622 if (ex9_insn->irel != NULL)
14623 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14624 &it_insn_with_reg);
14625
14626 if (ex9_insn->irel != NULL
14627 && (ELF32_R_TYPE (irel->r_info) ==
14628 ELF32_R_TYPE (ex9_insn->irel->r_info))
14629 && (insn_with_reg == it_insn_with_reg))
14630 {
14631 /* Insn relocation and format is the same as table entry. */
14632
14633 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14634 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14635 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14636 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14637 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14638 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14639 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14640 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14641 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14642 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14643 && ELF32_R_TYPE (irel->r_info) <=
14644 R_NDS32_SDA12S2_SP_RELA)
14645 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14646 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14647 {
14648 r_symndx = ELF32_R_SYM (irel->r_info);
14649 if (r_symndx < symtab_hdr->sh_info)
14650 {
14651 /* Local symbol. */
14652 int shndx = isym[r_symndx].st_shndx;
14653
14654 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14655 if (ex9_insn->sec == isec
14656 && ex9_insn->irel->r_addend == irel->r_addend
14657 && ex9_insn->irel->r_info == irel->r_info)
14658 {
14659 do_replace = 1;
14660 save_irel = 1;
14661 }
14662 }
14663 else
14664 {
14665 /* External symbol. */
14666 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14667 if (ex9_insn->m_list)
14668 {
14669 h_list = ex9_insn->m_list->h_list;
14670 while (h_list)
14671 {
14672 if (h == h_list->h
14673 && (ex9_insn->m_list->irel->r_addend ==
14674 irel->r_addend))
14675 {
14676 do_replace = 1;
14677 save_irel = 1;
14678 break;
14679 }
14680 h_list = h_list->next;
14681 }
14682 }
14683 }
14684 }
14685 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14686 {
14687 r_symndx = ELF32_R_SYM (irel->r_info);
14688 if (r_symndx < symtab_hdr->sh_info)
14689 {
14690 /* Local symbols. Compare its base symbol and offset. */
14691 int shndx = isym[r_symndx].st_shndx;
14692
14693 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14694 if (ex9_insn->sec == isec
14695 && ex9_insn->irel->r_addend == irel->r_addend
14696 && ex9_insn->irel->r_info == irel->r_info)
14697 {
14698 do_replace = 1;
14699 save_irel = 1;
14700 }
14701 }
14702 else
14703 {
14704 /* External symbol. */
14705 struct elf_link_hash_entry_mul_list *m_list;
14706
14707 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14708 m_list = ex9_insn->m_list;
14709
14710 while (m_list)
14711 {
14712 h_list = m_list->h_list;
14713
14714 while (h_list)
14715 {
14716 if (h == h_list->h
14717 && (m_list->irel->r_addend
14718 == irel->r_addend))
14719 {
14720 do_replace = 1;
14721 save_irel = 1;
14722 if (ex9_insn->next
14723 && ex9_insn->m_list
14724 && ex9_insn->m_list == ex9_insn->next->m_list)
14725 {
14726 /* sethi multiple entry must be fixed */
14727 nds32_elf_ex9_insert_fix (sec, irel,
14728 h, ex9_insn->order);
14729 }
14730 break;
14731 }
14732 h_list = h_list->next;
14733 }
14734 m_list = m_list->next;
14735 }
14736 }
14737 }
14738 }
14739
14740 /* Import table: Check the symbol hash table and the
14741 jump target. Only R_NDS32_25_PCREL_RELA now. */
14742 else if (ex9_insn->times == -1
14743 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14744 {
14745 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14746 if (insn_with_reg == it_insn_with_reg)
14747 {
14748 char code[10];
14749 bfd_vma relocation;
14750
14751 r_symndx = ELF32_R_SYM (irel->r_info);
14752 if (r_symndx >= symtab_hdr->sh_info)
14753 {
14754 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14755 if ((h->root.type == bfd_link_hash_defined
14756 || h->root.type == bfd_link_hash_defweak)
14757 && h->root.u.def.section != NULL
14758 && h->root.u.def.section->output_section != NULL
14759 && h->root.u.def.section->gc_mark == 1
14760 && bfd_is_abs_section (h->root.u.def.section)
14761 && h->root.u.def.value > sec->size)
14762 {
14763 relocation = h->root.u.def.value +
14764 h->root.u.def.section->output_section->vma +
14765 h->root.u.def.section->output_offset;
14766 relocation += irel->r_addend;
14767 insn = insn_with_reg
14768 | ((relocation >> 1) & 0xffffff);
14769 snprintf (code, sizeof (code), "%08x", insn);
14770 if (strcmp (code, ex9_insn->string) == 0)
14771 {
14772 do_replace = 1;
14773 save_irel = 1;
14774 }
14775 }
14776 }
14777 }
14778 }
14779 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
14780 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14781 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
14782 {
14783 /* These relocations do not have to relocate contens, so it can
14784 be regard as instruction without relocation. */
14785 if (insn == it_insn && ex9_insn->irel == NULL)
14786 do_replace = 1;
14787 }
14788 }
14789 else
14790 {
14791 /* Instruction without relocation, we only
14792 have to compare their byte code. */
14793 if (insn == it_insn && ex9_insn->irel == NULL)
14794 do_replace = 1;
14795 }
14796
14797 /* Insntruction match so replacing the code here. */
14798 if (do_replace == 1)
14799 {
14800 /* There are two formats of ex9 instruction. */
14801 if (ex9_insn->order < 32)
14802 insn_ex9 = INSN_EX9_IT_2;
14803 else
14804 insn_ex9 = INSN_EX9_IT_1;
14805 insn16 = insn_ex9 | ex9_insn->order;
14806
14807 /* Insert ex9 instruction. */
14808 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14809 &relax_blank_list, pre_irel_ptr,
14810 &irel_list);
14811 pre_off = off;
14812 pre_insn16 = insn16;
14813
14814 if (save_irel)
14815 {
14816 /* For instuction with relocation do relax. */
14817 irel_ptr = (struct elf_nds32_irel_entry *)
14818 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14819 irel_ptr->irel = irel;
14820 irel_ptr->next = NULL;
14821 pre_irel_ptr = irel_ptr;
14822 }
14823 else
14824 pre_irel_ptr = NULL;
14825 break;
14826 }
14827 ex9_insn = ex9_insn->next;
14828 }
14829 off += 4;
14830 }
14831
14832 /* Insert ex9 instruction. */
14833 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14834 &relax_blank_list, pre_irel_ptr,
14835 &irel_list);
14836
14837 /* Delete the redundant code. */
14838 if (relax_blank_list)
14839 {
14840 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14841 relax_blank_list = NULL;
14842 }
14843
14844 /* Clear the relocation that is replaced by ex9. */
14845 while (irel_list)
14846 {
14847 struct elf_nds32_irel_entry *irel_ptr;
14848
14849 irel_ptr = irel_list;
14850 irel_list = irel_ptr->next;
14851 irel_ptr->irel->r_info =
14852 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14853 free (irel_ptr);
14854 }
14855 return TRUE;
14856 }
14857
14858 /* Initialize ex9 hash table. */
14859
14860 int
14861 nds32_elf_ex9_init (void)
14862 {
14863 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14864 sizeof (struct elf_nds32_code_hash_entry),
14865 1023))
14866 {
14867 _bfd_error_handler (_("Linker: cannot init ex9 hash table error \n"));
14868 return FALSE;
14869 }
14870 return TRUE;
14871 }
14872
14873 /* Predict how many bytes will be relaxed with ex9 and ifc. */
14874
14875 static void
14876 nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14877 {
14878 struct elf_nds32_insn_times_entry *ex9_insn;
14879 struct elf_nds32_insn_times_entry *temp;
14880 int target_optimize;
14881 struct elf_nds32_link_hash_table *table;
14882
14883 if (ex9_insn_head == NULL)
14884 return;
14885
14886 table = nds32_elf_hash_table (info);
14887 target_optimize = table->target_optimize;
14888 ex9_insn = ex9_insn_head;
14889 while (ex9_insn)
14890 {
14891 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14892 temp = ex9_insn;
14893 ex9_insn = ex9_insn->next;
14894 free (temp);
14895 }
14896 ex9_insn_head = NULL;
14897
14898 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14899 {
14900 /* Examine ifc reduce size. */
14901 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14902 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14903 int size = 0;
14904
14905 while (ifc_ent)
14906 {
14907 if (ifc_ent->enable == 0)
14908 {
14909 /* Not ifc yet. */
14910 irel_ptr = ifc_ent->irel_head;
14911 while (irel_ptr)
14912 {
14913 size += 2;
14914 irel_ptr = irel_ptr->next;
14915 }
14916 }
14917 size -= 2;
14918 ifc_ent = ifc_ent->next;
14919 }
14920 ex9_relax_size += size;
14921 }
14922 }
14923
14924 /* Finish ex9 table. */
14925
14926 void
14927 nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14928 {
14929 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14930 nds32_elf_order_insn_times (link_info);
14931 nds32_elf_ex9_total_relax (link_info);
14932 /* Traverse the hash table and count its times. */
14933 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14934 nds32_elf_order_insn_times (link_info);
14935 nds32_elf_ex9_build_itable (link_info);
14936 }
14937
14938 /* Relocate the entries in ex9 table. */
14939
14940 static bfd_vma
14941 nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14942 struct bfd_link_info *link_info)
14943 {
14944 Elf_Internal_Sym *isym = NULL;
14945 bfd_vma relocation = -1;
14946 struct elf_link_hash_entry *h;
14947
14948 if (ptr->m_list != NULL)
14949 {
14950 /* Global symbol. */
14951 h = ptr->m_list->h_list->h;
14952 if ((h->root.type == bfd_link_hash_defined
14953 || h->root.type == bfd_link_hash_defweak)
14954 && h->root.u.def.section != NULL
14955 && h->root.u.def.section->output_section != NULL)
14956 {
14957
14958 relocation = h->root.u.def.value +
14959 h->root.u.def.section->output_section->vma +
14960 h->root.u.def.section->output_offset;
14961 relocation += ptr->m_list->irel->r_addend;
14962 }
14963 else
14964 relocation = 0;
14965 }
14966 else if (ptr->sec !=NULL)
14967 {
14968 /* Local symbol. */
14969 Elf_Internal_Sym sym;
14970 asection *sec = NULL;
14971 asection isec;
14972 asection *isec_ptr = &isec;
14973 Elf_Internal_Rela irel_backup = *(ptr->irel);
14974 asection *sec_backup = ptr->sec;
14975 bfd *abfd = ptr->sec->owner;
14976
14977 if (!nds32_get_local_syms (abfd, sec, &isym))
14978 return FALSE;
14979 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14980
14981 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14982 if (sec != NULL)
14983 *isec_ptr = *sec;
14984 sym = *isym;
14985
14986 /* The purpose is same as elf_link_input_bfd. */
14987 if (isec_ptr != NULL
14988 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14989 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14990 {
14991 sym.st_value =
14992 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14993 elf_section_data (isec_ptr)->sec_info,
14994 isym->st_value);
14995 }
14996 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14997 &ptr->sec, ptr->irel);
14998 if (ptr->irel != NULL)
14999 relocation += ptr->irel->r_addend;
15000
15001 /* Restore origin value since there may be some insntructions that
15002 could not be replaced with ex9.it. */
15003 *(ptr->irel) = irel_backup;
15004 ptr->sec = sec_backup;
15005 }
15006
15007 return relocation;
15008 }
15009
15010 /* Import ex9 table and build list. */
15011
15012 void
15013 nds32_elf_ex9_import_table (struct bfd_link_info *info)
15014 {
15015 int num = 0;
15016 bfd_byte *contents;
15017 unsigned long insn;
15018 FILE *ex9_import_file;
15019 int update_ex9_table;
15020 struct elf_nds32_link_hash_table *table;
15021
15022 table = nds32_elf_hash_table (info);
15023 ex9_import_file = table->ex9_import_file;
15024 rewind (table->ex9_import_file);
15025
15026 contents = bfd_malloc (sizeof (bfd_byte) * 4);
15027
15028 /* Read instructions from the input file and build the list. */
15029 while (!feof (ex9_import_file))
15030 {
15031 char *code;
15032 struct elf_nds32_insn_times_entry *ptr;
15033 size_t nread;
15034
15035 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
15036 /* Ignore the final byte 0x0a. */
15037 if (nread < 1)
15038 break;
15039 insn = bfd_getb32 (contents);
15040 code = bfd_malloc (sizeof (char) * 9);
15041 snprintf (code, 9, "%08lx", insn);
15042 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
15043 ptr->string = code;
15044 ptr->order = num;
15045 ptr->times = -1;
15046 ptr->sec = NULL;
15047 ptr->m_list = NULL;
15048 ptr->rel_backup.r_offset = 0;
15049 ptr->rel_backup.r_info = 0;
15050 ptr->rel_backup.r_addend = 0;
15051 ptr->irel = NULL;
15052 ptr->next = NULL;
15053 nds32_elf_ex9_insert_entry (ptr);
15054 num++;
15055 }
15056
15057 update_ex9_table = table->update_ex9_table;
15058 if (update_ex9_table == 1)
15059 {
15060 /* It has to consider of sethi need to use multiple page
15061 but it not be done yet. */
15062 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
15063 nds32_elf_order_insn_times (info);
15064 }
15065 }
15066
15067 /* Export ex9 table. */
15068
15069 static void
15070 nds32_elf_ex9_export (struct bfd_link_info *info,
15071 bfd_byte *contents, int size)
15072 {
15073 FILE *ex9_export_file;
15074 struct elf_nds32_link_hash_table *table;
15075
15076 table = nds32_elf_hash_table (info);
15077 ex9_export_file = table->ex9_export_file;
15078 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
15079 fclose (ex9_export_file);
15080 }
15081
15082 /* Adjust relocations of J and JAL in ex9.itable.
15083 Export ex9 table. */
15084
15085 static void
15086 nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
15087 {
15088 asection *table_sec = NULL;
15089 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
15090 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
15091 bfd *it_abfd;
15092 uint32_t insn, insn_with_reg, source_insn;
15093 bfd_byte *contents = NULL, *source_contents = NULL;
15094 int size = 0;
15095 bfd_vma gp;
15096 int shift, update_ex9_table, offset = 0;
15097 reloc_howto_type *howto = NULL;
15098 Elf_Internal_Rela rel_backup;
15099 unsigned short insn_ex9;
15100 struct elf_nds32_link_hash_table *table;
15101 FILE *ex9_export_file;
15102 static bfd_boolean done = FALSE;
15103
15104 if (done)
15105 return;
15106
15107 done = TRUE;
15108
15109 table = nds32_elf_hash_table (link_info);
15110 if (table)
15111 table->relax_status |= NDS32_RELAX_EX9_DONE;
15112
15113
15114 update_ex9_table = table->update_ex9_table;
15115 /* Generated ex9.itable exactly. */
15116 if (update_ex9_table == 0)
15117 {
15118 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
15119 it_abfd = it_abfd->link.next)
15120 {
15121 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
15122 if (table_sec != NULL)
15123 break;
15124 }
15125
15126 if (table_sec != NULL)
15127 {
15128 bfd *output_bfd;
15129
15130 output_bfd = table_sec->output_section->owner;
15131 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15132 if (table_sec->size == 0)
15133 return;
15134
15135 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
15136 return;
15137 }
15138 }
15139 else
15140 {
15141 /* Set gp. */
15142 bfd *output_bfd;
15143
15144 output_bfd = link_info->input_bfds->sections->output_section->owner;
15145 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15146 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
15147 }
15148
15149 /* Relocate instruction. */
15150 while (ex9_insn)
15151 {
15152 bfd_vma relocation, min_relocation = 0xffffffff;
15153
15154 insn = strtol (ex9_insn->string, NULL, 16);
15155 insn_with_reg = 0;
15156 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
15157 {
15158 if (ex9_insn->m_list)
15159 rel_backup = ex9_insn->m_list->rel_backup;
15160 else
15161 rel_backup = ex9_insn->rel_backup;
15162
15163 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
15164 howto =
15165 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
15166 (rel_backup.r_info));
15167 shift = howto->rightshift;
15168 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
15169 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
15170 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
15171 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
15172 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
15173 {
15174 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15175 insn =
15176 insn_with_reg | ((relocation >> shift) &
15177 nds32_elf_irel_mask (&rel_backup));
15178 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15179 }
15180 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
15181 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
15182 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
15183 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
15184 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
15185 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
15186 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
15187 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
15188 {
15189 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15190 insn =
15191 insn_with_reg | (((relocation - gp) >> shift) &
15192 nds32_elf_irel_mask (&rel_backup));
15193 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15194 }
15195 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
15196 {
15197 /* Sethi may be multiple entry for one insn. */
15198 if (ex9_insn->next && ex9_insn->m_list
15199 && ex9_insn->m_list == ex9_insn->next->m_list)
15200 {
15201 struct elf_link_hash_entry_mul_list *m_list;
15202 struct elf_nds32_ex9_refix *fix_ptr;
15203 struct elf_link_hash_entry *h;
15204
15205 temp_ptr = ex9_insn;
15206 temp_ptr2 = ex9_insn;
15207 m_list = ex9_insn->m_list;
15208 while (m_list)
15209 {
15210 h = m_list->h_list->h;
15211 relocation = h->root.u.def.value +
15212 h->root.u.def.section->output_section->vma +
15213 h->root.u.def.section->output_offset;
15214 relocation += m_list->irel->r_addend;
15215
15216 if (relocation < min_relocation)
15217 min_relocation = relocation;
15218 m_list = m_list->next;
15219 }
15220 relocation = min_relocation;
15221
15222 /* Put insntruction into ex9 table. */
15223 insn = insn_with_reg
15224 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
15225 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15226 relocation = relocation + 0x1000; /* hi20 */
15227
15228 while (ex9_insn->next && ex9_insn->m_list
15229 && ex9_insn->m_list == ex9_insn->next->m_list)
15230 {
15231 /* Multiple sethi. */
15232 ex9_insn = ex9_insn->next;
15233 size += 4;
15234 insn =
15235 insn_with_reg | ((relocation >> shift) &
15236 nds32_elf_irel_mask (&rel_backup));
15237 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15238 relocation = relocation + 0x1000; /* hi20 */
15239 }
15240
15241 fix_ptr = ex9_refix_head;
15242 while (fix_ptr)
15243 {
15244 /* Fix ex9 insn. */
15245 /* temp_ptr2 points to the head of multiple sethi. */
15246 temp_ptr = temp_ptr2;
15247 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
15248 {
15249 fix_ptr = fix_ptr->next;
15250 }
15251 if (fix_ptr->order != temp_ptr->order)
15252 break;
15253
15254 /* Set source insn. */
15255 relocation =
15256 fix_ptr->h->root.u.def.value +
15257 fix_ptr->h->root.u.def.section->output_section->vma +
15258 fix_ptr->h->root.u.def.section->output_offset;
15259 relocation += fix_ptr->irel->r_addend;
15260 /* sethi imm is imm20s. */
15261 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15262
15263 while (temp_ptr)
15264 {
15265 /* Match entry and source code. */
15266 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15267 if (insn == source_insn)
15268 {
15269 /* Fix the ex9 insn. */
15270 if (temp_ptr->order != fix_ptr->order)
15271 {
15272 if (!nds32_get_section_contents
15273 (fix_ptr->sec->owner, fix_ptr->sec,
15274 &source_contents, TRUE))
15275 _bfd_error_handler
15276 (_("Linker: error cannot fixed ex9 relocation \n"));
15277 if (temp_ptr->order < 32)
15278 insn_ex9 = INSN_EX9_IT_2;
15279 else
15280 insn_ex9 = INSN_EX9_IT_1;
15281 insn_ex9 = insn_ex9 | temp_ptr->order;
15282 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15283 }
15284 break;
15285 }
15286 else
15287 {
15288 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
15289 _bfd_error_handler
15290 (_("Linker: error cannot fixed ex9 relocation \n"));
15291 else
15292 temp_ptr = temp_ptr->next;
15293 }
15294 }
15295 fix_ptr = fix_ptr->next;
15296 }
15297 }
15298 else
15299 {
15300 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15301 insn = insn_with_reg
15302 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
15303 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15304 }
15305 }
15306 }
15307 else
15308 {
15309 /* Insn without relocation does not have to be fixed
15310 if need to update export table. */
15311 if (update_ex9_table == 1)
15312 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15313 }
15314 ex9_insn = ex9_insn->next;
15315 size += 4;
15316 }
15317
15318 ex9_export_file = table->ex9_export_file;
15319 if (ex9_export_file != NULL)
15320 nds32_elf_ex9_export (link_info, contents, table_sec->size);
15321 else if (update_ex9_table == 1)
15322 {
15323 table->ex9_export_file = table->ex9_import_file;
15324 rewind (table->ex9_export_file);
15325 nds32_elf_ex9_export (link_info, contents, size);
15326 }
15327 }
15328
15329 /* Generate ex9 hash table. */
15330
15331 static bfd_boolean
15332 nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
15333 struct bfd_link_info *link_info)
15334 {
15335 Elf_Internal_Rela *internal_relocs;
15336 Elf_Internal_Rela *irelend;
15337 Elf_Internal_Rela *irel;
15338 Elf_Internal_Rela *jrel;
15339 Elf_Internal_Rela rel_backup;
15340 Elf_Internal_Shdr *symtab_hdr;
15341 Elf_Internal_Sym *isym = NULL;
15342 asection *isec;
15343 struct elf_link_hash_entry **sym_hashes;
15344 bfd_byte *contents = NULL;
15345 bfd_vma off = 0;
15346 unsigned long r_symndx;
15347 uint32_t insn, insn_with_reg;
15348 struct elf_link_hash_entry *h;
15349 int data_flag, shift, align;
15350 bfd_vma relocation;
15351 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15352 reloc_howto_type *howto = NULL;
15353
15354 sym_hashes = elf_sym_hashes (abfd);
15355 /* Load section instructions, relocations, and symbol table. */
15356 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
15357 return FALSE;
15358
15359 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15360 TRUE /* keep_memory */);
15361 irelend = internal_relocs + sec->reloc_count;
15362 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15363 if (!nds32_get_local_syms (abfd, sec, &isym))
15364 return FALSE;
15365
15366 /* Check the object if enable ex9. */
15367 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15368 R_NDS32_RELAX_ENTRY);
15369
15370 /* Check this section trigger ex9 relaxation. */
15371 if (irel == NULL
15372 || irel >= irelend
15373 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15374 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15375 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15376 return TRUE;
15377
15378 irel = internal_relocs;
15379
15380 /* Push each insn into hash table. */
15381 while (off < sec->size)
15382 {
15383 char code[10];
15384 struct elf_nds32_code_hash_entry *entry;
15385
15386 while (irel != NULL && irel < irelend && irel->r_offset < off)
15387 irel++;
15388
15389 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15390 NULL, sec, &off, contents);
15391 if (data_flag & DATA_EXIST)
15392 {
15393 /* We save the move offset in the highest byte. */
15394 off += (data_flag >> 24);
15395 continue;
15396 }
15397
15398 if (*(contents + off) & 0x80)
15399 {
15400 off += 2;
15401 }
15402 else
15403 {
15404 h = NULL;
15405 isec = NULL;
15406 jrel = NULL;
15407 rel_backup.r_info = 0;
15408 rel_backup.r_offset = 0;
15409 rel_backup.r_addend = 0;
15410 /* Load the instruction and its opcode with register for comparing. */
15411 insn = bfd_getb32 (contents + off);
15412 insn_with_reg = 0;
15413 if (irel != NULL && irel < irelend && irel->r_offset == off)
15414 {
15415 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15416 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15417 shift = howto->rightshift;
15418 align = (1 << shift) - 1;
15419 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15420 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15421 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15422 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15423 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15424 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15425 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15426 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15427 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15428 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15429 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15430 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15431 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15432 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15433 {
15434 r_symndx = ELF32_R_SYM (irel->r_info);
15435 jrel = irel;
15436 rel_backup = *irel;
15437 if (r_symndx < symtab_hdr->sh_info)
15438 {
15439 /* Local symbol. */
15440 int shndx = isym[r_symndx].st_shndx;
15441
15442 bfd_vma st_value = (isym + r_symndx)->st_value;
15443 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15444 relocation = (isec->output_section->vma + isec->output_offset
15445 + st_value + irel->r_addend);
15446 }
15447 else
15448 {
15449 /* External symbol. */
15450 bfd_boolean warned ATTRIBUTE_UNUSED;
15451 bfd_boolean ignored ATTRIBUTE_UNUSED;
15452 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15453 asection *sym_sec;
15454
15455 /* Maybe there is a better way to get h and relocation */
15456 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15457 r_symndx, symtab_hdr, sym_hashes,
15458 h, sym_sec, relocation,
15459 unresolved_reloc, warned, ignored);
15460 relocation += irel->r_addend;
15461 if ((h->root.type != bfd_link_hash_defined
15462 && h->root.type != bfd_link_hash_defweak)
15463 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
15464 {
15465 off += 4;
15466 continue;
15467 }
15468 }
15469
15470 /* Check for gp relative instruction alignment. */
15471 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15472 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15473 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15474 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15475 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15476 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15477 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15478 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15479 {
15480 bfd_vma gp;
15481 bfd *output_bfd = sec->output_section->owner;
15482 bfd_reloc_status_type r;
15483
15484 /* If the symbol is in the abs section, the out_bfd will be null.
15485 This happens when the relocation has a symbol@GOTOFF. */
15486 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15487 if (r != bfd_reloc_ok)
15488 {
15489 off += 4;
15490 continue;
15491 }
15492
15493 relocation -= gp;
15494
15495 /* Make sure alignment is correct. */
15496 if (relocation & align)
15497 {
15498 /* Incorrect alignment. */
15499 _bfd_error_handler
15500 (_("%s: warning: unaligned small data access. "
15501 "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."),
15502 bfd_get_filename (abfd), irel->r_offset,
15503 irel->r_info, irel->r_addend, relocation, align);
15504 off += 4;
15505 continue;
15506 }
15507 }
15508
15509 insn = insn_with_reg
15510 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15511 }
15512 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
15513 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15514 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
15515 {
15516 /* These relocations do not have to relocate contens, so it can
15517 be regard as instruction without relocation. */
15518 }
15519 else
15520 {
15521 off += 4;
15522 continue;
15523 }
15524 }
15525
15526 snprintf (code, sizeof (code), "%08x", insn);
15527 /* Copy "code". */
15528 entry = (struct elf_nds32_code_hash_entry*)
15529 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15530 if (entry == NULL)
15531 {
15532 _bfd_error_handler
15533 (_("%P%F: failed creating ex9.it %s hash table: %E\n"), code);
15534 return FALSE;
15535 }
15536 if (h)
15537 {
15538 if (h->root.type == bfd_link_hash_undefined)
15539 return TRUE;
15540 /* Global symbol. */
15541 /* In order to do sethi with different symbol but same value. */
15542 if (entry->m_list == NULL)
15543 {
15544 struct elf_link_hash_entry_mul_list *m_list_new;
15545 struct elf_link_hash_entry_list *h_list_new;
15546
15547 m_list_new = (struct elf_link_hash_entry_mul_list *)
15548 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15549 h_list_new = (struct elf_link_hash_entry_list *)
15550 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15551 entry->m_list = m_list_new;
15552 m_list_new->h_list = h_list_new;
15553 m_list_new->rel_backup = rel_backup;
15554 m_list_new->times = 1;
15555 m_list_new->irel = jrel;
15556 m_list_new->next = NULL;
15557 h_list_new->h = h;
15558 h_list_new->next = NULL;
15559 }
15560 else
15561 {
15562 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15563 struct elf_link_hash_entry_list *h_list;
15564
15565 while (m_list)
15566 {
15567 /* Build the different symbols that point to the same address. */
15568 h_list = m_list->h_list;
15569 if (h_list->h->root.u.def.value == h->root.u.def.value
15570 && h_list->h->root.u.def.section->output_section->vma
15571 == h->root.u.def.section->output_section->vma
15572 && h_list->h->root.u.def.section->output_offset
15573 == h->root.u.def.section->output_offset
15574 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15575 {
15576 m_list->times++;
15577 m_list->irel = jrel;
15578 while (h_list->h != h && h_list->next)
15579 h_list = h_list->next;
15580 if (h_list->h != h)
15581 {
15582 struct elf_link_hash_entry_list *h_list_new;
15583
15584 h_list_new = (struct elf_link_hash_entry_list *)
15585 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15586 h_list->next = h_list_new;
15587 h_list_new->h = h;
15588 h_list_new->next = NULL;
15589 }
15590 break;
15591 }
15592 /* The sethi case may have different address but the
15593 hi20 is the same. */
15594 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15595 && m_list->next == NULL)
15596 {
15597 struct elf_link_hash_entry_mul_list *m_list_new;
15598 struct elf_link_hash_entry_list *h_list_new;
15599
15600 m_list_new = (struct elf_link_hash_entry_mul_list *)
15601 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15602 h_list_new = (struct elf_link_hash_entry_list *)
15603 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15604 m_list->next = m_list_new;
15605 m_list_new->h_list = h_list_new;
15606 m_list_new->rel_backup = rel_backup;
15607 m_list_new->times = 1;
15608 m_list_new->irel = jrel;
15609 m_list_new->next = NULL;
15610 h_list_new->h = h;
15611 h_list_new->next = NULL;
15612 break;
15613 }
15614 m_list = m_list->next;
15615 }
15616 if (!m_list)
15617 {
15618 off += 4;
15619 continue;
15620 }
15621 }
15622 }
15623 else
15624 {
15625 /* Local symbol and insn without relocation*/
15626 entry->times++;
15627 entry->rel_backup = rel_backup;
15628 }
15629
15630 /* Use in sethi insn with constant and global symbol in same format. */
15631 if (!jrel)
15632 entry->const_insn = 1;
15633 else
15634 entry->irel = jrel;
15635 entry->sec = isec;
15636 off += 4;
15637 }
15638 }
15639 return TRUE;
15640 }
15641
15642 /* Set the _ITB_BASE, and point it to ex9 table. */
15643
15644 bfd_boolean
15645 nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15646 {
15647 bfd *abfd;
15648 asection *sec;
15649 bfd *output_bfd = NULL;
15650 struct bfd_link_hash_entry *bh = NULL;
15651
15652 if (is_ITB_BASE_set == 1)
15653 return TRUE;
15654
15655 is_ITB_BASE_set = 1;
15656
15657 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15658
15659 if (bh && (bh->type == bfd_link_hash_defined
15660 || bh->type == bfd_link_hash_defweak))
15661 return TRUE;
15662
15663 for (abfd = link_info->input_bfds; abfd != NULL;
15664 abfd = abfd->link.next)
15665 {
15666 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15667 if (sec != NULL)
15668 {
15669 output_bfd = sec->output_section->owner;
15670 break;
15671 }
15672 }
15673 if (output_bfd == NULL)
15674 {
15675 output_bfd = link_info->output_bfd;
15676 if (output_bfd->sections == NULL)
15677 return TRUE;
15678 else
15679 sec = bfd_abs_section_ptr;
15680 }
15681 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15682 FALSE, FALSE, TRUE);
15683 return (_bfd_generic_link_add_one_symbol
15684 (link_info, output_bfd, "_ITB_BASE_",
15685 BSF_GLOBAL | BSF_WEAK, sec, 0,
15686 (const char *) NULL, FALSE, get_elf_backend_data
15687 (output_bfd)->collect, &bh));
15688 } /* End EX9.IT */
15689 \f
15690
15691 #define ELF_ARCH bfd_arch_nds32
15692 #define ELF_MACHINE_CODE EM_NDS32
15693 #define ELF_MAXPAGESIZE 0x1000
15694 #define ELF_TARGET_ID NDS32_ELF_DATA
15695
15696 #define TARGET_BIG_SYM nds32_elf32_be_vec
15697 #define TARGET_BIG_NAME "elf32-nds32be"
15698 #define TARGET_LITTLE_SYM nds32_elf32_le_vec
15699 #define TARGET_LITTLE_NAME "elf32-nds32le"
15700
15701 #define elf_info_to_howto nds32_info_to_howto
15702 #define elf_info_to_howto_rel nds32_info_to_howto_rel
15703
15704 #define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15705 #define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15706 #define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15707 #define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15708 #define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15709
15710 #define bfd_elf32_mkobject nds32_elf_mkobject
15711 #define elf_backend_action_discarded nds32_elf_action_discarded
15712 #define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15713 #define elf_backend_check_relocs nds32_elf_check_relocs
15714 #define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15715 #define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15716 #define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15717 #define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15718 #define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15719 #define elf_backend_relocate_section nds32_elf_relocate_section
15720 #define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
15721 #define elf_backend_gc_sweep_hook nds32_elf_gc_sweep_hook
15722 #define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15723 #define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15724 #define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15725 #define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15726 #define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15727 #define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15728 #define elf_backend_object_p nds32_elf_object_p
15729 #define elf_backend_final_write_processing nds32_elf_final_write_processing
15730 #define elf_backend_special_sections nds32_elf_special_sections
15731 #define bfd_elf32_bfd_get_relocated_section_contents \
15732 nds32_elf_get_relocated_section_contents
15733
15734 #define elf_backend_can_gc_sections 1
15735 #define elf_backend_can_refcount 1
15736 #define elf_backend_want_got_plt 1
15737 #define elf_backend_plt_readonly 1
15738 #define elf_backend_want_plt_sym 0
15739 #define elf_backend_got_header_size 12
15740 #define elf_backend_may_use_rel_p 1
15741 #define elf_backend_default_use_rela_p 1
15742 #define elf_backend_may_use_rela_p 1
15743
15744 #include "elf32-target.h"
15745
15746 #undef ELF_MAXPAGESIZE
15747 #define ELF_MAXPAGESIZE 0x2000
15748
15749 #undef TARGET_BIG_SYM
15750 #define TARGET_BIG_SYM nds32_elf32_linux_be_vec
15751 #undef TARGET_BIG_NAME
15752 #define TARGET_BIG_NAME "elf32-nds32be-linux"
15753 #undef TARGET_LITTLE_SYM
15754 #define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
15755 #undef TARGET_LITTLE_NAME
15756 #define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15757 #undef elf32_bed
15758 #define elf32_bed elf32_nds32_lin_bed
15759
15760 #include "elf32-target.h"