binutils/sparc-pinsn.c

   1 /* disassemble sparc instructions for objdump
   2    Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
   3
   4
   5 This file is part of the binutils.
   6
   7 The binutils are free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 2, or (at your option)
  10 any later version.
  11
  12 The binutils are distributed in the hope that they will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with the binutils; see the file COPYING.  If not, write to
  19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
  20
  21 #include "bfd.h"
  22 #include "sysdep.h"
  23 #include <stdio.h>
  24 #include "opcode/sparc.h"
  25 #include "objdump.h"
  26 extern int print_address();
  27
  28 static  char *reg_names[] =
  29  { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
  30   "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
  31   "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
  32   "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
  33   "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
  34   "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
  35   "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
  36   "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
  37   "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr" };
  38
  39 #define freg_names      (&reg_names[4 * 8])
  40
  41 union sparc_insn
  42   {
  43     unsigned long int code;
  44     struct
  45       {
  46         unsigned int _OP:2;
  47 #define op      ldst._OP
  48         unsigned int _RD:5;
  49 #define rd      ldst._RD
  50         unsigned int op3:6;
  51         unsigned int _RS1:5;
  52 #define rs1     ldst._RS1
  53         unsigned int i:1;
  54         unsigned int _ASI:8;
  55 #define asi     ldst._ASI
  56         unsigned int _RS2:5;
  57 #define rs2     ldst._RS2
  58 #define shcnt   rs2
  59       } ldst;
  60     struct
  61       {
  62         unsigned int _OP:2, _RD:5, op3:6, _RS1:5, i:1;
  63         unsigned int IMM13:13;
  64 #define imm13   IMM13.IMM13
  65       } IMM13;
  66     struct
  67       {
  68         unsigned int _OP:2;
  69         unsigned int a:1;
  70         unsigned int cond:4;
  71         unsigned int op2:3;
  72         unsigned int DISP22:22;
  73 #define disp22  branch.DISP22
  74       } branch;
  75 #ifndef NO_V9
  76     struct
  77       {
  78         unsigned int _OP:2, _RD:5, op3:6, _RS1:5;
  79         unsigned int DISP14:14;
  80 #define disp14  DISP14.DISP14
  81       } DISP14;
  82     struct
  83       {
  84         unsigned int _OP:2;
  85         unsigned int a:1;
  86         unsigned int cond:4;
  87         unsigned int op2:3;
  88         unsigned int p:1;
  89         unsigned int DISP21:21;
  90 #define disp21  branch2.DISP21
  91       } branch2;
  92 #endif /* NO_V9 */
  93
  94 #define imm22   disp22
  95     struct
  96       {
  97         unsigned int _OP:2;
  98         unsigned int _DISP30:30;
  99 #define disp30  call._DISP30
 100       } call;
 101   };
 102
 103 /* Nonzero if INSN is the opcode for a delayed branch.  */
 104 static int
 105 is_delayed_branch (insn)
 106      union sparc_insn insn;
 107 {
 108   unsigned int i;
 109
 110   for (i = 0; i < NUMOPCODES; ++i)
 111     {
 112       const struct sparc_opcode *opcode = &sparc_opcodes[i];
 113       if ((opcode->match & insn.code) == opcode->match
 114           && (opcode->lose & insn.code) == 0
 115           && (opcode->flags&F_DELAYED))
 116         return 1;
 117     }
 118   return 0;
 119 }
 120
 121 static int opcodes_sorted = 0;
 122
 123 /* Print one instruction from MEMADDR on STREAM.  */
 124 int
 125 print_insn_sparc (memaddr, buffer,  stream)
 126      bfd_vma memaddr;
 127     bfd_byte  *buffer;
 128      FILE *stream;
 129
 130 {
 131   union sparc_insn insn;
 132
 133   register unsigned int i;
 134
 135   if (!opcodes_sorted)
 136     {
 137       static int compare_opcodes ();
 138       qsort ((char *) sparc_opcodes, NUMOPCODES,
 139              sizeof (sparc_opcodes[0]), compare_opcodes);
 140       opcodes_sorted = 1;
 141     }
 142
 143 memcpy(&insn,buffer, sizeof (insn));
 144
 145   for (i = 0; i < NUMOPCODES; ++i)
 146     {
 147       const struct sparc_opcode *opcode = &sparc_opcodes[i];
 148       if ((opcode->match & insn.code) == opcode->match
 149           && (opcode->lose & insn.code) == 0)
 150         {
 151           /* Nonzero means that we have found an instruction which has
 152              the effect of adding or or'ing the imm13 field to rs1.  */
 153           int imm_added_to_rs1 = 0;
 154
 155           /* Nonzero means that we have found a plus sign in the args
 156              field of the opcode table.  */
 157           int found_plus = 0;
 158
 159           /* Do we have an 'or' instruction where rs1 is the same
 160              as rsd, and which has the i bit set?  */
 161           if (opcode->match == 0x80102000
 162               && insn.rs1 == insn.rd)
 163             imm_added_to_rs1 = 1;
 164
 165           if (strchr (opcode->args, 'S') != 0)
 166             /* Reject the special case for `set'.
 167                The real `sethi' will match.  */
 168             continue;
 169           if (insn.rs1 != insn.rd
 170               && strchr (opcode->args, 'r') != 0)
 171               /* Can't do simple format if source and dest are different.  */
 172               continue;
 173
 174           fputs (opcode->name, stream);
 175
 176           {
 177             register const char *s;
 178
 179             if (opcode->args[0] != ',')
 180               fputs (" ", stream);
 181             for (s = opcode->args; *s != '\0'; ++s)
 182               {
 183                 while (*s == ',')
 184                   {
 185                     fputs (",", stream);
 186                     ++s;
 187
 188                     switch (*s) {
 189                     case 'a':
 190                       fputs ("a", stream);
 191                       ++s;
 192                       continue;
 193 #ifndef NO_V9
 194                     case 'N':
 195                       fputs("pn", stream);
 196                       ++s;
 197                       continue;
 198
 199                     case 'T':
 200                       fputs("pt", stream);
 201                       ++s;
 202                       continue;
 203 #endif                          /* NO_V9 */
 204
 205                     default:
 206                       break;
 207                     }           /* switch on arg */
 208                   }             /* while there are comma started args */
 209
 210                 fputs (" ", stream);
 211
 212                 switch (*s)
 213                   {
 214                   case '+':
 215                     found_plus = 1;
 216
 217                     /* note fall-through */
 218                   default:
 219                     fprintf (stream, "%c", *s);
 220                     break;
 221
 222                   case '#':
 223                     fputs ("0", stream);
 224                     break;
 225
 226 #define reg(n)  fprintf (stream, "%%%s", reg_names[n])
 227                   case '1':
 228                   case 'r':
 229                     reg (insn.rs1);
 230                     break;
 231
 232                   case '2':
 233                     reg (insn.rs2);
 234                     break;
 235
 236                   case 'd':
 237                     reg (insn.rd);
 238                     break;
 239 #undef  reg
 240
 241 #define freg(n) fprintf (stream, "%%%s", freg_names[n])
 242                   case 'e':
 243                   case 'v':     /* double/even */
 244                   case 'V':     /* quad/multiple of 4 */
 245                     freg (insn.rs1);
 246                     break;
 247
 248                   case 'f':
 249                   case 'B':     /* double/even */
 250                   case 'R':     /* quad/multiple of 4 */
 251                     freg (insn.rs2);
 252                     break;
 253
 254                   case 'g':
 255                   case 'H':     /* double/even */
 256                   case 'J':     /* quad/multiple of 4 */
 257                     freg (insn.rd);
 258                     break;
 259 #undef  freg
 260
 261 #define creg(n) fprintf (stream, "%%c%u", (unsigned int) (n))
 262                   case 'b':
 263                     creg (insn.rs1);
 264                     break;
 265
 266                   case 'c':
 267                     creg (insn.rs2);
 268                     break;
 269
 270                   case 'D':
 271                     creg (insn.rd);
 272                     break;
 273 #undef  creg
 274
 275                   case 'h':
 276                     fprintf (stream, "%%hi(%#x)",
 277                              (unsigned int) insn.imm22 << 10);
 278                     break;
 279
 280                   case 'i':
 281                     {
 282                       /* We cannot trust the compiler to sign-extend
 283                          when extracting the bitfield, hence the shifts.  */
 284                       int imm = ((int) insn.imm13 << 19) >> 19;
 285
 286                       /* Check to see whether we have a 1+i, and take
 287                          note of that fact.
 288
 289                          Note: because of the way we sort the table,
 290                          we will be matching 1+i rather than i+1,
 291                          so it is OK to assume that i is after +,
 292                          not before it.  */
 293                       if (found_plus)
 294                         imm_added_to_rs1 = 1;
 295
 296                       if (imm <= 9)
 297                         fprintf (stream, "%d", imm);
 298                       else
 299                         fprintf (stream, "%#x", (unsigned) imm);
 300                     }
 301                     break;
 302
 303 #ifndef NO_V9
 304                   case 'I':     /* 11 bit immediate.  */
 305                   case 'j':     /* 10 bit immediate.  */
 306                     {
 307                       /* We cannot trust the compiler to sign-extend
 308                          when extracting the bitfield, hence the shifts.  */
 309                       int imm;
 310
 311                       if (*s == 'I')
 312                         imm = ((int) insn.imm13 << 21) >> 21;
 313                       else
 314                         imm = ((int) insn.imm13 << 22) >> 22;
 315
 316                       /* Check to see whether we have a 1+i, and take
 317                          note of that fact.
 318
 319                          Note: because of the way we sort the table,
 320                          we will be matching 1+i rather than i+1,
 321                          so it is OK to assume that i is after +,
 322                          not before it.  */
 323                       if (found_plus)
 324                         imm_added_to_rs1 = 1;
 325
 326                       if (imm <= 9)
 327                         fprintf (stream, "%d", imm);
 328                       else
 329                         fprintf (stream, "%#x", (unsigned) imm);
 330                     }
 331                     break;
 332
 333
 334
 335
 336                   case 'k':
 337                     print_address ((bfd_vma)
 338                                    (memaddr
 339                                     + (((int) insn.disp14 << 18) >> 18) * 4),
 340                                    stream);
 341                     break;
 342
 343                   case 'G':
 344                     print_address ((bfd_vma)
 345                                    (memaddr
 346                                     /* We use only 19 of the 21 bits.  */
 347                                     + (((int) insn.disp21 << 13) >> 13) * 4),
 348                                    stream);
 349                     break;
 350
 351                   case '6':
 352                   case '7':
 353                   case '8':
 354                   case '9':
 355                     fprintf (stream, "fcc%c", *s - '6' + '0');
 356                     break;
 357
 358                   case 'z':
 359                     fputs ("icc", stream);
 360                     break;
 361
 362                   case 'Z':
 363                     fputs ("xcc", stream);
 364                     break;
 365
 366                   case 'E':
 367                     fputs ("%ccr", stream);
 368                     break;
 369
 370                   case 's':
 371                     fputs ("%fprs", stream);
 372                     break;
 373 #endif                          /* NO_V9 */
 374
 375                   case 'M':
 376                     fprintf(stream, "%%asr%d", insn.rs1);
 377                     break;
 378
 379                   case 'm':
 380                     fprintf(stream, "%%asr%d", insn.rd);
 381                     break;
 382
 383                   case 'L':
 384                     print_address ((bfd_vma) memaddr + insn.disp30 * 4,
 385                                    stream);
 386                     break;
 387
 388                   case 'l':
 389                     if ((insn.code >> 22) == 0)
 390                       /* Special case for `unimp'.  Don't try to turn
 391                          it's operand into a function offset.  */
 392                       fprintf (stream, "%#x",
 393                                (unsigned) (((int) insn.disp22 << 10) >> 10));
 394                     else
 395                       /* We cannot trust the compiler to sign-extend
 396                          when extracting the bitfield, hence the shifts.  */
 397                       print_address ((bfd_vma)
 398                                      (memaddr
 399                                       + (((int) insn.disp22 << 10) >> 10) * 4),
 400                                      stream);
 401                     break;
 402
 403                   case 'A':
 404                     fprintf (stream, "(%d)", (int) insn.asi);
 405                     break;
 406
 407                   case 'C':
 408                     fputs ("%csr", stream);
 409                     break;
 410
 411                   case 'F':
 412                     fputs ("%fsr", stream);
 413                     break;
 414
 415                   case 'p':
 416                     fputs ("%psr", stream);
 417                     break;
 418
 419                   case 'q':
 420                     fputs ("%fq", stream);
 421                     break;
 422
 423                   case 'Q':
 424                     fputs ("%cq", stream);
 425                     break;
 426
 427                   case 't':
 428                     fputs ("%tbr", stream);
 429                     break;
 430
 431                   case 'w':
 432                     fputs ("%wim", stream);
 433                     break;
 434
 435                   case 'y':
 436                     fputs ("%y", stream);
 437                     break;
 438                   }
 439               }
 440           }
 441
 442           /* If we are adding or or'ing something to rs1, then
 443              check to see whether the previous instruction was
 444              a sethi to the same register as in the sethi.
 445              If so, attempt to print the result of the add or
 446              or (in this context add and or do the same thing)
 447              and its symbolic value.  */
 448           if (imm_added_to_rs1)
 449             {
 450               union sparc_insn prev_insn;
 451               int errcode = 0;
 452
 453               memcpy(&prev_insn, buffer -4,  sizeof (prev_insn));
 454
 455               if (errcode == 0)
 456                 {
 457                   /* If it is a delayed branch, we need to look at the
 458                      instruction before the delayed branch.  This handles
 459                      sequences such as
 460
 461                      sethi %o1, %hi(_foo), %o1
 462                      call _printf
 463                      or %o1, %lo(_foo), %o1
 464                      */
 465
 466                   if (is_delayed_branch (prev_insn))
 467                     memcpy(&prev_insn, buffer - 8, sizeof(prev_insn));
 468
 469                 }
 470
 471               /* If there was a problem reading memory, then assume
 472                  the previous instruction was not sethi.  */
 473               if (errcode == 0)
 474                 {
 475                   /* Is it sethi to the same register?  */
 476                   if ((prev_insn.code & 0xc1c00000) == 0x01000000
 477                       && prev_insn.rd == insn.rs1)
 478                     {
 479                       fprintf (stream, "\t! ");
 480                       /* We cannot trust the compiler to sign-extend
 481                          when extracting the bitfield, hence the shifts.  */
 482                       print_address (((int) prev_insn.imm22 << 10)
 483                                      | (insn.imm13 << 19) >> 19, stream);
 484                     }
 485                 }
 486             }
 487
 488           return sizeof (insn);
 489         }
 490     }
 491
 492   fprintf (stream, "%#8x", insn.code);
 493   return sizeof (insn);
 494 }
 495
 496
 497 /* Compare opcodes A and B.  */
 498
 499 static int
 500 compare_opcodes (a, b)
 501      char *a, *b;
 502 {
 503   struct sparc_opcode *op0 = (struct sparc_opcode *) a;
 504   struct sparc_opcode *op1 = (struct sparc_opcode *) b;
 505   unsigned long int match0 = op0->match, match1 = op1->match;
 506   unsigned long int lose0 = op0->lose, lose1 = op1->lose;
 507   register unsigned int i;
 508
 509   /* If a bit is set in both match and lose, there is something
 510      wrong with the opcode table.  */
 511   if (match0 & lose0)
 512     {
 513       fprintf (stderr, "Internal error:  bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n",
 514                op0->name, match0, lose0);
 515       op0->lose &= ~op0->match;
 516       lose0 = op0->lose;
 517     }
 518
 519   if (match1 & lose1)
 520     {
 521       fprintf (stderr, "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n",
 522                op1->name, match1, lose1);
 523       op1->lose &= ~op1->match;
 524       lose1 = op1->lose;
 525     }
 526
 527   /* Because the bits that are variable in one opcode are constant in
 528      another, it is important to order the opcodes in the right order.  */
 529   for (i = 0; i < 32; ++i)
 530     {
 531       unsigned long int x = 1 << i;
 532       int x0 = (match0 & x) != 0;
 533       int x1 = (match1 & x) != 0;
 534
 535       if (x0 != x1)
 536         return x1 - x0;
 537     }
 538
 539   for (i = 0; i < 32; ++i)
 540     {
 541       unsigned long int x = 1 << i;
 542       int x0 = (lose0 & x) != 0;
 543       int x1 = (lose1 & x) != 0;
 544
 545       if (x0 != x1)
 546         return x1 - x0;
 547     }
 548
 549   /* They are functionally equal.  So as long as the opcode table is
 550      valid, we can put whichever one first we want, on aesthetic grounds.  */
 551   {
 552     int length_diff = strlen (op0->args) - strlen (op1->args);
 553     if (length_diff != 0)
 554       /* Put the one with fewer arguments first.  */
 555       return length_diff;
 556   }
 557
 558   /* Put 1+i before i+1.  */
 559   {
 560     char *p0 = (char *) strchr(op0->args, '+');
 561     char *p1 = (char *) strchr(op1->args, '+');
 562
 563     if (p0 && p1)
 564       {
 565         /* There is a plus in both operands.  Note that a plus
 566            sign cannot be the first character in args,
 567            so the following [-1]'s are valid.  */
 568         if (p0[-1] == 'i' && p1[1] == 'i')
 569           /* op0 is i+1 and op1 is 1+i, so op1 goes first.  */
 570           return 1;
 571         if (p0[1] == 'i' && p1[-1] == 'i')
 572           /* op0 is 1+i and op1 is i+1, so op0 goes first.  */
 573           return -1;
 574       }
 575   }
 576
 577   /* They are, as far as we can tell, identical.
 578      Since qsort may have rearranged the table partially, there is
 579      no way to tell which one was first in the opcode table as
 580      written, so just say there are equal.  */
 581   return 0;
 582 }