1 # Parallelism using Bitmaps
3 If you think about it this way you can combine setvl, and predication,
4 and indeed vector length, by always working with bitmaps.
6 So: you have 32 WARL CSRs , called X0, ... X31 (or perhaps 2 banks of
7 32 CSR's and have a set of additional CSR's FX0,... FX31)
9 Each contains a bitmap of length 32 (assuming we only have the standard
12 By default, X0 contains 1<<0, X1 contains 1<<1, X2 contains 1 << 2, ...
14 now an instruction like
18 is reinterpreted as referring to the CSR's rather than individual
19 registers. i.e. under simple V it means
23 and it has the following semantics:
25 let rds = registers in bitmap X1
26 let rs1s = registers in bitmap X2 repeated periodically in order of register number to the length of X1
27 let rs2s = registers in bitmap X3 repeated periodically in order of register number to the length of X1
30 parallelfor (rd, rs1, rs2) in (rds[i],rs1s[i], rs2s[i]) where i = 0 to length(rds) - 1
41 rd1s = [x1, x2, x3, x4, x5]
42 rs1s = [x0, x2, x3, x0, x2]
43 rs2s = [x3, x3, x3, x3, x3]
55 add x4, x0, x3 # x2 and x3 have their original values!
56 add x5, x2, x3 # x2 and x3 have their original values!
59 This means that the analogue of setvl is simply the "write any" of
60 setting the bitmap, and the analogue of the return value of setvl,
61 is the "read legal" of the CSR. Moreover popc would tell you how many
62 operations are scheduled in parallel so you know how often you have to
63 repeat a sequential loop.
67 > > Thinking about it more, a bitset for X0 seems a bad idea, or equivalently X0
69 > > the immutable bitset {x0}. That suggests FX0, ... FX31 _is_ a good idea.
71 > what would it mean, to do ops with x0? it would mean "always add 0"
72 > and so on. it sounds kinda useful. like MV being add r1, r2, x0.
73 > it would completely pointless to *have* anything other than "all 1s"
74 > in it though i think :)
76 # pseudocode for decoding ops
78 uint32 XB[32]; // global, assume RV32 for now: CSRs for bitmapping
79 uint32 regs[32]; // global, actual (integer) register file
81 // gets current ACTUAL register to be used
82 // XB had better not be empty...
83 int regdecode(int rn, int *offs)
89 int _newoffs = (_offs + 1) & 0x1f; // 32 regs, modulo
90 if (bmap & (1<<_offs))
99 example usage (pseudo-implementation of add):
101 op_add(int rd, int rs1, int rs2)
103 int id=0, irs1=0, irs2=0;
104 int VL = pcnt(XB[rd];
105 for (int i = 0; i < VL; i++)
107 int actualrd = regdecode(rd , &id);
108 int actualrs1 = regdecode(rs1, &irs1);
109 int actualrs2 = regdecode(rs2, &irs2);
110 regs[actualrd] = regs[actualrs1] + regs[actualrs2];