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[libreriscv.git] / cole.mdwn
1 # Cole Poirier
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3 Apprentice and assistant Project coordinator for Libre-SOC
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5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=colepoirier%40gmail.com&emailassigned_to1=1&emailcc1=1&emailtype1=substring&resolution=---)
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7 # Status tracking
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9 move things along from one stage to the next
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11 ## Currently working on
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13 - <https://bugs.libre-soc.org/show_bug.cgi?id=375> Recruiting more engineers to the project
14 - <https://bugs.libre-soc.org/show_bug.cgi?id=380> First round of recruitment attempts on university and technical mailing lists
15 - <https://bugs.libre-soc.org/show_bug.cgi?id=379> Create wiki page for recruitment emails to point to
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17 - <https://bugs.libre-soc.org/show_bug.cgi?id=388> bpermd tutorial
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19 - <https://bugs.libre-soc.org/show_bug.cgi?id=389> Create bug report for each diagram to be converted to SVG
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21 - <https://bugs.libre-soc.org/show_bug.cgi?id=394> Reach out to developers of 'BlackParrot' RV64GC Multicore SoC
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23 - <https://bugs.libre-soc.org/show_bug.cgi?id=442> Convert comp_unit_req_rel diagram to SVG
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25 ## List of things that need more fleshed out bug reports:
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27 * Scoreboard documentation (<http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008287.html>)
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29 * LDST documentation (<http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008287.html>)
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31 ## Completed but not yet submitted
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33 - Convert hand-drawn 180nm Test ASIC's Memory Layout diagram into editable SVG <https://bugs.libre-soc.org/show_bug.cgi?id=401>
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35 - Coriolis2 documentation and setup scripts
36 <https://bugs.libre-soc.org/show_bug.cgi?id=291>
37 <https://bugs.libre-soc.org/show_bug.cgi?id=178>
38 <https://bugs.libre-soc.org/show_bug.cgi?id=320>
39 <https://bugs.libre-soc.org/show_bug.cgi?id=404>
40 <https://bugs.libre-soc.org/show_bug.cgi?id=138>
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42 ## Submitted for NLNet RFP
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44 submitted but not confirmed paid:
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46 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
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48 ## Paid