9390a0a02732bf803d0c06b82a5523b2eaea687f
[libreriscv.git] / conferences / fosdem2022.mdwn
1 # FOSDEM 2022
2
3 # Libre/Open Hardware, CAD, Modelling and VLSI Dev Room
4
5 TODO:
6
7 * write to openhardware dev room mailing list (private archives)
8 - 13nov2022. no response. assume dead list DONE
9 - therefore take responsibility for writing proposal DONE
10 * write proposal DONE 14nov2022
11 * submit proposal DONE 14no42022
12 * contact interested people
13 - https://www.crowdsupply.com/great-scott-gadgets/luna
14 - danielgrosse https://twitter.com/daniel_grosse
15 - Ganesen Narayanasamy, IBM India, Education Course
16 - openwifi <https://github.com/open-sdr/openwifi/issues/99>
17 - libresilicon (actual DIY Foundry equipment)
18 - opentapeoutdev
19 - openlane / openroad
20 - Staf (Chips4Makers)
21 - efabless
22 - libre-soc
23 - LIP6 / CNRS (coriolis2)
24 - apertus <https://www.apertus.org/axiom-ecosystem>
25 - NLnet (to help with outreach)
26 - Crowdsupply (ditto)
27 - KiCAD and other EDA tools
28 - LibreEDA developer (tkramer)
29
30 ## OHW Devroom Proposal
31
32 <https://submission.fosdem.org/submission/devroom>
33
34 Title: **Libre/Open Hardware, CAD, Modelling and VLSI Dev Room**
35
36 Elaborate description (including possible topics)
37
38 - Open Hardware projects
39 - VLSI ASIC Design and Manufacture
40 * Libre/Open DIY Foundries (nanoscale 3D printing)
41 * Libre/Open VLSI tools and toolflow
42 * Libre/Open VLSI Cell Libraries
43 * VLSI Simulation and Verification
44 - FPGAs
45 * Libre/Open FPGA designs
46 * FPGA toolchains and Reverse-Engineering
47 * FPGA workflow
48 - VLSI RTL and HDL
49 * Advanced and innovative alternative HDL tools
50 * Formal Correctness Proofs
51 * Testing methodologies
52 * Hardware Trust (and how to break it)
53 - Circuit Design (EDA)
54 * Printed circuit board design tools
55 * Analog/Digital Circuit simulation
56 - 3d modeling and analysis
57 * Solid modeling tools
58 * Meshing, modeling and transforming physical representations
59 * Finite element analysis
60 - 3d printing
61 * 3d slicing tools
62 * Motor control
63 - Machine design and integration
64 * ECAD/MCAD integration
65 * Thermal analysis
66 * Wire modeling
67 - Physical Model Data storage
68 * Data representation and optimization
69 * Version control in hardware data storage
70 * Collaborative and team-based hardware design techniques
71 * Building information Modelling
72
73 Why does it fit FOSDEM
74
75 There has been a lot of progress happening in the last few years regarding
76 libre/free chip technology. From RISC-V and OpenPOWER to attempts to create
77 libre/free processes to make your own chips. Various countries have been
78 catching up and helping and building up their semiconductorr industries,
79 some even pushing libre/free toolchains. E.g. EU sponsors various projects
80 to work in this field to create open toolchains.
81
82 Meanwhile others push the boundaries to liberate former closed source toolchains for FPGAs. While an often neglected topic, a lot of work happens by various fantastic players all around the world. We hope to bring some attention to these areas which we basicly all too often take as a given when
83 using computers or electronics.
84 We therefore hope to give Open Hardware and their respective toolchains a
85 small platform, all the way from silicon to PCB.
86
87 Note to organisers: we don't mind merging with another devroom (then
88 helping out), as long as the words "Libre/Open Hardware" are included in
89 the devroom title, and the VLSI and FPGA topics are included. NLnet
90 now sponsors dozens of hardware projects alone, and the google skywater
91 130nm project with e-fabless has produced a massive new innovative
92 community that simply did not exist last year. We are also happy for
93 other (smaller) devrooms to merge with this one.
94
95 Preferred slot: Full Day