conferences/fosdem2022.mdwn

   1 # FOSDEM 2022
   2
   3 # Libre/Open VLSI and FPGA Hardware, Simulation and Verification Dev Room
   4
   5 TODO:
   6
   7 * write to openhardware dev room mailing list (private archives)
   8   - 13nov2022.  no response.  assume dead list DONE
   9   - therefore take responsibility for writing proposal DONE
  10 * write proposal DONE 14nov2022
  11 * submit proposal DONE 14no42022
  12 * CfP TODO
  13 * Talk to devroom managers ONGOING
  14 * contact interested people
  15   - https://www.crowdsupply.com/great-scott-gadgets/luna (ktemkin)
  16   - danielgrosse https://twitter.com/daniel_grosse
  17   - Ganesen Narayanasamy, IBM India, Education Course
  18   - openwifi <https://github.com/open-sdr/openwifi/issues/99>
  19   - libresilicon (actual DIY Foundry equipment)
  20   - opentapeoutdev
  21   - openlane / openroad
  22   - Staf (Chips4Makers)
  23   - efabless
  24   - libre-soc
  25   - LIP6 / CNRS (coriolis2)
  26   - apertus <https://www.apertus.org/axiom-ecosystem>
  27   - NLnet (to help with outreach)
  28   - Crowdsupply (ditto)
  29   - KiCAD and other EDA tools
  30   - LibreEDA developer (tkramer)
  31   - Pine64 <https://wiki.pine64.org/wiki/PineNote>
  32   - Bunnie, xobs (https://www.bunniestudios.com/)
  33   - Tim Ansell/clifford wolf symbiflow et al https://symbiflow.github.io
  34   - Libera.Chat channels:
  35     - yosys DONE 29nov2021
  36     - opentapeoutdev DONE 29nov2021
  37     - symbiflow DONE 29nov2021
  38     - openpower DONE 29nov2021
  39   - Twitter channels
  40     - <https://twitter.com/lkcl/status/1465290569681457157> DONE 29nov2021
  41       @Daniel_Grosse @GanesanBlue @TLLim888 @thepine64 @Chips4Makers
  42       @bunniestudios @librecores @efabless @LIP6_lab @OpenPOWERorg
  43       @OTapeout @YosysHQ @NLnetFDN @NgiPointer @symbiflow @mithro
  44       @pepijndevos
  45
  46
  47 ## OHW Devroom Proposal
  48
  49 <https://submission.fosdem.org/submission/devroom>
  50
  51 Title: **Libre/Open Hardware, CAD, Modelling and VLSI Dev Room**
  52
  53 Changed Title: **Libre/Open VLSI and FPGA Hardware, Simulation and Verification Dev Room**
  54
  55 **Updated** Elaborate description (including possible topics)
  56
  57 - Open Hardware projects
  58 - VLSI ASIC Design and Manufacture
  59   * Libre/Open DIY Foundries (nanoscale 3D printing)
  60   * Libre/Open VLSI tools and toolflow
  61   * Libre/Open VLSI Cell Libraries
  62   * VLSI Simulation and Verification
  63 - FPGAs
  64   * Libre/Open FPGA designs
  65   * FPGA toolchains and Reverse-Engineering
  66   * FPGA workflow
  67 - VLSI RTL and HDL
  68   * Advanced and innovative alternative HDL tools
  69   * Formal Correctness Proofs
  70   * Testing methodologies
  71   * Hardware Trust (and how to break it)
  72 - Circuit Design (EDA)
  73   * Printed circuit board design tools
  74   * Analog/Digital Circuit simulation
  75 - Software Engineering as applied to Hardware
  76   * Continuous Integration for VLSI
  77   * Automated tool development (RTL to GDS-II)
  78   * Automated testing
  79
  80 Why does it fit FOSDEM
  81
  82 There has been a lot of progress happening in the last few years regarding
  83 libre/free chip technology. From RISC-V and OpenPOWER to attempts to create
  84 libre/free processes to make your own chips. Various countries have been
  85 catching up and helping and building up their semiconductorr industries,
  86 some even pushing libre/free toolchains. E.g. EU sponsors various projects
  87 to work in this field to create open toolchains.
  88
  89 Meanwhile others push the boundaries to liberate former closed source toolchains for FPGAs. While an often neglected topic, a lot of work happens by various fantastic players all around the world. We hope to bring some attention to these areas which we basicly all too often take as a given when
  90 using computers or electronics.
  91 We therefore hope to give Open Hardware and their respective toolchains a
  92 small platform, all the way from silicon to PCB.
  93
  94 Note to organisers: we don't mind merging with another devroom (then
  95 helping out), as long as the words "Libre/Open Hardware" are included in
  96 the devroom title, and the VLSI and FPGA topics are included.  NLnet
  97 now sponsors dozens of hardware projects alone, and the google skywater
  98 130nm project with e-fabless has produced a massive new innovative
  99 community that simply did not exist last year.  We are also happy for
 100 other (smaller) devrooms to merge with this one.
 101
 102 Preferred slot: Full Day
 103
 104 # Call for Papers<a name="cfp" />
 105
 106 This is a new devroom dedicated to Libre/Open VLSI, aka "Nanoscale 3D
 107 Printing".
 108
 109 ### What is FOSDEM?
 110
 111 ~~Stolen~~/Borrowed from the website:
 112
 113 _**FOSDEM is a free event for software developers to meet, share ideas and collaborate.**
 114 Every year, thousands of developers of free and open source software from all over the world gather at the event in Brussels.
 115 ...
 116 FOSDEM 2022 will take place on Saturday 5 and Sunday 6 February 2022. It will be an online event._
 117
 118 ### Important stuff:
 119 - FOSDEM is free to attend. There is no registration.
 120 - [FOSDEM website](https://fosdem.org/)
 121 - [FOSDEM code of conduct](https://fosdem.org/2022/practical/conduct/)
 122 - [FOSDEM Schedule](https://fosdem.org/2022/schedule/)
 123
 124 ### Desirable topics:
 125
 126 This devroom welcomes anything related to the topic of nanoscale
 127 3D printing - more commonly known as "VLSI ASIC design".  If you
 128 are making an ASIC, or designing one, or using FPGAs, or developing
 129 an FPGA Board, or developing tools and techniques that make VLSI ASIC
 130 design easier, we'd love to hear from you.  Here's a list of topics:
 131
 132 - Open Hardware projects
 133 - VLSI ASIC Design and Manufacture
 134   * Libre/Open DIY Foundries (nanoscale 3D printing)
 135   * Libre/Open VLSI tools and toolflow
 136   * Libre/Open VLSI Cell Libraries
 137   * VLSI Simulation and Verification
 138 - VLSI Tools in use or in development
 139   * Silicon-proven (QFlow, coriolis2, OpenLANE)
 140   * Under development (LibreEDA, other)
 141   * Advances in Algorithmics in Place and Route and Layout
 142 - FPGAs
 143   * Libre/Open FPGA designs
 144   * FPGA toolchains and Reverse-Engineering
 145   * FPGA workflow
 146 - VLSI RTL and HDL
 147   * Advanced and innovative alternative HDL tools
 148   * Formal Correctness Proofs
 149   * Testing methodologies
 150   * Hardware Trust (and how to break it)
 151 - Circuit Design (EDA)
 152   * Printed circuit board design tools
 153   * Analog/Digital Circuit simulation
 154 - Software Engineering as applied to Hardware
 155   * Continuous Integration for VLSI
 156   * Automated tool development (RTL to GDS-II)
 157   * Automated testing
 158
 159 ### Topic overlap
 160
 161 There is quite a lot of overlap this year with:
 162
 163 * [CAD devroom]( https://fosdem.org/2022/schedule/track/open_source_computer_aided_modeling_and_design/),
 164 * [Emulator devroom](https://fosdem.org/2022/schedule/track/emulator_development/)
 165 * [Retro room](https://fosdem.org/2022/schedule/track/retrocomputing/)
 166
 167 It is entirely up to you as a speaker which devroom you choose: the
 168 main reason for a new VLSI devroom this year is because it is a rapidly
 169 expanding area formerly entirely NDA'd.
 170
 171 ### How to submit your proposal
 172
 173 To submit a talk, please visit the [FOSDEM 2022 Pentabarf website](https://penta.fosdem.org/submission/FOSDEM22) (the mystery of whether pentabarf means barfing in 5 directions or in 5 colors has not been solved yet).
 174
 175 Create an **event** and click on **Show all** in the top right corner to display the full form.
 176
 177 ### What should be in your submission
 178
 179 - name
 180 - short bio
 181 - contact info
 182 - title (funny titles are ~~required~~/appreciated)
 183 - abstract (what you're going talk about)
 184 - duration
 185
 186 ### Important Dates
 187
 188 - **December 28th: submission deadline**
 189   - FAQ - is the submission deadline final?
 190     - Technically speaking, you can submit talks till pentabarf
 191       closes, which should be somewhere in January
 192     - However, talks submitted before the 29th get a higher precedence
 193 - ASAP: announcement selected talks
 194 - January: speakers are contacted to upload pre-record sessions
 195 - February 6th: FOSDEM! (with live Q&A during recorded talks)
 196
 197 ### Contact us
 198
 199 - [Luke Leighton](mailto:lkcl@lkcl.net)
 200 - [Christophe PFaab](mailto:pfaab@uni-bremen.de)
 201 - "lkcl" or "mwfc" on #fosdem Libera.Chat IRC