conferences/fosdem2022.mdwn

   1 # FOSDEM 2022
   2
   3 # Libre/Open VLSI and FPGA Hardware, Simulation and Verification Dev Room
   4
   5 TODO:
   6
   7 * write to openhardware dev room mailing list (private archives)
   8   - 13nov2022.  no response.  assume dead list DONE
   9   - therefore take responsibility for writing proposal DONE
  10 * write proposal DONE 14nov2022
  11 * submit proposal DONE 14no42022
  12 * CfP TODO
  13 * Talk to devroom managers ONGOING
  14 * contact interested people
  15   - https://www.crowdsupply.com/great-scott-gadgets/luna (ktemkin)
  16   - danielgrosse https://twitter.com/daniel_grosse
  17   - Ganesen Narayanasamy, IBM India, Education Course
  18   - openwifi <https://github.com/open-sdr/openwifi/issues/99>
  19   - libresilicon (actual DIY Foundry equipment)
  20   - opentapeoutdev
  21   - openlane / openroad
  22   - Staf (Chips4Makers)
  23   - efabless
  24   - libre-soc
  25   - LIP6 / CNRS (coriolis2)
  26   - apertus <https://www.apertus.org/axiom-ecosystem>
  27   - NLnet (to help with outreach)
  28   - Crowdsupply (ditto)
  29   - KiCAD and other EDA tools
  30   - LibreEDA developer (tkramer)
  31   - Pine64 <https://wiki.pine64.org/wiki/PineNote>
  32   - Bunnie, xobs (https://www.bunniestudios.com/)
  33   - Tim Ansell/clifford wolf symbiflow et al https://symbiflow.github.io
  34   - Libera.Chat channels:
  35     - yosys DONE 29nov2021
  36     - opentapeoutdev DONE 29nov2021
  37     - symbiflow DONE 29nov2021
  38     - openpower DONE 29nov2021
  39   - Twitter channels
  40     - <https://twitter.com/lkcl/status/1465290569681457157> DONE 29nov2021
  41       @Daniel_Grosse @GanesanBlue @TLLim888 @thepine64 @Chips4Makers
  42       @bunniestudios @librecores @efabless @LIP6_lab @OpenPOWERorg
  43       @OTapeout @YosysHQ @NLnetFDN @NgiPointer @symbiflow @mithro
  44
  45
  46 ## OHW Devroom Proposal
  47
  48 <https://submission.fosdem.org/submission/devroom>
  49
  50 Title: **Libre/Open Hardware, CAD, Modelling and VLSI Dev Room**
  51
  52 Changed Title: **Libre/Open VLSI and FPGA Hardware, Simulation and Verification Dev Room**
  53
  54 **Updated** Elaborate description (including possible topics)
  55
  56 - Open Hardware projects
  57 - VLSI ASIC Design and Manufacture
  58   * Libre/Open DIY Foundries (nanoscale 3D printing)
  59   * Libre/Open VLSI tools and toolflow
  60   * Libre/Open VLSI Cell Libraries
  61   * VLSI Simulation and Verification
  62 - FPGAs
  63   * Libre/Open FPGA designs
  64   * FPGA toolchains and Reverse-Engineering
  65   * FPGA workflow
  66 - VLSI RTL and HDL
  67   * Advanced and innovative alternative HDL tools
  68   * Formal Correctness Proofs
  69   * Testing methodologies
  70   * Hardware Trust (and how to break it)
  71 - Circuit Design (EDA)
  72   * Printed circuit board design tools
  73   * Analog/Digital Circuit simulation
  74 - Software Engineering as applied to Hardware
  75   * Continuous Integration for VLSI
  76   * Automated tool development (RTL to GDS-II)
  77   * Automated testing
  78
  79 Why does it fit FOSDEM
  80
  81 There has been a lot of progress happening in the last few years regarding
  82 libre/free chip technology. From RISC-V and OpenPOWER to attempts to create
  83 libre/free processes to make your own chips. Various countries have been
  84 catching up and helping and building up their semiconductorr industries,
  85 some even pushing libre/free toolchains. E.g. EU sponsors various projects
  86 to work in this field to create open toolchains.
  87
  88 Meanwhile others push the boundaries to liberate former closed source toolchains for FPGAs. While an often neglected topic, a lot of work happens by various fantastic players all around the world. We hope to bring some attention to these areas which we basicly all too often take as a given when
  89 using computers or electronics.
  90 We therefore hope to give Open Hardware and their respective toolchains a
  91 small platform, all the way from silicon to PCB.
  92
  93 Note to organisers: we don't mind merging with another devroom (then
  94 helping out), as long as the words "Libre/Open Hardware" are included in
  95 the devroom title, and the VLSI and FPGA topics are included.  NLnet
  96 now sponsors dozens of hardware projects alone, and the google skywater
  97 130nm project with e-fabless has produced a massive new innovative
  98 community that simply did not exist last year.  We are also happy for
  99 other (smaller) devrooms to merge with this one.
 100
 101 Preferred slot: Full Day
 102
 103 # Call for Papers<a name="cfp" />
 104
 105 This is a new devroom dedicated to Libre/Open VLSI, aka "Nanoscale 3D
 106 Printing".
 107
 108 ### What is FOSDEM?
 109
 110 ~~Stolen~~/Borrowed from the website:
 111
 112 _**FOSDEM is a free event for software developers to meet, share ideas and collaborate.**
 113 Every year, thousands of developers of free and open source software from all over the world gather at the event in Brussels.
 114 ...
 115 FOSDEM 2022 will take place on Saturday 5 and Sunday 6 February 2022. It will be an online event._
 116
 117 ### Important stuff:
 118 - FOSDEM is free to attend. There is no registration.
 119 - [FOSDEM website](https://fosdem.org/)
 120 - [FOSDEM code of conduct](https://fosdem.org/2022/practical/conduct/)
 121 - [FOSDEM Schedule](https://fosdem.org/2022/schedule/)
 122
 123 ### Desirable topics:
 124
 125 This devroom welcomes anything related to the topic of nanoscale
 126 3D printing - more commonly known as "VLSI ASIC design".  If you
 127 are making an ASIC, or designing one, or using FPGAs, or developing
 128 an FPGA Board, or developing tools and techniques that make VLSI ASIC
 129 design easier, we'd love to hear from you.  Here's a list of topics:
 130
 131 - Open Hardware projects
 132 - VLSI ASIC Design and Manufacture
 133   * Libre/Open DIY Foundries (nanoscale 3D printing)
 134   * Libre/Open VLSI tools and toolflow
 135   * Libre/Open VLSI Cell Libraries
 136   * VLSI Simulation and Verification
 137 - VLSI Tools in use or in development
 138   * Silicon-proven (QFlow, coriolis2, OpenLANE)
 139   * Under development (LibreEDA, other)
 140   * Advances in Algorithmics in Place and Route and Layout
 141 - FPGAs
 142   * Libre/Open FPGA designs
 143   * FPGA toolchains and Reverse-Engineering
 144   * FPGA workflow
 145 - VLSI RTL and HDL
 146   * Advanced and innovative alternative HDL tools
 147   * Formal Correctness Proofs
 148   * Testing methodologies
 149   * Hardware Trust (and how to break it)
 150 - Circuit Design (EDA)
 151   * Printed circuit board design tools
 152   * Analog/Digital Circuit simulation
 153 - Software Engineering as applied to Hardware
 154   * Continuous Integration for VLSI
 155   * Automated tool development (RTL to GDS-II)
 156   * Automated testing
 157
 158 ### Topic overlap
 159
 160 There is quite a lot of overlap this year with:
 161
 162 * [CAD devroom]( https://fosdem.org/2022/schedule/track/open_source_computer_aided_modeling_and_design/),
 163 * [Emulator devroom](https://fosdem.org/2022/schedule/track/emulator_development/)
 164 * [Retro room](https://fosdem.org/2022/schedule/track/retrocomputing/)
 165
 166 It is entirely up to you as a speaker which devroom you choose: the
 167 main reason for a new VLSI devroom this year is because it is a rapidly
 168 expanding area formerly entirely NDA'd.
 169
 170 ### How to submit your proposal
 171
 172 To submit a talk, please visit the [FOSDEM 2022 Pentabarf website](https://penta.fosdem.org/submission/FOSDEM22) (the mystery of whether pentabarf means barfing in 5 directions or in 5 colors has not been solved yet).
 173
 174 Create an **event** and click on **Show all** in the top right corner to display the full form.
 175
 176 ### What should be in your submission
 177
 178 - name
 179 - short bio
 180 - contact info
 181 - title (funny titles are ~~required~~/appreciated)
 182 - abstract (what you're going talk about)
 183 - duration
 184
 185 ### Important Dates
 186
 187 - **December 28th: submission deadline**
 188   - FAQ - is the submission deadline final?
 189     - Technically speaking, you can submit talks till pentabarf
 190       closes, which should be somewhere in January
 191     - However, talks submitted before the 29th get a higher precedence
 192 - ASAP: announcement selected talks
 193 - January: speakers are contacted to upload pre-record sessions
 194 - February 6th: FOSDEM! (with live Q&A during recorded talks)
 195
 196 ### Contact us
 197
 198 - [Luke Leighton](mailto:lkcl@lkcl.net)
 199 - [Christophe PFaab](mailto:pfaab@uni-bremen.de)
 200 - "lkcl" or "mwfc" on #fosdem Libera.Chat IRC