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[libreriscv.git] / conferences / fosdem2022.mdwn
1 # FOSDEM 2022
2
3 # Libre/Open Hardware, CAD, Modelling and VLSI Dev Room
4
5 TODO:
6
7 * write to openhardware dev room mailing list (private archives)
8 - DONE 13nov2022. no response. assume dead list
9 - therefore take responsibility for writing proposal
10 * write proposal DONE 14nov2022
11 * submit proposal DONE 14no42022
12 * contact interested people
13 - https://www.crowdsupply.com/great-scott-gadgets/luna
14 - danielgrosse
15 - openwifi
16 - libresilicon
17 - opentapeoutdev
18 - efabless
19 - libre-soc
20 - LIP6 / CNRS (coriolis2)
21 - apertus <https://www.apertus.org/axiom-ecosystem>
22
23 ## OHW Devroom Proposal
24
25 <https://submission.fosdem.org/submission/devroom>
26
27 Title: **Libre/Open Hardware, CAD, Modelling and VLSI Dev Room**
28
29 Elaborate description (including possible topics)
30
31 - Open Hardware projects
32 - VLSI ASIC Design and Manufacture
33 * Libre/Open DIY Foundries (nanoscale 3D printing)
34 * Libre/Open VLSI tools and toolflow
35 * Libre/Open VLSI Cell Libraries
36 * VLSI Simulation and Verification
37 - FPGAs
38 * Libre/Open FPGA designs
39 * FPGA toolchains and Reverse-Engineering
40 * FPGA workflow
41 - VLSI RTL and HDL
42 * Advanced and innovative alternative HDL tools
43 * Formal Correctness Proofs
44 * Testing methodologies
45 * Hardware Trust (and how to break it)
46 - Circuit Design (EDA)
47 * Printed circuit board design tools
48 * Analog/Digital Circuit simulation
49 - 3d modeling and analysis
50 * Solid modeling tools
51 * Meshing, modeling and transforming physical representations
52 * Finite element analysis
53 - 3d printing
54 * 3d slicing tools
55 * Motor control
56 - Machine design and integration
57 * ECAD/MCAD integration
58 * Thermal analysis
59 * Wire modeling
60 - Physical Model Data storage
61 * Data representation and optimization
62 * Version control in hardware data storage
63 * Collaborative and team-based hardware design techniques
64 * Building information Modelling
65
66 Why does it fit FOSDEM
67
68 There has been a lot of progress happening in the last few years regarding
69 libre/free chip technology. From RISC-V and OpenPOWER to attempts to create
70 libre/free processes to make your own chips. Various countries have been
71 catching up and helping and building up their semiconductorr industries,
72 some even pushing libre/free toolchains. E.g. EU sponsors various projects
73 to work in this field to create open toolchains.
74
75 Meanwhile others push the boundaries to liberate former closed source toolchains for FPGAs. While an often neglected topic, a lot of work happens by various fantastic players all around the world. We hope to bring some attention to these areas which we basicly all too often take as a given when
76 using computers or electronics.
77 We therefore hope to give Open Hardware and their respective toolchains a
78 small platform, all the way from silicon to PCB.
79
80 Note to organisers: we don't mind merging with another devroom (then
81 helping out), as long as the words "Libre/Open Hardware" are included in
82 the devroom title, and the VLSI and FPGA topics are included. NLnet
83 now sponsors dozens of hardware projects alone, and the google skywater
84 130nm project with e-fabless has produced a massive new innovative
85 community that simply did not exist last year. We are also happy for
86 other (smaller) devrooms to merge with this one.
87
88 Preferred slot: Full Day