conferences/ngipointer2021/ngipointer2021.tex

   1 \documentclass[slidestop]{beamer}
   2 \usepackage{beamerthemesplit}
   3 \usepackage{graphics}
   4 \usepackage{pstricks}
   5
   6 \graphicspath{{./}}
   7
   8 \title{The Libre-SOC Gigabit Router ASIC}
   9 \author{Luke Kenneth Casson Leighton}
  10
  11
  12 \begin{document}
  13
  14 \frame{
  15    \begin{center}
  16     \huge{The Libre-SOC Gigabit Router ASIC}\\
  17     \vspace{32pt}
  18     \Large{An entirely Libre-Licensed ASIC}\\
  19     \Large{with Gigabit Ethernet ports and USB2}\\
  20     \Large{and full Libre Firmware}\\
  21     \vspace{24pt}
  22     \Large{NGI POINTER 2021}\\
  23     \vspace{16pt}
  24     \large{Sponsored by NGI POINTER}\\
  25     \vspace{6pt}
  26     \large{\today}
  27   \end{center}
  28 }
  29
  30
  31 \frame{\frametitle{Why a Libre Gigabit Router?}
  32
  33  \begin{itemize}
  34    \item Most Router ASICs are proprietary\vspace{6pt}
  35    \item Persistent GPL violations \vspace{6pt}
  36    \item Could contain unknown spying back-doors\\
  37          nobody can tell\vspace{6pt}
  38    \item Full HDL and Firmware means it's fully-auditable \vspace{6pt}
  39   \end{itemize}
  40 }
  41
  42
  43 \frame{\frametitle{Who?}
  44
  45 \vspace{15pt}
  46
  47  \begin{itemize}
  48    \item Luke Leighton (Libre-SOC)\\
  49                  Lead developer \vspace{10pt}
  50    \item Jacob Lifshay (Libre-SOC)\\
  51                  Senior developer \vspace{10pt}
  52    \item Jean-Paul Chaput\\
  53                  LIP6.fr, Sorbonne University\\
  54                  Developer of Coriolis2 VLSI \vspace{10pt}
  55    \item Staf Verhaegen\\
  56                  Chips4Makers.io Belgium\\
  57                  Developer of FlexLib Cell Libraries \vspace{10pt}
  58   \end{itemize}
  59 }
  60
  61 \frame{\frametitle{What?}
  62
  63 \vspace{5pt}
  64
  65  \begin{itemize}
  66    \item Vector Processor based on the Power ISA, (Draft) SVP64
  67          Cray Vectors and efficient packet processing instructions
  68    \item Gigabit Ethernet Ports (RGMII) USB2 ports (USB-ULPI),
  69          GPIO, I2C, QSPI etc.
  70    \item DMA Engine to handle fast transfer between Ethernet Ports
  71    \item Analog PLL (Libre-Licensed, no NDA)
  72    \item Lots of simulations and FPGA testing
  73    \item Put it all together: MPW Shuttle Runs\\
  74          to be tested, report published
  75    \item All entirely Libre-Licensed\\
  76          as best we can comply with Foundry NDAs
  77   \end{itemize}
  78 }
  79
  80 \frame{
  81   \begin{center}
  82     {\Large The end\vspace{12pt}\\
  83                    Thank you\vspace{12pt}\\
  84                    Questions?\vspace{12pt}
  85         }
  86   \end{center}
  87
  88   \begin{itemize}
  89         \item Discussion: http://lists.libre-soc.org
  90         \item Libera IRC \#libre-soc
  91         \item http://libre-soc.org/
  92         \item http://coriolis.lip6.fr
  93         \item http://chips4makers.io
  94   \end{itemize}
  95 }
  96
  97
  98 \end{document}