1 # Copyright (c) 2012-2013 ARM Limited
4 # The license below extends only to copyright in the software and shall
5 # not be construed as granting a license to any other intellectual
6 # property including but not limited to intellectual property relating
7 # to a hardware implementation of the functionality of the software
8 # licensed hereunder. You may use the software subject to the license
9 # terms below provided that you ensure that this notice is replicated
10 # unmodified and in its entirety in all distributions of the software,
11 # modified or unmodified, in source code or in binary form.
13 # Copyright (c) 2006-2008 The Regents of The University of Michigan
14 # Copyright (c) 2010 Advanced Micro Devices, Inc.
15 # All rights reserved.
17 # Redistribution and use in source and binary forms, with or without
18 # modification, are permitted provided that the following conditions are
19 # met: redistributions of source code must retain the above copyright
20 # notice, this list of conditions and the following disclaimer;
21 # redistributions in binary form must reproduce the above copyright
22 # notice, this list of conditions and the following disclaimer in the
23 # documentation and/or other materials provided with the distribution;
24 # neither the name of the copyright holders nor the names of its
25 # contributors may be used to endorse or promote products derived from
26 # this software without specific prior written permission.
28 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 from __future__
import print_function
43 from __future__
import absolute_import
47 from os
.path
import join
as joinpath
49 from common
import CpuConfig
50 from . import ObjectList
53 from m5
.defines
import buildEnv
54 from m5
.objects
import *
57 addToPath('../common')
59 def getCPUClass(cpu_type
):
60 """Returns the required cpu class and the mode of operation."""
61 cls
= ObjectList
.cpu_list
.get(cpu_type
)
62 return cls
, cls
.memory_mode()
64 def setCPUClass(options
):
65 """Returns two cpu classes and the initial mode of operation.
67 Restoring from a checkpoint or fast forwarding through a benchmark
68 can be done using one type of cpu, and then the actual
69 simulation can be carried out using another type. This function
70 returns these two types of cpus and the initial mode of operation
71 depending on the options provided.
74 TmpClass
, test_mem_mode
= getCPUClass(options
.cpu_type
)
76 if TmpClass
.require_caches() and \
77 not options
.caches
and not options
.ruby
:
78 fatal("%s must be used with caches" % options
.cpu_type
)
80 if options
.checkpoint_restore
!= None:
81 if options
.restore_with_cpu
!= options
.cpu_type
:
83 TmpClass
, test_mem_mode
= getCPUClass(options
.restore_with_cpu
)
84 elif options
.fast_forward
:
86 TmpClass
= AtomicSimpleCPU
87 test_mem_mode
= 'atomic'
89 # Ruby only supports atomic accesses in noncaching mode
90 if test_mem_mode
== 'atomic' and options
.ruby
:
91 warn("Memory mode will be changed to atomic_noncaching")
92 test_mem_mode
= 'atomic_noncaching'
94 return (TmpClass
, test_mem_mode
, CPUClass
)
96 def setMemClass(options
):
97 """Returns a memory controller class."""
99 return ObjectList
.mem_list
.get(options
.mem_type
)
101 def setWorkCountOptions(system
, options
):
102 if options
.work_item_id
!= None:
103 system
.work_item_id
= options
.work_item_id
104 if options
.num_work_ids
!= None:
105 system
.num_work_ids
= options
.num_work_ids
106 if options
.work_begin_cpu_id_exit
!= None:
107 system
.work_begin_cpu_id_exit
= options
.work_begin_cpu_id_exit
108 if options
.work_end_exit_count
!= None:
109 system
.work_end_exit_count
= options
.work_end_exit_count
110 if options
.work_end_checkpoint_count
!= None:
111 system
.work_end_ckpt_count
= options
.work_end_checkpoint_count
112 if options
.work_begin_exit_count
!= None:
113 system
.work_begin_exit_count
= options
.work_begin_exit_count
114 if options
.work_begin_checkpoint_count
!= None:
115 system
.work_begin_ckpt_count
= options
.work_begin_checkpoint_count
116 if options
.work_cpus_checkpoint_count
!= None:
117 system
.work_cpus_ckpt_count
= options
.work_cpus_checkpoint_count
119 def findCptDir(options
, cptdir
, testsys
):
120 """Figures out the directory from which the checkpointed state is read.
122 There are two different ways in which the directories holding checkpoints
124 1. cpt.<benchmark name>.<instruction count when the checkpoint was taken>
125 2. cpt.<some number, usually the tick value when the checkpoint was taken>
127 This function parses through the options to figure out which one of the
128 above should be used for selecting the checkpoint, and then figures out
129 the appropriate directory.
132 from os
.path
import isdir
, exists
133 from os
import listdir
136 if not isdir(cptdir
):
137 fatal("checkpoint dir %s does not exist!", cptdir
)
140 if options
.at_instruction
or options
.simpoint
:
141 inst
= options
.checkpoint_restore
143 # assume workload 0 has the simpoint
144 if testsys
.cpu
[0].workload
[0].simpoint
== 0:
145 fatal('Unable to find simpoint')
146 inst
+= int(testsys
.cpu
[0].workload
[0].simpoint
)
148 checkpoint_dir
= joinpath(cptdir
, "cpt.%s.%s" % (options
.bench
, inst
))
149 if not exists(checkpoint_dir
):
150 fatal("Unable to find checkpoint directory %s", checkpoint_dir
)
152 elif options
.restore_simpoint_checkpoint
:
153 # Restore from SimPoint checkpoints
154 # Assumes that the checkpoint dir names are formatted as follows:
155 dirs
= listdir(cptdir
)
156 expr
= re
.compile('cpt\.simpoint_(\d+)_inst_(\d+)' +
157 '_weight_([\d\.e\-]+)_interval_(\d+)_warmup_(\d+)')
160 match
= expr
.match(dir)
165 cpt_num
= options
.checkpoint_restore
166 if cpt_num
> len(cpts
):
167 fatal('Checkpoint %d not found', cpt_num
)
168 checkpoint_dir
= joinpath(cptdir
, cpts
[cpt_num
- 1])
169 match
= expr
.match(cpts
[cpt_num
- 1])
171 index
= int(match
.group(1))
172 start_inst
= int(match
.group(2))
173 weight_inst
= float(match
.group(3))
174 interval_length
= int(match
.group(4))
175 warmup_length
= int(match
.group(5))
176 print("Resuming from", checkpoint_dir
)
177 simpoint_start_insts
= []
178 simpoint_start_insts
.append(warmup_length
)
179 simpoint_start_insts
.append(warmup_length
+ interval_length
)
180 testsys
.cpu
[0].simpoint_start_insts
= simpoint_start_insts
181 if testsys
.switch_cpus
!= None:
182 testsys
.switch_cpus
[0].simpoint_start_insts
= simpoint_start_insts
184 print("Resuming from SimPoint", end
=' ')
185 print("#%d, start_inst:%d, weight:%f, interval:%d, warmup:%d" %
186 (index
, start_inst
, weight_inst
, interval_length
, warmup_length
))
189 dirs
= listdir(cptdir
)
190 expr
= re
.compile('cpt\.([0-9]+)')
193 match
= expr
.match(dir)
195 cpts
.append(match
.group(1))
197 cpts
.sort(lambda a
,b
: cmp(long(a
), long(b
)))
199 cpt_num
= options
.checkpoint_restore
200 if cpt_num
> len(cpts
):
201 fatal('Checkpoint %d not found', cpt_num
)
203 cpt_starttick
= int(cpts
[cpt_num
- 1])
204 checkpoint_dir
= joinpath(cptdir
, "cpt.%s" % cpts
[cpt_num
- 1])
206 return cpt_starttick
, checkpoint_dir
208 def scriptCheckpoints(options
, maxtick
, cptdir
):
209 if options
.at_instruction
or options
.simpoint
:
210 checkpoint_inst
= int(options
.take_checkpoints
)
212 # maintain correct offset if we restored from some instruction
213 if options
.checkpoint_restore
!= None:
214 checkpoint_inst
+= options
.checkpoint_restore
216 print("Creating checkpoint at inst:%d" % (checkpoint_inst
))
217 exit_event
= m5
.simulate()
218 exit_cause
= exit_event
.getCause()
219 print("exit cause = %s" % exit_cause
)
221 # skip checkpoint instructions should they exist
222 while exit_cause
== "checkpoint":
223 exit_event
= m5
.simulate()
224 exit_cause
= exit_event
.getCause()
226 if exit_cause
== "a thread reached the max instruction count":
227 m5
.checkpoint(joinpath(cptdir
, "cpt.%s.%d" % \
228 (options
.bench
, checkpoint_inst
)))
229 print("Checkpoint written.")
232 when
, period
= options
.take_checkpoints
.split(",", 1)
237 exit_event
= m5
.simulate(when
- m5
.curTick())
238 exit_cause
= exit_event
.getCause()
239 while exit_cause
== "checkpoint":
240 exit_event
= m5
.simulate(when
- m5
.curTick())
241 exit_cause
= exit_event
.getCause()
243 if exit_cause
== "simulate() limit reached":
244 m5
.checkpoint(joinpath(cptdir
, "cpt.%d"))
248 max_checkpoints
= options
.max_checkpoints
250 while num_checkpoints
< max_checkpoints
and \
251 exit_cause
== "simulate() limit reached":
252 if (sim_ticks
+ period
) > maxtick
:
253 exit_event
= m5
.simulate(maxtick
- sim_ticks
)
254 exit_cause
= exit_event
.getCause()
257 exit_event
= m5
.simulate(period
)
258 exit_cause
= exit_event
.getCause()
260 while exit_event
.getCause() == "checkpoint":
261 exit_event
= m5
.simulate(sim_ticks
- m5
.curTick())
262 if exit_event
.getCause() == "simulate() limit reached":
263 m5
.checkpoint(joinpath(cptdir
, "cpt.%d"))
268 def benchCheckpoints(options
, maxtick
, cptdir
):
269 exit_event
= m5
.simulate(maxtick
- m5
.curTick())
270 exit_cause
= exit_event
.getCause()
273 max_checkpoints
= options
.max_checkpoints
275 while exit_cause
== "checkpoint":
276 m5
.checkpoint(joinpath(cptdir
, "cpt.%d"))
278 if num_checkpoints
== max_checkpoints
:
279 exit_cause
= "maximum %d checkpoints dropped" % max_checkpoints
282 exit_event
= m5
.simulate(maxtick
- m5
.curTick())
283 exit_cause
= exit_event
.getCause()
287 # Set up environment for taking SimPoint checkpoints
288 # Expecting SimPoint files generated by SimPoint 3.2
289 def parseSimpointAnalysisFile(options
, testsys
):
292 simpoint_filename
, weight_filename
, interval_length
, warmup_length
= \
293 options
.take_simpoint_checkpoints
.split(",", 3)
294 print("simpoint analysis file:", simpoint_filename
)
295 print("simpoint weight file:", weight_filename
)
296 print("interval length:", interval_length
)
297 print("warmup length:", warmup_length
)
299 interval_length
= int(interval_length
)
300 warmup_length
= int(warmup_length
)
302 # Simpoint analysis output starts interval counts with 0.
304 simpoint_start_insts
= []
306 # Read in SimPoint analysis files
307 simpoint_file
= open(simpoint_filename
)
308 weight_file
= open(weight_filename
)
310 line
= simpoint_file
.readline()
313 m
= re
.match("(\d+)\s+(\d+)", line
)
315 interval
= int(m
.group(1))
317 fatal('unrecognized line in simpoint file!')
319 line
= weight_file
.readline()
321 fatal('not enough lines in simpoint weight file!')
322 m
= re
.match("([0-9\.e\-]+)\s+(\d+)", line
)
324 weight
= float(m
.group(1))
326 fatal('unrecognized line in simpoint weight file!')
328 if (interval
* interval_length
- warmup_length
> 0):
329 starting_inst_count
= \
330 interval
* interval_length
- warmup_length
331 actual_warmup_length
= warmup_length
333 # Not enough room for proper warmup
334 # Just starting from the beginning
335 starting_inst_count
= 0
336 actual_warmup_length
= interval
* interval_length
338 simpoints
.append((interval
, weight
, starting_inst_count
,
339 actual_warmup_length
))
341 # Sort SimPoints by starting inst count
342 simpoints
.sort(key
=lambda obj
: obj
[2])
344 interval
, weight
, starting_inst_count
, actual_warmup_length
= s
345 print(str(interval
), str(weight
), starting_inst_count
,
346 actual_warmup_length
)
347 simpoint_start_insts
.append(starting_inst_count
)
349 print("Total # of simpoints:", len(simpoints
))
350 testsys
.cpu
[0].simpoint_start_insts
= simpoint_start_insts
352 return (simpoints
, interval_length
)
354 def takeSimpointCheckpoints(simpoints
, interval_length
, cptdir
):
357 last_chkpnt_inst_count
= -1
358 for simpoint
in simpoints
:
359 interval
, weight
, starting_inst_count
, actual_warmup_length
= simpoint
360 if starting_inst_count
== last_chkpnt_inst_count
:
361 # checkpoint starting point same as last time
362 # (when warmup period longer than starting point)
363 exit_cause
= "simpoint starting point found"
366 exit_event
= m5
.simulate()
368 # skip checkpoint instructions should they exist
369 while exit_event
.getCause() == "checkpoint":
370 print("Found 'checkpoint' exit event...ignoring...")
371 exit_event
= m5
.simulate()
373 exit_cause
= exit_event
.getCause()
374 code
= exit_event
.getCode()
376 if exit_cause
== "simpoint starting point found":
377 m5
.checkpoint(joinpath(cptdir
,
378 "cpt.simpoint_%02d_inst_%d_weight_%f_interval_%d_warmup_%d"
379 % (index
, starting_inst_count
, weight
, interval_length
,
380 actual_warmup_length
)))
381 print("Checkpoint #%d written. start inst:%d weight:%f" %
382 (num_checkpoints
, starting_inst_count
, weight
))
384 last_chkpnt_inst_count
= starting_inst_count
389 print('Exiting @ tick %i because %s' % (m5
.curTick(), exit_cause
))
390 print("%d checkpoints taken" % num_checkpoints
)
393 def restoreSimpointCheckpoint():
394 exit_event
= m5
.simulate()
395 exit_cause
= exit_event
.getCause()
397 if exit_cause
== "simpoint starting point found":
398 print("Warmed up! Dumping and resetting stats!")
402 exit_event
= m5
.simulate()
403 exit_cause
= exit_event
.getCause()
405 if exit_cause
== "simpoint starting point found":
406 print("Done running SimPoint!")
407 sys
.exit(exit_event
.getCode())
409 print('Exiting @ tick %i because %s' % (m5
.curTick(), exit_cause
))
410 sys
.exit(exit_event
.getCode())
412 def repeatSwitch(testsys
, repeat_switch_cpu_list
, maxtick
, switch_freq
):
413 print("starting switch loop")
415 exit_event
= m5
.simulate(switch_freq
)
416 exit_cause
= exit_event
.getCause()
418 if exit_cause
!= "simulate() limit reached":
421 m5
.switchCpus(testsys
, repeat_switch_cpu_list
)
424 for old_cpu
, new_cpu
in repeat_switch_cpu_list
:
425 tmp_cpu_list
.append((new_cpu
, old_cpu
))
426 repeat_switch_cpu_list
= tmp_cpu_list
428 if (maxtick
- m5
.curTick()) <= switch_freq
:
429 exit_event
= m5
.simulate(maxtick
- m5
.curTick())
432 def run(options
, root
, testsys
, cpu_class
):
433 if options
.checkpoint_dir
:
434 cptdir
= options
.checkpoint_dir
435 elif m5
.options
.outdir
:
436 cptdir
= m5
.options
.outdir
440 if options
.fast_forward
and options
.checkpoint_restore
!= None:
441 fatal("Can't specify both --fast-forward and --checkpoint-restore")
443 if options
.standard_switch
and not options
.caches
:
444 fatal("Must specify --caches when using --standard-switch")
446 if options
.standard_switch
and options
.repeat_switch
:
447 fatal("Can't specify both --standard-switch and --repeat-switch")
449 if options
.repeat_switch
and options
.take_checkpoints
:
450 fatal("Can't specify both --repeat-switch and --take-checkpoints")
452 np
= options
.num_cpus
455 if options
.prog_interval
:
457 testsys
.cpu
[i
].progress_interval
= options
.prog_interval
461 testsys
.cpu
[i
].max_insts_any_thread
= options
.maxinsts
464 switch_cpus
= [cpu_class(switched_out
=True, cpu_id
=(i
))
468 if options
.fast_forward
:
469 testsys
.cpu
[i
].max_insts_any_thread
= int(options
.fast_forward
)
470 switch_cpus
[i
].system
= testsys
471 switch_cpus
[i
].workload
= testsys
.cpu
[i
].workload
472 switch_cpus
[i
].clk_domain
= testsys
.cpu
[i
].clk_domain
473 switch_cpus
[i
].progress_interval
= \
474 testsys
.cpu
[i
].progress_interval
475 switch_cpus
[i
].isa
= testsys
.cpu
[i
].isa
478 switch_cpus
[i
].max_insts_any_thread
= options
.maxinsts
479 # Add checker cpu if selected
481 switch_cpus
[i
].addCheckerCpu()
483 bpClass
= ObjectList
.bp_list
.get(options
.bp_type
)
484 switch_cpus
[i
].branchPred
= bpClass()
485 if options
.indirect_bp_type
:
486 IndirectBPClass
= ObjectList
.indirect_bp_list
.get(
487 options
.indirect_bp_type
)
488 switch_cpus
[i
].branchPred
.indirectBranchPred
= \
491 # If elastic tracing is enabled attach the elastic trace probe
493 if options
.elastic_trace_en
:
494 CpuConfig
.config_etrace(cpu_class
, switch_cpus
, options
)
496 testsys
.switch_cpus
= switch_cpus
497 switch_cpu_list
= [(testsys
.cpu
[i
], switch_cpus
[i
]) for i
in range(np
)]
499 if options
.repeat_switch
:
500 switch_class
= getCPUClass(options
.cpu_type
)[0]
501 if switch_class
.require_caches() and \
503 print("%s: Must be used with caches" % str(switch_class
))
505 if not switch_class
.support_take_over():
506 print("%s: CPU switching not supported" % str(switch_class
))
509 repeat_switch_cpus
= [switch_class(switched_out
=True, \
510 cpu_id
=(i
)) for i
in range(np
)]
513 repeat_switch_cpus
[i
].system
= testsys
514 repeat_switch_cpus
[i
].workload
= testsys
.cpu
[i
].workload
515 repeat_switch_cpus
[i
].clk_domain
= testsys
.cpu
[i
].clk_domain
516 repeat_switch_cpus
[i
].isa
= testsys
.cpu
[i
].isa
519 repeat_switch_cpus
[i
].max_insts_any_thread
= options
.maxinsts
522 repeat_switch_cpus
[i
].addCheckerCpu()
524 testsys
.repeat_switch_cpus
= repeat_switch_cpus
527 repeat_switch_cpu_list
= [(switch_cpus
[i
], repeat_switch_cpus
[i
])
530 repeat_switch_cpu_list
= [(testsys
.cpu
[i
], repeat_switch_cpus
[i
])
533 if options
.standard_switch
:
534 switch_cpus
= [TimingSimpleCPU(switched_out
=True, cpu_id
=(i
))
536 switch_cpus_1
= [DerivO3CPU(switched_out
=True, cpu_id
=(i
))
540 switch_cpus
[i
].system
= testsys
541 switch_cpus_1
[i
].system
= testsys
542 switch_cpus
[i
].workload
= testsys
.cpu
[i
].workload
543 switch_cpus_1
[i
].workload
= testsys
.cpu
[i
].workload
544 switch_cpus
[i
].clk_domain
= testsys
.cpu
[i
].clk_domain
545 switch_cpus_1
[i
].clk_domain
= testsys
.cpu
[i
].clk_domain
546 switch_cpus
[i
].isa
= testsys
.cpu
[i
].isa
547 switch_cpus_1
[i
].isa
= testsys
.cpu
[i
].isa
549 # if restoring, make atomic cpu simulate only a few instructions
550 if options
.checkpoint_restore
!= None:
551 testsys
.cpu
[i
].max_insts_any_thread
= 1
552 # Fast forward to specified location if we are not restoring
553 elif options
.fast_forward
:
554 testsys
.cpu
[i
].max_insts_any_thread
= int(options
.fast_forward
)
555 # Fast forward to a simpoint (warning: time consuming)
556 elif options
.simpoint
:
557 if testsys
.cpu
[i
].workload
[0].simpoint
== 0:
558 fatal('simpoint not found')
559 testsys
.cpu
[i
].max_insts_any_thread
= \
560 testsys
.cpu
[i
].workload
[0].simpoint
561 # No distance specified, just switch
563 testsys
.cpu
[i
].max_insts_any_thread
= 1
566 if options
.warmup_insts
:
567 switch_cpus
[i
].max_insts_any_thread
= options
.warmup_insts
571 switch_cpus_1
[i
].max_insts_any_thread
= options
.maxinsts
573 # attach the checker cpu if selected
575 switch_cpus
[i
].addCheckerCpu()
576 switch_cpus_1
[i
].addCheckerCpu()
578 testsys
.switch_cpus
= switch_cpus
579 testsys
.switch_cpus_1
= switch_cpus_1
581 (testsys
.cpu
[i
], switch_cpus
[i
]) for i
in range(np
)
584 (switch_cpus
[i
], switch_cpus_1
[i
]) for i
in range(np
)
587 # set the checkpoint in the cpu before m5.instantiate is called
588 if options
.take_checkpoints
!= None and \
589 (options
.simpoint
or options
.at_instruction
):
590 offset
= int(options
.take_checkpoints
)
591 # Set an instruction break point
594 if testsys
.cpu
[i
].workload
[0].simpoint
== 0:
595 fatal('no simpoint for testsys.cpu[%d].workload[0]', i
)
596 checkpoint_inst
= int(testsys
.cpu
[i
].workload
[0].simpoint
) + offset
597 testsys
.cpu
[i
].max_insts_any_thread
= checkpoint_inst
598 # used for output below
599 options
.take_checkpoints
= checkpoint_inst
601 options
.take_checkpoints
= offset
602 # Set all test cpus with the right number of instructions
603 # for the upcoming simulation
605 testsys
.cpu
[i
].max_insts_any_thread
= offset
607 if options
.take_simpoint_checkpoints
!= None:
608 simpoints
, interval_length
= parseSimpointAnalysisFile(options
, testsys
)
610 checkpoint_dir
= None
611 if options
.checkpoint_restore
:
612 cpt_starttick
, checkpoint_dir
= findCptDir(options
, cptdir
, testsys
)
613 root
.apply_config(options
.param
)
614 m5
.instantiate(checkpoint_dir
)
616 # Initialization is complete. If we're not in control of simulation
617 # (that is, if we're a slave simulator acting as a component in another
618 # 'master' simulator) then we're done here. The other simulator will
619 # call simulate() directly. --initialize-only is used to indicate this.
620 if options
.initialize_only
:
623 # Handle the max tick settings now that tick frequency was resolved
624 # during system instantiation
625 # NOTE: the maxtick variable here is in absolute ticks, so it must
626 # include any simulated ticks before a checkpoint
627 explicit_maxticks
= 0
628 maxtick_from_abs
= m5
.MaxTick
629 maxtick_from_rel
= m5
.MaxTick
630 maxtick_from_maxtime
= m5
.MaxTick
631 if options
.abs_max_tick
:
632 maxtick_from_abs
= options
.abs_max_tick
633 explicit_maxticks
+= 1
634 if options
.rel_max_tick
:
635 maxtick_from_rel
= options
.rel_max_tick
636 if options
.checkpoint_restore
:
637 # NOTE: this may need to be updated if checkpoints ever store
638 # the ticks per simulated second
639 maxtick_from_rel
+= cpt_starttick
640 if options
.at_instruction
or options
.simpoint
:
641 warn("Relative max tick specified with --at-instruction or" \
642 " --simpoint\n These options don't specify the " \
643 "checkpoint start tick, so assuming\n you mean " \
645 explicit_maxticks
+= 1
647 maxtick_from_maxtime
= m5
.ticks
.fromSeconds(options
.maxtime
)
648 explicit_maxticks
+= 1
649 if explicit_maxticks
> 1:
650 warn("Specified multiple of --abs-max-tick, --rel-max-tick, --maxtime."\
652 maxtick
= min([maxtick_from_abs
, maxtick_from_rel
, maxtick_from_maxtime
])
654 if options
.checkpoint_restore
!= None and maxtick
< cpt_starttick
:
655 fatal("Bad maxtick (%d) specified: " \
656 "Checkpoint starts starts from tick: %d", maxtick
, cpt_starttick
)
658 if options
.standard_switch
or cpu_class
:
659 if options
.standard_switch
:
660 print("Switch at instruction count:%s" %
661 str(testsys
.cpu
[0].max_insts_any_thread
))
662 exit_event
= m5
.simulate()
663 elif cpu_class
and options
.fast_forward
:
664 print("Switch at instruction count:%s" %
665 str(testsys
.cpu
[0].max_insts_any_thread
))
666 exit_event
= m5
.simulate()
668 print("Switch at curTick count:%s" % str(10000))
669 exit_event
= m5
.simulate(10000)
670 print("Switched CPUS @ tick %s" % (m5
.curTick()))
672 m5
.switchCpus(testsys
, switch_cpu_list
)
674 if options
.standard_switch
:
675 print("Switch at instruction count:%d" %
676 (testsys
.switch_cpus
[0].max_insts_any_thread
))
678 #warmup instruction count may have already been set
679 if options
.warmup_insts
:
680 exit_event
= m5
.simulate()
682 exit_event
= m5
.simulate(options
.standard_switch
)
683 print("Switching CPUS @ tick %s" % (m5
.curTick()))
684 print("Simulation ends instruction count:%d" %
685 (testsys
.switch_cpus_1
[0].max_insts_any_thread
))
686 m5
.switchCpus(testsys
, switch_cpu_list1
)
688 # If we're taking and restoring checkpoints, use checkpoint_dir
689 # option only for finding the checkpoints to restore from. This
690 # lets us test checkpointing by restoring from one set of
691 # checkpoints, generating a second set, and then comparing them.
692 if (options
.take_checkpoints
or options
.take_simpoint_checkpoints
) \
693 and options
.checkpoint_restore
:
695 if m5
.options
.outdir
:
696 cptdir
= m5
.options
.outdir
700 if options
.take_checkpoints
!= None :
701 # Checkpoints being taken via the command line at <when> and at
702 # subsequent periods of <period>. Checkpoint instructions
703 # received from the benchmark running are ignored and skipped in
704 # favor of command line checkpoint instructions.
705 exit_event
= scriptCheckpoints(options
, maxtick
, cptdir
)
707 # Take SimPoint checkpoints
708 elif options
.take_simpoint_checkpoints
!= None:
709 takeSimpointCheckpoints(simpoints
, interval_length
, cptdir
)
711 # Restore from SimPoint checkpoints
712 elif options
.restore_simpoint_checkpoint
!= None:
713 restoreSimpointCheckpoint()
716 if options
.fast_forward
:
718 print("**** REAL SIMULATION ****")
720 # If checkpoints are being taken, then the checkpoint instruction
721 # will occur in the benchmark code it self.
722 if options
.repeat_switch
and maxtick
> options
.repeat_switch
:
723 exit_event
= repeatSwitch(testsys
, repeat_switch_cpu_list
,
724 maxtick
, options
.repeat_switch
)
726 exit_event
= benchCheckpoints(options
, maxtick
, cptdir
)
728 print('Exiting @ tick %i because %s' %
729 (m5
.curTick(), exit_event
.getCause()))
730 if options
.checkpoint_at_end
:
731 m5
.checkpoint(joinpath(cptdir
, "cpt.%d"))
733 if exit_event
.getCode() != 0:
734 print("Simulated exit code not 0! Exit code is", exit_event
.getCode())