configs/example/arm/fs_power.py

   1 # Copyright (c) 2017, 2020 ARM Limited
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  35
  36 # This configuration file extends the example ARM big.LITTLE(tm)
  37 # with example power models.
  38
  39 from __future__ import print_function
  40 from __future__ import absolute_import
  41
  42 import argparse
  43 import os
  44
  45 import m5
  46 from m5.objects import MathExprPowerModel, PowerModel
  47
  48 import fs_bigLITTLE as bL
  49
  50
  51 class CpuPowerOn(MathExprPowerModel):
  52     def __init__(self, cpu_path, **kwargs):
  53         super(CpuPowerOn, self).__init__(**kwargs)
  54         # 2A per IPC, 3pA per cache miss
  55         # and then convert to Watt
  56         self.dyn =  "voltage * (2 * {}.ipc + 3 * 0.000000001 * " \
  57                     "{}.dcache.overall_misses / sim_seconds)".format(cpu_path,
  58                                                                      cpu_path)
  59         self.st = "4 * temp"
  60
  61 class CpuPowerOff(MathExprPowerModel):
  62     dyn = "0"
  63     st = "0"
  64
  65 class CpuPowerModel(PowerModel):
  66     def __init__(self, cpu_path, **kwargs):
  67         super(CpuPowerModel, self).__init__(**kwargs)
  68         self.pm = [
  69             CpuPowerOn(cpu_path), # ON
  70             CpuPowerOff(), # CLK_GATED
  71             CpuPowerOff(), # SRAM_RETENTION
  72             CpuPowerOff(), # OFF
  73         ]
  74
  75 class L2PowerOn(MathExprPowerModel):
  76     def __init__(self, l2_path, **kwargs):
  77         super(L2PowerOn, self).__init__(**kwargs)
  78         # Example to report l2 Cache overall_accesses
  79         # The estimated power is converted to Watt and will vary based
  80         # on the size of the cache
  81         self.dyn = "{}.overall_accesses * 0.000018000".format(l2_path)
  82         self.st = "(voltage * 3)/10"
  83
  84 class L2PowerOff(MathExprPowerModel):
  85     dyn = "0"
  86     st = "0"
  87
  88 class L2PowerModel(PowerModel):
  89     def __init__(self, l2_path, **kwargs):
  90         super(L2PowerModel, self).__init__(**kwargs)
  91         # Choose a power model for every power state
  92         self.pm = [
  93             L2PowerOn(l2_path), # ON
  94             L2PowerOff(), # CLK_GATED
  95             L2PowerOff(), # SRAM_RETENTION
  96             L2PowerOff(), # OFF
  97         ]
  98
  99
 100 def main():
 101     parser = argparse.ArgumentParser(
 102         description="Generic ARM big.LITTLE configuration with "\
 103         "example power models")
 104     bL.addOptions(parser)
 105     options = parser.parse_args()
 106
 107     if options.cpu_type != "timing":
 108         m5.fatal("The power example script requires 'timing' CPUs.")
 109
 110     root = bL.build(options)
 111
 112     # Wire up some example power models to the CPUs
 113     for cpu in root.system.descendants():
 114         if not isinstance(cpu, m5.objects.BaseCPU):
 115             continue
 116
 117         cpu.power_state.default_state = "ON"
 118         cpu.power_model = CpuPowerModel(cpu.path())
 119
 120     # Example power model for the L2 Cache of the bigCluster
 121     for l2 in root.system.bigCluster.l2.descendants():
 122         if not isinstance(l2, m5.objects.Cache):
 123             continue
 124
 125         l2.power_state.default_state = "ON"
 126         l2.power_model = L2PowerModel(l2.path())
 127
 128     bL.instantiate(options)
 129
 130     print("*" * 70)
 131     print("WARNING: The power numbers generated by this script are "
 132         "examples. They are not representative of any particular "
 133         "implementation or process.")
 134     print("*" * 70)
 135
 136     # Dumping stats periodically
 137     m5.stats.periodicStatDump(m5.ticks.fromSeconds(0.1E-3))
 138     bL.run()
 139
 140
 141 if __name__ == "__m5_main__":
 142     main()