configs/example/fs.py

   1 # Copyright (c) 2010-2011 ARM Limited
   2 # All rights reserved.
   3 #
   4 # The license below extends only to copyright in the software and shall
   5 # not be construed as granting a license to any other intellectual
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  10 # unmodified and in its entirety in all distributions of the software,
  11 # modified or unmodified, in source code or in binary form.
  12 #
  13 # Copyright (c) 2006-2007 The Regents of The University of Michigan
  14 # All rights reserved.
  15 #
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  17 # modification, are permitted provided that the following conditions are
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  25 # this software without specific prior written permission.
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  27 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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  30 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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  33 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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  37 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38 #
  39 # Authors: Ali Saidi
  40
  41 import optparse
  42 import os
  43 import sys
  44
  45 import m5
  46 from m5.defines import buildEnv
  47 from m5.objects import *
  48 from m5.util import addToPath, fatal
  49
  50 addToPath('../common')
  51
  52 from FSConfig import *
  53 from SysPaths import *
  54 from Benchmarks import *
  55 import Simulation
  56 import CacheConfig
  57 from Caches import *
  58
  59 # Get paths we might need.  It's expected this file is in m5/configs/example.
  60 config_path = os.path.dirname(os.path.abspath(__file__))
  61 config_root = os.path.dirname(config_path)
  62
  63 parser = optparse.OptionParser()
  64
  65 # Simulation options
  66 parser.add_option("--timesync", action="store_true",
  67         help="Prevent simulated time from getting ahead of real time")
  68
  69 # System options
  70 parser.add_option("--kernel", action="store", type="string")
  71 parser.add_option("--script", action="store", type="string")
  72 parser.add_option("--frame-capture", action="store_true",
  73         help="Stores changed frame buffers from the VNC server to compressed "\
  74         "files in the gem5 output directory")
  75
  76 if buildEnv['TARGET_ISA'] == "arm":
  77     parser.add_option("--bare-metal", action="store_true",
  78                help="Provide the raw system without the linux specific bits")
  79     parser.add_option("--machine-type", action="store", type="choice",
  80             choices=ArmMachineType.map.keys(), default="RealView_PBX")
  81 # Benchmark options
  82 parser.add_option("--dual", action="store_true",
  83                   help="Simulate two systems attached with an ethernet link")
  84 parser.add_option("-b", "--benchmark", action="store", type="string",
  85                   dest="benchmark",
  86                   help="Specify the benchmark to run. Available benchmarks: %s"\
  87                   % DefinedBenchmarks)
  88
  89 # Metafile options
  90 parser.add_option("--etherdump", action="store", type="string", dest="etherdump",
  91                   help="Specify the filename to dump a pcap capture of the" \
  92                   "ethernet traffic")
  93
  94 execfile(os.path.join(config_root, "common", "Options.py"))
  95
  96 (options, args) = parser.parse_args()
  97
  98 if args:
  99     print "Error: script doesn't take any positional arguments"
 100     sys.exit(1)
 101
 102 # driver system CPU is always simple... note this is an assignment of
 103 # a class, not an instance.
 104 DriveCPUClass = AtomicSimpleCPU
 105 drive_mem_mode = 'atomic'
 106
 107 # system under test can be any CPU
 108 (TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
 109
 110 TestCPUClass.clock = '2GHz'
 111 DriveCPUClass.clock = '2GHz'
 112
 113 if options.benchmark:
 114     try:
 115         bm = Benchmarks[options.benchmark]
 116     except KeyError:
 117         print "Error benchmark %s has not been defined." % options.benchmark
 118         print "Valid benchmarks are: %s" % DefinedBenchmarks
 119         sys.exit(1)
 120 else:
 121     if options.dual:
 122         bm = [SysConfig(), SysConfig()]
 123     else:
 124         bm = [SysConfig()]
 125
 126 np = options.num_cpus
 127
 128 if buildEnv['TARGET_ISA'] == "alpha":
 129     test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0])
 130 elif buildEnv['TARGET_ISA'] == "mips":
 131     test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0])
 132 elif buildEnv['TARGET_ISA'] == "sparc":
 133     test_sys = makeSparcSystem(test_mem_mode, bm[0])
 134 elif buildEnv['TARGET_ISA'] == "x86":
 135     test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0])
 136     setWorkCountOptions(test_sys, options)
 137 elif buildEnv['TARGET_ISA'] == "arm":
 138     test_sys = makeArmSystem(test_mem_mode,
 139             options.machine_type, bm[0],
 140             bare_metal=options.bare_metal)
 141     setWorkCountOptions(test_sys, options)
 142 else:
 143     fatal("incapable of building non-alpha or non-sparc full system!")
 144
 145 if options.kernel is not None:
 146     test_sys.kernel = binary(options.kernel)
 147
 148 if options.script is not None:
 149     test_sys.readfile = options.script
 150
 151 test_sys.init_param = options.init_param
 152
 153 test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)]
 154
 155 CacheConfig.config_cache(options, test_sys)
 156
 157 if bm[0]:
 158     mem_size = bm[0].mem()
 159 else:
 160     mem_size = SysConfig().mem()
 161 if options.caches or options.l2cache:
 162     test_sys.iocache = IOCache(addr_range=mem_size)
 163     test_sys.iocache.cpu_side = test_sys.iobus.master
 164     test_sys.iocache.mem_side = test_sys.membus.slave
 165 else:
 166     test_sys.iobridge = Bridge(delay='50ns', nack_delay='4ns',
 167                                ranges = [AddrRange(mem_size)])
 168     test_sys.iobridge.slave = test_sys.iobus.master
 169     test_sys.iobridge.master = test_sys.membus.slave
 170
 171 for i in xrange(np):
 172     if options.fastmem:
 173         test_sys.cpu[i].physmem_port = test_sys.physmem.port
 174
 175 if buildEnv['TARGET_ISA'] == 'mips':
 176     setMipsOptions(TestCPUClass)
 177
 178 if len(bm) == 2:
 179     if buildEnv['TARGET_ISA'] == 'alpha':
 180         drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1])
 181     elif buildEnv['TARGET_ISA'] == 'mips':
 182         drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1])
 183     elif buildEnv['TARGET_ISA'] == 'sparc':
 184         drive_sys = makeSparcSystem(drive_mem_mode, bm[1])
 185     elif buildEnv['TARGET_ISA'] == 'x86':
 186         drive_sys = makeX86System(drive_mem_mode, np, bm[1])
 187     elif buildEnv['TARGET_ISA'] == 'arm':
 188         drive_sys = makeArmSystem(drive_mem_mode, options.machine_type, bm[1])
 189
 190     drive_sys.cpu = DriveCPUClass(cpu_id=0)
 191     drive_sys.cpu.connectAllPorts(drive_sys.membus)
 192     if options.fastmem:
 193         drive_sys.cpu.physmem_port = drive_sys.physmem.port
 194     if options.kernel is not None:
 195         drive_sys.kernel = binary(options.kernel)
 196     drive_sys.iobridge = Bridge(delay='50ns', nack_delay='4ns',
 197                                ranges = [AddrRange(bm[1].mem())])
 198     drive_sys.iobridge.slave = drive_sys.iobus.port
 199     drive_sys.iobridge.master = drive_sys.membus.port
 200
 201     drive_sys.init_param = options.init_param
 202     root = makeDualRoot(True, test_sys, drive_sys, options.etherdump)
 203 elif len(bm) == 1:
 204     root = Root(full_system=True, system=test_sys)
 205 else:
 206     print "Error I don't know how to create more than 2 systems."
 207     sys.exit(1)
 208
 209 if options.timesync:
 210     root.time_sync_enable = True
 211
 212 if options.frame_capture:
 213     VncServer.frame_capture = True
 214
 215 Simulation.run(options, root, test_sys, FutureClass)