configs/example/hmctest.py

   1
   2 import sys
   3 import argparse
   4 import subprocess
   5 from pprint import pprint
   6
   7 import m5
   8 from m5.objects import *
   9 from m5.util import *
  10
  11 addToPath('../')
  12
  13 from common import MemConfig
  14 from common import HMC
  15
  16
  17 def add_options(parser):
  18     parser.add_argument("--external-memory-system", default=0, action="store",
  19                         type=int, help="External memory system")
  20     # TLM related options, currently optional in configs/common/MemConfig.py
  21     parser.add_argument("--tlm-memory", action="store_true", help="use\
  22                         external port for SystemC TLM co-simulation. Default:\
  23                         no")
  24     # Elastic traces related options, currently optional in
  25     # configs/common/MemConfig.py
  26     parser.add_argument("--elastic-trace-en", action="store_true",
  27                         help="enable capture of data dependency and\
  28                         instruction fetch traces using elastic trace\
  29                         probe.\nDefault: no")
  30     # Options related to traffic generation
  31     parser.add_argument("--num-tgen", default=4, action="store", type=int,
  32                         choices=[4], help="number of traffic generators.\
  33                         Right now this script supports only 4.\nDefault: 4")
  34     parser.add_argument("--tgen-cfg-file",
  35                         default="./configs/example/hmc_tgen.cfg",
  36                         type=str, help="Traffic generator(s) configuration\
  37                         file. Note: this script uses the same configuration\
  38                         file for all traffic generators")
  39
  40
  41 # considering 4GB HMC device with following parameters
  42 # hmc_device_size = '4GB'
  43 # hmc_vault_size = '256MB'
  44 # hmc_stack_size = 8
  45 # hmc_bank_in_stack = 2
  46 # hmc_bank_size = '16MB'
  47 # hmc_bank_in_vault = 16
  48 def build_system(options):
  49     # create the system we are going to simulate
  50     system = System()
  51     # use timing mode for the interaction between master-slave ports
  52     system.mem_mode = 'timing'
  53     # set the clock fequency of the system
  54     clk = '100GHz'
  55     vd = VoltageDomain(voltage='1V')
  56     system.clk_domain = SrcClockDomain(clock=clk, voltage_domain=vd)
  57     # add traffic generators to the system
  58     system.tgen = [TrafficGen(config_file=options.tgen_cfg_file) for i in
  59                    range(options.num_tgen)]
  60     # Config memory system with given HMC arch
  61     MemConfig.config_mem(options, system)
  62     # Connect the traffic generatiors
  63     if options.arch == "distributed":
  64         for i in range(options.num_tgen):
  65             system.tgen[i].port = system.membus.slave
  66         # connect the system port even if it is not used in this example
  67         system.system_port = system.membus.slave
  68     if options.arch == "mixed":
  69         for i in range(int(options.num_tgen/2)):
  70             system.tgen[i].port = system.membus.slave
  71         hh = system.hmc_host
  72         if options.enable_global_monitor:
  73             system.tgen[2].port = hh.lmonitor[2].slave
  74             hh.lmonitor[2].master = hh.seriallink[2].slave
  75             system.tgen[3].port = hh.lmonitor[3].slave
  76             hh.lmonitor[3].master = hh.seriallink[3].slave
  77         else:
  78             system.tgen[2].port = hh.seriallink[2].slave
  79             system.tgen[3].port = hh.seriallink[3].slave
  80         # connect the system port even if it is not used in this example
  81         system.system_port = system.membus.slave
  82     if options.arch == "same":
  83         hh = system.hmc_host
  84         for i in range(options.num_links_controllers):
  85             if options.enable_global_monitor:
  86                 system.tgen[i].port = hh.lmonitor[i].slave
  87             else:
  88                 system.tgen[i].port = hh.seriallink[i].slave
  89     # set up the root SimObject
  90     root = Root(full_system=False, system=system)
  91     return root
  92
  93
  94 def main():
  95     parser = argparse.ArgumentParser(description="Simple system using HMC as\
  96                                      main memory")
  97     HMC.add_options(parser)
  98     add_options(parser)
  99     options = parser.parse_args()
 100     # build the system
 101     root = build_system(options)
 102     # instantiate all of the objects we've created so far
 103     m5.instantiate()
 104     print("Beginning simulation!")
 105     event = m5.simulate(10000000000)
 106     m5.stats.dump()
 107     print('Exiting @ tick %i because %s (exit code is %i)' % (m5.curTick(),
 108                                                               event.getCause(),
 109                                                               event.getCode()))
 110     print("Done")
 111
 112
 113 if __name__ == "__m5_main__":
 114     main()