15416491926f7ff3a2ebb898dffbf56c7f6166bb
1 # Copyright (c) 2006-2007 The Regents of The University of Michigan
2 # Copyright (c) 2009 Advanced Micro Devices, Inc.
5 # Redistribution and use in source and binary forms, with or without
6 # modification, are permitted provided that the following conditions are
7 # met: redistributions of source code must retain the above copyright
8 # notice, this list of conditions and the following disclaimer;
9 # redistributions in binary form must reproduce the above copyright
10 # notice, this list of conditions and the following disclaimer in the
11 # documentation and/or other materials provided with the distribution;
12 # neither the name of the copyright holders nor the names of its
13 # contributors may be used to endorse or promote products derived from
14 # this software without specific prior written permission.
16 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 # Authors: Ron Dreslinski
32 from m5
.objects
import *
33 from m5
.defines
import buildEnv
34 from m5
.util
import addToPath
35 import os
, optparse
, sys
36 addToPath('../common')
41 if buildEnv
['FULL_SYSTEM']:
42 panic("This script requires system-emulation mode (*_SE).")
44 # Get paths we might need. It's expected this file is in m5/configs/example.
45 config_path
= os
.path
.dirname(os
.path
.abspath(__file__
))
46 config_root
= os
.path
.dirname(config_path
)
47 m5_root
= os
.path
.dirname(config_root
)
49 parser
= optparse
.OptionParser()
51 parser
.add_option("-l", "--maxloads", metavar
="N", default
=0,
52 help="Stop after N loads")
53 parser
.add_option("--progress", type="int", default
=1000,
55 help="Progress message interval "
56 "[default: %default]")
57 parser
.add_option("--num-dmas", type="int", default
=0, help="# of dma testers")
60 # Add the ruby specific and protocol specific options
62 Ruby
.define_options(parser
)
64 execfile(os
.path
.join(config_root
, "common", "Options.py"))
66 (options
, args
) = parser
.parse_args()
69 # Set the default cache size and associativity to be very small to encourage
70 # races between requests and writebacks.
72 options
.l1d_size
="256B"
73 options
.l1i_size
="256B"
74 options
.l2_size
="512B"
82 print "Error: script doesn't take any positional arguments"
87 if options
.num_cpus
> block_size
:
88 print "Error: Number of testers %d limited to %d because of false sharing" \
89 % (options
.num_cpus
, block_size
)
93 # Currently ruby does not support atomic, functional, or uncacheable accesses
95 cpus
= [ MemTest(atomic
= False, \
96 max_loads
= options
.maxloads
, \
98 percent_functional
= 0, \
99 percent_uncacheable
= 0, \
100 progress_interval
= options
.progress
) \
101 for i
in xrange(options
.num_cpus
) ]
103 system
= System(cpu
= cpus
,
104 funcmem
= PhysicalMemory(),
105 physmem
= PhysicalMemory())
107 if options
.num_dmas
> 0:
108 dmas
= [ MemTest(atomic
= False, \
109 max_loads
= options
.maxloads
, \
111 percent_functional
= 0, \
112 percent_uncacheable
= 0, \
113 progress_interval
= options
.progress
) \
114 for i
in xrange(options
.num_dmas
) ]
115 system
.dma_devices
= dmas
119 system
.ruby
= Ruby
.create_system(options
, \
124 # The tester is most effective when randomization is turned on and
125 # artifical delay is randomly inserted on messages
127 system
.ruby
.randomization
= True
129 assert(len(cpus
) == len(system
.ruby
._cpu
_ruby
_ports
))
131 for (i
, cpu
) in enumerate(cpus
):
133 # Tie the cpu memtester ports to the correct system ports
135 cpu
.test
= system
.ruby
._cpu
_ruby
_ports
[i
].port
136 cpu
.functional
= system
.funcmem
.port
139 # Since the memtester is incredibly bursty, increase the deadlock
140 # threshold to 5 million cycles
142 system
.ruby
._cpu
_ruby
_ports
[i
].deadlock_threshold
= 5000000
144 for (i
, dma
) in enumerate(dmas
):
146 # Tie the dma memtester ports to the correct functional port
147 # Note that the test port has already been connected to the dma_sequencer
149 dma
.functional
= system
.funcmem
.port
151 # -----------------------
153 # -----------------------
155 root
= Root( system
= system
)
156 root
.system
.mem_mode
= 'timing'
158 # Not much point in this being higher than the L1 latency
159 m5
.ticks
.setGlobalFrequency('1ns')
161 # instantiate configuration
164 # simulate until program terminates
165 exit_event
= m5
.simulate(options
.maxtick
)
167 print 'Exiting @ tick', m5
.curTick(), 'because', exit_event
.getCause()