configs/example/ruby_mem_test.py

   1 # Copyright (c) 2006-2007 The Regents of The University of Michigan
   2 # Copyright (c) 2009 Advanced Micro Devices, Inc.
   3 # All rights reserved.
   4 #
   5 # Redistribution and use in source and binary forms, with or without
   6 # modification, are permitted provided that the following conditions are
   7 # met: redistributions of source code must retain the above copyright
   8 # notice, this list of conditions and the following disclaimer;
   9 # redistributions in binary form must reproduce the above copyright
  10 # notice, this list of conditions and the following disclaimer in the
  11 # documentation and/or other materials provided with the distribution;
  12 # neither the name of the copyright holders nor the names of its
  13 # contributors may be used to endorse or promote products derived from
  14 # this software without specific prior written permission.
  15 #
  16 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27
  28 from __future__ import print_function
  29 from __future__ import absolute_import
  30
  31 import m5
  32 from m5.objects import *
  33 from m5.defines import buildEnv
  34 from m5.util import addToPath
  35 import os, optparse, sys
  36
  37 addToPath('../')
  38
  39 from common import Options
  40 from ruby import Ruby
  41
  42 # Get paths we might need.  It's expected this file is in m5/configs/example.
  43 config_path = os.path.dirname(os.path.abspath(__file__))
  44 config_root = os.path.dirname(config_path)
  45
  46 parser = optparse.OptionParser()
  47 Options.addNoISAOptions(parser)
  48
  49 parser.add_option("--maxloads", metavar="N", default=0,
  50                   help="Stop after N loads")
  51 parser.add_option("--progress", type="int", default=1000,
  52                   metavar="NLOADS",
  53                   help="Progress message interval "
  54                   "[default: %default]")
  55 parser.add_option("--num-dmas", type="int", default=0, help="# of dma testers")
  56 parser.add_option("--functional", type="int", default=0,
  57                   help="percentage of accesses that should be functional")
  58 parser.add_option("--suppress-func-errors", action="store_true",
  59                   help="suppress panic when functional accesses fail")
  60
  61 #
  62 # Add the ruby specific and protocol specific options
  63 #
  64 Ruby.define_options(parser)
  65
  66 (options, args) = parser.parse_args()
  67
  68 #
  69 # Set the default cache size and associativity to be very small to encourage
  70 # races between requests and writebacks.
  71 #
  72 options.l1d_size="256B"
  73 options.l1i_size="256B"
  74 options.l2_size="512B"
  75 options.l3_size="1kB"
  76 options.l1d_assoc=2
  77 options.l1i_assoc=2
  78 options.l2_assoc=2
  79 options.l3_assoc=2
  80
  81 if args:
  82      print("Error: script doesn't take any positional arguments")
  83      sys.exit(1)
  84
  85 block_size = 64
  86
  87 if options.num_cpus > block_size:
  88      print("Error: Number of testers %d limited to %d because of false sharing"
  89            % (options.num_cpus, block_size))
  90      sys.exit(1)
  91
  92 #
  93 # Currently ruby does not support atomic or uncacheable accesses
  94 #
  95 cpus = [ MemTest(max_loads = options.maxloads,
  96                  percent_functional = options.functional,
  97                  percent_uncacheable = 0,
  98                  progress_interval = options.progress,
  99                  suppress_func_errors = options.suppress_func_errors) \
 100          for i in range(options.num_cpus) ]
 101
 102 system = System(cpu = cpus,
 103                 clk_domain = SrcClockDomain(clock = options.sys_clock),
 104                 mem_ranges = [AddrRange(options.mem_size)])
 105
 106 if options.num_dmas > 0:
 107     dmas = [ MemTest(max_loads = options.maxloads,
 108                      percent_functional = 0,
 109                      percent_uncacheable = 0,
 110                      progress_interval = options.progress,
 111                      suppress_func_errors =
 112                                         not options.suppress_func_errors) \
 113              for i in range(options.num_dmas) ]
 114     system.dma_devices = dmas
 115 else:
 116     dmas = []
 117
 118 dma_ports = []
 119 for (i, dma) in enumerate(dmas):
 120     dma_ports.append(dma.test)
 121 Ruby.create_system(options, False, system, dma_ports = dma_ports)
 122
 123 # Create a top-level voltage domain and clock domain
 124 system.voltage_domain = VoltageDomain(voltage = options.sys_voltage)
 125 system.clk_domain = SrcClockDomain(clock = options.sys_clock,
 126                                    voltage_domain = system.voltage_domain)
 127 # Create a seperate clock domain for Ruby
 128 system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
 129                                         voltage_domain = system.voltage_domain)
 130
 131 #
 132 # The tester is most effective when randomization is turned on and
 133 # artifical delay is randomly inserted on messages
 134 #
 135 system.ruby.randomization = True
 136
 137 assert(len(cpus) == len(system.ruby._cpu_ports))
 138
 139 for (i, cpu) in enumerate(cpus):
 140     #
 141     # Tie the cpu memtester ports to the correct system ports
 142     #
 143     cpu.port = system.ruby._cpu_ports[i].slave
 144
 145     #
 146     # Since the memtester is incredibly bursty, increase the deadlock
 147     # threshold to 5 million cycles
 148     #
 149     system.ruby._cpu_ports[i].deadlock_threshold = 5000000
 150
 151 # -----------------------
 152 # run simulation
 153 # -----------------------
 154
 155 root = Root( full_system = False, system = system )
 156 root.system.mem_mode = 'timing'
 157
 158 # Not much point in this being higher than the L1 latency
 159 m5.ticks.setGlobalFrequency('1ns')
 160
 161 # instantiate configuration
 162 m5.instantiate()
 163
 164 # simulate until program terminates
 165 exit_event = m5.simulate(options.abs_max_tick)
 166
 167 print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause())