configs/example/se.py

   1 # Copyright (c) 2012-2013 ARM Limited
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  13 # Copyright (c) 2006-2008 The Regents of The University of Michigan
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  38
  39 # Simple test script
  40 #
  41 # "m5 test.py"
  42
  43 from __future__ import print_function
  44 from __future__ import absolute_import
  45
  46 import optparse
  47 import sys
  48 import os
  49
  50 import m5
  51 from m5.defines import buildEnv
  52 from m5.objects import *
  53 from m5.params import NULL
  54 from m5.util import addToPath, fatal, warn
  55
  56 addToPath('../')
  57
  58 from ruby import Ruby
  59
  60 from common import Options
  61 from common import Simulation
  62 from common import CacheConfig
  63 from common import CpuConfig
  64 from common import ObjectList
  65 from common import MemConfig
  66 from common.FileSystemConfig import config_filesystem
  67 from common.Caches import *
  68 from common.cpu2000 import *
  69
  70 def get_processes(options):
  71     """Interprets provided options and returns a list of processes"""
  72
  73     multiprocesses = []
  74     inputs = []
  75     outputs = []
  76     errouts = []
  77     pargs = []
  78
  79     workloads = options.cmd.split(';')
  80     if options.input != "":
  81         inputs = options.input.split(';')
  82     if options.output != "":
  83         outputs = options.output.split(';')
  84     if options.errout != "":
  85         errouts = options.errout.split(';')
  86     if options.options != "":
  87         pargs = options.options.split(';')
  88
  89     idx = 0
  90     for wrkld in workloads:
  91         process = Process(pid = 100 + idx)
  92         process.executable = wrkld
  93         process.cwd = os.getcwd()
  94
  95         if options.env:
  96             with open(options.env, 'r') as f:
  97                 process.env = [line.rstrip() for line in f]
  98
  99         if len(pargs) > idx:
 100             process.cmd = [wrkld] + pargs[idx].split()
 101         else:
 102             process.cmd = [wrkld]
 103
 104         if len(inputs) > idx:
 105             process.input = inputs[idx]
 106         if len(outputs) > idx:
 107             process.output = outputs[idx]
 108         if len(errouts) > idx:
 109             process.errout = errouts[idx]
 110
 111         multiprocesses.append(process)
 112         idx += 1
 113
 114     if options.smt:
 115         assert(options.cpu_type == "DerivO3CPU")
 116         return multiprocesses, idx
 117     else:
 118         return multiprocesses, 1
 119
 120
 121 parser = optparse.OptionParser()
 122 Options.addCommonOptions(parser)
 123 Options.addSEOptions(parser)
 124
 125 if '--ruby' in sys.argv:
 126     Ruby.define_options(parser)
 127
 128 (options, args) = parser.parse_args()
 129
 130 if args:
 131     print("Error: script doesn't take any positional arguments")
 132     sys.exit(1)
 133
 134 multiprocesses = []
 135 numThreads = 1
 136
 137 if options.bench:
 138     apps = options.bench.split("-")
 139     if len(apps) != options.num_cpus:
 140         print("number of benchmarks not equal to set num_cpus!")
 141         sys.exit(1)
 142
 143     for app in apps:
 144         try:
 145             if buildEnv['TARGET_ISA'] == 'arm':
 146                 exec("workload = %s('arm_%s', 'linux', '%s')" % (
 147                         app, options.arm_iset, options.spec_input))
 148             else:
 149                 exec("workload = %s(buildEnv['TARGET_ISA', 'linux', '%s')" % (
 150                         app, options.spec_input))
 151             multiprocesses.append(workload.makeProcess())
 152         except:
 153             print("Unable to find workload for %s: %s" %
 154                   (buildEnv['TARGET_ISA'], app),
 155                   file=sys.stderr)
 156             sys.exit(1)
 157 elif options.cmd:
 158     multiprocesses, numThreads = get_processes(options)
 159 else:
 160     print("No workload specified. Exiting!\n", file=sys.stderr)
 161     sys.exit(1)
 162
 163
 164 (CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
 165 CPUClass.numThreads = numThreads
 166
 167 # Check -- do not allow SMT with multiple CPUs
 168 if options.smt and options.num_cpus > 1:
 169     fatal("You cannot use SMT with multiple CPUs!")
 170
 171 np = options.num_cpus
 172 system = System(cpu = [CPUClass(cpu_id=i) for i in range(np)],
 173                 mem_mode = test_mem_mode,
 174                 mem_ranges = [AddrRange(options.mem_size)],
 175                 cache_line_size = options.cacheline_size,
 176                 workload = NULL)
 177
 178 if numThreads > 1:
 179     system.multi_thread = True
 180
 181 # Create a top-level voltage domain
 182 system.voltage_domain = VoltageDomain(voltage = options.sys_voltage)
 183
 184 # Create a source clock for the system and set the clock period
 185 system.clk_domain = SrcClockDomain(clock =  options.sys_clock,
 186                                    voltage_domain = system.voltage_domain)
 187
 188 # Create a CPU voltage domain
 189 system.cpu_voltage_domain = VoltageDomain()
 190
 191 # Create a separate clock domain for the CPUs
 192 system.cpu_clk_domain = SrcClockDomain(clock = options.cpu_clock,
 193                                        voltage_domain =
 194                                        system.cpu_voltage_domain)
 195
 196 # If elastic tracing is enabled, then configure the cpu and attach the elastic
 197 # trace probe
 198 if options.elastic_trace_en:
 199     CpuConfig.config_etrace(CPUClass, system.cpu, options)
 200
 201 # All cpus belong to a common cpu_clk_domain, therefore running at a common
 202 # frequency.
 203 for cpu in system.cpu:
 204     cpu.clk_domain = system.cpu_clk_domain
 205
 206 if ObjectList.is_kvm_cpu(CPUClass) or ObjectList.is_kvm_cpu(FutureClass):
 207     if buildEnv['TARGET_ISA'] == 'x86':
 208         system.kvm_vm = KvmVM()
 209         for process in multiprocesses:
 210             process.useArchPT = True
 211             process.kvmInSE = True
 212     else:
 213         fatal("KvmCPU can only be used in SE mode with x86")
 214
 215 # Sanity check
 216 if options.simpoint_profile:
 217     if not ObjectList.is_noncaching_cpu(CPUClass):
 218         fatal("SimPoint/BPProbe should be done with an atomic cpu")
 219     if np > 1:
 220         fatal("SimPoint generation not supported with more than one CPUs")
 221
 222 for i in range(np):
 223     if options.smt:
 224         system.cpu[i].workload = multiprocesses
 225     elif len(multiprocesses) == 1:
 226         system.cpu[i].workload = multiprocesses[0]
 227     else:
 228         system.cpu[i].workload = multiprocesses[i]
 229
 230     if options.simpoint_profile:
 231         system.cpu[i].addSimPointProbe(options.simpoint_interval)
 232
 233     if options.checker:
 234         system.cpu[i].addCheckerCpu()
 235
 236     if options.bp_type:
 237         bpClass = ObjectList.bp_list.get(options.bp_type)
 238         system.cpu[i].branchPred = bpClass()
 239
 240     if options.indirect_bp_type:
 241         indirectBPClass = \
 242             ObjectList.indirect_bp_list.get(options.indirect_bp_type)
 243         system.cpu[i].branchPred.indirectBranchPred = indirectBPClass()
 244
 245     system.cpu[i].createThreads()
 246
 247 if options.ruby:
 248     Ruby.create_system(options, False, system)
 249     assert(options.num_cpus == len(system.ruby._cpu_ports))
 250
 251     system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
 252                                         voltage_domain = system.voltage_domain)
 253     for i in range(np):
 254         ruby_port = system.ruby._cpu_ports[i]
 255
 256         # Create the interrupt controller and connect its ports to Ruby
 257         # Note that the interrupt controller is always present but only
 258         # in x86 does it have message ports that need to be connected
 259         system.cpu[i].createInterruptController()
 260
 261         # Connect the cpu's cache ports to Ruby
 262         system.cpu[i].icache_port = ruby_port.slave
 263         system.cpu[i].dcache_port = ruby_port.slave
 264         if buildEnv['TARGET_ISA'] == 'x86':
 265             system.cpu[i].interrupts[0].pio = ruby_port.master
 266             system.cpu[i].interrupts[0].int_master = ruby_port.slave
 267             system.cpu[i].interrupts[0].int_slave = ruby_port.master
 268             system.cpu[i].itb.walker.port = ruby_port.slave
 269             system.cpu[i].dtb.walker.port = ruby_port.slave
 270 else:
 271     MemClass = Simulation.setMemClass(options)
 272     system.membus = SystemXBar()
 273     system.system_port = system.membus.slave
 274     CacheConfig.config_cache(options, system)
 275     MemConfig.config_mem(options, system)
 276     config_filesystem(system, options)
 277
 278 if options.wait_gdb:
 279     for cpu in system.cpu:
 280         cpu.wait_for_remote_gdb = True
 281
 282 root = Root(full_system = False, system = system)
 283 Simulation.run(options, root, system, FutureClass)