8e9f18691468a16e5591e47cf2db4f04ce0a0417
1 # -*- coding: utf-8 -*-
2 # Copyright (c) 2015 Jason Power
5 # Redistribution and use in source and binary forms, with or without
6 # modification, are permitted provided that the following conditions are
7 # met: redistributions of source code must retain the above copyright
8 # notice, this list of conditions and the following disclaimer;
9 # redistributions in binary form must reproduce the above copyright
10 # notice, this list of conditions and the following disclaimer in the
11 # documentation and/or other materials provided with the distribution;
12 # neither the name of the copyright holders nor the names of its
13 # contributors may be used to endorse or promote products derived from
14 # this software without specific prior written permission.
16 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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19 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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22 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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28 """ This file creates a system with Ruby caches and executes 'threads', a
29 simple multi-threaded application with false sharing to stress the Ruby
32 See Part 3 in the Learning gem5 book:
33 http://gem5.org/documentation/learning_gem5/part3/MSIintro
35 IMPORTANT: If you modify this file, it's likely that the Learning gem5 book
36 also needs to be updated. For now, email Jason <jason@lowepower.com>
39 from __future__
import print_function
40 from __future__
import absolute_import
42 # import the m5 (gem5) library created when gem5 is built
44 # import all of the SimObjects
45 from m5
.objects
import *
47 # Needed for running C++ threads
48 m5
.util
.addToPath('../../')
49 from common
.FileSystemConfig
import config_filesystem
51 # You can import ruby_caches_MI_example to use the MI_example protocol instead
53 from msi_caches
import MyCacheSystem
55 # create the system we are going to simulate
58 # Set the clock fequency of the system (and all of its children)
59 system
.clk_domain
= SrcClockDomain()
60 system
.clk_domain
.clock
= '1GHz'
61 system
.clk_domain
.voltage_domain
= VoltageDomain()
64 system
.mem_mode
= 'timing' # Use timing accesses
65 system
.mem_ranges
= [AddrRange('512MB')] # Create an address range
67 # Create a pair of simple CPUs
68 system
.cpu
= [TimingSimpleCPU() for i
in range(2)]
70 # Create a DDR3 memory controller and connect it to the membus
71 system
.mem_ctrl
= MemCtrl()
72 system
.mem_ctrl
.dram
= DDR3_1600_8x8()
73 system
.mem_ctrl
.dram
.range = system
.mem_ranges
[0]
75 # create the interrupt controller for the CPU and connect to the membus
76 for cpu
in system
.cpu
:
77 cpu
.createInterruptController()
79 # Create the Ruby System
80 system
.caches
= MyCacheSystem()
81 system
.caches
.setup(system
, system
.cpu
, [system
.mem_ctrl
])
83 # get ISA for the binary to run.
84 isa
= str(m5
.defines
.buildEnv
['TARGET_ISA']).lower()
86 # Run application and use the compiled ISA to find the binary
87 # grab the specific path to the binary
88 thispath
= os
.path
.dirname(os
.path
.realpath(__file__
))
89 binary
= os
.path
.join(thispath
, '../../../', 'tests/test-progs/threads/bin/',
92 # Create a process for a simple "multi-threaded" application
95 # cmd is a list which begins with the executable (like argv)
96 process
.cmd
= [binary
]
97 # Set the cpu to use the process as its workload and create thread contexts
98 for cpu
in system
.cpu
:
99 cpu
.workload
= process
102 system
.workload
= SEWorkload
.init_compatible(binary
)
104 # Set up the pseudo file system for the threads function above
105 config_filesystem(system
)
107 # set up the root SimObject and start the simulation
108 root
= Root(full_system
= False, system
= system
)
109 # instantiate all of the objects we've created above
112 print("Beginning simulation!")
113 exit_event
= m5
.simulate()
114 print('Exiting @ tick {} because {}'.format(
115 m5
.curTick(), exit_event
.getCause())